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Smartphone Market Driving 7nm & 5nm

Node 3-D Devices and Stacked Devices

John Ogawa Borland


J.O.B. Technologies
Aiea, Hawaii
www.job-technologies.com
July 14, 2017

J.O.B. Technologies (Strategic 1


Marketing, Sales &
Technology)
Outline

• Introduction: Smartphone Market Driver for 3-D


– 2016 Semiconductor Market and Applications
• Computation, Mobile, Automotive, Medical and IoT
– Smartphone device technology
• Application Processor 2-D planar (A8: 20nm node)3-D FinFET (A9: 14/16nm node)
• Rear facing camera (8Mp12Mp16Mp) 3-D TSV3-D Monolithic (Direct Wafer Bonding)
• Flash memory 2-D 13nm  3-D 40nm with 48-layers
• 3-D Bulk FinFET Transistor Formation
• 3-D FinFET High Mobility Channel Formation
• 3-D Gate-All-Around Nanowire Transistor Formation for sub-5nm node
or Monolithic 3-D stacking
• More-Than-Moore 3-D Stacked Devices
• Summary

2
Total IC Market
2014=$340B
2015=$333B
2016=$343B

J.O.B. Technologies (Strategic 3


Marketing, Sales &
Technology)
403M std phones
J.O.B. Technologies (Strategic 4
Marketing, Sales &
Nov 9, 2016
Technology)
Smartphone as new technology driver
– 2011: iPhone 4s A5 and Galaxy S245nm (2007) 4 years old technology
– 2012: iPhone 5 A6 and Galaxy S332nm (2009) 3 years old tech
– 2013: April Galaxy S4 and Sept iPhone 5s/5c A728nm (2010) 3 years old tech
– 2014: April Galaxy S5 and Sept iPhone 6/6+ A820/22nm (2012) 2 years old tech
– 2015: April Galaxy S6 and Sept iPhone 6s/6s+ A914/16nm 3-D FinFET (2014) most
advanced technology node
– 2016: April Galaxy S7 and Sept iPhone 7/7+ A1016nm (2014)
– 2017: April Galaxy S8 and Sept iPhone 7s/7s+ A1110nm (2016) most advanced
technology node
iPhone 6s iPhone 7
iPhone 6s+ iPhone 7+

2015 2016

2011
2012
2013
2014
A9 2015 14/16nm
A10 2016 3.3B 16nm FF+ 5

A11 2017 10nm


Everyone Equal
at 14nm FinFET?
6

10nm

& msec Flash


SF-stressor

6 10nm
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
45nm 32nm 28nm 20nm 14/16nm 16nm 10nm

Intel, Sept. 6, 2011


IBM: 1980s1999 (1um180nm)
J.O.B. Technologies (Strategic
Intel: 1999Aug-2014 (180nm14nm) 6
Marketing, Sales &
Technology)
Samsung & TSMC: Oct-2016 (10nm?)
J.O.B. Technologies (Strategic 7
Marketing, Sales &
Technology) March 28, 2017: Intel Technology and Manufacturing Day
S6 S5
App. Processor Samsung Qualcomn
Rear Camera 16Mp Sony 16Mp Samsung
Front Camera 5Mp Samsung 5Mp Samsung
Flash 64Gb Samsung 64Gb Samsung
DRAM 3Gb Samsung

ePOP

Battery

Dick James, Chipworks, April 6, 2015

Samsung Galaxy S6
J.O.B. Technologies (Strategic 8
Marketing, Sales &
Technology)
Samsung Galaxy S7 Smartphone
March 2, 2016

14nm FinFET
S7 S6
App. Processor Qualcomn Samsung
Rear Camera 12Mp Sony 16Mp Sony
Front Camera 5Mp Samsung 5Mp Samsung
Flash 32Gb Samsung+microSD 64Gb Samsung
DRAM 4Gb Hynix 3Gb Samsung
Water Proof 5feet 30 minutes No

J.O.B. Technologies (Strategic 9


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Technology)
Samsung Galaxy S7
March 2016 Sony
12Mp Rear Camera
3rd-gen Hybrid DBI
wafer to wafer
bonding

Kagawa et al., Sony, IEDM-2016 paper 8.4

J.O.B. Technologies (Strategic 10


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Technology)
10nm FinFET

Qualcomm Snapdragon 835

Sony 8Mp Front facing Selfie Camera &


Iris scanner

Sony 12Mp Rear facing Camera with


DBI (direct bond interconnect)

J.O.B. Technologies (Strategic 11


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Technology)
12Mp

Thick SOI

iPhone 6s
2015

J.O.B. Technologies (Strategic 12


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Technology)
Apple iPhone 6s & 6s+
Sept 9, 2015

TSMC 16nmFF+

J.O.B. Technologies (Strategic 13


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Technology)
Intel Inside!
Intel Mobile Cellular Platform
-Two RF transceivers
-Baseband modem
-(RF) power management IC

Samsung 2Gb LPDDR4 DRAM

Flash Memory options


SK Hynix 128Gb (15nm)
Toshiba 128Gb (15nm)
Toshiba 48-layer 3-D NAND 256Gb

Battery 1960mAh (7.45Wh)

J.O.B. Technologies (Strategic 14


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Technology)
Sony 2nd-generation
TSV 3-D stack
Toshiba 256Gb-Flash
48-layer 3-D NAND

J.O.B. Technologies (Strategic 15


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Technology)
Sony’s 3-Layer 20Mp CIS

Sony’s Future 4-Layer CIS

J.O.B. Technologies (Strategic 16


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Technology)
Dick James, May 2017
Best Buy PNY 256Gb=$49.99
$0.195/Gb

J.O.B. Technologies (Strategic 17


Marketing, Sales &
Technology) Techinsights Nov 2016
Outline

• Introduction: Smartphone Market Driver for 3-D


• 3-D Bulk FinFET Transistor Formation
– 22nm14/16nm10nm7nm5nm
• 3-D FinFET High Mobility Channel Formation
• 3-D Gate-All-Around Nanowire Transistor Formation for sub-5nm node
or Monolithic 3-D stacking
• Summary

18
pMOS nMOS
+7-9 degree=~60 degree tilt!
52 Degree Tilt 52 Degree Tilt

22 atoms~7nm

J.O.B. Technologies (Strategic 19


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Technology)
Prof. Ogura, Meiji Univ. 3/1/16

J.O.B. Technologies (Strategic 20


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Technology)
14/16nm
FinFET by
Intel, Samsung
& TSMC

J.O.B. Technologies (Strategic 21


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Technology)
VLSI-2016 paper 9.1

J.O.B. Technologies (Strategic 22


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Technology)
IEDM-2016 paper 2.6

J.O.B. Technologies (Strategic 23


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µh=220
µe=170

10nm FinFET will


stay with bulk Si-
channels and
eS/D-stressors. No
SiGe channel.
J.O.B. Technologies (Strategic 24
Marketing, Sales & VLSI-2016 paper 2.1
Technology)
VLSI-2017

30% 35%

J.O.B. Technologies (Strategic 25


Marketing, Sales &
Technology)
Dick James, Chipworks, Semicon/West 2015 AVS-WCJUG
Meeting

Dual Width
FinFET at
14nm node

2 generations
ahead of
Samsung (7nm)

J.O.B. Technologies (Strategic 26


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Technology)
NMOS only,
No Image of PMOS

From Dick James


March 28, 2017: Intel
Technology and
Manufacturing Day

J.O.B. Technologies (Strategic 27


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Technology)
Kennel, Intel, IEEE/RTP 2006

Rosseel et al., IMEC/ASM, ECS Oct 2016

J.O.B. Technologies (Strategic 28


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Technology)
VLSI Sym June 2016

Paper 7.5: UMC/AMAT ultralow p+ SiGe contact resistivity (5.9E-9Ω-cm2)

Paper 7.1: IMEC/AMAT/Samsung ultralow resistivity contacts (2.1E-9Ω-


cm2) SiP =2E21/cm3 + Ge-PAI=2.1x10-9 Ω-cm2
Pre-contact PAI 70%-SiGeB + Ge-PAI= 2.1x10-9 Ω-cm2
Paper 7.3: AMAT 7nm node ultralow n+ contact resistivity (<1.0E-9Ω-cm2)
DSA versus nsec laser annealing
Paper 7.4: GF/IBM canceled: Sub-2x10-9 Ω-cm2 N- and P-Contact
Resistivity with Si:P and Ge:Ga Metastable Alloys for FinFET CMOS
Technology

J.O.B. Technologies (Strategic 29


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IEDM-2016 paper 17.2

paper 2.7

B=2E19/cm3
Group III-Me=1E21/cm3

J.O.B. Technologies (Strategic 30


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Technology)
J.O.B. Technologies (Strategic 31
Marketing, Sales &
IEDM-2016 paper 17.2
Technology)
IEDM-2016 paper 17.4

J.O.B. Technologies (Strategic 32


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Technology)
J.O.B. Technologies (Strategic 33
Marketing, Sales & IWJT-2017
Technology)
VLSI-2017

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J.O.B. Technologies (Strategic 35
Marketing, Sales & VLSI-2017
Technology)
VLSI-2017

J.O.B. Technologies (Strategic 36


Marketing, Sales &
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VLSI-2017

J.O.B. Technologies (Strategic 37


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Ge: Trumbore, Bell Labs, 1959

Ga

Al

J.O.B. Technologies (Strategic 38


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Technology)
Sept IIT-2016 Ga

J.O.B. Technologies (Strategic 39


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Technology)
Solid Solubility Limited Dopant
Activation of Group III (B, Ga & In) in
Ge Targeting sub-7nm Node Low p+
Contact Resistance
IWJT June 2, 2017
John Borland, J.O.B. Technologies, Aiea, HI
Yao-Jen Lee, NDL, Hsinchu, Taiwan
Shang-Shiun Chuang & Tseung-Yuen Tseng, National Chiao Tung University, Hsinchu,
Taiwan
Chee-Wee Liu, National Taiwan University, Taipei, Taiwan
Karim Huet, LASSE/Screen, France
Gary Goodman & John Marino, EAG Laboratories, East Windsor, NJ

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55OC/10 sec RTA Anneal SIMS

10%-Si

J.O.B. Technologies (Strategic 41


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308nm Laser Anneal SIMS (1.7J/cm2)

10%-Si

J.O.B. Technologies (Strategic 42


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J.O.B. Technologies (Strategic 43
Marketing, Sales &
Technology)
Outline

• Introduction: Smartphone Market Driver for 3-D


• 3-D Bulk FinFET Transistor Formation
• 3-D FinFET High Mobility Channel Formation (7nm)
– Strain-Si (tensile or compressive stress)
– Strain-SiGe (tensile or compressive stress)
– Strain-Ge (tensile or compressive stress)
• 3-D Gate-All-Around Nanowire Transistor Formation for sub-5nm node
or Monolithic 3-D stacking
• Summary

44
GF/IBM/Samsung IEDM-2016 paper 2.7 on 7nm
FinFET with sSi and sSiGe high mobility channels
IEDM-2016 paper 2.7

Thick 25%-SiGe SRB (strain relaxed


buffer) epilayer on Si with multi-step
4 layer SRB. SiGe TDD (threading
dislocation density) defect level from
E8/cm2 to E4/cm2 and the 1.6GPa
tensile sSi (t-Si) channel electron
mobility boost is 40% up to 100%
while the -1.6GPa compressive 50%-
J.O.B. Technologies
sSiGe (c-SiGe) channel hole(Strategic
mobility 45
Marketing, Sales &
boost varies from 10% up to 60%.
Technology)
J.O.B. Technologies (Strategic 46
Marketing, Sales &
Technology)
IEDM-2016 paper 28.1

J.O.B. Technologies (Strategic 47


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J.O.B. Technologies (Strategic 48
Marketing, Sales &
Technology) Borland et al., ECS Oct 2004
J.O.B. Technologies (Strategic 49
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55%-aSiGe 40%-polySiGe 25% LPE-SiGe
0.0J/cm2 1.0J/cm2 2.5J/cm2

1.00E+23 100
1.00E+23 100

1.00E+22 100
1.00E+22 10
1.00E+22 10
12C
B, C, O Concentration (at/cm3)

12C B, C, O Concentration (at/cm3) 12C 1.00E+21 16O 10


1.00E+21 1
18O 1.00E+21 16O 1 11B+28Si

B, C, O Concentration (at/cm3)
Ge Arb units

Ge Arb. Units
11B+28Si 11B+28Si 28Si+74Ge

Ge Arb. Units
1.00E+20 28Si+74Ge 0.1
28Si+74Ge 1.00E+20 1
1.00E+20 0.1

1.00E+19 0.01 1.00E+19 0.1


1.00E+19 0.01

1.00E+18 0.001 1.00E+18 0.001 1.00E+18 0.01

1.00E+17 0.0001 1.00E+17 0.0001 1.00E+17 0.001


0 50 100 150 200 250 0 100 200 0 50 100 150 200 250
Depth (nm)
Depth (nm) Depth (nm)

J.O.B. Technologies (Strategic


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Ge-plasma Implantation 50

Borland et al., JOB-Tech/Micron/Innovavent/Excico/EAG/CNSE-SUNNY/KT/ALP,


Technology) IWJT-2013, paper S4-4, p.49
ALP Hall Analysis of 308nm
Slot#14:Ge=1E16+B=4E15 Mobility JA14ED12-1
Slot#18: Ge=1E17+B=4E16
170

160
>4x hole-mobility! Drift

150
Ge=1E17/cm2 + BH=4E16/cm2
140

130

120

110
Mobility (cm2V-1s-1)

100

90

80

70
Ge=1E16/cm2 + BH=4E15/cm2
60

50

40

30 Ge=0%+BH=4E16/cm2
20

10

0
0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600
Depth
Depth (Å)
(Å)
Borland et al., JOB-Tech/Micron/Innovavent/Excico/EAG/CNSE-
SUNNY/KT/ALP, IWJT-2013, paper S4-4, p.49
7
10 1
2
3
6
10 4

Intensity (counts/sec)
5
6
5
10

4
10

3
10

2
10
65.0 65.5 66.0 66.5 67.0
Angle (2)

1400 Layer Mobility

1200
1000
800
600
400
200

cm2/V-s
0
Depth (A)
0 500 1000 1500 2000

J.O.B. Technologies (Strategic 52


Marketing, Sales & Borland et al., IIT-2016, Sept 29, 2016
Technology)
Outline
• Introduction: Smartphone Market Driver for 3-D
• 3-D Bulk FinFET Transistor Formation
• 3-D FinFET High Mobility Channel Formation
• 3-D Gate-All-Around Nanowire Transistor Formation for sub-5nm node
or Monolithic 3-D stacking
– Si-nanowire
– Ge-nanowire
– CoolCube 3-D stacking
• Summary

53
J.O.B. Technologies (Strategic 54
Marketing, Sales &
Technology) VLSI-2016 paper 15.1
VLSI-2017

J.O.B. Technologies (Strategic 55


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J.O.B. Technologies (Strategic VLSI-2016 paper
56 17.3
Marketing, Sales &
Technology)
VLSI-2017

J.O.B. Technologies (Strategic 57


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Technology)
Summary: Smartphone the technology driver for 3-D
More Moore and More Than Moore in this Decade!

• March 2017 Samsung Galaxy S8 using 10nm 3-D FinFET, 12M pixel 3rd generation
hybrid wafer bonding 3-D stacked backside CMOS image sensor camera from Sony
and thin 3-D ePoP (embedded package on package).
• Sept 2016 Apple iPhone 7 A10-AP uses 3-D FinFET 16nm from TSMC, 12M pixel 2nd
generation 3-D stacked backside CMOS image sensor camera from Sony and
256Gb 48-layer 3-D NAND Flash memory from Toshiba.
• 10nm node production started in Oct-2016 at Samsung and TSMC for 2017
smartphone market but Intel delay to March 2017, industry focus is lower contact
resistance (Rc) with slight channel mobility boost with S/D stressor.
• 7nm node in 2018/19 and localized high mobility tensile and compressive strain
channel with the end of S/D stressor to improve Rc with S/D rap-around contacts.
• 5nm node in 2020/21 will still be FinFET
• Sub-5nm will be Si or Ge GAA nano-wire, GAA nano-sheet or 3-D stack transistor.

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