Silicon MicroFabrication Technology | Microelectromechanical Systems | Epitaxy

Introduction to Semiconductor microfabrication technology

Felix Lu

Introduction to MEMS ECE@ Duke University

Overview
I. II. III. IV. Raw materials to wafers
I. II. III. Si refinement from sand Si boule growth techniques Wafer preparation

Doping
I. II. III. Diffusion Oxidation Ion implantation

Material growth and Deposition
I. II. III. Material deposition Epitaxy Wafer bonding

Device processing
I. II. III. Etching Contacts Device fabrication overview

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Silicon refinement from sand
• Quartzite sand (silica) is reacted with carbon from coal (coke) to make metallurgical grade silicon (MGS).

SiO2 + 2C ! Si + 2CO
MGS is ~98% pure MGS trichlorosilane

HCl (g)

SiHCl3+ H2 (g)
Fractional distillation increases purity.

Impurity chlorides

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Silicon refinement from MGS
Electronic grade Si (EGS) ~ 99.999999% pure

SiHCl3+ H2 (g)
Very pure

2Si + 3HCl
Polycrystalline Si

Re-melt and recrystallize into single crystal. Czochralski Float Zone

2 examples:

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Single crystal pulling
Czochralski (CZ) technique
Single crystal Si boule

Seed crystal
http://en.wikipedia.org/wiki/Czochralski_process

http://lachlan.bluehaze.com.au/usa2003/octob er2003/16oct2003a/

Molten Si
http://www.isomet.com/FinalWebSite/FOHomePage/FOXtalGrowth.htm

Interaction with the crucible introduces up to ~1018 cm-3 oxygen!
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Single crystal pulling
Horizontal Bridgeman
window Low Temperature furnace (~630 °C) High temperature furnace (~1200 °C) Stationary tube

Excess arsenic

GaAs seed Quartz ampule GaAs melt

After T.R. AuCoin and R.O. Savage, in Gallium Arsenide Technology, D.K. Ferry, ed., Sams (1985) Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Single crystal pulling
http://www.tf.uni-kiel.de/matwis/amat/elmat_en/kap_6/advanced/t6_1_3.html

Float Zone
Very pure Si crystals Melting and purification done at the same time. Impurities prefer to stay in the liquid so solid is very pure, also making hard to dope uniformly along the length!

T.F. Ciszek, M.R. Page, T.H. Wang, and J.A. Casey; FloatZone and Czochralski Crystal Growth and Diagnostic Solar Cell Evaluation of a New Solar-Grade Feedstock Source, 29th IEEE PV Specialists Conference New Orleans, Louisiana May 20-24, 2002

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Si wafer process

http://smtbook.com/instructor_guide.pdf

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Wafer Orientation
for 6” wafers or smaller*
(111) p-type (111) n-type
See also, SEMI M1-0302, http://wps2a.semi.org/wps/portal/_pagr/116/_pa.116/121?docName=P0 01204

(111A)

(111B)

45° _ (01 1) (100) p-type

Si

_ (01 1) (100) n-type
Sometimes flat is here

90°

90°

GaAs

90° _ (01 1)
Fall 2005

135° _ (01 1)
1230

From www.usna.edu/EE/ee452/LectureNotes/05-Processing_Technology/18_Silicon.ppt

After W.R. Runyan and T.J. Shaffner, Semiconductor Measurements & Instrumentation, 2nd Ed., McGraw Hill, 1998.

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Single crystal properties of Si

Kurt Petersen, Silicon as a mechanical material, Proc. of the IEEE, 1982, vol. 70, no. 5, pp. 420.
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Wafer surface characterization
Dektak

http://www.veeco.com/appnotes/AN526-StylusCap_04065.rf.pdf

zygo®

Optical profilometer

Nomarski differential interference contrast

http://www.zygo.com/?/products/nv6000/
http://www.microscopyu.com/articles/dic/reflecteddic.html

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Temperature and Pressure measurement
Fabrication involves processes which have to take place in a narrow range of temperatures and pressures. Temperature measurement: Peltier/Seebeck junction thermocouple
http://www.electronics-cooling.com/Resources/EC_Articles/JAN97/jan97_01.htm http://www.picotech.com/applications/thermocouple.html http://www.omega.com/temperature/Z/pdf/z021-032.pdf

Pressure measurement:
thermocouple

Ionization gauge

http://www.lesker.com/newweb/Pressure_Measurement/Thermocouple

http://www.duniway.com/images/pdf/pg/hot-filament-ion-gauge-tube.pdf

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

A sampling of cleaning methods
• Chemical – Wet • Pirahna : H2SO4:H2O2 (4:1) [90 °C for 15 minutes] • RCA (or SC) – RCA1 (SC1) removes organics and particulates » NH4OH:H2O2:H2O (1:1:5) – RCA2 (SC2) removes metallic contaminants » HCl:H2O2:H2O (1:1:5) – Dry

70 °C for 10 minutes

• oxygen plasma: reactive oxygen ions convert hydrocarbons to CO2 and H2O. • UV/Ozone: reactive O3 oxidize hydrocarbons.

Mechanical – Ultrasonic – megasonic

Small scale mechanical agitation…
http://www.techsonic.fr/megatheory.htm

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Doping of Semiconductors
Metals : ~10-7 to ~10-8 Ohm·m Resistivity of Semiconductors : ~10-6 to ~107 Ohm·m (including semi-insulating III-V’s) Insulators : ~1010 to ~1015 Ohm·m
http://www.geokem.com/images/pix/periodic.gif

http://www.astro.virginia.edu/class/oconnell/astr511/lec11-f03.html

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Doping considerations
Doping vs. alloying
~ 1ppm or less “Si:P” ~.1 – 99% “SixGe1-x”

Selective etching of layers and dopant selective etching Mostly for III-V’s Intrisic Si from n+ Si: KOH(40%) at 60 °C and ethylenediamine-pyrocatechol (EDP)(After G.E. Rittenhouse et al., J. Vac. Sci. Tech., B 10(6), 2860-3 (1992))

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

http://www.occdsb.on.ca/~pop/Music.htm

Why “Si is king”
• SiO2: acts as etching mask, passivation for surface states, high quality gate insulator. • III-V oxides : typically unstable. • GeO : soluble in water!
•Masato Aizawa, Anne M. Cooper, Marek Malac, and Jillian M. Buriak, Silver Nano-Inukshuks on Germanium, Nano Letters, VOLUME 5, NUMBER 5, MAY 2005, American Chemical Society

Pictures from http://sinclair.ece.uci.edu

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Thermal oxidation of Si
H2O amorphous SiO2 O2
Diffusion through oxide Reaction with Si

H2O amorphous SiO2

O2
Diffusion through oxide

Reaction with Si

Si

Si

Wet oxidation : faster but dirtier, both from extra oxygen in water. Dry oxidation: slower but cleaner.
SiO2 is less dense (and amorphous) than Si and so a film of SiO2 of thickness x0 consumes about 0.45 x0 of Si. [after Mayer and Lau, 1990]
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Wafer bowing
e.g. oxide Top layer is under compressive stress from the substrate. substrate

Top layer is under tensile stress from the substrate.

substrate

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Introduction to MEMS ECE@ Duke University

The oxide surface
HF dipped Si surfaces tend to be hydrophobic :
H termination minimizes water interaction with Si.

H Si Drop of water on Si surface.

H Si

H Si

Freshly oxidized Si surfaces tend to be hydrophilic :
Silanol groups (Si-OH) stick to water.
Joanne Deval, et al., Reconfigurable hydrophobic/hydrophilic surfaces in microelectromechanical systems (MEMS), J. Micromech. Microeng. 14 (2004) 91–95

After Tong and Gösele, Semiconductor Wafer Bonding, John-Wiley & Sons, 1999

“mature” oxides can also be hydrophobic depending on surface chemistry of oxide.
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

example
Forming S and D for p-MOSFET.
Predeposition (“predep”)
Anneal BN wafer (which has B2O5) with Si wafer in N2. Si wafer with oxide mask

BN wafer

B2O5

http://www.bn.saint-gobain.com

Drive-in
Anneal doped Si wafer with steam and oxygen.

The oxidation over the S and D, minimize out diffusion of B.
http://plasticdog.cheme.columbia.edu/undergraduate_research/projects/patricia_wang_project.htm

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Ion implantation

http://bmrc.berkeley.edu/courseware/ICMfg92/images/gif/doping.gif

Implantation of H ions of 50 kV into Si

After http://humanresources.web.cern.ch/Humanresources/exter nal/training/tech/special/ELEC2002/ELEC2002_11Apr02_3_PDF.pdf

After F. Lu, Ph.D. thesis, (2004)

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Material deposition and growth
“deposition” – amorphous or polycrystalline layer
– Contact metal – Insulating layer

“growth” - single crystal layer - epitaxy : MBE, CVD

Fall 2005

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Introduction to MEMS ECE@ Duke University

Evaporation
Pump down to get a good vacuum. A good vacuum increases the mean free path of the evaporant. Maximize distance between source and target for more uniform coverage.
Thermal evaporation: materials which have a very high melting point (comparable to the boat) or materials which form a eutectic with the boat cannot be thermally evaporated.

http://www.haanappel.net/ryan/resume/experiencedielectric.php

Adhesion layers for Au to Si:

Electron beam evaporation
http://www.mpi-halle.mpg.de/~mbe/si.html

Ti, Cr

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Sputtering
What is sputtering? (a.k.a. physical vapor deposition)

Why sputtering? What’s wrong with evaporation?
- some materials are difficult to evaporate.
http://www.ece.utep.edu/research/webedl/cdte/Fabrication/pictures/sputter.htm

- low melting point substrates. - evaporating thick layers quickly may burn heat up target. - Adhesion of sputtered films is often better. - Deposition is different from evaporation- which is from a point source. - changes in composition easy to do. photoresist or

Layer stoichiometry = target stoichiometry (source) Fall 2005

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Electroplating
Typically to make thick layers of metal (>~1µm) on top of evaporated and patterned metals.

http://www.ganoksin.com/borisat/nenam/electroplating-and-electropolishing.htm

Unplating biases remove asperities

V

unplating time plating

Fall 2005

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Introduction to MEMS ECE@ Duke University

Chemical Vapor Deposition
a.k.a. CVD, VPE, and for III-V’s : MOCVD, OMCVD, MOVPE, OMVPE

http://www.esi-group.com/SimulationSoftware/CFD_ACE/MOVPE.html

http://python.rice.edu/~arb/Courses/Images/360_02_handout9.jpg

PECVD – able to deposit films at much lower temperatures by using a plasma to “crack” the gas into its components.
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

From two Greek words: “epi” = “on” and “taxis” = “arranged”, after John Orton, “The Story of Semiconductors”, Oxford University Press 2004, p. 6

Molecular Beam Epitaxy
Highly abrupt interfaces

Effusion cells
http://www.veeco.com/images/mbe_structure.jpg

RHEED
www.sandia.gov/media/NewsRel/NR2000/laser.htm

cryopanels

Flourescent screen
http://www.ece.utexas.edu/projects/ece/mrc/groups/street_mbe/mbechapter.html

Appropriate other meanings of MBE: Mostly Broken Equipment Massive Beer Expenditures Maniac Bloodsucking Engineers Mega-Buck Evaporator Many Boring Evenings (how do you think this list came about?) Minimal Babe Encounters (see previous item) Mainly B.S. and Exaggeration Medieval Brain Extractor http://www.ece.utexas.edu/projects/ece/mrc/groups/street_mbe/mbeacronym.html

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Lattice mismatched epitaxy
a1

a2

a2

Misfit dislocation

Separate layers

thickness of epilayer < critical thickness

thickness of epilayer > critical thickness

• •

J.W. Matthews, A.E. Blakeslee, “Defects in epitaxial multilayers,” Journal of Crystal Growth, 27, 118 (1974). R. People, J.C. Bean, “Calculation of critical layer thickness versus lattice mismatch for GexSi1-x/Si strained-layer heterostructures,” Applied Physics Lett., 47, 322 (1985).

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Heterogeneous integration
Deposition techniques: Allow amorphous or polycrystalline material layers on single crystal substrates. Crystal growth techniques (MBE, CVD) Mix and match epilayers of different materials Thermal expansion coefficient Lattice mismatch Single crystal layer
…but what if you want layers that do not match well with each other for a particular device? …or, if you want a single crystal layer on top of an amorphous layer?

If not matched well enough:
high dislocation density at the interface

Si on Insulator (SOI)
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Semiconductor on Insulator
Device layer ~ 1µm
Buried oxide (BOX)

High energy particle
eeh+ h+ h+ h+ h+ h+

substrate
eeee-

High speed circuits

Radiation hardened

Coupling through the substrate increases RC delay
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Wafer bonding & wafer fusion
Definition:

The permanent attachment of two ultrasmooth surfaces without any kind of glue. “Wafer bonding” " bonding of two wafers with an oxide inbetween them. “Wafer fusion” " bonding of two wafers without an oxide between them. • Can be used to combine materials with different lattice constants and thermal expansion coefficients. Can be used to get monocrystalline layers on top of amorphous layers. Applications : SOI, heterogeneous integration, Si-InGaAs APD, MEMs
P. Mages, Ph.D. Thesis, UC San Diego (2003)

• •

Fall 2005

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Introduction to MEMS ECE@ Duke University

Bonding chemistry

After Tong and Gösele, Semiconductor Wafer Bonding, John-Wiley & Sons, 1999
After P. Mages, Ph.D. thesis, (2003)

Fall 2005

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Hydrophobic bonding
One example of this is bonding a III-V piece to Si. III-V piece is ~10× more expensive that Si so we don’t want to use the whole wafer.
IR Transmission Si-Si wafer bonded interface

Artifacts from poor cleaving

Pictures from P. Mages, Ph.D. thesis, 2003

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

High thermal stress bonding

After P. Mages Ph.D. Thesis, UC San Diego, 2003

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Low thermal stress bonding

After P. Mages Ph.D. Thesis, UC San Diego, 2003

Fall 2005

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Hydrophilic bonding
Cleaning procedure: For Si with thin oxide: Spin cleaning with solvents Dilute HF (1%) dip Modified RCA-1 (1:1:38) For Si with thick oxide: Spin cleaning with solvents Modified RCA-1 (1:1:38)
Si with native oxide : Si with native oxide Si with native oxide : Si with thick oxide (5000 Å)

Acoustic microscope images of plasma activated bonded Si-OX 4” wafers.

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Bond strength
!
1.1 µm
IR camera

E = Young’s modulus tw = wafer thickness tb = blade thickness L = crack length " = bond energy
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Important to measure L accurately since small changes in L = large changes in "!
Introduction to MEMS ECE@ Duke University

Plasma activation of the surface
plasma activated Si/OX wafers
(30 s, 150 W)
RCA-1(45 s), DI water (2 min)

3500
Bond strength (mJ/m )

3000 2500 2000 1500 1000 500 0 0 100 200 300

2

oxygen plasma + RCA1 Oxygen plasma + DI water Argon plasma + DI Water Nitrogen plasma + DI Water
400 500 600

Anneal Temperature (°C), 2 hr. in air

From T. Suni, Master’s thesis, Helsinki Institute of Tech., (2001)

e et pl t m a is - general concensus : surface co l th th o e s N od ain becomes more porous m xpl e t… - water may be trapped in the pores ye

How does plasma activation increase the bond energy so much?

OX
Si Water from oxide surface Water diffuses to gaps during annealing Wet oxidation of Si

OX Si OX Si

Possible model

- wet oxidation of Si wafer to close up gaps ! increase contact area.
Fall 2005

Gaps close

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

Layer transfer techniques
Oxygen ion implantation ~1022 cm-2

Bond wafers
Try to Anneal out defects

Grind and polish

SIMOX
Silicon implanted with oxygen
See also http://www.mse.berkeley.edu/~pzhang/MSE225/TICS5GRP7.pdf

BESOI
Bond and Etch back SOI

Fall 2005

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Introduction to MEMS ECE@ Duke University

Unibond® (a.k.a. Smart-Cut®, Ion-cut®)
• Initial motivation
Re-use of expensive wafers.

Thin film of Si on Corning 1737F glass.

http://www.mpi-halle.mpg.de/~waf_bond/cut.html

After F. Lu, Ph.D. thesis (2004)

Fall 2005

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Device processing
• Start with layered structure • Etching patterns for current and/or optical isolation/confinement
Semiconductor optical waveguide

SOI MOSFET

http://www.compoundsemiconductor.net/articles/magazine/9/ 6/2/1/csbipolar3_6-03

BJT
Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Isotropic/anisotropic etching

http://www2.nano.physik.uni-muenchen.de/~schoeff/RR_Web_01/images/Anlagen/RIE/IsotropicEtchPix.jpg

www.memsnet.org/mems/processes/etch.html

Fall 2005

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Wet etching
Pros
• • • Cheap and easy to set up Can be highly selective Often does not damage substrate

Cons
• Can be sensitive to temperature (affects repeatability) • Etch rates may be a function of stirring and stirring rate • Can have particulates in solution (may not be very clean) • Large amounts of chemical waste

Ambient temp. Fall 2005 Microfabrication Technology Introduction to MEMS ECE@ Duke University

Common etchants in Si processing
Si etchants:
KOH (potassium hydroxide) TMAH – Tetramethylammonium hydroxide EDP – Ethyylene diamine pyrocatechol HF:HNO3:Acetic acid

SiO2 etchant:
HF (hydrofluoric acid)

~1200 Å/min at RT

BOE – buffered oxide etch (buffered HF)

Al etchant:
H3PO4: H2O: HNO3 (16:4:1)

Produces bubbles during etching – shake wafer to remove bubbles

Etch masks: photoresist, thermal SiO2, deposited SiOx, SiNx
Source: Kurt E. Petersen, Silicon as a mechanical material, Proceedings of the IEEE, vol. 70, no.5, May 1982, pp. 420

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Dry etching
Chemical and/or physical process using a plasma for etching substrates. Etch rates: much slower than wet etching

Parallel plate configuration

Barrel configuration

Plasma has no directionality

vertical sidewalls
www.ulvac.com/foundry/index.asp

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Etching mechanics
Etching of single crystal : – Diffusion
• Movement of etchant to sample surface

– Reaction
• If sample is not directly soluble in etching solution, change it.
– Typically done by oxidizing the surface (e.g. H2O2, HNO3), oxidizing the sample is another name for removing electrons, or injecting holes.

• Use another component of the etching solution to remove the new product.

Example: etch Si using HNO3:HF:H2O
The nitric acid changes Si to SiO2, and HF etches the SiO2:

Often, CH3COOH is used because it wets the surface better, better wetting results in smoother surfaces.

SiO2 + 6HF ! SiF6 + 2H2O

Electrolytic etching, light induced etching Extra electrons speed up reaction
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SiF6 is soluble in water

Introduction to MEMS ECE@ Duke University

Contacts to devices
• Purpose: fulfill electrical specs and resist contact degradation. I I
V Ohmic junction
metal isolation Highly doped layer

V Rectifying junction

Metal-semiconductor junction typically rectifying Metal-highly doped semiconductor typically ohmic substrate Backside contact acts ohmic due to large size.
Acts like a lot of resistors in parallel.

Backside contact

Fall 2005

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Fabrication of a MOSFET
1. Clean n-Si wafers:
RCA1, HF dip, RCA2, BOE dip.

2. Wet oxidation of Si (~2000 Å)
Heat wafers up to 1000 °C, bubble oxygen through 95 °C DI water into furnace.

3. Pattern S and D through holes in wet oxide.
Photolithography, cover backside with resist. BOE through the wet oxide. Result: only front side holes go through to Si.

4. Boron doping of S and D.
Activate Boron Nitride (BN) wafers, Predep: anneal Si with oxidized BN in N2 at 1050 °C Drive-in: anneal Si without BN wafer in wet oxygen.

5. Strip off wet oxide.
BOE dip until wafer is hydrophobic.

6. Grow dry (gate) oxide (~1000 Å)
Heat wafers up to 1000 °C in ultra pure oxygen.

Fall 2005

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Introduction to MEMS ECE@ Duke University

MOSFET fab (cont’d)
7. Pattern gate oxide to open up windows for metal to contact S and D.
BOE dip (since S and D windows are so small, you can’t use the hydophobic test to see if oxide has etched through), how do you know when to stop?

8. Evaporate Al over front side of wafer. (~1000 Å) 9. Etch Al, leaving only contacts to S and D.
H3PO4:HNO3:Acetic acid – shake the wafer to remove bubbles.

10. Evaporate Al on the backside of the wafer.

11. Anneal Al for good contacts.
450 °C in nitrogen for 10 min.
Answer: since you’re going to put Al on the backside for a body contact, you can use the backside as a gauge to see when to stop etching the windows.

Fall 2005

Microfabrication Technology

Introduction to MEMS ECE@ Duke University

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