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an increasing demand for low-power and portable-energy sources due to the development and mass consumption of portable electronic devices .Furthermore, the portable-energy sources must be associated with environmental issues and imposed regulations. These demandssupport research in the areas of portable-energy generation methods. In this scope, piezoelectric materials become a strong candidate for energy generation and storage in future applications .This paper describes the use of piezoelectric polymers in order toharvest energy from people walking and the fabrication of a shoe capable of generating and accumulating the energy. In this scope, electroactive β-polyvinylidene fluoride used as energy harvesting element was introduced into a bicolor sole prepared by injection, together with the electronics needed to increase energy transfer and storage efficiency. An electrostatic generator was also includedin order to increase energy harvesting. 2. INTRODUCTION TO ATMEL A single chip microcontroller is obtained by integrating all the components of a microcontroller in one IC package. Hence apart from CPU such a single chip microcontroller will therefore contain its own clock generator and some amount of ROM or EPROM, RAM and I/O ports on the same chip. It may also have other features like timer/counter, USART, PWM, A/D etc., on the chip. 2.1. FEATURES: • Compatible with MCS®-51 Products • 8K Bytes of In-System Programmable (ISP) FlashMemory– Endurance: 10,000 Write/Erase Cycles • 4.0V to 5.5V Operating Range • Fully Static Operation: 0 Hz to 33 MHz • Three-level Program Memory Lock • 256 x 8-bit Internal RAM • 32 Programmable I/O Lines
• Three 16-bit Timer/Counters • Eight Interrupt Sources • Full Duplex UART Serial Channel • Low-power Idle and Power-down Modes • Dual Data Pointer • Power-off Flag • Fast Programming Time
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro- grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con- tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.
1.2.PIN DIAGRAM: Fig: Pin diagram of AT89S52 .2.
Port Pin P1. External pull-ups are required during program verification. each pin can sink eight TTL inputs.2. the pins can be used as high impedance inputs.1 P1.2.0 P1. and outputs the code bytes during program verification.Supply voltage GND – Ground PORT 0: Port 0 is an 8-bit open-drain bi-directional I/O port. When 1s are written to port 0 pins. Port 0 also receives the code bytes during Flash programming. Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups Port 1 also receives the low-order address bytes during Flash programming and verification. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. clockout (Timer/Counter 2 capture/reload trigger and T2EX direction control) MOSI (used for In-System Programming) MISO (used for In-System Programming) .6 Alternate Functions T2 (external count input to Timer/Counter 2). In this mode P0 has internal Pull-ups. The Port 1 output buffers can sink/source four TTL inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory.5 P1.2.PIN DESCRIPTION: VCC . PORT 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. As an output port. As inputs.
During accesses to external data memory that uses 8-bit addresses (MOVX @ RI).4 P3.lowing table. As inputs. When 1s are written to Port 3 pins. Port Pin 2.P1.3.PORT PIN DESCRIPTION: P3.3 P3. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. as shown in the fol. Port 3 also serves the functions of various special features of the AT89S52. Port 2 emits the contents of the P2 Special Function Register. In this application. The Port 3 output buffers can sink/source four TTL inputs.2. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). PORT 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs.7 Alternate Functions RXD (Serial input port1) TXD (Serial output port) INT0 (External interrupt0) INT1 (External interrupt1) T0 (Timer0 external input) T1 (Timer1 external input) WR(External data memory write ) RD(External data memory read ) . As inputs.nal pull-ups and can be used as inputs.5 P3. they are pulled high by the inter.1 P3.2 P3.7 SCK (used for In-System Programming) PORT 2: Port 2 is an 8-bit bi-directional I/O port with internal pull-ups.6 P3.0 P3. The Port 2 output buffers can sink/source four TTL inputs. it uses strong internal pull-ups when emitting 1s. Port 3 receives some control signals for Flash programming and verification. Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups.
the pin is weakly pulled high.Port Pin Description RST: Reset input. PSEN: Program Store Enable is the read strobe to external program memory. and may be used for external timing or clocking purposes. however. ALE is active only during a MOVX or MOVC instruction. If desired. . Note. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency. With the bit set. Otherwise. When the AT89C51 is executing code from external program memory. This pin is also the program pulse input (PROG) during Flash programming. ALE/PROG: Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. except that two PSEN activations are skipped during each access to external data memory. ALE operation can be disabled by setting bit 0 of SFR location 8EH. that one ALE pulse is skipped during each access to external Data Memory. PSEN is activated twice each machine cycle. A high on this pin for two machine cycles while the oscillator is running resets the device.
however. ARCHITECTURE OF ATMEL (AT89S52) The AT89S52 provides the following standard features: 8K bytes of Flash. for parts that require 12-volt VPP. Watchdog timer. and interrupt system to continue functioning. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. that if lock bit 1 is programmed. EA should be strapped to VCC for internal program executions. The Idle Mode stops the CPU while allowing the RAM. a six-vector two-level interrupt architecture. two data pointers. disabling all other chip functions until the next interrupt or hardware reset. Note. on-chip oscillator. serial port.EA/VPP: External Access Enable (EA) must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. The Power-down mode saves the RAM con-tents but freezes the oscillator. EA will be internally latched on reset. a full duplex serial port. . In addition. XTAL2: Output from the inverting oscillator amplifier. and clock circuitry. 2. XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit. three 16-bit timer/counters. timer/counters. the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. 256 bytes of RAM. 32 I/O lines.3.
2.1.3. BLOCK DIAGRAM OF AT89S52 .
REGISTERS: 2.4.Special Function Registers: .2.1.4.
Two priorities can be set for each of the six interrupt sources in the IP register. Read accesses to these addresses will in general return random data.4.4) in the PCON SFR.5 Memory Organization MCS-51 devices have a separate address space for Program and Data Memory. and unoccupied addresses may not be implemented on the chip. POF is set to “1” during power up. Note that not all of the addresses are occupied.4. RCAP2L) is the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode. In that case.3. since they may be used in future products to invoke new features. Timer 2 Registers: Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The user should ALWAYS initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register. The register pair (RCAP2H. Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. It can be set and rest under software control and is not affected by reset. Up to 64bytes each of external Program and Data Memory can be .A map of the on-chip memory area called the Special Function Register (SFR). 2.2. Interrupt Registers: The individual interrupt enable bits are in the IE register. two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H83H and DP1 at 84H-85H. 2. and write accesses will have an indeterminate effect. the reset or inactive values of the new bits will always be 0. 2. Dual Data Pointer Registers: To facilitate accessing both internal and external data memory. User software should not write 1s to these unlisted locations.
MOV 0A0H. For example. so the upper 128 bytes of data RAM are available as stack space. 2. accesses the data byte at address 0A0H.5. rather than P2 (whose address is 0A0H). where R0 contains 0A0H. The upper 128 bytes occupy a parallel address space to the Special Function Registers. Timer 2 : . if EA is connected to VCC. MOV @R0.5. 2. Timer 0 and 1: Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52.4. On the AT89S52. #data Instructions that use indirect addressing access the upper 128 bytes of RAM. the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Data Memory: The AT89C52 implements 256 bytes of on-chip RAM.4.addressed. For example. #data Note that stack operations are examples of indirect addressing. 2. 2. the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). program fetches to addresses 0000H through1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.4. Instructions that use direct addressing access SFR space.1 Program Memory If the EA pin is connected to GND.6. all program fetches are directed to external memory. When an instruction accesses an internal location above address 7FH. That means the upper 128bytes have the same addresses as the SFR space but are physically separate from SFR space.4. the following indirect addressing instruction.
the level should be held for at least one full machine cycle. the count is incremented. This bit can then be used to generate an interrupt. two options are selected by bit EXEN2 in T2CON. Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. Timer 2 performs the same operation. In this function. TIME IN CAPTURE MODE: . The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. the transition at T2EX causes bit EXF2 in T2CON to be set. the external input is sampled during S5P2 of every machine cycle. but a 1-to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L. 2. The EXF2 bit. the register is incremented in response to a 1-to-0 transition at its corre. When the samples show a high in one cycle and a low in the next cycle. T2. If EXEN2 = 0. In addition. the maximum count rate is 1/24 of the oscillator frequency. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition.5.sponding external input pin. To ensure that a given level is sampled at least once before it changes. can generate an interrupt. If EXEN2 = 1.In the Counter function. respectively. CAPTURE MODE: In the capture mode. like TF2.
In this operating mode. two options are selected by bit EXEN2 in T2CON.5 is also unimplemented. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Logic 0 at T2EX makes Timer 2 count down.Fig: Time in capture mode Timer 2 automatically counting up when DCEN = 0.6. EXF2 does not flag an interrupt. 2. The timer will overflow at 0FFFFH and set the TF2 bit. IE also contains a global disable bit. the T2EX pin controls the direction of the count. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. These interrupts are all shown in Figure 6. and the serial port interrupt. and 2). three timer interrupts (Timers 0. which disables all interrupts at once. In this mode. EA. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers. In this mode. This transition also sets the EXF2 bit. bit position IE. Logic 1 at T2EX makes Timer 2 count up. If EXEN2 = 1. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. Setting the DCEN bit enables Timer 2 to count up or down. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. . TH2 and TL2. If EXEN2 = 0. a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. User software should not write 1s to these bit positions. Note that Table shows that bit position IE. In the AT89C51. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. Both the TF2 and EXF2 bits can generate an interrupt if enabled.6 is unimplemented. as shown in Figure. since they may be used in future AT89 products. INTERRUPTS: The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1). respectively. Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. 1.
The mode is invoked by software. and that bit will have to be cleared in software. but minimum and maximum voltage high and low time specifications must be observed. Idle Mode: In idle mode. The content of the on-chip RAM and the entire special functions registers remain unchanged during this mode.7. the CPU puts itself to sleep while all the on chip peripherals remain active. The . of an inverting amplifier which can be configured for use as an on-chip oscillator. the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt.1. Either quartz crystal or ceramic resonator may be used. 2. 2. respectively. since the input to the internal clocking circuitry is through a divide-by-two flip-flop. are set at S5P2 of the cycle in which the timers overflow. TF0 and TF1. To drive the device from an external clock source. The Timer 0 and Timer 1 flags.In fact.7. XTAL2 should be left unconnected while XTAL1 is driven as shown in Fig 2. as shown in Figure 1.2 There are no requirements on the duty cycle of the external clock signal.Oscillator Characteristics: Fig: Oscillator Connection XTAL1 and XTAL2 are the input and output.
idle mode can be terminated by any enabled interrupt or by a hardware reset. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset.2. and the instruction that invokes power-down is the last instruction executed. It should be noted that when idle is terminated by a hard ware reset. up to two machine cycles before the internal reset algorithm takes control. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. Fig: External Clock Drive Configuration On-chip hardware inhibits access to internal RAM in this event. The only exit from power-down is a hardware reset. from where it left off. the device normally resumes program execution. Power-down Mode: In the power-down mode.7. . 2. the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Reset redefines the SFRs but does not change the on-chip RAM. the oscillator is stopped. but access to the port pins is not inhibited.
7. Regulator unit. In addition. Rectifier. filters.The AT89C51 provides the following standard features: 4K bytes of Flash. a full duplex serial port. 128 bytes of RAM. The Idle Mode stops the CPU while allowing the RAM. POWER SUPPLY Power supply unit consists of Step down transformer. two 16-bit timer/counters. The Power down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. timer/counters. and on-chip oscillator and clock circuitry.7 Typical Block of Power Supply 4. the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. serial port and interrupt system to continue functioning. five vector two-level interrupt architecture. 32 I/O lines.1 CIRCUIT DIAGRAM OF POWER SUPPLY . TRANSFORMER AC Voltage DC Voltage RECTIFIER FILTER REGULATOR Fig 4.
corresponding .7. This conversion is achieved by using the Rectifier Circuit/Unit. the transformer is designed to contain less number of turns in its secondary core.2 STEP DOWN TRANSFORMER: The Step down Transformer is used to step down the main supply voltage from 230V AC to lower value.3 RECTIFIER: The Rectifier circuit is used to convert the AC voltage into its DC voltage.8 Circuit Diagram of Power Supply 4.7.The Transformer consists of primary and secondary coils. The step down voltage is consists of 12V.Fig 4. Bridge rectifier. Full wave rectifier. Thus the conversion from AC to DC is essential. The output from the secondary coil is also AC waveform. 4. Rectifier having three types. thus it is stepped down. Half wave rectifier. To reduce or step down the voltage. This 230 AC voltage cannot be used directly.
And also these capacitors are used to reduce the . The output voltage of the rectifier is in rippled form. The efficient circuit used is the Full wave Bridge rectifier circuit. This is a widely used configuration. The capacitor filter is also used where the power-supply ripple frequency is not critical. which require very little load current from the supply.9 Bridge Rectifier The simple function of the diode is to conduct when forward biased and not to conduct in reverse bias. this frequency can be relatively high. The Forward Bias is achieved by connecting the diode’s positive with positive of the battery and negative with battery’s negative. It is sometimes used on extremely high-voltage. low-current power supplies for cathode-ray and similar electron tubes. The simple capacitor filter is the most basic type of power supply filter. This project used to bridge rectifier. A bridge rectifier makes use of four diodes in a bridge arrangement to achieve full-wave rectification. The ripples from the DC voltage are removed and pure DC voltage is obtained. The application of the simple capacitor filter is very limited. The circuit used for removing the ripples is called Filter circuit. Fig 4. The capacitor (C1) shown in figure 4-15 is a simple filter connected across the output of the rectifier in parallel with the load.The most important and simple device used in Rectifier circuit is the diode. the ripples from the obtained DC voltage are removed using other circuits available. both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally. Capacitors are used as filter.
7. Thus to avoid this Regulators are used. Regulator having two types. The Filter circuit is often fixed after the Regulator circuit. It reduces the 12V dc voltage to 5V dc.4 REGULATOR Regulator regulates the output voltage to be always constant. As and then the AC voltage changes. Although the piezoelectric effect was discovered by Curie in 1880. This filter is fixed before the regulator. It charges during the positive half cycle of the AC voltage and discharges during the negative half cycle. So it allows only AC voltage and does not allow the DC voltage.harmonics of the input voltage. it was only in the 1950s that the piezoelectric effect started to be used for industrial sensing applications. The principle of the capacitor is to charge and discharge. 4. process control and for research and development in many different industries. It charges in positive half cycle of the AC voltage and it will discharge in negative half cycle. Positive regulator (78XX) Negative regulator (79XX) The output voltage is maintained irrespective of the fluctuations in the input AC voltage.1µF capacitor. Also when the internal resistance of the power supply is greater than 30 ohms. The output at this stage is 5V and is given to the Microcontroller Piezoelectric sensors: Piezoelectric sensors have proven to be versatile tools for the measurement of various processes. Here we used 7805 positive regulator. Capacitor is most often used as filter. Since then. Here we used 0. the DC voltage also changes. So it allows only AC voltage and does not allow the DC voltage. The regulators are mainly classified for low voltage and for high voltage. . the output gets affected. The primary action performed by capacitor is charging and discharging. Here we used 1000µF capacitor. They are used for quality assurance. Thus the output is free from ripples. Thus this can be successfully reduced here. This filter is fixed after the Regulator circuit to filter any of the possibly found ripples in the output received finally.
aerospace. While working with conventional readout electronics. such as in medical. In the automotive industry. Additionally. it is not true that piezoelectric sensors can only be used for very fast processes or at ambient conditions.00001 0. there are numerous applications that show quasi-static measurements. and as a pressure sensor in the touch pads of mobile phones. A static force will result in a fixed amount of charges on the piezoelectric material. However. The main effect on the piezoelectric effect is that with increasing pressure loads and temperature. have an extremely high natural frequency and an excellent linearity over a wide amplitude range.0001 0. the sensing elements show almost zero deflection.0005 0.000 2. Tourmaline shows pyroelectricity in addition to the piezoelectric effect.000 2. enabling sensors to have a working range of up to 1000°C. This effect is also common to piezoceramic materials. Even though piezoelectric sensors are electromechanical systems that react to compression.000 One disadvantage of piezoelectric sensors is that they cannot be used for truly static measurements. enabling measurements under harsh conditions. The sensors are either directly mounted into additional holes into the cylinder head or the spark/glow plug is equipped with a built in miniature piezoelectric sensor . The high modulus of elasticity of many piezoelectric materials is comparable to that of many metals and goes up to 10e6 N/m²[dubious – discuss]. and reduction in internal sensor resistance will result in a constant loss of electrons. It has been successfully used in various applications. the sensitivity is reduced due to twin-formation. while there are other applications with temperatures higher than 500°C.005 Threshold [µ*] 0. special types of crystals like GaPO4 gallium phosphate do not show any twin formation up to the melting point of the material itself. In fact.000.0 0. While quartz sensors need to be cooled during measurements at temperatures above 300°C. Principle Piezoelectri c Piezoresisti ve Inductive Capacitive Strain Sensitivity [V/µ*] 5. piezoelectric elements are used to monitor combustion when developing internal combustion engines. This is the reason why piezoelectric sensors are so rugged. Some materials used (especially gallium phosphate  or tourmaline) have an extreme stability even at high temperature.this measuring principle has been increasingly used and can be regarded as a mature technology with an outstanding inherent reliability. imperfect insulating materials. Elevated temperatures cause an additional drop in internal resistance and sensitivity.000.000 750. . piezoelectric technology is insensitive to electromagnetic fields and radiation. this is the ability to generate an electrical signal when the temperature of the crystal changes. and yield a decreasing signal.001 0.500. The rise of piezoelectric technology is directly related to a set of inherent advantages. nuclear instrumentation.0001 Span to threshold ratio 100.0001 0.
Piezoelectric sensors are also seen in nature.b. Electrical properties Schematic symbol and electronic model of a piezoelectric sensor . longitudinal. where dxx is the piezoelectric coefficient for a charge in x-direction released by forces applied along x-direction (in pC/N). Dry bone is piezoelectric. and shear. Longitudinal effect The amount of charge produced is strictly proportional to the applied force and is independent of size and shape of the piezoelectric element. Transverse effect A force is applied along a neutral axis (y) and the charges are generated along the (x) direction. Cx = dxyFyb / a. Shear effect Again. Fx is the applied Force in xdirection [N] and n corresponds to the number of stacked elements . perpendicular to the line of force. b is in line with the charge generating axis and d is the corresponding piezoelectric coefficient. the charges produced are strictly proportional to the applied forces and are independent of the element’s size and shape. The amount of charge depends on the geometrical dimensions of the respective piezoelectric element. three main modes of operation can be distinguished: transverse. and is thought by some to act as a biological force sensor. Using several elements that are mechanically in series and electrically in parallel is the only way to increase the charge output. Principle of operation Depending on how a piezoelectric material is cut. The resulting charge is Cx = dxxFxn. the transverse effect opens the possibility to fine-tune sensitivity on the force applied and the element dimension. where a is the dimension in line with the neutral axis. In contrast to the longitudinal and shear effects. For n elements mechanically in series and electrically in parallel the charge is Cx = 2dxxFxn.c apply. When dimensions a.
pressure. In the flat region. The inductance Lm is due to the seismic mass and inertia of the sensor itself. between the high-pass cutoff and the resonant peak. the flat region of the frequency response plot is typically used. the sensor can be modeled as a voltage source in series with the sensor's capacitance or a charge source in parallel with the capacitance For use as a sensor. The output signal is then related to this mechanical force as if it had passed through the equivalent circuit. this also acts in parallel with the insulation resistance. Frequency response of a piezoelectric sensor. both increasing the high-pass cutoff frequency. or strain. C0 represents the static capacitance of the transducer.A piezoelectric transducer has very high DC output impedance and can be modeled as a proportional voltage source and filter network. Ri is the insulation leakage resistance of the transducer element. resulting from an inertial mass of infinite size. The voltage V at the source is directly proportional to the applied force. Ce is inversely proportional to the mechanical elasticity of the sensor. The load and leakage . output voltage vs applied force A detailed model includes the effects of the sensor's mechanical construction and other non-idealities. If the sensor is connected to a load resistance.
For accelerometers. with the charge directly proportional to the applied force. Sensors often tend to be sensitive to more than one physical quantity. Pressure sensors show false signal when they are exposed to vibrations. By carefully matching those elements. Sensor design Metal disks with piezo material. a thin membrane and a massive base is used. The main difference in the working principle between these two cases is the way forces are applied to the sensing elements. the invariant seismic mass loads the elements according to Newton’s second law of motion F = ma. a seismic mass is attached to the crystal elements. Vibration sensors can also be used to harvest otherwise wasted energy from mechanical vibrations. It can also be modeled as a charge source in parallel with the source capacitance. determined by the standard formula for capacitance of parallel plates. in which Cs represents the capacitance of the sensor surface itself. ensuring that an applied pressure specifically loads the elements in one direction. the most common are pressure and acceleration. used in buzzers or as contact microphones Based on piezoelectric technology various physical quantities can be measured. while in accelerometers the forces are applied by an attached seismic mass. This is accomplished by using piezoelectric materials to convert mechanical strain into usable electrical energy.resistance need to be large enough that low frequencies of interest are not lost. For pressure sensors. Sophisticated pressure sensors therefore use acceleration compensation elements in addition to the pressure sensing elements. the acceleration signal (released from the compensation element) is subtracted from the combined signal of pressure and acceleration to derive the true pressure information. When the accelerometer experiences a motion. A simplified equivalent circuit model can be used in this region. The ceramic materials (such as PZT ceramic) have a piezoelectric constant / sensitivity that is roughly two orders of magnitude . Sensing materials Two main groups of materials are used for piezoelectric sensors: piezoelectric ceramics and single crystal materials. In a pressure sensor a thin membrane is used to transfer the force to the elements. as above.
6. The ability to combine variable selection with specific operations improves program readability. quartz. numeric conversions and floating point arithmetic. If embedded C is used the programming and program test time is drastically reduced.higher than those of single crystal materials and can be produced by inexpensive sintering processes. Rudimentary knowledge of the memory structure of the 8051 CPU is desirable (but not necessary). This contributes to source code reusability as well as better overall application structure. so unfortunately their high sensitivity degrades over time.1 EMBEDDED C If programming is done using embedded C then it has following advantages.details like register allocation and addressing of the various memory types and data types is managed by the compiler. The less sensitive crystal materials (gallium phosphate. SOFTWARE REQUIREMENTS 6. Programs get a formal structure (which is imposed by the C programming language) and can be divided into separate functions. The degradation is highly correlated with temperature.2 KEIL COMPILER . almost infinite – long term stability. tourmaline) have a much higher – when carefully handled. Existing program parts can be more easily included into new programs because of modular program construction techniques. The piezoeffect in piezoceramics is "trained". The language C is a very portable language (based on the ANSI standard) that enjoys wide popular support and is easily obtained for most systems. The C run-time library contains many standard routines such as: formatted output. Also the keywords and operational functions that more nearly resemble the human thought process may be used. Knowledge of the processor instruction set is not required. Existing program investments can be quickly adapted to other processors has needed.
Support for dual data pointers on ATMEL. Some of the features of keil compiler are Nine basic data types. dallas semiconductor. cypress. 6. making it a preferable technology for application that require frequent updating of large amounts of data as in the case of a memory stick. If programming is done using flash memory then the time to develop code is reduced. the compiler generates a listing file which may optionally include symbol table and cross reference. infineon. Use of AJMP and ACALL instructions. Full use of the 8051 registers banks. AMD. or electronically erasable programmable read only memory.3 FLASH PROGRAMMER: Flash memory refers to a particular type of EEPROM. Complete symbol and type information for source-level debugging.the C51 compiler translates C source files into relocatable object modules which contain full symbolic information for debugging with the micro vision debugger or an in-circuit emulator. and triscend microcontrollers. Philips. Bit-addressable data objects. It provides more features than any other 8051 C compiler available today. The C51 compiler allows you to write 8051 microcontroller applications in C that. Language extensions in the C51 compiler give you full access to all resources of the 8051. This makes it slow to update. once compiled. EEPROM erases its content one byte at a time. Also the . In addition to the object file. Flash memory can erase its data in entire blocks. Interrupt functions may be written in c.The keil C51 C compiler for the 8051 microcontroller is the most popular 8051 C compiler in the world. have the efficiency and speed of assembly language.
A dual UART or DUART combines two UARTs into a single chip. Examples of such are optical fiber.4 UART Protocol A universal asynchronous receiver/transmitter (usually abbreviated UART is a type of "asynchronous receiver/transmitter". UARTs are commonly used in conjunction with other communication standards such as EIA RS-232.1 Transmitting and receiving serial data Serial transmission of digital information (bits) through a single wire or other medium is much more cost effective than parallel transmission through multiple wires. a piece of computer hardware that translates data between parallel and serial forms. the presence or absence of current (in current loops) was used in telegraph circuits. Some signaling schemes do not use electrical wires. Historically. A UART is usually an individual (or part of an) integrated circuit used for serial communications over a computer or peripheral device serial port. 6. Typically. and (wireless) Bluetooth in its Serial Port Profile (SPP). IrDA (infrared). Many modern ICs now come with a UART that can also communicate synchronously. Each UART contains a shift register which is the fundamental method of conversion between serial and parallel forms.products can be tested and tailored at the end of the assembly line and the code bugs can be corrected in the field. Examples of standards for voltage signaling are RS-232. separate interface devices are used to convert the logic level signals of the UART to and from the external signaling levels.4. New product features can be added easily. The UART usually does not directly generate or receive the external signals used between different items of equipment. UARTs are now commonly included in microcontrollers. External signals may be of many different forms. these devices are called USARTs. A UART is used to convert the transmitted information between its sequential and parallel form at each end of the link. even remotely. 6. Some . RS-422 and RS-485 from the EIA.
2 Asynchronous receive and transmit In asynchronous transmitting.signaling schemes use modulation of a carrier signal (with or without wires). and low-cost chips exist to convert logic level signals (such as TTL voltages) to RS-232 level signals (for example. and then one. or it can be omitted. In mechanical teletypes. five to eight data bits. This improves the efficiency of transmission on suitable channels since more of the bits sent are usable data and . the "stop" bit was often stretched to two bit times to give the mechanism more time to finish printing a character. and provides a delay before the next character can start. RF modulation with data radios. As of 2008. The parity bit can either makes the number of "one" bits between any start/stop pair odd. Examples are modulation of audio signals with phone line modems. It is useful to communicate between microcontrollers and also with PCs. Communication may be "full duplex" (both send and receive at the same time) or "half duplex" (devices take turns transmitting and receiving).4. UARTs are commonly used with RS-232 for embedded systems communications. 6. Odd parity is more reliable because it assures that there will always be at least one data transition. A stretched "stop" bit also helps resynchronization. an optional "parity" bit. Maxim's MAX232). and this permits many UARTs to resynchronize. The start bit is the opposite polarity of the data-line's idle state. and the DC-LIN for power line communication. least-significant-bit first. Many chips provide UART functionality in silicon. or even. teletype-style UARTs send a "start" bit. or two "stop" bits. In synchronous transmission. The stop bit is the data-line's idle state. the clock data is recovered separately from the data stream and no start/stop bits are used. (This is called asynchronous start-stop transmission). one and a half.
only idle stop bits.e. the state of the line is . current flowing. If the mark condition appears. If not. The usual filler is the ASCII "SYN" character. or a logical one.not character framing. When on. They provide a "rest" interval for the receiving DTE so that it may prepare for the next character which may be after the stop bit(s). The rest interval was required by mechanical Teletypes which used a motor driven camshaft to decode each character. the pulse is said to be in the "mark" condition. This may be done automatically by the transmitting device.3 Serial to Parallel Algorithm A data communication pulse can only be in one of two states but there are many names for the two states. circuit open. The receiver tests the state of the incoming signal on each clock pulse. circuit closed. The start bit signals the receiving DTE that a character code is coming. current stopped. An asynchronous transmission sends no characters over the interconnection when the transmitting device has nothing to send -.each data bit is as long as 16 clock pulses. In the ASCII code set the eighth data bit may be a parity bit. a logical one is recorded otherwise a logical zero. All operations of the UART hardware are controlled by a clock signal which runs at a multiple (say. 6. depending on the code set employed. low voltage.4. At the end of each character the motor needed time to strike the character bail (print the character) and reset the camshaft. A character code begins with the data communication circuit in the space condition. which is also called a space. USART chips have both synchronous and asynchronous modes. When off. After waiting a further bit time.. or a logical zero. The start bit is always a 0 (logic low). represent the character. 16) of the data rate . '1') condition and called the stop bit(s). it is valid and signals the start of a new character. the spurious pulse is ignored. but a synchronous interface must send "pad" characters to maintain synchronism between the receiver and transmitter. The next five to eight bits. looking for the beginning of the start bit. i. the pulse is said to be in the "space" condition. If the apparent start bit lasts at least onehalf of the bit time. high voltage. The next one or two bits are always in the mark (logic high.
Since transmission of a single character may take a long time relative to CPU speeds. no parity. and one stop bit. first-out (FIFO) buffer memory is inserted between the receiver shift register and the host system interface. in exceptional cases the receiving UART will produce an erratic stream of mutilated characters and transfer them to the host system. Typical serial ports used with personal computers connected to modems use eight data bits. generates and appends the parity bit (if used). the contents of the shift register is made available (in parallel fashion) to the receiving system. and appends the stop bits. This allows the host processor more time to handle an interrupt from the UART and prevents loss of received data at high rates.again sampled and the resulting level clocked into a shift register. shifts the required number of data bits out to the line. practical UARTs use two different shift registers for transmitted characters and received characters. The UART will set a flag indicating new data is available. 6. Transmission operation is simpler since it is under the control of the transmitting system. character length. the UART will maintain a flag showing busy status so that the host system does not deposit a new character for transmission until the previous one has been completed. The receiving UART may detect some mismatched settings and set a "framing error" flag bit for the host system. this may also be done with an interrupt.4 History Some early telegraph schemes used variable-length pulses (as in Morse code) and rotating clockwork mechanisms to transmit alphabetic characters. and stop bits for proper operation. the UART hardware generates a start bit. typically) have elapsed. Transmitting and receiving UARTs must be set for the same bit speed. parity. a small first-in. for this configuration the number of ASCII character per seconds equals the bit rate divided by 10. The first . and may also generate a processor interrupt to request that the host processor transfers the received data. After the required number of bit periods for the character length (5 to 8 bits. As soon as data is deposited in the shift register. Since full-duplex operation requires characters to be sent and received at the same time. In some common types of UART.4.
since the CPU timing was critical. it became customary to store the ASCII code in 8 bits. Some very low-cost home computers or embedded systems dispensed with a UART and used the CPU to sample the state of an input port or directly manipulate an output port for data transmission. Gordon Bell designed the UART for the PDP series of computers. which others were calling a UART. These sent 5-bit Baudot codes for mechanical teletypewriters. this was an early example of a medium scale integrated circuit. 16C750. and 16C850. including the 16C550. MOS Technology 6551 was known under the name "Asynchronous Communications Interface Adapter" (ACIA). 6. these schemes avoided the purchase of a costly UART chip. While very CPU-intensive. 16C650. Western Digital made the first single-chip UART WD1402A around 1971. When IBM built computers in the early 1960s with 8-bit characters. The technique was known as a bit-banging serial port. Depending on the manufacturer. different terms are used to identify devices that perform the UART functions.4. the popular National Semiconductor 16550 has a 16 byte FIFO. and spawned many variants. Intel called their 8251 device a "Programmable Communication Interface". This allowed higher transmission speed without data loss and without requiring such frequent attention from the computer.UART-like devices (with fixed-length pulses) were rotating mechanical switches (commutators). newer UARTs were developed with on-chip buffers. An example of an early 1980s UART was the National Semiconductor 8250. In the 1990s. The term "Serial Communications Interface" (SCI) was first used at Motorola around 1975 to refer to their start-stop asynchronous serial interface device. For example. ASCII required a seven bit code. Later.5 STRUCTURE A UART usually contains the following components: . and replaced morse code.
usually a multiple of the bit rate to allow sampling in the middle of a bit period. input and output shift registers transmit/receive control read/write control logic transmit/receive buffers (optional) parallel data bus buffer (optional) First-in. . first-out (FIFO) buffer memory (optional) • • • • • • These were the software’s and protocols used in monitoring and controlling the temperature and voltage.• a clock generator.
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