CHAPTER 1 INTRODUCTION

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1.1

Aim of the project:
The main objective of this project is to develop a fire monitoring system which is of essential use to the society.

1.2 Methodology:

According to our project requirements the following are essential. • Power supply to smoke sensor circuit- a voltage of +5v is required in order to run the transistor in the smoke sensor circuit. With this, the smoke detected at the smoke sensor is signaled from the transistor to the microcontroller. Power supply to microcontroller- a voltage of +5v is required for efficient working of the microcontroller. The smoke detected at the smoke sensor circuit is signaled to the microcontroller and gets saved in it. Microcontroller to LCD- when a smoke is detected and the microcontroller receives this information, it is sent to the LCD via port 1. The LCD displays the corresponding signal as “SMOKE DETECTED” and the alarm starts off.

1.3 Significance and applications:
The Fire monitoring system plays a very important role in domestic applications. The ease of operation of the kit and low cost add up as an additional advantage for its usage. Its significance can be proved by considering the following specialties of the kit designed by us.

Reliability: Reliability is one such factor that every electrical system should have in order to render its devices without malfunctioning over a long period of time. The kit has been designed using AT89C52 microcontroller which itself is very reliable and also operates very efficiently under normal conditions. Cost: The design is implemented at a very economical price. The total cost incurred in designing this kit is very less and further we have developed the Fire monitoring system which is more economical rather than just interfacing those which are readily available in the market.

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1.4 Organization of the report:
The report totally consists of six chapters. Chapter 1 gives the introduction, Chapter 2 gives the overview of the project, Chapter 3 gives the details of the microcontroller used, Chapter 4 describes the power supply, smoke sensor, LM 324 (Quadrupled OP AMP) and LCD, Chapter 5 describes the algorithm and finally Chapter 6 gives the conclusions.

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CHAPTER 2 OVERVIEW

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2.1 BLOCK DIAGRAM

POWER SUPPLY AT89S52 MICRO CONTROLLER FIRE SENSO R BC5 47

LCD DISPLAY

BUZZER

Fig 2.1: Block Diagram of Fire Monitoring System Description:
From the Power supply unit 230AC is converted in to 5vdc.The 5v dc is given to microcontroller and fire sensor etc. Then Power supply is activated to all the parts of circuit. And all LCD is given with 5v dc and 3 control pins(RS,RW,E) are given to microcontroller P2.5,P2.6,P2.7 and Parallel pins are connected to one of the port and Ground, Vcc(5v dc) and contrast pin are given to Pot(variable resister) by default on the LCD first row it displays the “FIRE MONITORING SYSTEM”

From the fire sensor if any smoke is occurred then it is given to drive circuit and from there it is given to microcontroller one of the pin then microcontroller internally checks for
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conditions given in the program if smoke detected then to display “SMOKE DETECTED “on the second row of the LCD, with buzzer on, if smoke is not detected on LCD it displayed with “NO SMOKE” with buzzer off. This process is repeated for infinite time depending upon the surrounding smoke.

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CHAPTER 3 MICROCONTROLLER

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3.1 A Brief History of 8051
In 1981, Intel Corporation introduced an 8 bit microcontroller called 8051. This microcontroller had 128 bytes of RAM, 4K bytes of chip ROM, two timers, one serial port, and four ports all on a single chip. At the time it was also referred as “A SYSTEM ON A CHIP” The 8051 is an 8-bit processor meaning that the CPU can work only on 8 bits data at a time. Data larger than 8 bits has to be broken into 8 bits pieces to be processed by the CPU. The 8051 has a total of four I\O ports each 8 bit wide. There are many versions of 8051 with different speeds and amount of on-chip ROM and they are all compatible with the original 8051. This means that if you write a program for one it will run on any of them. The 8051 is an original member of the 8051 family. There are two other members in the 8051 family of microcontrollers. They are 8052 and 8031. All the three microcontrollers will have the same internal architecture, but they differ in the following aspects.  8031 has 128 bytes of RAM, two timers and 6 interrupts.
 89S51 has 4KB ROM, 128 bytes of RAM, two timers and 6 interrupts.  89S52 has 8KB ROM, 128 bytes of RAM, three timers and 8

interrupts. Of the three microcontrollers, 89C51 is the most preferable. Microcontroller supports both serial and parallel communication. In the concerned project 89C52 microcontroller is used. Here microcontroller used is AT89C52, which is manufactured by ATMEL laboratories. 3.2 Description of 89S52 Microcontroller The AT89S52 provides the following standard features: 8Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89C52 is designed with static logic for operation down to zero frequency and supports two software selectable
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power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power down Mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the AT89C52 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.

3.3 Features of Microcontroller (89S52)
• • • • • • • • • • • Compatible with MCS-51 Products 8 Kbytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-Level Program Memory Lock 256 x 8-Bit Internal RAM 32 Programmable I/O Lines Three 16-Bit Timer/Counters Eight vector two level Interrupt Sources Programmable Serial Channel Low Power Idle and Power Down Modes

In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes.

The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

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3.4 Block Diagram of microcontroller

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Figure 3.4.1 Block Diagram Of 89S52

3.5 Pin Configurations

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Figure 3.5.1 Pin Diagram of 89S52

Pin Description
12

VCC

Pin 40 provides Supply voltage to the chip. The voltage source is +5v

GND. Pin 20 is the grounded

Port 0 Port 0 is an 8-bit open drain bidirectional I/O port from pin 32 to 39. As an output port

each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.

Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups from pin 1 to 8. The Port 1

output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in following table. Port 1 also receives the low-order address bytes during Flash programming and program verification.
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Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups from pin 21 to 28. The Port

2 output buffers can sink / source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. • Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups from pin 10 to 17. The Port 3 output buffers can sink / source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups.

Port 3 also serves the functions of various special features of the AT89S52 as listed below:

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Table 3.5.1 Special Features of port3

Port 3 also receives some control signals for Flash programming and programming verification.

RST Pin 9 is the Reset input. It is active high. Upon applying a high pulse to this pin, the

microcontroller will reset and terminate all activities. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROG Address Latch is an output pin and is active high. Address Latch Enable output pulse for

latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes.
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Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN

Program Store Enable is the read strobe to external program memory. When the AT89C52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP External Access Enable EA must be strapped to GND in order to enable the device to

fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming when 12-volt programming is selected.

XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

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Output from the inverting oscillator amplifier.

• Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on chip oscillator, as shown in Figure 5.3. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 5.4.

Figure 3.5.1.1 crystal connections

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Figure 3.5.1.2 External Clock Drive Configuration

There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

• Idle Mode
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hardware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

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• Power down Mode
In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Table 3.5.2 Status Of External Pins During Idle and Power Down Mode

• Program Memory Lock Bits
On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table 5.4. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.

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Table 3.5.3 Lock Bit Protection Modes

3.6 Special function registers:
Special function registers are the areas of memory that control specific functionality of the 89S52 microcontroller.

a) Accumulator (0E0h)
As its name suggests, it is used to accumulate the results of large no. of instructions. It can hold 8 bit values.

b) B register (oFoh)
The B register is very similar to accumulator. It may hold 8-bit value. The B register is only used by MUL AB and DIV AB instructions. In MUL AB the higher byte of the products gets stored in B register. In DIV AB the quotient gets stored in B with the remainder in A.

c) Stack pointer (081h)
The stack pointer holds 8-bit value. This is used to indicate where the next value to be removed from the stack should be taken from. When a value is to be pushed on to the stack, the 8052 first store the value of SP and then store the value at the resulting memory location. When a value is to be popped from the stack, the 8052 returns the value from the memory location indicated by SP and then decrements the value of SP.

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d) Data pointer (Data pointer low/high, address 82/83h)
The SFRs DPL and DPH work together to represent a 16-bit value called the data pointer. The data pointer is used in operations regarding external RAM and some instructions code memory. It is a 16-bit SFR and also an addressable SFR.

e) Program counter
The program counter is a 16 bit register, which contains the 2 byte address, which tells the next instruction to execute to be found in memory. When the 8052 is initialized PC starts at 0000h and is incremented each time an instruction is executes. It is not addressable SFR.

f) PCON (power control, 87h)
The power control SFR is used to control the 8052’s power control modes. Certain operation modes of the 8052 allow the 8052 to go into a type of “sleep mode” which consumes low power.

SMOD

----

---

----

GF1 0

GF

PD

IDL

g)TCON(Timer control, 88h)
The timer mode control SFR is used to configure and modify the way in which the 8052’s two timers operate. This SFR controls whether each of the two timers is running or stopped and contains a flag to indicate that each timer has overflowed. Additionally, some non-timer related bits are located in TCON SER. These bits are used to configure the way in which the external interrupt flags are activated, which are set when an external interrupt occur.

TF1

TR1

TF0

TR0

IE1

IT1

IE0

IT0

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h)TMOD(Timer Mode,89h)
The timer mode SFR is used to configure the mode of operation of each of the two timers. Using this SR your program may configure each timer to be a 16-bit timer, or 13 bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may configure the timers to only count when an external pin is activated or to count “events” that are indicated on an external pin.

‌ Gate C/ T M1 M0 Gate

‌ C/ T M1 M0

TIMER1

TIMER0

i) T0 (Timer 0 low/ high, address 8A/ 8C h)
These two SFRs together represent timer 0. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment value.

j) T1 (Timer 1 low/ high, address 8B/ 8D h)
These two SFRs together represent timer 1. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value.

k) P0 (Port 0, address 80h, bit addressable)
This is port 0 latch. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0 of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.
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l) P1(Port 1, address 90h, bit addressable)
This is port 1 latch. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 1 is first written on P1 register. For e.g., bit 0 of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

m) P2 (Port 2, address 0A0h, bit addressable)
This is port 2 latch. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 2 is first written on P2 register. For e.g., bit 0 of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

n) P3 (Port 3, address 0B0h, bit addressable)
This is port 3 latch. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 3 is first written on P3 register. For e.g., bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.

o) IE (Interrupt Enable, 0A8h)
The interrupt enable SFR is used to enable and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific interrupts, where the MSB bit is used to enable or disable all the interrupts. Thus, if the high bit of IE 0 all interrupts are disabled regardless of whether an individual interrupt is enabled by setting a lower bit.

___ EA ET2 ES ET1 EX1 ET0 0 EX

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p) IP (Interrupt Priority, 0B8h)
The interrupt priority SFR is used to specify the relative priority of each interrupt. On 8052, an interrupt may be either low or high priority. An interrupt may interrupt interrupts. For e.g., if we configure all interrupts as low priority other than serial interrupt. The serial interrupt always interrupts the system; even if another interrupt is currently executing no other interrupt will be able to interrupt the serial interrupt routine since the serial interrupt routine has the highest priority.

___

___ PT2 PS PT1 PX1 PT0 PX0

q)PSW (Program Status Word, 0D0h)
The Program Status Word is used to store a number of important bits that are set and cleared by 8052 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag, the parity flag and the overflow flag. Additionally, it also contains the register bank select flags, which are used to select, which of the “R” register banks currently in use.

CY

AC

F0

RS1

RS0

OV

----

P

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r) SBUF (Serial Buffer, 99h)
SBUF is used to hold data in serial communication. It is physically two registers. One is writing only and is used to hold data to be transmitted out of 8052 via TXD. The other is read only and holds received data from external sources via RXD. Both mutually exclusive registers use address 99h.

3.7 Memory Organization
The total memory of 89S52 system is logically divided in Program memory and Data memory. Program memory stores the programs to be executed, while data memory stores the data like intermediate results, variables and constants required for the execution of the program. Program memory is invariably implemented using EPROM, because it stores only program code which is to be executed and thus it need not be written into. However, the data memory may be read from or written to and thus it is implemented using RAM. Further, the program memory and data memory both may be categorized as on-chip (internal) and external memory, depending upon whether the memory physically exists on the chip or it is externally interfaced. The 89C52 can address 8Kbytes on-chip memory whose map starts from 0000H and ends at 1FFFH. It can address 64Kbytes of external program memory under the control of PSEN (low) signal. The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. That means the upper 128bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions that use direct addressing access SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #data

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Instructions that use indirect addressing access the upper128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H) .MOV @R0, #data Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.

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CHAPTER 4 POWER SUPPLY, SMOKE SENSOR,LCD

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4.1 Power supply 4.1.1 Description:
A variable regulated power supply, also called a variable bench power supply, is one where you can continuously adjust the output voltage to your requirements. Varying the output of the power supply is the recommended way to test a project after having double checked parts placement against circuit drawings and the parts placement guide. This type of regulation is ideal for having a simple variable bench power supply. Actually this is quite important because one of the first projects a hobbyist should undertake is the construction of a variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for testing. Most digital logic circuits and processors need a 5 volt power supply. To use these parts we need to build a regulated 5 volt source. Usually you start with an unregulated power supply ranging from 9 volts to 24 volts DC (A 12 volt power supply is included with the Beginner Kit and the Microcontroller Beginner Kit.). To make a 5 volt power supply, we use a LM7805 voltage regulator IC .

The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to
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the Common pin and then when you turn on the power, you get a 5 volt supply from the Output pin.

Circuit Features:
Brief description of operation: Gives out well regulated +5V output, output current capability of 100 mA

Circuit protection: Built-in overheating protection shuts down output when Circuit complexity: Very simple and easy to build Circuit performance: Very stable +5V output voltage, reliable operation Availability of components: Easy to get, uses only very common basic Design testing: Based on datasheet example circuit, I have used this circuit Applications: Part of electronics devices, small laboratory power supply Power supply voltage: Unregulated DC 8-18V power supply Power supply current: Needed output current + 5 mA Component costs: Few dollars for the electronics components + the input

regulator IC gets too hot
• • •

components

successfully as part of many electronics projects
• • • •

transformer cost

4.1.2 Block Diagram
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Figure 4.1.2:Block diagram of power supply

4.1.3 Circuit Diagram:
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Figure 4.1.3:Basic Power Supply Circuit

Basic Power Supply Circuit: Above is the circuit of a basic unregulated dc power supply. A bridge rectifier D1 to D4 rectifies the ac from the transformer secondary, which may also be a block rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re rectifier ratings). The principal advantage of a bridge rectifier is you do not need a centre tap on the secondary of the transformer. A further but significant advantage is that the ripple frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes filtering somewhat easier. As a design example consider we wanted a small unregulated bench supply for our projects. Here we will go for a voltage of about 12 - 13V at a maximum output current (I L) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%.

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Now the RMS secondary voltage (primary is whatever is consistent with your area) for our power transformer T1 must be our desired output Vo PLUS the voltage drops across D2 and D4 (2 * 0.7V) divided by 1.414. This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V. Depending on the VA rating of your transformer, the secondary voltage will vary considerably in accordance with the applied load. The secondary voltage on a transformer advertised as say 20VA will be much greater if the secondary is only lightly loaded. If we accept the 2.5% ripple as adequate for our purposes then at 13V this becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828 times this value. Vrip = 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also required for this calculation is the time interval for charging pulses. If you are on a 60Hz system it it 1/ (2 * 60) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is 0.01 sec or 10 milliseconds. Remember the tolerance of the type of capacitor used here is very loose. The important thing to be aware of is the voltage rating should be at least 13V X 1.414 or 18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at least 29V. Don't search for this rating because it doesn't exist. Use the next highest standard or even higher. The current rating should be at least twice the load current maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008 types. These are rated 1 Amp at 400PIV, 600PIV and 1000PIV respectively. Always be on the lookout for the higher voltage ones when they are on special.

4.1.4 IC Voltage Regulators:
Voltage regulators comprise a class of widely used ICs. Regulator IC units contain the circuitry for reference source, comparator amplifier, control device, and overload protection all in a single IC. Although the internal construction of the IC is somewhat different from that
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described for discrete voltage regulator circuits, the external operation is much the same. IC units provide regulation of either a fixed positive voltage, a fixed negative voltage, or an adjustably set voltage. A power supply can be built using a transformer connected to the ac supply line to step the ac voltage to desired amplitude, then rectifying that ac voltage, filtering with a capacitor and RC filter, if desired, and finally regulating the dc voltage using an IC regulator. The regulators can be selected for operation with load currents from hundreds of mill amperes to tens of amperes, corresponding to power ratings from mill watts to tens of watts.

Three-Terminal Voltage Regulators: Fixed Positive Voltage Regulators:
IN OUT 78XX

Vin Vout C1

GND

C2

Fig shows the basic connection of a three-terminal voltage regulator IC to a load. The fixed voltage regulator has an unregulated dc input voltage, Vi, applied to one input terminal, a regulated output dc voltage, Vo, from a second terminal, with the third terminal connected to ground. While the input voltage may vary over some permissible voltage range, and the output load may vary over some acceptable range, the output voltage remains constant within specified voltage variation limits. A table of positive voltage regulated ICs is provided in table. For a selected regulator, IC device specifications list a voltage range over which the input voltage can vary to maintain a regulated output voltage over a range of load current. The specifications also list the amount of output voltage change resulting from a change in load current (load regulation) or in input voltage (line regulation).

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TABLE 4.1.1: Positive Voltage Regulators in 7800 series

IC No.

Output voltage(v)

Maximum input voltage(v)

7805 7806 7808 7810 7812 7815 7818 7824

+5 +6 +8 +10 +12 +15 +18 +24 40V 35V

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4.2 SMOKE SENSOR
There are two main types of smoke detectors: ionization detectors and photoelectric detectors. A smoke alarm uses one or both methods, sometimes plus a heat detector, to warn of a fire. The devices may be powered by a 9-volt battery, lithium battery, or 120-volt house wiring. Ionization Detectors Ionization detectors have an ionization chamber and a source of ionizing radiation. The source of ionizing radiation is a minute quantity of americium-241 (perhaps 1/5000th of a gram), which is a source of alpha particles (helium nuclei). The ionization chamber consists of two plates separated by about a centimeter. The battery applies a voltage to the plates, charging one plate positive and the other plate negative. Alpha particles constantly released by the americium knock electrons off of the atoms in the air, ionizing the oxygen and nitrogen atoms in the chamber. The positively-charged oxygen and nitrogen atoms are attracted to the negative plate and the electrons are attracted to the positive plate, generating a small, continuous electric current. When smoke enters the ionization chamber, the smoke particles attach to the ions and neutralize them, so they do not reach the plate. The drop in current between the plates triggers the alarm. Photoelectric Detectors In one type of photoelectric device, smoke can block a light beam. In this case, the reduction in light reaching a photocell sets off the alarm. In the most common type of photoelectric unit, however, light is scattered by smoke particles onto a photocell, initiating an alarm. In this type of detector there is a T-shaped chamber with a light-emitting diode (LED) that shoots a beam of light across the horizontal bar of the T. A photocell, positioned at the bottom of the vertical base of the T, generates a current when it is exposed to light. Under smoke-free conditions, the light beam crosses the top of the T in an uninterrupted straight line, not striking the photocell positioned at a right angle below the beam. When smoke is present, the light is scattered by smoke particles, and some of the light is directed down the vertical part of the T to strike the photocell. When sufficient light hits the cell, the current triggers the alarm.

Which Method is Better?
35

Both ionization and photoelectric detectors are effective smoke sensors. Both types of smoke detectors must pass the same test to be certified as UL smoke detectors. Ionization detectors respond more quickly to flaming fires with smaller combustion particles; photoelectric detectors respond more quickly to smoldering fires. In either type of detector, steam or high humidity can lead to condensation on the circuit board and sensor, causing the alarm to sound. Ionization detectors are less expensive than photoelectric detectors, but some users purposely disable them because they are more likely to sound an alarm from normal cooking due to their sensitivity to minute smoke particles. However, ionization detectors have a degree of built-in security not inherent to photoelectric detectors. When the battery starts to fail in an ionization detector, the ion current falls and the alarm sounds, warning that it is time to change the battery before the detector becomes ineffective. Back-up batteries may be used for photoelectric detectors.

APPLICATION They are used in gas leakage detecting equipments in family and industry, are suitable for detecting of LPG, i-butane, propane, methane ,alcohol, Hydrogen, smoke. Model: SEN117A2B
• •

Shipping Weight: 5 g 233 Units in Stock

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4.3 LCD:4.3.1 Description
To send any of the commands from given table to the lcd, make pin RS =0.For data, make RS=1.then send a high to low pulse to the E pin to enable the internal latch of the LCD. As shown in figure for LCD connections.

Figure 4.3.1: 8 bit LCD interface

4.3.2: Pin Connection:
Table 4.3.1., Pin assignment for <= 80 character displays Pin Symbol Level number 1 2 3 4 Vss Vcc Vee RS 0/1 I/O Function

- Power supply (GND) - Power supply (+5V) - Contrast adjust I 0 = Instruction input 37

Table 4.3.1., Pin assignment for <= 80 character displays Pin Symbol Level number I/O 1 = Data input 5 6 7 8 9 10 11 12 13 14 R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 0/1 1, 1->0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 I 0 = Write to LCD module 1 = Read from LCD module Function

I Enable signal I/O Data bus line 0 (LSB) I/O Data bus line 1 I/O Data bus line 2 I/O Data bus line 3 I/O Data bus line 4 I/O Data bus line 5 I/O Data bus line 6 I/O Data bus line 7 (MSB)

Table 4.3.2., Pin assignment for > 80 character displays Pin number 1 2 3 4 5 6 Symbol DB7 DB6 DB5 DB4 DB3 DB2 Level 0/1 0/1 0/1 0/1 0/1 0/1 I/O Function

I/O Data bus line 7 (MSB) I/O Data bus line 6 I/O Data bus line 5 I/O Data bus line 4 I/O Data bus line 3 I/O Data bus line 2 38

Table 4.3.2., Pin assignment for > 80 character displays Pin number 7 8 9 10 Symbol DB1 DB0 E1 R/W Level 0/1 0/1 1, 1->0 0/1 I/O I/O Data bus line 1 I/O Data bus line 0 (LSB) I Enable signal row 0 & 1 (1stcontroller) I 0 = Write to LCD module 1 = Read from LCD module 0 = Instruction input 1 = Data input Function

11 12 13 14 15 16

RS Vee Vss Vcc E2 n.c.

0/1 1, 1->0

I

- Contrast adjust - Power supply (GND) - Power supply (+5V) I Enable signal row 2 & 3 (2ndcontroller)

Instruction set
Table 4.3.3. HD44780 instruction set Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Clear display 0 0 0 0 0 0 0 0 0 1 Clears display and returns cursor to the home position 1.64mS Description Execution time**

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Table 4.3.3. HD44780 instruction set Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (address 0). Returns cursor to home position (address 0). Also returns display being shifted to the original position. DDRAM contents remains unchanged. Description Execution time**

Cursor home

0

0

0

0

0

0

0

0

1

*

1.64mS

Entry mode set 0

0

0

0

0

0

0

1

I/D

Sets cursor move direction (I/D), specifies to shift the display (S). S These operations are performed during data read/write. Sets On/Off of all display (D), cursor On/Off B (C) and blink of cursor position character (B). * Sets cursormove or display-shift (S/C), shift direction (R/L).

40uS

Display On/Off 0 control

0

0

0

0

0

1

D

C

40uS

Cursor/display shift

0

0

0

0

0

1

S/C R/L

*

40uS

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Table 4.3.3. HD44780 instruction set Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DDRAM contents remains unchanged. Sets interface data length (DL), number of display line (N) and character font(F). Sets the CGRAM address. CGRAM data is sent and received after this setting. Sets the DDRAM address. DDRAM data is sent and received after this setting. Reads Busyflag (BF) indicating internal operation is being performed and reads CGRAM or DDRAM address counter contents Description Execution time**

Function set

0

0

0

0

1

DL

N

F

*

*

40uS

Set CGRAM address

0

0

0

1

CGRAM address

40uS

Set DDRAM address

0

0

1

DDRAM address

40uS

Read busy-flag 0 and address counter

1

BF

CGRAM / DDRAM address

0uS

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Table 4.3.3. HD44780 instruction set Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (depending on previous instruction). Write to CGRAM or DDRAM Read from CGRAM or DDRAM Writes data to CGRAM or DDRAM. Reads data from CGRAM or DDRAM. Description Execution time**

1

0

write data

40uS

1

1

read data

40uS

Remarks: - DDRAM = Display Data RAM. - CGRAM = Character Generator RAM. - DDRAM address corresponds to cursor position. - * = Don't care. - ** = Based on Fosc = 250kHz.

Table 4.3.4. Bit names Bit name I/D S D C B Setting / Status 0 = Decrement cursor position 0 = No display shift 0 = Display off 0 = Cursor off 0 = Cursor blink off 1 = Increment cursor position 1 = Display shift 1 = Display on 1 = Cursor on 1 = Cursor blink on

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Table 4.3.4. Bit names Bit name S/C R/L DL N F BF 0 = Move cursor 0 = Shift left 0 = 4-bit interface 0 = 1/8 or 1/11 Duty (1 line) 0 = 5x7 dots 0 = Can accept instruction Setting / Status 1 = Shift display 1 = Shift right 1 = 8-bit interface 1 = 1/16 Duty (2 lines) 1 = 5x10 dots 1 = Internal operation in progress

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CHAPTER 5 ALGORITHM

44

45

5.1 Description:
• • •

Start the fire monitoring system. Initialize the LCD & Microcontroller for proper working of the device. Make sure the smoke sensor is ready for use to ensure the proper working of the device. When a smoke is detected, the signal is received at the smoke sensor which in turn is transferred to the microcontroller. This alarms the buzzer and a display saying “SMOKE DETECTED” is observed on the LCD. When the intensity of smoke gets abated, the system goes back to normalcy. The above process continues again whenever a fire break is observed.

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CHAPTER 6 CONCLUSIONS

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6.1 CONCLUSION
Embedded systems are emerging as a technology with high potential. In the past decades microprocessor based embedded system ruled the market. The last decade witnessed the revolution of microcontroller based embedded systems. This project basically deals with the safety measures that must be taken during a fire break and alarms the people of a fire break with the help of microcontroller. With regard to the requirements gathered the safety of the people can be ensured with the help of electronic devices.

6.2 FUTURE SCOPE
This system is a rapidly growing field and there are new and improved strategies popping up all the time. For the most part these systems are all built around the same basic structure, a central box that monitors several detectors and perimeter guards and sounds an alarm when any of them are triggered.This system is best for guiding the perimeter of a house or a business center the points where an intruder would enter the building. In this system IR sensor is used to detect the intrusion. Similarly the vibration and temperature sensors recognize vibration disturbances and accidental fires respectively. This project provides an efficient and economical security system. This system finds applications in industries, banks and homes. Incorporating the features discussed below can further enhance the system  This system can detect intrusion only at discrete points. This system detection

feature can be extended to scanning a complete area. Thus the intrusion into the building can be detected with much more efficiently.  The redialing feature can also be incorporated such that if the call is not put forward the first time, the auto dialer will dial the same number until the call is successfully completed.
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 A pre-recorded voice message can delivered to the owner notifying him about the intrusion into the premises.  The addition of the above discussed advancements certainly builds this project into a much flexible and reliable security system.

REFERENCES
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1. The 8051 Microcontroller and Embedded Systems By Muhammad Ali Mazidi 2. Fundamentals Of Embedded Software By Daniel W Lewis 3..www.howsstuffworks.com 4. www.alldatasheets.com 5. www.electronicsforu.com 6. www.knowledgebase.com 7.www.8051 projectsinfo.com 8.Datasheets of Microcontroller AT89C52 9. Datasheets of 555 timer 10. Datasheets of TSAL 6200 11. Datasheets of TSOP 1356 12. Datasheets of BC 547 13. Datasheets of DTMF Generator UM 95089

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APPENDIX

#include<reg51.h> sfr ldata=0x90;//port 1 sbit rs=P2^5; sbit rw=P2^6; sbit en=P2^7; sbit buzzer=P0^7; sbit smoke=P0^0; lcdcmd(unsigned char); lcddelay(unsigned int); lcddata1(); lcddata2(); lcddata3();

main() { device=0; sound=0; lcdcmd(0x38); lcdcmd(0x0E); lcdcmd(0x01); lcdcmd(0x80); lcddata1();
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while(1) { if(sound==1) { device=1; lcddata2(); } else { device=0; lcddata3(); } } }

////////////////////////////////////////////////////////////////////////////////////////////////////////////// lcddelay(unsigned int k) { int i,j; for (i=0;i<=k;i++) for (j=0;j<=1275;j++); }

lcdcmd(unsigned char value)
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{ ldata=value; rs=0; rw=0; en=1; lcddelay(1); en=0; return; } lcddata1() { unsigned char s; unsigned char temp[16]="SMOKE DETECTOR"; for(s=0;s<16;s++) { ldata=temp[s]; rs=1; rw=0; en=1; lcddelay(1); en=0; } } lcddata2() {
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unsigned char s; unsigned char temp[16]=" smoke DETECTED "; for(s=0;s<16;s++) { ldata=temp[s]; rs=1; rw=0; en=1; lcddelay(1); en=0; } } lcddata3() { unsigned char s; unsigned char temp[16]=" for(s=0;s<16;s++) { ldata=temp[s]; rs=1; rw=0; en=1; lcddelay(1); en=0; }
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NO SMOKE

";

}

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