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CLK GEN
3 Gannet Block Diagram 200-PIN DDR SODIMM
For
High
L1: Signal 1
L2: GND
L3: Signal 2
11,12,13
CYPRESS 4,5,6,7 DDR 333/400 UNBUFFERED Speed L4: VCC
CY28331-2 AMD CPU DDR SODIMM Trace L5: Signal 3
L6: GND
Athlon 64 11,12,13
L7: Signal 4
4
UNBUFFERED L8: Signal 5 4
31 DDR SODIMM
1394 L1: Signal 1
Conn L2: GND
For
L3: Signal 2
Low L4: Signal 3
HyperTransport DDR-SDRAM17,18 Speed
6.4GB/S 16b/8b L5: VCC
31,32 K4D263238A-GC36 Trace L6: GND
32 RICOH L7: Signal 4
Power 8,9,10 14,15,16 22 L8: Signal 5
PCMCIA Switch R5C554 LVDS
VGA LCD
2 SLOTS 5532V 2* Slot Cardbus
+
VIA
2* 1394 Ports K8T800 ATI
Battery Charger 44
Support 21
TypeIII PCMCIA I/F AGTL+ CPU I/F AGP 8x M10-P SVIDEO/COMP TVOUT ATINY12/MAX1645
INPUTS OUTPUTS
AGP 8X
21 AD+ DCBATOUT
RGB CRT CRT BAT+
8 bit V-LINK
3
SYSTEM DC/DC 45 3
33 66MHZ 8x/4x/2x
Mini-PCI MAX1999
802.11a/b/g 26 INPUT OUTPUT
23,24,25 ATA 133 ATA 133 P EIDE HDD
VIA DCBATOUT
5V_S5 +5V_UP_S5
,
3D3V_S5
VT8235CE DDR&VDDR DC/DC 46
29,30 DVD/ 26 MAX1715/CM8500
10/100/Giga LAN S EIDE CD-RW
PCI Bus / 33MHz PCI INPUT OUTPUT
BCM4401/5705M ACPI 2.0 DCBATOUT VGA VCORE 1D25V_SO
VVGAEER
28
USB 2.0 USB x 4 CPU V_CORE 47
8xUSB 2.0
28 Controller-HIP6301 Drive-ISL6207*2(2
AC LINK 6-CH Phase)
MDC
AC97 2.1
INPUT OUTPUT
42
Card Reader DCBATOUT
MediaBay42 VCC_CORE
2 W83L518D-VD6 Socket 2
SD/MS/MMC/CF
SYSTEM POWER 48,49
28 TPS5110/FDC653N/APL1117
RJ11 LPC I/F G913C/LP2951ACM/FDS9412
CONN INPUT OUTPUT
34 5V_S0
MP3 LPC Bus / 33MHz
5V_S3
3D3V_S3
3D3V_S5
OZ263 3D3V_S0
3D3V_LAN_S3
1D8V_S5
DCBATOUT
2D5V_S3
2D5V_S3
1D8V_S0
VVGADDR
MIC IN 37 39 +5V_AUX_S5
35,36 40 KBC FWH 2D5V_S0
AC'97 CODEC NS SIO SST-49LF040 1D5V_S0
M38859
VT1612A PC87392 STM-M50FW040
1 1
A B C D E
J8 REVISION HISTORY PCI RESOURCE TABLE
6/12 EMI Bypass Cap. DEVICE IDSEL PCI IRQ REQ# / GNT#
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 1D5V_S0 1D5V_S0 1D5V_S0 1D5V_S0 Mini-PCI AD21 P_INTF# P_REQ#0/P_GNT#0
1
1
C615 C616 C617 C618 C619 C620 C621 C623 C624 AD22 P_INTB# P_REQ#1/P_GNT#1
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX R5C554-CardBus A
2
2
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 R5C554-CardBus B AD22 P_INTC# P_REQ#1/P_GNT#1
VDD VDD VDD
1
1
C625 C626 C627 C628 C629
R5C554-IEEE 1394 AD22 P_INTD# P_REQ#1/P_GNT#1
1
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX C630 C631 C633
2
2
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
2
VGA-ATI M10-P P_INTA#
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
1
C634 C635 C636 C637 C638
3D3V_S0 3D3V_S0 3D3V_S0 1D2V_HT0A_S0
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
2
1
C640
1
C639 C641 C642
SCD1U10V2KX
16,46 1D2V_S0 1D2V_S0
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
2
2
2
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 4,8,10,50 1D2V_HT0A_S0 1D2V_HT0A_S0
29 1D2V_LAN_S5 1D2V_LAN_S5
1
1
C648 C649 C650 C652 C653 C654
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 15,16,17,18,46,49 VVGADDR VVGADDR
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
6,8,9,10,16,19,20,23,24,25,31,48,50 2D5V_S0 2D5V_S0
2
2
5,6,7,10,11,13,46,48,49,50 2D5V_S3 2D5V_S3
1
C659
34,43,49,50,51 +5V_AUX_S5 +5V_AUX_S5
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
REVISION HISTORY
Size Document Number Rev
A3
GANNET -1
Date: Thursday, December 04, 2003 Sheet 2 of 51
A B C D E
1
C254 C251 C249 C132 C133 C134 C135 C259
SCD1U10V2MX-1 SC1000P50V SC100P50V2JN SCD01U50V2ZY SCD01U50V2ZY SCD01U50V2ZY SCD01U50V2ZY SC4D7U10V5ZY
3D3V_S0 78.10134.1F1 78.10394.4F1 78.47593.411
2
CONNECT TO CLKGEN PIN 42
L22 BLM21A121S
1 2 3D3V_CLKVDDF_S0
C118 C117 C116 C115
1
4 SCD01U50V2ZY SCD01U50V2ZY SCD01U50V2ZY SCD01U50V2ZY 4
C255 C252 C250
SCD1U10V2MX-1 SCD01U50V2ZY SC1000P50V
78.10394.4F1
2
CONNECT TO CLKGEN PIN 33 U31
R361 1 2 22R3
CLK33_PCM_CARD 42
2 13 CLK33_PCM_CY R362 1 2 22R3
VDD PCI33_0 CLK33_PCM 31
9 14 CLK33_LAN_CY R422 1 2 22R3
VDD PCI33_1 CLK33_LAN 29
16 17 CLK33_MINI_CY R423 1 2 22R3
VDD PCI33_2 CLK33_MINI 33
19 18 CLK33_KBC_CY R424 1 2 22R3
VDD PCI33_3 CLK33_KBC 37
29 21 CLK33_SIO_CY R425 1 2 22R3
VDD PCI33_4 CLK33_SIO 40
35 22 PCISEL R426 1 2 22R3
VDD PCISEL/PCI33_5 CLK33_LPCROM 39
38 24 PCISTP#_CY R428 1 2 22R3
VDD PCI33_6/PCISTOP# PCISTP# 24
46 12 CLK33_NOTUS_CY R421 1 2 22R3
VDD PCI33_7 CLK33_NOTUS 34
C285 SC33P50V2JN Internal 100K pull-up VDD
1 2 XI_CLK 43 6 CLK33_HT66SEL#0 Modify-0606
VDDA PCI33_HT66_0/PCIHT66SEL0#
1
7 CLK33_HT66SEL#1 R409 1 2 22R3
PCI33_HT66_1/PCIHT66SEL1# CLK66_NB 9
2
32 8 PCI33_HT66_2 R413 1 2 22R3
VDDF PCI33_HT66_2 CLK66_VGA 14
X2 R394 11 PCI33_HT66_3 R420 1 2 22R3
PCI33_HT66_3 CLK66_VCLK 25
X-14D318MHZ-1-U DUMMY-R3
82.30005.031 3 23 CLK33_SB_CY R427 1 2 22R3
XIN PCI33_F CLK33_SB 25
1 2 XO_CLK 4
1
C272 SC33P50V2JN XOUT SRESET#/PD#
44
2
SRESET#/PD#
Internal 100K pull-up VDD 78.33034.1F1
3D3V_S0 R324 1 2 15R3 CPUCLK_CY 41 28 CLK_24_48SEL#
6 CPUCLK CPUT0 24_48MHZ/SEL#
R403 10KR2 37
FS0 CPUT1 PCISEL
1 2
63.10334.1D1 1 2 CLK33_NOTUS_CY
R429 DUMMY-R2 33 R363 22R3
R325 1 VSSF
1 2 6 CPUCLKJ 2 15R3 CPUCLKJ_CY 40 CPUC0
3
DUMMY-R2
36 CPUC1 VSSA 42 For ICS CLKGEN use 3
CY28331OC-2
R487 DUMMY-R2 Internal 100K pull-up VDD Change to CY28331-2
1 2 FS3
R368 DUMMY-R2
1 2
CLK33_HT66SEL#0 1 2
Input Configuration Clock Generator Output R367 10KR2
2 FS3 FS2 FS1 FS0 PCI_HT# CPU (MHz) PCI33_HT66 (MHz) PCI33 (MHz) R370 DUMMY-R2
1 2
2
0 0 0 0 X Hi-Z Hi-Z Hi-Z All output Tri-state PCISEL PIN22 24_48 SEL# 24_48MHz CLK33_HT66SEL#1 1 2
0 0 0 1 X 133.9 33.5 or 67.0 33.5 0 PCI33_6 * 0 48MHz R374 10KR2
1D2V_HT0A_S0
2,8,10,50 1D2V_HT0A_S0
1D2V_HT0B_S0
4 4
1
1
C25 C27 C587 C588
SCD22U10V3KX SCD22U10V3KX SCD22U10V3KX SCD22U10V3KX
78.22423.2B1 78.22423.2B1 78.22423.2B1 78.22423.2B1
2
2
11/11 add SCD22U LAYOUT: Place bypass cap on topside of board near
Between CPU and NB for AMD suggest. HTT power pins that are not connected directly to
1D2V_HT0A_S0 downstream HTT device, but connected internally to
other HTT power pins.
1
1
1D2V_HT0B_S0
C28 C29 C33 C34 HTT for CPU sideA HTT for CPU sideB
SCD22U10V3KX SCD22U10V3KX SCD22U10V3KX SCD22U10V3KX
78.22423.2B1 78.22423.2B1 78.22423.2B1 78.22423.2B1 Transmit power Receive power
2
BGA754-SKT-U
62.10030.041
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(1/4)_HyperTransport I/F
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 4 of 51
A B C D E
A B C D E
5V_S0
6,7,10,11,13,46,48,49,50
5V_S0
2D5V_S3
2D5V_S3
6,7,12,13,46,50 1D25V_S3
46 DDRVTT_SENSE DDRVTT_SENSE AE13 D17
VTT_SENSE VTT_A VREF_DDR_MEM
4
VTT_A A18 4
VREF_DDR_CLAW B17
2D5V_S3 VTT_A C151 C515
AG12 MEMVREF1 VTT_A C17 11 VREF_DDR_MEM
AF16 SCD1U16V SC1000P50V
R6441 VTT_B
2 44D2R3F MEMZN D14 MEMZN VTT_B AG16
R6531 2 44D2R3F MEMZP C14 AH16
MEMZP VTT_B
VTT_B AJ17 For REGISTED DIMM Only
3 M_DATA46 A4 3
MEMDATA46
1
VREF_DDR_CLAW
AH3 MEMDATA17 MEMADDA3 V5
M_DATA16 AJ3 T5 M_AA2 M_ADM8 TP65
M_DATA15 MEMDATA16 MEMADDA2 M_AA1 M_CLK3 TP92
AJ5 MEMDATA15 MEMADDA1 T3
M_DATA14 AJ6 N5 M_AA0 M_CLK#3 TP104
M_DATA13 MEMDATA14 MEMADDA0 M_CLK2 TP116
AJ7 MEMDATA13
M_DATA12 AH9 H4 M_BRAS# TP97
2D5V_S3 1D25V_S3 M_DATA11 MEMDATA12 MEMRASB_L M_BCAS# TP110
AG5 MEMDATA11 MEMCASB_L F5
M_DATA10 AH5 F4 M_BWE# TP95 M_CLK#2 TP100
M_DATA9 MEMDATA10 MEMWEB_L MEMZN TP153
AJ9 MEMDATA9
1
CB7 TP89
resistor. 1
MEMDQS7 MEMCHECK7 N3
M_DQS6 A8 N1 CB6 TP52
M_DQS5 D1 MEMDQS6 MEMCHECK6 CB5 TP90
M_DQS4 J1 MEMDQS5
MEMDQS4
MEMCHECK5
MEMCHECK4
U3
V1 CB4 TP94 Wistron Corporation
M_DQS3AB1 N2 CB3 TP40 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_DQS2 AJ2 MEMDQS3 MEMCHECK3 CB2 TP53
MEMDQS2 MEMCHECK2 P1 Taipei Hsien 221, Taiwan, R.O.C.
M_DQS1 AJ8 U1 CB1 TP69
M_DQS0AJ13 MEMDQS1 MEMCHECK1 CB0 TP91 Title
MEMDQS0 MEMCHECK0 U2
CPU(2/4)_DDR
BGA754-SKT-U Size Document Number Rev
62.10030.041 A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 5 of 51
A B C D E
A B C D E
3D3V_S5
8,9,10,16,19,20,23,24,25,31,48,50
3D3V_S5
2D5V_S0
2D5V_S0
2D5V_S3
5,7,10,11,13,46,48,49,50 2D5V_S3
1D2V_HT0B_S0
4 4
2D5V_VDDA_S0
4 1D2V_HT0B_S0
VCC_CORE_S0
2,7,47 VCC_CORE_S0
LAYOUT: Route trace 50 mils wide and LAYOUT: Route VDDA trace approx. 1D25V_S3
2D5V_S0 2D5V_VDDA_S0
Change 500 to 750 mils long between these 50 mils wide (use 2x25 mil traces to 5,7,12,13,46,50 1D25V_S3
U20C
L49
L270H
MLB201209
caps. exit ball field) and 500 mils long.
1 2 AH25 A20 THERMTRIP#
VDDA1 THERMTRIP_L
AJ25 VDDA2
1
1
C577 C575 A26
THERMDA THERMDP1 27
SCD1U16V TC21 SC4D7U10V5ZY C572 C569 AF20 A27
23 RST_CPU# RESET_L THERMDC THERMDN 27
ST100U6D3V-U 78.47593.411 SC3300P50V3KX SCD22U10V3KX PWROK AE18
77.21071.011 1D2V_HT0B_S0 78.22423.2B1 PWROK VID4
AJ27 AG13
2
2
8,25 HTT_STOP# LDTSTOP_L VID4 VID[4..0] 47
AF14 VID3
R786 1 L0_REF1 VID3
2 44D2R3F AF27 L0_REF1 VID2 AG14 VID2
R784 1 2 44D2R3F L0_REF0 AE26 AF15 VID1
L0_REF0 VID1 VID0
64.44R25.551 VID0 AE15
COREFB A23
47 COREFB COREFB_H
C585 C584 COREFB# A24 AG18 NC_AG18 TP170
47 COREFB# CORE_SENSE COREFB_L NC_AG18
Need to check which should be used SC1000P50V SC1000P50V B23 AH18 NC_AH18 TP169
CORE_SENSE NC_AH18 NC_AG17
NC_AG17 AG17
VDDIOFB AE12 AJ18 NC_AJ18
VDDIOFBJ VDDIOFB_H NC_AJ18
AF12 VDDIOFB_L
VDDIOSENSE
3
11/11 AMD suggest 46 VDDIOSENSE AE11 VDDIO_SENSE LAYOUT: Route FBCLKOUT_H/L 3
voltege from 2D5V_S0 to
3 CPUCLK 1 2 CLKIN AJ21 CLKIN_H differentially impedance 80
1
2D5V_S3 SC3900P50V3KX AH21 CLKIN_L
FBCLKOUT
differentially impedance 100 C552 R725
1
169R3F
5/12-->AMD Suggested 2D5V_S3 C559 SC3900P50V3KX 64.16905.651 AJ23 AH19 R678
R731 820R3 CLKINJ NC_AJ23 FBCLKOUT_H 80D6R3F-U
3 CPUCLKJ 1 2 AH23 NC_AH23 FBCLKOUT_L AJ19
1 2 NC_AJ23 64.80R65.651
2
2D5V_S5 1 2 NC_AH23
U87 R734 820R3 NC_AE24 AE24 FBCLKOUTJ
2
1D25V_S3 NC_AF24 NC_AE24
23,25,50 PWROK_SB 1 A VCC 5 AF24 NC_AF24
HDT Connectors
E17 TCK NC_B19 B19
2D5V_S0 TRST_L B21
TDI TRST_L TDO
11/11 Add HDT connector A21 TDI TDO A22
for AMD suggested R196 1 2 680R2 NC_C18 C18
2D5V_S0 NC_C18
2D5V_S0 R184 1 2 680R3 NC_A19 A19 AF18
NC_A19 NC_AF18
SCD1U16V A28
2
C610 KEY1 2
AJ28 KEY0
1
CN4
NC_D22 D22 10/22 CHANGE VCC FROM 2D5V_S3 TO 2D5V_S0
C147 R152 R168 R179 R205 R664 R679 1 2 NC_AE23 AE23 C22
SCD1U16V 680R2 680R2 680R2 680R2 680R2 680R2 NC_AF23 NC_AE23 NC_C22
AF23 NC_AF23
3 4 NC_AF22 AF22 2D5V_S0
NC_AF21 NC_AF22
5 6 AF21 NC_AF21
DBREQJ 7 8
2
1
DBRDY 9 10
TCK 11 12 R791 R792 R793 R794 C1 R763
TMS 680R2 680R2 680R2 680R2 NC_C1 680R3
13 14 J3 NC_J3 NC_B13 B13
TDI 15 16 R3 B7
TRST_L NC_R3 NC_B7 R757 DUMMY-R3
17 18 AA2 NC_AA2 NC_C3 C3
TDO 19 20 D3 K1 THERMTRIP# 2 3 NS2 1 2
2
2
NC_D3 NC_K1 EM_OFF 24
21 22 AG2 NC_AG2 NC_R2 R2
23 24 B18 AA3 Q63
NC_B18 NC_AA3 MMBT3904-U1
26 AH1 NC_AH1 NC_F3 F3
10/22 CHANGE FROM 1KR3 TO 680R2 FOR AE21 C23 2D5V_S0
1
DUMMY-SMC-CONN26A-FP NC_AE21 NC_C23
AMD CHECK LIST C20 NC_C20 NC_AG7 AG7
ZZ.F0357.025 AG4 AE22 NS3 1 2
NC_AG4 NC_AE22 R768 1KR3
C6 NC_C6 NC_C24 C24
AG6 NC_AG6 NC_A25 A25
10/22 CHANGE FROM 1KR3 TO 680R2 FOR AE9 NC_AE9 NC_C9 C9
AMD CHECK LIST AG9 NC_AG9
THERMTRIPJ Level shift to VT8235
1D25V_S3
5,6,12,13,46,50 1D25V_S3
5,6,10,11,13,46,48,49,50 2D5V_S3
VCC_CORE_S0
2,47 VCC_CORE_S0
4 4
U20E
VSS N20
Y17 VSS VSS L20
K17 VSS VSS J20
H17 VSS VSS AF19
EMI
F17 AD19 VCC_CORE_S0 2D5V_S3
VSS VSS U20D
E18 VSS VSS AB19
AJ26 VSS VSS Y19
AE29 VSS VSS K19 L7 VDD VDDIO E4
AC16 VSS VSS H19 AC15 VDD VDDIO G4
AA16 VSS VSS F19 H18 VDD VDDIO J4
J16 VSS VSS D19 B20 VDD VDDIO L4
G16 AC18 E21 N4 VCC_CORE_S0
VSS VSS VDD VDDIO
E16 VSS VSS AA18 H22 VDD VDDIO U4 VCC_CORE_S0 LAYOUT: Locate close to socket.
AH14 VSS VSS G18 J23 VDD VDDIO W4 1000p x 4
AD15 VSS VSS B16 H24 VDD VDDIO AA4
SC1000P50V
SC1000P50V
78.6R834.1B1
SC1000P50V
AB15 AD17 F26 AC4
SC6D8PF50VJ
SC6D8PF50VJ
VSS VSS VDD VDDIO
K15
E15
VSS VSS AB17
H15
N7
L9
VDD VDDIO AE4
D5
2D5V_S3
NOTE: Populate 270uF
VSS VSS VDD VDDIO
caps or 100uF caps
C567
C564
C58
C36
C35
D16 VSS VSS F15 V10 VDD VDDIO AF5
78.10610.511
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
AE14 VSS VSS G28 G13 VDD VDDIO F6
1
AC14
AA14
VSS VSS D28
B28
K14
Y14
VDD VDDIO H6
K6
in these footprints.
VSS VSS VDD VDDIO
C189
C187
C184
C183
J14 VSS VSS C27 AB14 VDD VDDIO M6 It is impossible that
G14 AH26 G15 P6
2
VSS VSS VDD VDDIO have 100U 50V 0805
AF17 VSS VSS AF26 J15 VDD VDDIO T6
AD13 AD26 AA15 V6 LAYOUT: Place 1000pF capacitors ceramic cap. Use 10U
VSS VSS VDD VDDIO
AB13 VSS VSS Y26 H16 VDD VDDIO Y6 between VRM & CPU. 6D3V X7R ceramic cap.
Y13 T26 K16 AB6 2D5V_S3
VSS VSS VDD VDDIO
K13 VSS VSS M26 Y16 VDD VDDIO AD6
H13 VSS VSS H26 AB16 VDD VDDIO D7
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
F13 VSS VSS D26 G17 VDD VDDIO G7
1
AH12 VSS VSS B26 J17 VDD VDDIO J7
AC12 VSS VSS C25 AA17 VDD VDDIO AA7
C443
C435
C430
C423
AA12 VSS VSS B25 AC17 VDD VDDIO AC7
G12 AJ24 AE17 AF7
2
VSS VSS VDD VDDIO
B12 VSS VSS AG24 F18 VDD VDDIO F8 LAYOUT: Place in uPGA socket cavity.
AD11 AC24 K18 H8 VCC_CORE_S0
VSS VSS VDD VDDIO
3 AB11 VSS VSS AA24 Y18 VDD VDDIO AB8 0.22u x 9 3
Y11 VSS VSS W24 AB18 VDD VDDIO AD8
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
78.22423.2B1
K11 VSS VSS U24 AD18 VDD VDDIO D9
1
H11 R24 AG19 G9 VCC_CORE_S0
VSS VSS VDD VDDIO
F11 VSS VSS N24 E19 VDD VDDIO AC9 4.7u x 7 10u x 1
C105
C160
C159
C158
C157
C152
C75
C76
C77
C78
AH10 VSS VSS J24 G19 VDD VDDIO AF9
78.47593.411
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
AC10 G24 AC19 F10
2
VSS VSS VDD VDDIO
SC10U6D3V5MX
W10 VSS VSS E24 AA19 VDD VDDIO AD10
1
U10 VSS VSS AG23 J19 VDD VDDIO D11
C524
C526
C505
C509
C595
C506
C525
R10 VSS VSS AD23 F20 VDD VDDIO AF11
C596
N10 VSS VSS AB23 H20 VDD VDDIO F12
L10 Y23 K20 AD12
2
VSS VSS VDD VDDIO
J10 VSS VSS V23 M20 VDD VDDIO D13 LAYOUT: Place on backside of processor.
G10 VSS VSS T23 P20 VDD VDDIO AF13
B10 P23 T20 F14 VCC_CORE_S0 2D5V_S3
VSS VSS VDD VDDIO
AD9 VSS VSS K23 V20 VDD VDDIO AD14 0.22u x 26 11/11 add 10UX1 for AMD suggest.
Y9 H23 Y20 F16 2D5V_S3
VSS VSS VDD VDDIO
0.22u x 6
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
V9 VSS VSS F23 AB20 VDD VDDIO AD16
78.22423.2B1
78.22423.2B1
T9 VSS VSS D23 AD20 VDD VDDIO D15
1
VCC_CORE_S0
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
78.22423.2B1
P9 VSS VSS AJ22 G21 VDD VDDIO R4
1
M9 VSS VSS AH22 J21 VDD
C529
C530
C502
C499
C589
C590
C592
C591
C194
C206
C207
C456
K9 VSS VSS AG22 L21 VDD VDD N28
C478
C407
C329
C308
C204
C205
H9 AC22 N21 U28
2
VSS VSS VDD VDD
F9 AA22 R21 AA28
2
VSS VSS VDD VDD
AH8 VSS VSS AG29 U21 VDD VDD AE27
AC8 VSS VSS U22 W21 VDD VDD R7
W8 VSS VSS R22 AA21 VDD VDD U7
U8 N22 AC21 W7 VCC_CORE_S0 VCC_CORE_S0
VSS VSS VDD VDD
R8 VSS VSS L22 F22 VDD VDD K8
N8 J22 K22 M8 2D5V_S3
VSS VSS VDD VDD
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
4.7u x 6
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
78.22423.2B1
L8 VSS VSS G22 M22 VDD VDD P8
J8 VSS VSS E22 P22 VDD VDD T8
78.47593.411
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
G8 VSS VSS B22 T22 VDD VDD V8
B8 VSS VSS AG21 V22 VDD VDD Y8
C106
C161
C511
C516
C484
C460
C461
C462
C555
C570
C593
C551
C539
C531
C546
C547
AD7 VSS VSS AD21 Y22 VDD VDD J9
C181
C180
C179
C178
C177
C176
AB7 Y21 AB22 N9
2
VSS VSS VDD VDD
V7 VSS VSS V21 AD22 VDD VDD R9
T7 VSS VSS T21 E23 VDD VDD U9
P7 VSS VSS P21 G23 VDD VDD W9
M7 VSS VSS M21 L23 VDD VDD AA9
K7 K21 N23 H10 VCC_CORE_S0 1D25V_S3 2D5V_S3 1D25V_S3
2 VSS VSS VDD VDD 2
H7 VSS VSS H21 R23 VDD VDD K10
F7 VSS VSS F21 U23 VDD VDD M10
C2011
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
AH6 VSS VSS D21 W23 VDD VDD P10 2
78.22423.2B1
78.22423.2B1
AC6 VSS VSS AJ20 AA23 VDD VDD T10
1
1
AA6 AG20 AC23 Y10 SCD22U10V3KX
VSS VSS VDD VDD
U6 VSS VSS AE20 B24 VDD VDD AB10
C2001
C548
C549
C550
C535
C518
C514
C498
C479
C465
C463
C199
C198
R6 VSS VSS AC20 D24 VDD VDD G11 2
N6 AA20 F24 J11
2
2
VSS VSS VDD VDD SCD22U10V3KX
L6 VSS VSS W20 K24 VDD VDD AA11
J6 VSS VSS U20 M24 VDD VDD AC11 78.22423.2B1
G6 VSS VSS R20 P24 VDD VDD H12
B6 VSS VSS G20 T24 VDD VDD K12
AH4 VSS VSS J18 V24 VDD VDD Y12
B4 VSS VSS AE16 Y24 VDD VDD AB12
AH2 VSS VSS Y15 AB24 VDD VDD J13
AD2 VSS VSS B14 AD24 VDD VDD AA13
AB2 VSS VSS J12 AH24 VDD VDD AC13
Y2 VSS VSS AA10 AE25 VDD VDD H14
V2 VSS VSS AB9 K26 VDD VDD AB26
T2 VSS VSS AA8 P26 VDD VDD E28
P2 VSS VSS Y7 V26 VDD VDD J28
M2 VSS VSS W6
K2 VSS VSS AF2
H2 D2 BGA754-SKT-U
VSS VSS
F2 VSS VSS AG27 62.10030.041
C29 VSS VSS AG25
AH28 VSS VSS L24
AF28 VSS VSS M23
AC28 VSS VSS W22
W28 VSS VSS AB21
R28 VSS VSS AH20
L28 VSS VSS B2
BGA754-SKT-U
62.10030.041
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(4/4)_Power
Size Document Number Rev
A2 -1
Gannet
Date: Thursday, December 04, 2003 Sheet 7 of 51
A B C D E
A B C D E
3D3V_S0
1D2V_HT0A_S0
2,3,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3VA_HT_S0
1D2V_HT0A_S0
2,4,10,50 1D2V_HT0A_S0
2D5V_S0
CLAW HAMMER TO NB NB TO CLAW HAMMER
G21
G22
C22
C10
C11
C23
C24
C25
D10
D11
D22
D23
D24
H21
A10
A24
A25
A26
B10
B23
B24
B25
B26
E10
E11
E21
E22
E23
E24
K18
K21
F10
F11
F15
F16
F19
F20
F21
F22
F23
L18
J10
J11
J12
J13
J14
J15
J16
J17
C9
D9
A9
B9
E9
4 4
U24A
6,9,10,16,19,20,23,24,25,31,48,50 2D5V_S0
AVDD2
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
4 CPUCADOUT[15..0] NB0CADOUT[15..0] 4
CPUCADOUT0 T26 B12 NB0CADOUT0
CPUCADOUT1 RCADP0 TCADP0 NB0CADOUT1
P24 RCADP1 TCADP1 A13
CPUCADOUT2 P26 B14 NB0CADOUT2
CPUCADOUT3 RCADP2 TCADP2 NB0CADOUT3
M24 RCADP3 TCADP3 A15
CPUCADOUT4 K24 A17 NB0CADOUT4
CPUCADOUT5 RCADP4 TCADP4 NB0CADOUT5
K26 RCADP5 TCADP5 B18
CPUCADOUT6 H24 A19 NB0CADOUT6
CPUCADOUT7 RCADP6 TCADP6 NB0CADOUT7
H26 RCADP7 TCADP7 B20
CPUCADOUT8 R24 E12 NB0CADOUT8
CPUCADOUT9 RCADP8 TCADP8 NB0CADOUT9
R22 RCADP9 TCADP9 D13
CPUCADOUT10 N24 E14 NB0CADOUT10
CPUCADOUT11 RCADP10 TCADP10 NB0CADOUT11 3D3V_S0 3D3VA_HT_S0
N22 RCADP11 TCADP11 D15
CPUCADOUT12 L22 D17 NB0CADOUT12 L11
CPUCADOUT13 RCADP12 TCADP12 NB0CADOUT13
J24 RCADP13 TCADP13 E18 1 2
CPUCADOUT14 J22 D19 NB0CADOUT14
CPUCADOUT15 RCADP14 TCADP14 NB0CADOUT15 SBK201209T-1 C144
G24 RCADP15 TCADP15 E20
C74
CPUHTTCLKOUT0 M26 B16 NB0HTTCLKOUT0 SC1000P50V SC1U10V5KX
4 CPUHTTCLKOUT0 RCLKP0 TCLKP0 NB0HTTCLKOUT0 4 L12
4 CPUHTTCLKOUT1
CPUHTTCLKOUT1 L24 RCLKP1 TCLKP1 E16 NB0HTTCLKOUT1
NB0HTTCLKOUT1 4 1 2 Modify-0602
CPUHTTCTLOUT0 F24 A21 NB0HTTCTLOUT SBK201209T-1
4 CPUHTTCTLOUT0 RCTLP TCTLP NB0HTTCTLOUT 4 AGND2
4 CPUCADOUTJ[15..0] NB0CADOUTJ[15..0] 4
CPUCADOUTJ0 R26 RCADN0 TCADN0 C12 NB0CADOUTJ0 Note: When use K8T400M, this
3 CPUCADOUTJ1 P25 A14 NB0CADOUTJ1 3
CPUCADOUTJ2 N26
RCADN1 TCADN1
C14 NB0CADOUTJ2 power circuit for analog
RCADN2 TCADN2
CPUCADOUTJ3 M25 RCADN3 TCADN3 A16 NB0CADOUTJ3 power should be NOPOPed.
CPUCADOUTJ4 K25 A18 NB0CADOUTJ4
CPUCADOUTJ5 RCADN4 TCADN4 NB0CADOUTJ5
J26 RCADN5 TCADN5 C18
CPUCADOUTJ6 H25 A20 NB0CADOUTJ6
CPUCADOUTJ7 RCADN6 TCADN6 NB0CADOUTJ7
G26 RCADN7 TCADN7 C20
CPUCADOUTJ8 R23 E13 NB0CADOUTJ8
CPUCADOUTJ9 RCADN8 TCADN8 NB0CADOUTJ9
P22 RCADN9 TCADN9 C13
CPUCADOUTJ10 N23 E15 NB0CADOUTJ10
CPUCADOUTJ11 RCADN10 TCADN10 NB0CADOUTJ11
M22 RCADN11 TCADN11 C15
CPUCADOUTJ12 K22 C17 NB0CADOUTJ12 1D2V_HT0A_S0
CPUCADOUTJ13 RCADN12 TCADN12 NB0CADOUTJ13
J23 RCADN13 TCADN13 E19
CPUCADOUTJ14 H22 C19 NB0CADOUTJ14
CPUCADOUTJ15 RCADN14 TCADN14 NB0CADOUTJ15
G23 RCADN15 TCADN15 D21
Modify-0602
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K8M400-VD7
G25
D12
D14
D16
D18
D20
H23
A23
B13
B15
B17
B19
B21
B22
K10
K11
K12
K13
K14
K15
K16
K17
K23
F12
F13
F14
F17
F18
F26
L10
L11
L12
L13
L14
L15
J18
J21
J25
G1
C8
D6
D8
H1
H2
A8
B8
E5
E6
E8
K4
F7
F8
J2
J3
71.K8T00.00U
2D5V_S0
1
R193
470R3F
AGND2
2
1
R192 1
HT_RST# 1 2
23 HT_RST#
NB-K8T800M(1/3)_HT
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 8 of 51
A B C D E
A B C D E
3D3V_S0
2,3,8,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S0
1D5V_S0 3D3V_S0 2D5V_S0
C452
6,8,10,16,19,20,23,24,25,31,48,50 2D5V_S0
1D5V_S0 1D5V_S0
SC1U16V5KX-U
RN11 2,10,14,16,20,49 1D5V_S0
AGP_SERR# 1 8
AGP_DEVSEL# Use this function for K8M400
M5
M9
G2
G3
G4
G5
D1
H3
H4
H5
N5
N9
R9
U1
2 7
E1
E2
E3
E4
K5
K8
K9
P9
F1
F2
F3
F4
F5
F6
L5
L8
L9
J4
J5
J9
4 U24B AGP_STOP# 3 6 4
AGP_IRDY# 4 5
VCCQQ
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
AF18 AGP_AD0 GFX power up strapping setting:
VLAD0 GD0/FPD10 AGP_AD[31..0] 14,20
AD20 AD18 AGP_AD1 SRN8K2-U
VLAD1 VD0 GD1/FPD11 AGP_AD2 TVD/DVP0D[3:0] => Panel type selection
AD21 AE18 RN12
VLAD2 VD1 GD2/FPDVICLK AGP_AD3 AGP_ADSTB0
AF24 VD2 GD3/FPD09 AF17 1 8
VLAD3 AE24 AD17 AGP_AD4 AGP_PAR 2 7 TVD4/DVP0D4 => FP-port multiplexed on AGP
25 VLAD[7..0] VLAD4 VD3 GD4/FPD08
AE19 AD16 AGP_AD5 AGP_TRDY# 3 6 interface selection
VLAD5 VD4 GD5/FPD07 AGP_AD6 0: Two 12-bit DVI interface
AF20 VD5 GD6/FPD06 AE16 4 5
VLAD6 AD24 AF16 AGP_AD7 1: One 24-bit panel interface
VLAD7 VD6 GD7/FPD05 AGP_AD8
AF25 AF14 SRN8K2-U
VD7 GD8/FPDVIDET AGP_AD9 TVD5/DVP0D5 => Dedicated DVI port configuration
AD14 RN9
VBE# GD9/FPDVIHS AGP_AD10 AGP_GNT# 0: TMDS
25 VBE# AE21 VBE GD10/FPD01 AD13 1 8
LPAR AF19 AE13 AGP_AD11 AGP_REQ# 2 7 1: TV Encoder
25 LPAR VPAR GD11/FPD23
AF13 AGP_AD12 AGP_WBF# 3 6
UPSTB GD12/FPD00 AGP_AD13 AGP_SB_STB TVD6/DVP0D6 => Dedicated DVI port selection
25 UPSTB AE23 UPSTB GD13/FPD22 AD12 4 5
UPSTB# AF23 AF12 AGP_AD14 0: Disable
25 UPSTB# UPSTB GD14/FPD21 1: Enable
AE12 AGP_AD15 SRN8K2-U 3D3V_S0
DNSTB GD15/FPD20 AGP_AD16
25 DNSTB AF22 AD10 RN10
DNSTB# DNSTB GD16/FPD18 AGP_AD17 AGP_FRAME#
25 DNSTB# AD22 DNSTB GD17/FPD17 AE10 1 8
AF10 AGP_AD18 AGP_ADSTB1 2 7 R263DUMMY-R3 R264 4K7R3
UPCMD GD18/FPD16 AGP_AD19 AGP_RBF# DP0_D4 1 2 DP0_D4_1 1
25 UPCMD
25 DNCMD
DNCMD
AF26
AD23
UPCMD
DNCMD
V_LINK GD19/FPDE
GD20/FPD14
AD9
AF9 AGP_AD20
3
4
6
5
2
1
CRT_RSET C4 AE7 AGP_ADSTB1
CRT_HSYNC RSET/NC ADSTB1F/FPD12 AGP_ADSTB1 14
A1 R457
CRT_VSYNC HSYNC/NC AGP_FRAME# 324R3F
B1 VSYNC/NC GFRAME/FPHS AC9 AGP_FRAME# 14,20
AC10 AGP_IRDY# R625 4K7R3
GUICLK GIRDY/SB_CK AGP_IRDY# 14
C6 AC14 AGP_TRDY# C146 SCD1U16V DP0_D10 1 2
3 GUICLK XIN/NC GTRDY AGP_TRDY# 14
AC11 AGP_DEVSEL# AGP_VREF_GC
2
GDEVSEL/FPVS AGP_DEVSEL# 14,20
14,23 P_INTA# 1 2 INTA# E7 INTA/NC GSTOP/FPDVICLK_N AC12 AGP_STOP#
AGP_STOP# 14
D3 AC16 AGP_PAR C149 SC1U16V5KX-U R623 4K7R3
BISTIN/NC GPAR/FPDVIVS AGP_PAR 14
1
R602 DUMMY-R2 AD6 AGP_RBF# DP0_D7 1 2
RBF AGP_RBF# 14
SMBC1 AGP_WBF# R459
19 SMBC1
SMBC2
P2
C2
SPCLK1/NC
SPCLK2/NC
SM Bus WBF/FPCLK_N
GREQ/DVI_DDCCK
AC1
Y1 AGP_REQ#
AGP_WBF# 14,20
AGP_REQ# 14
100R3F
19 SMBD1
SMBD1 P1 SPD1/NC GGNT/DVI_DDCDA AA3 AGP_GNT#
AGP_GNT# 14 Note: All of these power up strapping
SMBD2 C1 SPD2/NC GSERR/FPDVIDE AC15 AGP_SERR# Decoupling capacitors pin have internal pull down. Put an
2
2 On NB Bottom Side external pull up resister if want to 2
DP0_D0 J1 A11 CLK66_NB set the default value to 1.
TVD00/DVP0D00/NC GCLK CLK66_NB 3
DP0_D1 K2
DP0_D2 TVD01/DVP0D01/NC AGP_SBA0
K3 TVD02/DVP0D02/NC SBA0/DVP1VS AC2 AGP_SBA[7..0] 14
DP0_D3 L4 AC3 AGP_SBA1
DP0_D4 TVD03/DVP0D03/NC SBA1/DVP1DE AGP_SBA2 2D5V_S0 2D5V_S0
K1 TVD04/DVP0D04/NC SBA2/DVP1D00 AD1
DP0_D5 L2 AD2 AGP_SBA3 R355 4K7R3 1D5V_S0
DP0_D6 TVD05/DVP0D05/NC SBA3/DVP1HS AGP_SBA4 TESTIN C138 SC1U16V5KX-U
L3 TVD06/DVP0D06/NC SBA4/DVP1D05 AF2 1 2
DP0_D7 M4 AD3 AGP_SBA5
19 DP0_D[11..0] TVD07/DVP0D07/NC SBA5/DVP1D03
1
DP0_D8 AGP_SBA6 1D5V_S0
DP0_D9
L1
M2
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TV Encoder/ SBA6/DVP1CLK
SBA7/DVP1CLK_N
AE3
AF3 AGP_SBA7 R319 60R3F R380 C271 C131 SC1U16V5KX-U
3KR3F
DP0_D10
DP0_D11
M3
M1
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
Digital SB_STBS/DVP1D02 AE1 AGP_SB_STB# AGP_SB_STB# 14
AGP_NCOMP 1 2
SCD1U16V
DP0_DET P4
Display SB_STBF/DVP1D01 AF1 AGP_SB_STB AGP_SB_STB 14
VL_VREF
C148 SC4D7U10V-U
2
19 DP0_DET TVCLKIN/DVP0DET/NC
N1 AA2 AGP_ST0
TVDE/DVP0DE/NC ST0 AGP_ST[2..0] 14
1
DP0_HSYNC N4 AA1 AGP_ST1 R310 60R3F C262 SC47U10V-1
19 DP0_HSYNC TVHS/DVP0HS/NC ST1/DVP1DET
DP0_VSYNC N3 AB1 AGP_ST2 AGP_PCOMP 1 2 R379 C270 1 2
19 DP0_VSYNC TVVS/DVP0VS/NC ST2 1KR3F
DP0_CLK P3 V1 AGP_PCOMP R378 360R3F SCD1U16V C253 SC47U10V-1
19 DP0_CLK TVCLK/DVP0DCLK/NC AGPPCOMP VL_PCOMP
W1 AGP_NCOMP 1 2 1 2
AGPNCOMP
2
N2 AC13 AGP_VREF_GC R677 140R3F
GPO0/NC AGPVREF0 CRT_RSET
D2 GPOUT/NC AGPVREF1 AC6 1 2 Layout trace 20 mil
DUMMY-0R3-U Modify-0602
AGP8XDET Y2 AGP_VREF_CG
AGP_VREF_CG 14 The voltage level of Decoupling capacitors
Close to CRT CONN DUMMY-R2 AC4 2D5V_S0 VL_VREF is 0.625V
VSSQQ
DBIL AGP_ADB_LO 14
R190 1 2 CRT_A/R AC5 Cross NB as short as possible
1 14,21 VGA_RED DBIH AGP_PIPE# 14 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Wistron Corporation
N10
N11
N12
N13
N14
N15
N16
N17
N25
R10
R11
R12
R13
R14
R15
P10
P11
P12
P13
P14
P15
P16
P17
P23
L16
L17
L25
R1
R2
R3
R4
R5
P5
T1
14,21 VGA_DDCCLK_3
R236 1
DUMMY-R2
2 SMBC2 Note: When use K8T400M, GFX relative NB-K8T800M(2/3)_AGP_VLINK
DUMMY-R2 Size Document Number Rev
circuit should be NOPOPed.
14,21 VGA_DDCDAT_3
R226 1 2 SMBD2 A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 9 of 51
A B C D E
A B C D E
3D3V_S0
Layout trace 20 mil 2D5V_NB_S3 2D5V_S3
1D5V_S0 G36
2,3,8,9,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
2D5V_NB_S3 1 2
U24C 3D3V_S3
AC25 AA4 GAP-CLOSE
VSUS15/VSUS25 VCC1
For Suspend VCC1 AA5 Layout trace 20 mil 22,28,34,37,48 3D3V_S3
3D3VA_S0 AB11
VCC1
VCC1 AB12
E25 AB13 1D5V_S0 1D5V_PLL1_S0 1D5V_S0 1D5V_PLL2_S0 3D3V_S0 3D3V_DAC_S0
AVDD1 VCC1 2D5V_S0
E26 AGND1 VCC1 AB14
AB7 L43 L10 L13
For HT Receive VCC1
VCC1 AB8 1 2 1 2 1 2 6,8,9,16,19,20,23,24,25,31,48,50 2D5V_S0
4
VCC1 M8 4
1D5V_PLL1_S0 N8 SBK201209T-1 C519 C532 SBK201209T-1 C142 C73 SBK201209T-1 C150 C162 1D5V_S0
VCC1
VCC1 T2
D5 T3 SC1000P50V SC1U16V5KX-U SC1000P50V SC1U16V5KX-U SC1000P50V SC1U16V5KX-U
VCCPLL1/NC VCC1 2,9,14,16,20,49 1D5V_S0
A5 VCCPLL2/NC VCC1 T4
C5 T5 5V_S0
GNDPLL1/NC VCC1
B5 GNDPLL2/NC VCC1 T8
VCC1 T9 2,19,21,22,23,24,25,26,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
For Graphics U2
VCC1 1D2V_HT0A_S0
Controller PLL
VCC1 U3
1D5V_PLL2_S0 1&2 U4
VCC1
VCC1 U5 2,4,8,50 1D2V_HT0A_S0
A6 U8 3D3V_S0 3D3VA_S0 3D3V_S0 3D3V_RGB_S0
VCCPLL3/NC VCC1
B6 GNDPLL3/NC VCC1 U9
V10 L15 L9
For Graphics VCC1
VCC1 V11 1 2 1 2
Controller
VCC1 V12
3D3V_DAC_S0 PLL3 V13 SBK201209T-1 C197 C188 SBK201209T-1 C143 C72
VCC1
VCC1 V2 Note: When use K8T400M, these
B2 V3 SC1000P50V SC1U16V5KX-U SC1000P50V SC1U16V5KX-U
C3
DACVDD/NC VCC1
V4 power circuit for GFX analog Power for NB Core and VLINK interface
GNDDAC1/NC VCC1
D4 GNDDAC2/NC VCC1 V8 power should be NOPOPed.
VCC1 V9
For DAC W2
VCC1 5V_S0 1D5V_S0
VCC1 W3
3D3V_RGB_S0 W4
VCC1
VCC1 W9
A4 VCCRGB/NC VCC1 Y3
B4 Y4 2D5V_S0
GNDRGB/NC VCC1 R455 0R1206
3
For CRT RGB VCC1 Y5
1 2 LDO 3
VDD
A7 R571 1D5V_S0 1D2V_HT0A_S0
NC
D7 NC VDD AA21 1 2
AA22 C219 SCD1U16V C528 SCD22U10V3KX VDD=1.5V for K8M400
VDD VDD DUMMY-R3
VDD
VDD
AA23
AA24 NEAR N/B ON BOT SIDE 1 2
VDD=2.5V for K8T400M(Default)
AB17 AA25 C214 SCD01U16V2KX C482 SC2200P50V2KX
VCC2 VDD
AB18 VCC2 VDD AA26 1 2 1 2
AB19 VCC2 VDD AB21
AB20 AB22 C175 SCD1U16V
VCC2 VDD
AC18
AC19
VCC2
VCC2
VDD
VDD
AB23
AB24
DUMMY
AC20 AB25 C165 SCD01U16V2KX Layout trace 20 mil
VCC2 VDD VDD 1D2V_HT0A_S0 1D5V_S0
AC21 VCC2 VDD AB26 1 2
V14 F9 3D3V_S3
VCC2 VDD C217 SCD1U16V 2D5V_NB_S3
V15 VCC2 VDD H10
V16 H11 C154 SCD01U16V2KX C534 SC4D7U10V-U C368 SC1U16V5KX-U R352 DUMMY-R3
VCC2 VDD R865 DUMMY-R3
V17 VCC2 VDD H12 1 2 1 2
W15 H15 C155 SCD01U16V2KX 1 2
VCC2 VDD C476 SCD01U16V2KX C455 SC1000P50V C306 SC1U16V5KX-U R365 DUMMY-R3
W16 VCC2 VDD H16 1 2
W17 H8 1 2 1 2 N10-1
VCC2 VDD C193 SCD1U16V
W18 VCC2 VDD H9
1
J8 C433 SCD01U16V2KX C434 SC1000P50V C231 SC1U16V5KX-U C260 C263
VDD
VDD K19 1 2
B7 L19 R1 R320 SCD1U16V SC1U16V5KX-U
VSS/NC VDD C439 SCD01U16V2KX C438 SCD1U16V C237 SC1U16V5KX-U DUMMY-100R3F
C7 VSS/NC VDD M19
2
R16 P8 3D3V_S0 1 2 ZZ.10005.651
2 VSS VDD D16 2
R17 R19
2
VSS VDD C213 SCD1U16V C418 SCD1U16V C239 SC1U16V5KX-U DUMMY-SC431L
R21 VSS VDD R8 1K8M400_TM
R25 T19 C475 SCD1U16V ZZ.00431.C3B
VSS VDD
1
T10 VSS VDD U19
T11 V18 C140 SCD1U16V C453 SCD1U16V C309 SCD01U16V2KX
3
VSS VDD C440 SCD1U16V R309
T12 VSS VDD V19 1 2 R2
T13 W10 DUMMY-100R3F
VSS VDD C153 SCD1U16V C504 SCD1U16V C247 SCD01U16V2KX
T14 VSS VDD W11
T15 W12 C223 SC1U16V5KX-U 1 2
2
VSS VDD
T16 VSS VDD W13
T17 W14 C241 SCD1U16V C522 SCD1U16V C328 SCD01U16V2KX
VSS VDD C436 SCD1U16V
U10 VSS VDD W19 1 2
U11 VSS VDD Y20 VSUSNB=1.5V for K8M400
U12 Y21 C404 SCD01U16V2KX C417 SCD01U16V2KX
U13
VSS VDD
Y22 C429 SCD1U16V 1 2 1 2
When R1=100, R2=500
VSS VDD
U14 VSS VDD Y23 VSUSNB=2.5V for K8T400M
U15 Y24 C216 SCD01U16V2KX C166 SCD01U16V2KX
U16
VSS VDD
Y25 C457 SCD1U16V 1 2 1 2 When R1=102, R2=100
VSS VDD
U17 VSS VDD Y26 (Default)
V5 C444 SCD01U16V2KX C156 SCD01U16V2KX
VSS C220 SC1U16V5KX-U
W5 VSS 1 2 1 2
W21 VSS VSS AB16
W22 AC8 C503 SCD01U16V2KX C167 SCD01U16V2KX
VSS VSS C425 SC1U16V5KX-U
W23 VSS VSS AC22 1 2 1 2
W24 VSS VSS AC23
W25 AC24 C307 SCD01U16V2KX C212 SCD01U16V2KX
VSS VSS
W26 VSS VSS AE2 1 2 1 2
AB2 VSS VSS AE5
1 AB3 AE8 C523 SCD01U16V2KX 1
VSS VSS
AB4 VSS VSS AE11 1 2
AB5
AB6
VSS
VSS
VSS
VSS
AE14
AE17 C242 SCD01U16V2KX Wistron Corporation
AB9 AE20 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS
AB10 VSS VSS AE22 Taipei Hsien 221, Taiwan, R.O.C.
AB15 VSS VSS AE25
Title
K8M400-VD7
NB-K8T800M(3/3)_POWER
Size Document Number Rev
A3 -1
Gannet
Date: Thursday, December 04, 2003 Sheet 10 of 51
A B C D E
A B C D E
DM1 DM2
REVERSE TYPE
DQ17 SDA DQ17 SDA SMBD_SB 3,25,30
M_DATA_R_18 49 M_DATA_R_18 49
M_DATA_R_19 DQ18 M_DATA_R_19 DQ18
53 DQ19 SA0 194 53 DQ19 SA0 194 DM2_SA0 1 2 3D3V_S0
M_DATA_R_20 42 196 M_DATA_R_20 42 196 R648 4K7R3
M_DATA_R_21 DQ20 SA1 M_DATA_R_21 DQ20 SA1
44 DQ21 SA2 198 44 DQ21 SA2 198
M_DATA_R_22 50 M_DATA_R_22 50
M_DATA_R_23 DQ22 M_DATA_R_23 DQ22
54 DQ23 VDD 9 54 DQ23 VDD 9
3 M_DATA_R_24 55 10 M_DATA_R_24 55 10 3
M_DATA_R_25 DQ24 VDD M_DATA_R_25 DQ24 VDD
59 DQ25 VDD 21 59 DQ25 VDD 21
M_DATA_R_26 65 22 M_DATA_R_26 65 22
M_DATA_R_27 DQ26 VDD M_DATA_R_27 DQ26 VDD
67 DQ27 VDD 33 67 DQ27 VDD 33
M_DATA_R_28 56 34 M_DATA_R_28 56 34
M_DATA_R_29 DQ28 VDD M_DATA_R_29 DQ28 VDD
60 DQ29 VDD 36 60 DQ29 VDD 36
M_DATA_R_30 66 45 M_DATA_R_30 66 45
M_DATA_R_31 DQ30 VDD M_DATA_R_31 DQ30 VDD
68 DQ31 VDD 46 68 DQ31 VDD 46
M_DATA_R_32 127 57 M_DATA_R_32 127 57
M_DATA_R_33 DQ32 VDD M_DATA_R_33 DQ32 VDD
129 DQ33 VDD 58 129 DQ33 VDD 58
M_DATA_R_34 135 69 M_DATA_R_34 135 69
M_DATA_R_35 DQ34 VDD M_DATA_R_35 DQ34 VDD
139 DQ35 VDD 70 139 DQ35 VDD 70
M_DATA_R_36 128 81 M_DATA_R_36 128 81
M_DATA_R_37 DQ36 VDD M_DATA_R_37 DQ36 VDD
130 DQ37 VDD 82 130 DQ37 VDD 82
M_DATA_R_38 136 92 M_DATA_R_38 136 92
M_DATA_R_39 DQ38 VDD M_DATA_R_39 DQ38 VDD
AMD K8
140 DQ39 VDD 93 140 DQ39 VDD 93
M_DATA_R_40 141 94 M_DATA_R_40 141 94
M_DATA_R_41 DQ40 VDD M_DATA_R_41 DQ40 VDD
145 113 145 113
ClawHummar
M_DATA_R_42 DQ41 VDD M_DATA_R_42 DQ41 VDD
151 DQ42 VDD 114 151 DQ42 VDD 114
M_DATA_R_43 153 131 M_DATA_R_43 153 131
M_DATA_R_44 DQ43 VDD M_DATA_R_44 DQ43 VDD
142 DQ44 VDD 132 142 DQ44 VDD 132
M_DATA_R_45 146 143 M_DATA_R_45 146 143
M_DATA_R_46 DQ45 VDD M_DATA_R_46 DQ45 VDD
152 DQ46 VDD 144 152 DQ46 VDD 144
M_DATA_R_47 154 155 M_DATA_R_47 154 155
M_DATA_R_48 DQ47 VDD M_DATA_R_48 DQ47 VDD
163 DQ48 VDD 156 163 DQ48 VDD 156
M_DATA_R_49 165 157 M_DATA_R_49 165 157
M_DATA_R_50 DQ49 VDD M_DATA_R_50 DQ49 VDD
171 DQ50 VDD 167 171 DQ50 VDD 167
M_DATA_R_51 175 168 M_DATA_R_51 175 168
M_DATA_R_52 DQ51 VDD M_DATA_R_52 DQ51 VDD
164 DQ52 VDD 179 164 DQ52 VDD 179
2 2
M_DATA_R_53 166 180 M_DATA_R_53 166 180 MD63 SMA10
M_DATA_R_54 DQ53 VDD M_DATA_R_54 DQ53 VDD
172 DQ54 VDD 191 172 DQ54 VDD 191 SMA11 SMA0 SMA14
M_DATA_R_55 176 192 M_DATA_R_55 176 192 SMA12 MD0
M_DATA_R_56 DQ55 VDD 2D5V_S3 M_DATA_R_56 DQ55 VDD 2D5V_S3
177 DQ56 177 DQ56
M_DATA_R_57 181 3 NOT SUPPORT ECC CHECK M_DATA_R_57 181 3
M_DATA_R_58 DQ57 VSS M_DATA_R_58 DQ57 VSS
M_DATA_R_59
M_DATA_R_60
187
189
178
DQ58
DQ59
VSS
VSS
4
15
16
ALi suggested pull-low M_DATA_R_59
M_DATA_R_60
187
189
178
DQ58
DQ59
VSS
VSS
4
15
16
DDR SOCKET PLACEMENT
M_DATA_R_61 DQ60 VSS M_DATA_R_61 DQ60 VSS
M_DATA_R_62
182
188
DQ61
DQ62
VSS
VSS
27
28 M_DATA_R_62
182
188
DQ61
DQ62
VSS
VSS
27
28 TOP VIEW PERSPECTIVE DRAWING
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
39 39
Pin 200
VSS VSS
71 40 71 40
Pin 2
CB0 VSS CB0 VSS
73 CB1 VSS 51 73 CB1 VSS 51
79 CB2 VSS 52 79 CB2 VSS 52
83 CB3 VSS 63 83 CB3 VSS 63
72
74
CB4
CB5
VSS
VSS
64
75
72
74
CB4
CB5
VSS
VSS
64
75 DM1
80 CB6 VSS 76 80 CB6 VSS 76 Pin 199 Pin 1
84 CB7 VSS 87 84 CB7 VSS 87
VSS 88 VSS 88 Pin 200 Pin 2
85 NC VSS 90 85 NC VSS 90
DM1_RESET# DM2_RESET#
TP7 DM1_A13
86
97
NC/(RESET#) VSS 103
104 TP167 DM2_A13
86
97
NC/(RESET#) VSS 103
104 DM2(Reverse)
Pin 199
Pin 1
TP165 DM1_BA2 NC/A13 VSS TP1 DM2_BA2 NC/A13 VSS
98 NC/BA2 VSS 125 98 NC/BA2 VSS 125
TP6 M_AA13 123 126 TP166 M_AA13 123 126
NC VSS NC VSS
124 NC VSS 137 124 NC VSS 137
200 NC VSS 138 200 NC VSS 138
1 VSS 149 VSS 149 1
118 150 M_ARAS# 118 150
5,12 M_ARAS# /RAS VSS /RAS VSS
120 159 M_ACAS# 120 159
5,12 M_ACAS# /CAS VSS /CAS VSS
M_AWE#
5,12 M_AWE# 119 /WE VSS
VSS
161
162
119 /WE VSS
VSS
161
162 Wistron Corporation
VREF_DDR_MEM 1 173 VREF_DDR_MEM 1 173 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VREF VSS VREF VSS
2 VREF VSS 174 2 VREF VSS 174 Taipei Hsien 221, Taiwan, R.O.C.
Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185 Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185
1
A3
Gannet -1
DDR-SODIMM-R
DDR-SODIMM-N Date: Thursday, December 04, 2003 Sheet 11 of 51
A B C D E
A B C D E
PLACE RNs CLOSE TO FIRST DM ( DM2 ), < 0.75" PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM1 ) 5,6,7,10,11,13,46,48,49,50 2D5V_S3
STRICT EQUAL LENGTH LIMITATION WITH DQS, 1D25V_S3 NO EQUAL LENGTH LIMITATION 1D25V_S3
CB PINS
RN32 RN34 RN91 RN89 1D25V_S3
M_DATA_R_0 M_DATA_R_0 5,6,7,13,46,50 1D25V_S3
M_DATA0 1 16 M_DATA32 1 16 M_DATA_R_32 1 16 1 16 M_DATA_R_41
M_DATA1 2 15 M_DATA_R_1 M_DATA33 2 15 M_DATA_R_33 M_DATA_R_1 2 15 2 15 M_DQS_R5
M_DQS0 3 14 M_DQS_R0 M_DQS4 3 14 M_DQS_R4 M_DQS_R0 3 14 3 14 M_DATA_R_40
M_DATA2 4 13 M_DATA_R_2 M_DATA34 4 13 M_DATA_R_34 M_DATA_R_2 4 13 4 13 M_DATA_R_35
M_DATA3 5 12 M_DATA_R_3 M_DATA35 5 12 M_DATA_R_35 M_DATA_R_3 5 12 5 12 M_DQS_R4 R631 68R2
M_DATA8 6 11 M_DATA_R_8 M_DATA40 6 11 M_DATA_R_40 M_DATA_R_8 6 11 6 11 M_DATA_R_34 M_ARAS# 1 2
4 M_DATA9 7 10 M_DATA_R_9 M_DATA41 7 10 M_DATA_R_41 M_DATA_R_9 7 10 7 10 M_DATA_R_32 4
M_DQS1 8 9 M_DQS_R1 M_DQS5 8 9 M_DQS_R5 M_DQS_R1 8 9 8 9 M_DATA_R_33
RN39
SRN10J-3 SRN10J-3 SRN68J-1 SRN68J-1 1 8 M_CS#1
Modify at 05-08 03' 2 7 M_ACAS#
RN23 RN20 3 6 M_ABS#1
M_DATA4 1 16 M_DATA_R_4 M_DATA36 1 16 M_DATA_R_36 Modify at 05-08 03' 4 5 M_AA0
M_DATA5 2 15 M_DATA_R_5 M_DATA37 2 15 M_DATA_R_37 RN62 RN56
M_ADM0 3 14 M_ADM_R0 M_ADM4 3 14 M_ADM_R4 M_DATA_R_4 1 16 1 16 M_DATA_R_45 SRN68-1
M_DATA6 4 13 M_DATA_R_6 M_DATA38 4 13 M_DATA_R_38 M_DATA_R_5 2 15 2 15 M_DATA_R_44
M_DATA7 5 12 M_DATA_R_7 M_DATA39 5 12 M_DATA_R_39 M_ADM_R0 3 14 3 14 M_ADM_R4
M_DATA12 6 11 M_DATA_R_12 M_DATA44 6 11 M_DATA_R_44 M_DATA_R_6 4 13 4 13 M_DATA_R_39 RN35
M_DATA13 7 10 M_DATA_R_13 M_DATA45 7 10 M_DATA_R_45 M_DATA_R_7 5 12 5 12 M_DATA_R_38 1 4 M_CS#0
M_ADM1 8 9 M_ADM_R1 M_ADM5 8 9 M_ADM_R5 M_DATA_R_12 6 11 6 11 M_DATA_R_37 2 3 M_AA1
M_DATA_R_13 7 10 7 10 M_DATA_R_36
SRN10J-3 SRN10J-3 8 9 8 9
RN40 SRN68J
RN30 RN28 SRN68J-1 M_AA8 1 8
M_DATA16 1 16 M_DATA_R_16 M_DATA48 1 16 M_DATA_R_48 SRN68J-1 M_AA5 2 7
M_DATA17 2 15 M_DATA_R_17 M_DATA49 2 15 M_DATA_R_49 M_AA2 3 6
M_DQS2 3 14 M_DQS_R2 M_DQS6 3 14 M_DQS_R6 RN90 RN85 M_AA4 4 5
M_DATA18 4 13 M_DATA_R_18 M_DATA50 4 13 M_DATA_R_50 M_DATA_R_16 1 16 1 16 M_DATA_R_57
M_DATA19 5 12 M_DATA_R_19 M_DATA51 5 12 M_DATA_R_51 M_DATA_R_17 2 15 2 15 M_DQS_R7 SRN68-1
M_DATA24 6 11 M_DATA_R_24 M_DATA56 6 11 M_DATA_R_56 M_DQS_R2 3 14 3 14 M_DATA_R_51 RN71
M_DATA25 7 10 M_DATA_R_25 M_DATA57 7 10 M_DATA_R_57 M_DATA_R_18 4 13 4 13 M_DATA_R_56 M_AWE# 1 8
M_DQS3 8 9 M_DQS_R3 M_DQS7 8 9 M_DQS_R7 M_DATA_R_19 5 12 5 12 M_DATA_R_50 2 7
M_DATA_R_24 6 11 6 11 M_DQS_R6 3 6
SRN10J-3 SRN10J-3 M_DATA_R_25 7 10 7 10 M_DATA_R_48 M_CS#3 4 5
M_DQS_R3 8 9 8 9 M_DATA_R_49
3 RN21 RN18 SRN68-1 3
M_DATA22 1 16 M_DATA_R_22 M_ADM6 1 16 M_ADM_R6 SRN68J-1 SRN68J-1
M_ADM2 2 15 M_ADM_R2 M_DATA54 2 15 M_DATA_R_54 Modify at 05-08 03'
M_DATA28 3 14 M_DATA_R_28 M_DATA55 3 14 M_DATA_R_55 RN57 1D25V_S3
RN54
M_DATA23 4 13 M_DATA_R_23 M_DATA60 4 13 M_DATA_R_60 M_DATA_R_21 1 16 1 16 M_ADM_R7
M_DATA29 5 12 M_DATA_R_29 M_DATA61 5 12 M_DATA_R_61 M_ADM_R2 2 15 2 15 M_DATA_R_60 R640 68R2
M_ADM3 6 11 M_ADM_R3 M_ADM7 6 11 M_ADM_R7 3 14 3 14 M_DATA_R_61 1 2M_CKE#_R0
M_DATA31 7 10 M_DATA_R_31 M_DATA62 7 10 M_DATA_R_62 M_DATA_R_22 4 13 4 13 M_DATA_R_55 R713 68R2 M_CKE#_R0 11
M_DATA30 8 9 M_DATA_R_30 M_DATA63 8 9 M_DATA_R_63 M_DATA_R_23 5 12 5 12 M_DATA_R_54 R712 68R2 1 2M_CKE#_R1
M_DATA_R_52 M_CKE#_R1 11
M_DATA_R_28 6 11 6 11 M_CS#2 1 2
SRN10J-3 SRN10J-3 M_DATA_R_29 7 10 7 10
M_ADM_R3 8 9 8 9 M_DATA_R_53
11/11 add R1267 for
RN31 SRN10J RN33 SRN10J SRN68J-1 R711 68R2
M_DATA11 2 3 M_DATA_R_11 M_DATA43 2 3 M_DATA_R_43 SRN68J-1 M_AA13 1 2
AMD suggest.
M_DATA10 1 4 M_DATA_R_10 M_DATA42 1 4 M_DATA_R_42 RN80 RN78
66.10036.040 66.10036.040 M_DATA_R_11 1 4 1 4 M_DATA_R_43
M_DATA_R_10 2 3 2 3 M_DATA_R_42
RN36 SRN10J RN27 SRN10J
M_DATA26 2 3 M_DATA_R_26 M_DATA58 2 3 M_DATA_R_58 RN72
M_DATA27 1 4 M_DATA_R_27 M_DATA59 1 4 M_DATA_R_59 SRN68J SRN68J M_AA3 1 8
66.10036.040 66.10036.040 RN44 RN43 M_AA6 2 7
M_DATA_R_14 1 4 1 4 M_DATA_R_46 M_AA10 3 6
M_DATA_R_15 2 3 2 3 M_DATA_R_47 M_ABS#0 4 5
M_CKE#0 5
RN24 SRN10J
M_CKE#0 2 3 M_CKE#_R0 SRN68-1
M_CKE#1 1 4 M_CKE#_R1 SRN68J SRN68J RN74
66.10036.040 RN79 RN77 M_AA12 1 8
M_DATA_R_26 1 4 1 4 M_DATA_R_58 M_AA9 2 7
2 M_CKE#1 5 2
11/11 add RN30 for AMD M_DATA_R_27 2 3 2 3 M_DATA_R_59 M_AA11 3 6
M_AA7 4 5 M_CS#3
suggest. M_CS#2
M_CS#3 5,11
M_CS#2 5,11
SRN68J SRN68J SRN68-1 M_CS#0
M_CS#1 M_CS#0 5,11
RN52 RN42 M_CS#1 5,11
M_DATA_R_30 1 4 1 4 M_DATA_R_62
M_DATA_R_31 2 3 2 3 M_DATA_R_63
RN61
1 16
SRN68J SRN68J M_ADM_R1 2 15 M_AWE# 5,11
3 14 M_ACAS# 5,11
4 13 M_ARAS# 5,11
PLACE BETWEEN DM1, DM2 5 12
CLOSE TO FIRST DM ( DM 2 ) < 0.2", TO SECOND DM ( DM1 ) < 1.1" 6 11 M_DATA[63..0] 5
RN22 7 10 M_DATA_R_[63..0] 11
M_DATA14 1 16 M_DATA_R_14 EQUAL LENGTH LIMITATION WITH SCK/SCK# M_DATA_R_20 8 9
M_DATA15 2 15 M_DATA_R_15
M_DQS[7..0] 5
3 14 R637 121R3F SRN68J-1
M_CLK7 M_DQS_R[7..0] 11
4 13 1 2 M_CLK7 5,11
5 12 64.12105.651 M_CLK#7 RN55
M_CLK#7 5,11 M_AA[13..0] 5,11
6 11 M_ADM_R5 1 16
M_DATA21 7 10 M_DATA_R_21 R645 121R3F 2 15
M_DATA20 M_ABS#[0..1] 5,11
8 9 M_DATA_R_20 1 2 M_CLK6 3 14
M_CLK6 5,11
M_CLK#6 4 13
M_CLK#6 5,11
SRN10J-3 5 12
6 11
RN19 R634 121R3F 7 10
M_DATA47 1 16 M_DATA_R_47 1 2 M_CLK5 M_ADM_R6 8 9
M_DATA46 M_DATA_R_46 M_CLK5 5,11
2 15 M_CLK#5
1 M_CLK#5 5,11 1
3 14 SRN68J-1
4 13 R639 121R3F
M_CLK4
5
6
12
11
1 2
M_CLK#4
M_CLK4 5,11
M_CLK#4 5,11
Wistron Corporation
M_DATA53 7 10 M_DATA_R_53 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_DATA52 8 9 M_DATA_R_52 R592 121R3F Taipei Hsien 221, Taiwan, R.O.C.
1 2 M_CLK1
M_CLK1 5,11
SRN10J-3 M_CLK#1 Title
M_CLK#1 5,11
11 M_ADM_R[7..0]
R590 121R3F DDR DAMPING & TERMINATION
1 2 M_CLK0 Size Document Number Rev
5 M_ADM[8..0] M_CLK0 5,11
M_CLK#0
M_CLK#0 5,11
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 12 of 51
A B C D E
1
2
3
4
C129
1D25V_S3
1D25V_S3
2 1 C446 C469 C397 C400
2 1 2 1 2 1 2 1
SCD22U10V3KX
1D25V_S3
2D5V_S3
2D5V_S3
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C124
C448 C464 C399 C398
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C123
2 1 C450 C458 C401 C396
A
A
2 1 2 1 2 1 2 1
SCD22U10V3KX
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C332
C454 C451 C403 C394
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C322
2 1 C459 C449 C412 C392
2 1 2 1 2 1 2 1
SCD22U10V3KX
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
1D25V_S3 TO GND
C320
C339 C447 C414 C390
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
1D25V_S3 TO 2D5V_S3
SCD22U10V3KX
220u
100u
0.22u x 9
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
10u
10
2
C325
2 1 C337 C341 C441 C384
2 1 2 1 2 1 2 1
SCD22U10V3KX
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
B
B
34
10
C282
0.1u
4.7u
4.7u x 9
C342 C348 C375 C382
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C278
10
2 1 2 1 2 1 2 1
SCD22U10V3KX
2 1 2 1 2 1 2 1
0.1u
SC4D7U10V5ZY
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C264
LAYOUT:Place altemating caps to GND and 2D5_DRAM
SCD22U10V3KX
1000p
C273
2 1 C472 C480 C391 C413
2 1 2 1 2 1 2 1
SCD22U10V3KX
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C292
C470 C473 C393 C411
C
C
2 1 2 1 2 1 2 1
SC4D7U10V5ZY
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C288
2 1 C467 C471 C395 C402
2 1 2 1 2 1 2 1
SCD22U10V3KX
78.22423.2B1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
C295
SC4D7U10V5ZY
78.47593.411
2 1 2 1
1D25V_S3
2D5V_S3
C104
1D25V_S3
1D25V_S3
C333
TC12
C276 1
C303 1
C202 1
C130 1
C466 1
SC1000P50V
2 1
77.21071.011
78.10610.511
2
2
2
2
2
ST100U6D3V-U
SC10U6D3V5MX
C112
2 1
2 1
fill.
TC8
78.10134.1F1
78.22423.2B1
78.22423.2B1
78.22423.2B1
78.22423.2B1
78.22423.2B1
C335
SC100P50V2JN
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
2 1
D
D
77.21071.011
1D25V_S3
ST100U6D3V-U
78.10610.511
C269
SC10U6D3V5MX
78.10134.1F1
C185
SC100P50V2JN
0.22u x 10
2D5V_S3
78.47523.221
C99
SC4D7U10V-U
C265
2 1
1
C196 1
C182 1
C409 1
C291 1
LAYOUT:Place on backside,
Title
Size
A3
SC1000P50V
C203
2
2
2
2
2
C296
78.22423.2B1
78.22423.2B1
78.22423.2B1
78.22423.2B1
78.22423.2B1
78.22423.2B1
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SCD22U10V3KX
SC1000P50V
2 1
Clawhammer and near DIMMs(both sides).
1D25V_S3
Document Number
C293
LAYOUT:Add 100pF and 1000pF on VTT fill near
Gannet
SC100P50V2JN
2 1
C127
E
E
Sheet
DDR DECOUPLING
78.10134.1F1
2D5V_S3
13
SC100P50V2JN
5,6,7,10,11,46,48,49,50
of
C125
2
TC16
5,6,7,12,46,50 1D25V_S3
SC1000P50V
77.22271.071
51
1D25V_S3
Rev
ST220U2D5VDM-2
-1
Wistron Corporation
2D5V_S3
1D25V_S3
1
2
3
4
A B C D E
U23A 3D3V_S0
9,20 AGP_AD[31..0]
AGP_AD0 H29 AJ5 VGA_GPIO0
AD0 GPIO0 2,3,8,9,10,11,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
AGP_AD1 H28 AH5 VGA_GPIO1
AGP_AD2 AD1 GPIO1 VGA_GPIO2 1D5V_S0
J29 AD2 GPIO2 AJ4
AGP_AD3 J28 AK4 VGA_GPIO3
AGP_AD4 AD3 GPIO3 VGA_GPIO4
K29 AH4
DVD/EXT TMDS/GPIO
AD4 GPIO4 2,9,10,16,20,49 1D5V_S0
AGP_AD5 K28 AF4 VGA_GPIO5
AGP_AD6 AD5 GPIO5 VGA_GPIO6
L29 AD6 GPIO6 AJ3
AGP_AD7 L28 AK3 VGA_GPIO7
AGP_AD8 AD7 GPIO7 VGA_GPIO8
Layout trace 20 mil N28 AD8 GPIO8 AH3
AGP_AD9 P29 AJ2 VGA_GPIO9
AGP_AD10 AD9 GPIO9 VGA_GPIO10
P28 AD10 GPIO10 AH2
NEAR NB-MCH AGP_AD11 VGA_GPIO11
PCI/AGP
4 R29 AD11 GPIO11 AH1 4
AGP_AD12 R28 AG3 VGA_GPIO12
AGP_AD13 AD12 GPIO12 VGA_GPIO13
T29 AD13 GPIO13 AG1
1D5V_S0 AGP_AD14 T28 AG2 VGA_GPIO14
AGP_AD15 AD14 GPIO14 VGA_GPIO15
U29 AD15 GPIO15 AF3
AGP_AD16 N25 AF2 VGA_GPIO16 3D3V_S0
AD16 GPIO16
1
1
AGP_AD20 R25 AH6 VGA_TP3 TPAD30 TP67
AGP_AD21 AD20 ZV_LCDDATA0 VGA_TP4 TPAD30 TP63 R397
T25 AD21 ZV_LCDDATA1 AJ6
AGP_VREF_VGA AGP_AD22 T26 AK6 VGA_TP5 TPAD30 TP55
2
2
R244 C222 AGP_AD25 W26 AJ7 VGA_TP8 TPAD30 TP54
2
AD25 ZV_LCDDATA5
1
100R3F SCD1U16V3KX AGP_AD26 W25 AH8 VGA_TP9 TPAD30 TP42 BC331 R402 X7 1 8 3D3V_SS_S0
AGP_AD27 AD26 ZV_LCDDATA6 VGA_TP10 TPAD30 TP45 1MR3 XIN/CLKIN VDD XTALIN_VGA
78.10421.2B1 Y26 AJ8 2 7
AGP_AD28 AD27 ZV_LCDDATA7 VGA_TP11 TPAD30 TP72 SC20P50V3JX XTAL-27MHZ-3-U XOUT REF VGA_GPIO16 C279
Y25 AD28 ZV_LCDDATA8 AH9 3 PD# MODOUT 6
AGP_AD29 AA26 AJ9 VGA_TP12 TPAD30 TP64 XTALOUT_SS 4 5
2
1
AD29 ZV_LCDDATA9 VGA_TP13 LF VSS
1.5V x (100/(324+100) AGP_AD30 AA25 AK9 TPAD30 TP43 82.30034.001
2
AD30 ZV_LCDDATA10
1
AGP_AD31 AA27 AH10 VGA_TP14 TPAD30 TP56 BC332 SCD1U
= 0.3537V 9,20 AGP_C/BE#[3..0] AD31 ZV_LCDDATA11 VGA_TP15 TPAD30 TP83 SC6P50V3DN P2779A-08ST
ZV_LCDDATA12 AE6
AGP_C/BE#0 N29 AG6 VGA_TP16 TPAD30 TP70
C/BE#0 ZV_LCDDATA13
Set AGP_VREF_VGA to 0.35V for AGP 3.0 AGP_C/BE#1 U28 C/BE#1 ZV_LCDDATA14 AF6 VGA_TP17 TPAD30 TP77 ORIGNAL R373
AGP_C/BE#2 P26 AE7 VGA_TP18 TPAD30 TP84 R393 140R3F
AGP_C/BE#3 C/BE#2 ZV_LCDDATA15 VGA_TP19 TPAD30 TP76 VGA_SS_LF_1 1
P2779A-08TT
U26 AF7 2VGA_SS_LF XTALIN_M10
2
C/BE#3 ZV_LCDDATA16 VGA_TP20 TPAD30 TP81 USE W180-01
ZV_LCDDATA17 AE8
1
AG30 AG8 VGA_TP21 TPAD30 TP73 330R3F GEOMETRY
3 CLK66_VGA PCICLK ZV_LCDDATA18
AG28 AF8 VGA_TP22 TPAD30 TP79 C275 C283 R372
19,23,29,31,33,34,37,39,40,42 PCIRST_BUF# RST# ZV_LCDDATA19 SCD1U16V3KX SC270P50V 105R3F
3 AF28 AE9 PL_ID3 3
9 AGP_REQ# REQ# ZV_LCDDATA20 PL_ID3 22
AD26 AF9 PL_ID0
2
9 AGP_GNT# GNT# ZV_LCDDATA21 PL_ID0 22
M25 AG10 PL_ID1 3D3V_S0
9 AGP_PAR PAR ZV_LCDDATA22 PL_ID1 22
N26 AF10 PL_ID2
2
9 AGP_STOP# STOP# ZV_LCDDATA23 PL_ID2 22
9,20 AGP_DEVSEL# V29 DEVSEL#
1
V28 AJ10 VGA_TP27 TPAD30 TP47
9 AGP_TRDY# TRDY# ZV_LCDCNTL0
W29 AK10 VGA_TP28 TPAD30 TP96 R568
9 AGP_IRDY# IRDY# ZV_LCDCNTL1 1KR3F
W28 AJ11 VGA_TP29 TPAD30 TP48
9,20 AGP_FRAME# FRAME# ZV_LCDCNTL2
AE26 AH11 VGA_TP30 TPAD30 TP57 64.10015.651 3D3V_S0
9,23 P_INTA# INTA# ZV_LCDCNTL3
AC26 AG4 VGA_VREFG
2
9,20 AGP_WBF# WBF# (NC)VREFG R336
1
AE29 AK16 VGA_GPIO0 1 2 10KR3
9 AGP_RBF# RBF# TXOUT_L0N TXAOUT0- 20,22
M28 AH16 R577
9,20 AGP_ADSTB0 AD_STBF_0 TXOUT_L0P TXAOUT0+ 20,22 1KR3F
9 AGP_ADSTB1 V25 AD_STBF_1 TXOUT_L1N AH17 TXAOUT1- 20,22 R331
AB29 AJ16 64.10015.651 VGA_GPIO1 1 2 10KR3
9 AGP_SB_STB SB_STBF TXOUT_L1P TXAOUT1+ 20,22
9 AGP_SBA[7..0] TXOUT_L2N AH18 TXAOUT2- 20,22
AGP2X
AJ17
2
AGP_SBA0 TXOUT_L2P TXAOUT2+ 20,22
AD28 AK19 L3N_TEST TP108 VGA_GPIO2 R329 1 2 DUMMY-R3
AGP_SBA1 SBA0 TXOUT_L3N L3P_TEST TP112
AD29 SBA1 TXOUT_L3P AH19
AGP_SBA2 AC28 AK18
AGP_SBA3 SBA2 TXCLK_LN TXACLK- 20,22
VGA_GPIO3 R328 2 DUMMY-R3
LVDS
AC29 SBA3 TXCLK_LP AJ18 TXACLK+ 20,22 1
AGP_SBA4 AA28 AG16
AGP_SBA5 SBA4 TXOUT_U0N TXBOUT0- 20,22
AA29 SBA5 TXOUT_U0P AF16 TXBOUT0+ 20,22
AGP_SBA6 Y28 AG17 RN7
AGP_SBA7 SBA6 TXOUT_U1N TXBOUT1- 20,22
Y29 AF17 VGA_GPIO4 1 8
SBA7 TXOUT_U1P TXBOUT1+ 20,22
AF18 VGA_GPIO5 2 7
9 AGP_ST[2..0] TXOUT_U2N TXBOUT2- 20,22 VGA_GPIO6
AGP_ST0 AF29 AE18 3 6
ST0 TXOUT_U2P TXBOUT2+ 20,22
AGP_ST1 AD27 AH20 VGA_GPIO7 4 5
2
AGP_ST2 ST1 TXOUT_U3N 2
AE28 ST2 TXOUT_U3P AG20
TXCLK_UN AF19 TXBCLK- 20,22
AB28 AG19 SRN10K
9 AGP_SB_STB# SB_STBS TXCLK_UP TXBCLK+ 20,22
9,20 AGP_ADSTB0# M29 ADSTBS_0 66.10336.080
9,20 AGP_ADSTB1# V26 ADSTBS_1
DIGON AE12 LCDVDD_ON 22
AGP_VREF_VGA M26 AG12 RN82 RN5
AGPREF BLON BL_ON 22
4X
4 5
DDC3CLK AG23 AK27
DDC3CLK R VGA_RED 9,21
DDC3DATA AG24 AJ27
DDC3DATA G VGA_GREEN 9,21
R344 AJ26 SRN10K
B VGA_BLUE 9,21
R687 1 2 0R2-0 VGA_T_YCLK 10KR3 1 2 SSIN AK25 66.10336.080
SSIN
2 SSOUT
SS
1 1
XTALIN_M10 VGA_RSET
CLK
1D8V_S0
17 FBAD[63:0] U23B 18 FBCD[63:0] FBCA[13:0] 18
U23C
FBAA[13:0] 17
FBCD0 16,49,50 1D8V_S0
FBAD0 L25 E22 FBAA0 D7 N5 FBCA0
FBAD1 DQA0 MAA0 FBAA1 FBCD1 DQB0 MAB0 FBCA1 VVGADDR
L26 DQA1 MAA1 B22 F7 DQB1 MAB1 M1
FBAD2 K25 B23 FBAA2 FBCD2 E7 M3 FBCA2
FBAD3 DQA2 MAA2 FBAA3 FBCD3 DQB2 MAB2 FBCA3
K26 DQA3 MAA3 B24 G6 DQB3 MAB3 L3 16,17,18,46,49 VVGADDR
FBAD4 J26 C23 FBAA4 FBCD4 G5 L2 FBCA4
FBAD5 DQA4 MAA4 FBAA5 FBCD5 DQB4 MAB4 FBCA5
H25 DQA5 MAA5 C22 F5 DQB5 MAB5 M2
FBAD6 H26 F22 FBAA6 FBCD6 E5 M5 FBCA6
FBAD7 DQA6 MAA6 FBAA7 FBCD7 DQB6 MAB6 FBCA7
G26 DQA7 MAA7 F21 C4 DQB7 MAB7 P6
FBAD8 G30 C21 FBAA8 FBCD8 B5 N3 FBCA8
FBAD9 DQA8 MAA8 FBAA9 FBCD9 DQB8 MAB8 FBCA9
4 D29 DQA9 MAA9 A24 C5 DQB9 MAB9 K2 4
FBAD10 D28 C24 FBAA10 FBCD10 A4 K3 FBCA10
FBAD11 DQA10 MAA10 FBAA11 FBCD11 DQB10 MAB10 FBCA11
E28 DQA11 MAA11 A25 B4 DQB11 MAB11 J2
FBAD12 E29 E21 FBAA12 FBCD12 C2 P5 FBCA12
FBAD13 DQA12 (MAA13)MAA12 FBAA13 FBCD13 DQB12 (MAB13)MAB12 FBCA13
G29 DQA13 (MAA12)MAA13 B20 D3 DQB13 (MAB12)MAB13 P3
FBAD14 G28 C19 VGA_TP2 TPAD30 TP28 FBCD14 D1 P2 VGA_TP1 TPAD30 TP32
FBAD15 DQA14 (NC)MAA14 FBCD15 DQB14 (NC)MAB14
F28 DQA15 FBADQM[7:0] 17 D2 DQB15 FBCDQM[7:0] 18
FBAD16 G25 FBCD16 G4
FBAD17 DQA16 FBADQM0 FBCD17 DQB16 FBCDQM0
F26 DQA17 DQMA#0 J25 H6 DQB17 DQMB#0 E6
FBAD18 E26 F29 FBADQM1 FBCD18 H5 B2 FBCDQM1
FBAD19 DQA18 DQMA#1 FBADQM2 FBCD19 DQB18 DQMB#1 FBCDQM2
F25 DQA19 DQMA#2 E25 J6 DQB19 DQMB#2 J5
FBAD20 E24 A27 FBADQM3 FBCD20 K5 G3 FBCDQM3
FBAD21 DQA20 DQMA#3 FBADQM4 FBCD21 DQB20 DQMB#3 FBCDQM4
F23 DQA21 DQMA#4 F15 K4 DQB21 DQMB#4 W6
FBAD22 E23 C15 FBADQM5 FBCD22 L6 W2 FBCDQM5
FBAD23 DQA22 DQMA#5 FBADQM6 FBCD23 DQB22 DQMB#5 FBCDQM6
D22 DQA23 DQMA#6 C11 L5 DQB23 DQMB#6 AC6
FBAD24 B29 E11 FBADQM7 FBCD24 G2 AD2 FBCDQM7
FBAD25 DQA24 DQMA#7 FBCD25 DQB24 DQMB#7
C29 DQA25 F3 DQB25 FBCDQS[7:0] 18
FBAD26 C25 FBCD26 H2
DQA26 FBADQS[7:0] 17 FBCD27 DQB26
FBAD27 C27 J27 FBADQS0 E2 F6 FBCDQS0
FBAD28 DQA27 QSA0 FBADQS1 FBCD28 DQB27 QSB0 FBCDQS1
B28 DQA28 QSA1 F30 F2 DQB28 QSB1 B3
FBAD29 B25 F24 FBADQS2 FBCD29 J3 K6 FBCDQS2
FBAD30 DQA29 QSA2 FBADQS3 FBCD30 DQB29 QSB2 FBCDQS3
C26 DQA30 QSA3 B27 F1 DQB30 QSB3 G1
FBAD31 B26 E16 FBADQS4 FBCD31 H3 V5 FBCDQS4
FBAD32 DQA31 QSA4 FBADQS5 FBCD32 DQB31 QSB4 FBCDQS5
F17 DQA32 QSA5 B16 U6 DQB32 QSB5 W1
FBAD33 E17 B11 FBADQS6 FBCD33 U5 AC5 FBCDQS6
FBAD34 DQA33 QSA6 FBADQS7 FBCD34 DQB33 QSB6 FBCDQS7
D16 DQA34 QSA7 F10 U3 DQB34 QSB7 AD1
FBAD35 F16 FBCD35 V6
FBAD36 DQA35 FBCD36 DQB35
E15 DQA36 W5 DQB36
FBAD37 F14 A19 FBCD37 W4 R2
DQA37 RASA# FBARAS# 17 FBCD38 DQB37 RASB# FBCRAS# 18
3 FBAD38 E14 Y6 3
FBAD39 DQA38 FBCD39 DQB38
F13 DQA39 CASA# E18 FBACAS# 17 Y5 DQB39 CASB# T5 FBCCAS# 18
FBAD40 C17 FBCD40 U2
FBAD41 DQA40 FBCD41 DQB40
B18 DQA41 WEA# E19 FBAWE# 17 V2 DQB41 WEB# T6 FBCWE# 18
FBAD42 B17 FBCD42 V1
FBAD43 DQA42 FBCD43 DQB42
B15 DQA43 CSA0# E20 FBACS0# 17 V3 DQB43 CSB0# R5 FBCCS0# 18
FBAD44 C13 FBCD44 W3 R6 TP_FBCCS1
FBAD45 DQA44 FBCD45 DQB44 CSB1#
B14 DQA45 CSA1# F20 TP_FBACS1 TP160 TPAD30 Y2 DQB45
TP131 TPAD30
FBAD46 C14 FBCD46 Y3 R3
DQA46 FBCD47 DQB46 CKEB FBCCKE 18
FBAD47 C16 B19 AA2
DQA47 CKEA FBACKE 17 FBCD48 DQB47
FBAD48 A13 AA6 N1
DQA48 FBCD49 DQB48 CLKB0 FBCCLK0+ 18
FBAD49 A12 B21 AA5 N2
DQA49 CLKA0 FBACLK0+ 17 DQB49 CLKB0# FBCCLK0- 18
1
FBAD50 C12 C20 FBCD50 AB6
DQA50 CLKA0# FBACLK0- 17 FBCD51 DQB50
FBAD51 B12 AB5 T2 R255
DQA51 FBCD52 DQB51 CLKB1 FBCCLK1+ 18
FBAD52 C10 C18 AD6 T3
DQA52 CLKA1 FBACLK1+ 17 FBCD53 DQB52 CLKB1# FBCCLK1- 18 10KR2
FBAD53 C9 A18 AD5
DQA53 CLKA1# FBACLK1- 17 FBCD54 DQB53
FBAD54 B9 AE5 E3 DIMB_0 TP162
DQA54 DQB54 DIMB_0
1
FBAD55 B10 FBCD55 AE4 AA3 DIMB_1 TP85
2
FBAD56 DQA55 MVREFD R170 FBCD56 DQB55 DIMB_1
E13 DQA56 MVREFD B7 AB2 DQB56
FBAD57 E12 10KR2 FBCD57 AB3 AF5 VGA_TP43 TP75
FBAD58 DQA57 MVREFS FBCD58 DQB57 ROMCS#
E10 DQA58 MVREFS B8 AC2 DQB58
FBAD59 F12 FBCD59 AC3 C6 MEMVMODE0
FBAD60 DQA59 FBCD60 DQB59 MEMVMODE_0 MEMVMODE1
F11 AD3 C7
2
2 M10-P-U 2
M10-P-U
VVGADDR VVGADDR
1
R165 R177
100R3F 100R3F
2
1
1
1
MEMVMODE0 1 2
2
SC10U10V5ZY VDDR1
1
SC10U10V5ZY 4K7R3
78.10693.411 78.10693.411 R686 R681 63.47234.151 1D8V 0 1
4K7R3 DUMMY-R3
63.47234.151 VDDR1(ELPIDA)
2
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA(2/3) ATI M10-P MEM
Size Document Number Rev
A3 -1
Gannet
Date: Thursday, December 04, 2003 Sheet 15 of 51
A B C D E
A B C D E
1D2V_S0
U23E 1D2V_S0
VVGADDR U23D
2,46 1D2V_S0
A2 VSS VSS K8
1D5V_S0
A10
A16
A22
VSS
VSS
VSS
VSS
K7
K1
L4
T7
R4
R1
VDDR1
VDDR1(CLKBFB)
VDDC
VDDC
AC13
AD13
AD15
1D2V_S0: 7020mA
2,9,10,14,20,49 1D5V_S0
A29
C1
VSS
VSS
VSS
VSS
VSS
VSS
M30
M8
N8
N7
VDDR1
VDDR1
VDDR1
VDDC
VDDC
VDDC
AC15
AC17
1D5V_S0
1D5V_S0: 500mA 1D8V_S0
C3
C28
C30
VSS
VSS
VSS
VSS
M7
N23
N24
M4
L27
L8
VDDR1
VDDR1 (VDDC18)VDD15 P8
Y8
1D8V_S0: 407mA 15,49,50 1D8V_S0
VSS VSS VDDR1 (VDDC18)VDD15
4 D27
D24
VSS
VSS
VSS
VSS
N27
P4
J24
J23
VDDR1
VDDR1
(VDDC18)VDD15
(VDDC18)VDD15
AC11
AC20 VVGADDR: 490mA 2D5V_S0 4
1
G21 W8 AA1 AC8 3D3V_S0 0R5
VSS VSS VDDR1 VDDR3 BC311 BC307 BC310
G24 VSS VSS W23 AA4 VDDR1
H27 W24 AA7 AG7 SC4D7U16V6ZY-U
VSS VSS VDDR1 VDDR4
H23 W27 AA8 AD9
2
VSS VSS VDDR1 VDDR4 SCD1U10V2KX
H21 VSS VSS Y4 A3 VDDR1 VDDR4 AC9
H18 AA30 A9 AC10 SCD1U10V2KX
VSS VSS VDDR1 VDDR4 1D5V_S0
H16 VSS VSS AB27 A15 VDDR1 VDDR4 AD10
H14 VSS VSS AB24 A21 VDDR1
H12 VSS VSS AB23 A28 VDDR1 VDDP J30
H9 AB8 B1 AF27 1D8V_S0 1D8VLVDDR_S0 1D8V_S0 1D8VAVDD_S0
VSS VSS VDDR1 VDDP L35 L34
H8 VSS VSS AB7 B30 VDDR1 VDDP AE30
H4 VSS VSS AB1 D26 VDDR1 VDDP AC27 1 2 1 2
K30 VSS VSS AC4 D23 VDDR1 VDDP AC23
1
K27 AC12 D20 AB30 0R5 0R5
VSS VSS VDDR1 VDDP BC177 BC175 BC174 BC171 BC172 BC173 BC179 BC182 BC181 BC187
K24 VSS VSS AC14 D17 VDDR1 VDDP AA24
3 K23 AD16 D14 AA23 SC4D7U16V6ZY-U 3
VSS VSS VDDR1 VDDP
AG15 AC16 D11 Y27
2
VSS VSS VDDR1 VDDP SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
AD12 VSS VSS AC18 D8 VDDR1 VDDP W30
AE27 AD30 D5 V23 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
VSS VSS VDDR1 VDDP VVGADDR
AG5 VSS VSS AD25 E27 VDDR1 VDDP V24
AG9 VSS VSS AD18 F4 VDDR1 VDDP M23
AG11 VSS VSS AK2 G7 VDDR1 VDDP M24
AG18 VSS VSS AK29 G10 VDDR1 VDDP N30
1
AG22 VSS VSS AJ30 G13 VDDR1 VDDP P23
AG27 AJ1 G15 P27 BC268 BC215 BC202 BC240 BC250 BC252 BC253 BC193
VSS VSS VDDR1 VDDP SC10U10V6ZY-U
E4 VSS VSS D10 G19 VDDR1 VDDP T23
AB4 D25 G22 T24 78.10693.4I1
2
VSS VSS VDDR1 VDDP SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
G27 VDDR1 VDDP T30
H22 U27 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
VDDR1 VDDP
H19 VDDR1
M10-P-U AD4 AD24
VDDR1 AVSSQ
1
T4 VDDR1
N4 AF20 BCB12 BC254 BC255 BC285 BC258 BC284 BC219 BC223 BC282 BC291
2D5V_S0 VDDR1 LVSSR SCD01U16V3KX
D19 VDDR1(CLKAFB) LVSSR AE19
D13 AE16
2
1D8VLVDDR_S0 VDDR1 LVSSR SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC22U10V6ZY-U SC22U10V6ZY-U
LVSSR AF15
1D2V_S0 AE17 3D3V_S0 SCD1U10V2KX SCD1U10V2KX SC22U10V6ZY-U SC22U10V6ZY-U
U23F LVDDR_25(LVDDR18_25) 1D5V_S0
AE20 LVDDR_25(LVDDR18_25) LPVSS AJ19
AE15 LVDDR_18 TPVSS AJ12 D3
P17 M16 1D8VPLL_S0 AF21 1 2
VDDC VSS LVDDR_18
P18 VDDC VSS N16 TXVSSR AH12
1
P19 N15 AJ20 AG13 SSM5818SL
VDDC VSS 1D8VLVDDR_S0 LPVDD TXVSSR BCB11 BC265 BC261 BC211 BC192 BC199 BC251 BC200 BC241 BC256 BC208 BC201
U12 VDDC VSS P15 AK12 TPVDD TXVSSR AG14
U13 P16 SCD01U16V3KX SC10U10V6ZY-U SC22U10V6ZY-U
2 VDDC VSS SC10U10V6ZY-U SC22U10V6ZY-U 2
U14 R18 AF13 F19 78.10693.4I1
2
VDDC VSS VVGADDR TXVDDR VSSRH0 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
U17 VDDC VSS R17 AF14 TXVDDR VSSRH1 M6 78.10693.4I1
U18 R16 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
VDDC VSS
U19 VDDC VSS R15 F18 VDDRH0
V19 R14 2D5VATI_S0 N6 AH22 High limit. 1.0 mm
VDDC VSS VDDRH1 A2VSSN 3D3V_S0
V18 VDDC VSS R13 A2VSSN AJ21
V17 VDDC VSS R12 AG21 A2VDD
V14 T13 1D8VAVDD_S0 AH21
VDDC VSS A2VDD
V13 VDDC VSS T14 A2VSSQ AF23
1
V12 VDDC VSS T15 AF22 A2VDDQ
N18 W15 AH23 BC188 BC180 BC198 BC183 BC269 BC194 BC195 BC196 BC166 BC168 BC302 BC164
VDDC VSS 1D8VAVDDDI_S0 AVSSN SC10U10V6ZY-U SC22U10V6ZY-U SC22U10V6ZY-U
N17 VDDC VSS V16 AH24 AVDD
N14 V15 AE23 78.10693.4I1 DUMMY-SC4D7U10V5ZY SC22U10V6ZY-U
2
VDDC VSS ASS1DI SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
W17 VDDC VSS U15 AE24 VDD1DI VSS2DI AE21 ZZ.47593.411
W18 U16 1D8VPVDD_S0 AE22 SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SC22U10V6ZY-U
VDDC VSS 1D8VMPVDD_S0 VDD2DI
W12 VDDC VSS T19 PVSS AJ28
W13 VDDC VSS T18 AK28 PVDD MPVSS A6
W14 VDDC VSS T17 A7 MPVDD
N13 T16 1D8V_S0 1D8VPLL_S0 1D8V_S0 1D8VPVDD_S0 1D8V_S0 1D8VMPVDD_S0 1D8V_S0 1D8VAVDDDI_S0
VDDC VSS L25 L33 L8 L41
N19 VDDC
M19 VDDC 1 2 1 2 1 2 1 2
M18 M10-P-U
VDDC
1
M12 0R5 0R5 0R5 0R5
VDDC 3D3V_S0 BC306 BC304 BC170 BC167 BC189 BC191
N12 VDDC
M13 1D2V_S0
VDDC D11
M14
2
VDDC SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
P12 VDDC
P13 W16 2 1 SCD1U10V2KX SCD1U10V2KX
VDDC VDDC1
1 P14 VDDC VDDC1 M15 1
M17 VDDC VDDC1 R19
1D2V_S0 SSM5818SL
W19 VDDC VDDC1 T12
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M10-P-U Taipei Hsien 221, Taiwan, R.O.C.
1
BCB5 BC309 BC294 BC226 BC227 BC230 BC203 BC213 BC212 BC238 BC293 BC162 Title
SCD01U16V3KX SC10U10V6ZY-U SC22U10V6ZY-U
78.10693.4I1 SC10U10V6ZY-U SC22U10V6ZY-U VGA(3/3) ATI M10-P POWER
2
A B C D E
A B C D E
VVGADDR
15 FBAA[13:0]
All dampings in this page must near the VRAM. 15,16,18,46,49 VVGADDR
VVGADDR
1
1
BC123 BC108 BC141 BC132 BC115 BC117 BC122 BC102
SCD01U50V3KX
78.10324.2B1
2
2
4 4
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
CLOSE TO MEM
BC121 BC109 BC142 BC134 BC116 BC106 BC120 BC91
SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX Layout trace 20 mil
SC BC101 BC96 R59 R60
SC22U10V6ZY-U SC22U10V6ZY-U 1 2 1 2
VVGADDR
1KR3F 1KR3F
VDDRA_VREF
R80 R79
VVGADDR 1 2 1 2 SB
15 FBAD[0..63]
1 2 BC143 BC94 CLOSE TO MEM !! BC87 BC93 R801 0R3-U CLOSE TO MEM !!
15 FBADQS3
VDDRA_VREF
15R2J
1 R133
2 SC22U10V6ZY-U R73 0R3-U SCD1U10V2KX SCD1U10V2KX 1 2
15 FBADQS2 FBACLK1+ 15
VDDRA_CLK0+
VDDRA_CLK0-
15R2J
1 R108
2 1 2 1 2
15 FBADQS1 FBACLK0+ 15 FBACLK1- 15
15R2J
1 R112
2 R74 1 2 0R3-U
VADQS4
VADQS5
VADQS6
VADQS7
15 FBADQS0 FBACLK0- 15
VDDRA_CLK1+
VADQS0
VADQS1
VADQS2
VADQS3
VDDRA_CLK1-
15R2J R129 R802 0R3-U
R70 FBADQM7 1 2 FBACKE 15
2
FBADQM3 1 2 SC22U10V6ZY-U FBACKE FBADQM6 15R2J
1 R127
2 VVGADDR
VADQM4
VADQM5
VADQM6
VADQM7
FBADQM2 15R2J
1 R141
2 VVGADDR R78 FBADQM5 15R2J
1 R103
2
VADQM1
VADQM2
3 3
FBAA12 FBAA12 15
FBADQM1 15R2J
1 R107
2 FBADQM4 15R2J
1 R106
2
VADQM3
FBAA13 15
B3 VADQM0
2
FBADQM0 15R2J
1 R111
2 FBAA13 15R2J R140
15R2J R139 60D4R3F R803 R800
60D4R3F
M11
M12
M13
G11
H12
H13
C10
C12
N13
N12
B12
B13
E11
E12
K11
F11
L11
J11
60D4R3F 60D4R3F
M5
G4
U83
H3
H2
D7
D8
C3
C5
C7
C8
N4
B3
B2
E4
E3
K4
F4
L4
L7
L8
J4
M11
M12
M13
G11
H12
H13
C10
C12
N13
N12
B12
B13
E11
E12
K11
F11
L11
J11
BC751_1 1
M5
G4 U84
H3
H2
D7
D8
C3
C5
C7
C8
N4
2
B2
E4
E3
K4
F4
L4
L7
L8
J4
1
DM0
DM1
DM2
DM3
DQS0
DQS1
DQS2
DQS3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREF
CK
CK#
CKE
MCL
BA0
BA1
BC85
DM0
DM1
DM2
DM3
DQS0
DQS1
DQS2
DQS3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREF
CK
CK#
CKE
MCL
BA0
BA1
SCD1U10V2KX BC752_1
FBAD32 B7 N5 FBAA0
DQ0 A0
2
FBAD0 B7 N5 FBAA0 FBAD33 C6 N6 FBAA1 BC344
FBAD1 DQ0 A0 FBAA1 FBAD34 DQ1 A1 FBAA2
C6 DQ1 A1 N6 B6 DQ2 A2 M6
FBAD2 B6 M6 FBAA2 FBAD35 B5 N7 FBAA3
FBAD3 DQ2 A2 FBAA3 FBAD36 DQ3 A3 FBAA4
B5 N7 C2 N8
1
FBAD4 DQ3 A3 FBAA4 FBAD37 DQ4 A4 FBAA5 SCD1U10V2KX
C2 DQ4 A4 N8 D3 DQ5 A5 M9
FBAD5 D3 M9 FBAA5 FBAD38 D2 N9 FBAA6
FBAD6 DQ5 A5 FBAA6 FBAD39 DQ6 A6 FBAA7
D2 DQ6 A6 N9 E2 DQ7 A7 N10
FBAD7 E2 N10 FBAA7 FBAD40 K13 N11 FBAA8
FBAD8 DQ7 A7 FBAA8 FBAD41 DQ8 A8/AP FBAA9
K13 DQ8 A8/AP N11 K12 DQ9 A9 M8
FBAD9 K12 M8 FBAA9 FBAD42 J13 L6 FBAA10
FBAD10 DQ9 A9 FBAA10 FBAD43 DQ10 A10 FBAA11
J13 DQ10 A10 L6 J12 DQ11 A11 M7
FBAD11 J12 M7 FBAA11 FBAD44 G13
FBAD12 DQ11 A11 FBAD45 DQ12
G13 DQ12 G12 DQ13 CS# N2 FBACS0# 15
FBAD13 G12 N2 FBACS0# FBAD46 F13 M2
DQ13 CS# DQ14 RAS# FBARAS# 15
FBAD14 F13 M2 FBARAS# FBAD47 F12 L2
DQ14 RAS# DQ15 CAS# FBACAS# 15
FBAD15 F12 L2 FBACAS# FBAD48 F3 L3
DQ15 CAS# DQ16 WE# FBAWE# 15
FBAD16 F3 L3 FBAWE# FBAD49 F2
FBAD17 DQ16 WE# FBAD50 DQ17
F2 DQ17 G3 DQ18
FBAD18 G3 FBAD51 G2 C4
2
FBAD19 DQ18 FBAD52 DQ19 NC 2
G2 DQ19 NC C4 J3 DQ20 NC C11
FBAD20 J3 C11 FBAD53 J2 H4
FBAD21 DQ20 NC FBAD54 DQ21 NC
J2 DQ21 NC H4 K2 DQ22 NC H11
FBAD22 K2 H11 FBAD55 K3 L12
FBAD23 DQ22 NC FBAD56 DQ23 NC
K3 DQ23 NC L12 E13 DQ24 NC L13
FBAD24 E13 L13 FBAD57 D13 M3
FBAD25 DQ24 NC FBAD58 DQ25 NC
D13 DQ25 NC M3 D12 DQ26 NC M4
FBAD26 D12 M4 FBAD59 C13 N3
FBAD27 DQ26 NC FBAD60 DQ27 NC
C13 DQ27 NC N3 B10 DQ28
FBAD28 B10 FBAD61 B9 L9
FBAD29 DQ28 FBAD62 DQ29 RFU1
B9 L9 C9
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
DQ29 RFU1 DQ30 RFU2 M10
FBAD30 C9 M10 FBAD63 B8
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K4D263238E-GC36
G10
D10
D11
H10
E10
B11
K10
F10
L10
J10
G6
G7
G8
G9
G5
H6
H7
H8
H9
D4
D5
D6
D9
H5
E5
E7
E8
K6
K7
K8
K9
B4
E6
E9
K5
F6
F7
F8
F9
F5
L5
J6
J7
J8
J9
J5
K4D263238E-GC36 Modify-0602
G10
D10
D11
H10
E10
B11
K10
F10
L10
J10
G6
G7
G8
G9
G5
H6
H7
H8
H9
D4
D5
D6
D9
H5
E5
E7
E8
K6
K7
K8
K9
B4
E6
E9
K5
F6
F7
F8
F9
F5
L5
J6
J7
J8
J9
J5
Modify-0602
72.42632.G0U
1 1
VVGADDR VVGADDR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
BC274 BC88 BC89 BC90 BC286 BC283 BC135 BC81 BC82 BC83 BC84 BC209 BC103 BC275 Title
SCD01U50V3KX SCD01U50V3KX
78.10324.2B1
VGA VRAM (DDR)
2
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX Size Document Number Rev
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX Custom
Gannet -1
Date: Thursday, December 04, 2003 Sheet 17 of 51
A B C D E
A B C D E
VVGADDR
15,16,17,46,49 VVGADDR
All dampings in this page must near the VRAM.
VVGADDR
1
1
BC218 BC153 BC224 BC210 BC129 BC165 BC220 BC217
SCD01U50V3KX CLOSE TO MEM
78.10324.2B1
2
2
4 4
SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX SCD1U10V2KX
15 FBCA[13:0]
BC267 BC237
SC22U10V6ZY-U SC22U10V6ZY-U
SC
Layout trace 20 mil
R210 R227
15 FBCD[0..63] Layout trace 20 mil VVGADDR 1 2 1 2
R134 R122
VDDRC_VREF
VVGADDR 1 2 1 2 1 2 1KR3F 1KR3F
15 FBCDQM[0..7] 15 FBCDQS7
15R2J
1 R237
2
15 FBCDQS6
15R2J
1 R283
2
15 FBCDQS5
1KR3F 1KR3F 15R2J
1 R211
2
15 FBCDQS4
15R2J R276
CLOSE TO MEM
Check ATI R638 0R3-U
CLOSE TO MEM !!
1 2 1 2 1 2 FBCCLK1+ 15
VVGADDR
SB
BC133 BC152
Check ATI 1 2 1 2
1 2 FBCCLK1- 15
VVGADDR
SCD1U10V2KX SCD1U10V2KX VDDRC_CLK1- R643 0R3-U
1 2 BC126 BC125 BC235 BC232
15 FBCDQS3
VDDRC_VREF
15R2J
1 R149
2 SC22U10V6ZY-U CLOSE TO MEM !! R726 0R3-U SCD1U10V2KX SCD1U10V2KX VDDRC_CLK1+
15 FBCDQS2
15R2J
1 R207
2 SC22U10V6ZY-U VDDRC_CLK0+ 1 2
15 FBCDQS1 FBCCLK0+ 15
15R2J
1 R113
2 VDDRC_CLK0- 1 2
3 15 FBCDQS0 FBCCLK0- 15 3
15R2J R200 0R3-U R730
FBCDQM7 1 2
VCDQS4
VCDQS5
VCDQS6
VCDQS7
FBCDQM3 1 FBCCKE FBCDQM6 VVGADDR FBCCKE 15
2 15R2J
1 R238
2
VCDQS0
VCDQS1
VCDQS2
VCDQS3
VCDQM4
VCDQM5
VCDQM6
VCDQM7
1 2 1 2 FBCA12 15
2
FBCDQM1 15R2J R208 FBCA12 FBCDQM4 15R2J R209
VCDQM0
VCDQM1
VCDQM2
VCDQM3
1 2 1 2 FBCA13 15
2
FBCDQM0 15R2J
1 R124
2 FBCA13 R718 R733 15R2J R277
15R2J R199 R650 R635
60D4R3F 60D4R3F
M11
M12
M13
G11
H12
H13
C10
C12
N13
N12
B12
B13
E11
E12
K11
F11
L11
J11
60D4R3F 60D4R3F
M5
G4
U71
H3
H2
D7
D8
C3
C5
C7
C8
N4
B3
B2
E4
E3
K4
F4
L4
L7
L8
J4
M11
M12
M13
G11
H12
H13
C10
C12
N13
N12
B12
B13
E11
E12
K11
F11
L11
J11
BC296
M5
G4
U74
H3
H2
D7
D8
C3
C5
C7
C8
N4
B3
B2
E4
E3
K4
F4
1
L4
L7
L8
J4
BC753_11 2
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DM0
DM1
DM2
DM3
DQS0
DQS1
DQS2
DQS3
VREF
CK
CKE
CK#
MCL
BA0
BA1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
CK
CKE
DM0
DM1
DM2
DM3
DQS0
DQS1
DQS2
DQS3
VREF
CK#
MCL
BA0
BA1
SCD1U10V2KX BC754-1
FBCD32 B7 N5 FBCA0
DQ0 A0
1
FBCD0 B7 N5 FBCA0 FBCD33 C6 N6 FBCA1
FBCD1 DQ0 A0 FBCA1 FBCD34 DQ1 A1 FBCA2 BC270
C6 DQ1 A1 N6 B6 DQ2 A2 M6
FBCD2 B6 M6 FBCA2 FBCD35 B5 N7 FBCA3
FBCD3 DQ2 A2 FBCA3 FBCD36 DQ3 A3 FBCA4
B5 N7 C2 N8
2
FBCD4 DQ3 A3 FBCA4 FBCD37 DQ4 A4 FBCA5 SCD1U10V2KX
C2 DQ4 A4 N8 D3 DQ5 A5 M9
FBCD5 D3 M9 FBCA5 FBCD38 D2 N9 FBCA6
FBCD6 DQ5 A5 FBCA6 FBCD39 DQ6 A6 FBCA7
D2 DQ6 A6 N9 E2 DQ7 A7 N10
FBCD7 E2 N10 FBCA7 FBCD40 K13 N11 FBCA8
FBCD8 DQ7 A7 FBCA8 FBCD41 DQ8 A8/AP FBCA9
K13 DQ8 A8/AP N11 K12 DQ9 A9 M8
FBCD9 K12 M8 FBCA9 FBCD42 J13 L6 FBCA10
FBCD10 DQ9 A9 FBCA10 FBCD43 DQ10 A10 FBCA11
J13 DQ10 A10 L6 J12 DQ11 A11 M7
FBCD11 J12 M7 FBCA11 FBCD44 G13
FBCD12 DQ11 A11 FBCD45 DQ12
G13 DQ12 G12 DQ13 CS# N2 FBCCS0# 15
FBCD13 G12 N2 FBCCS0# FBCD46 F13 M2
FBCD14 DQ13 CS# FBCD47 DQ14 RAS# FBCRAS# 15
F13 M2 FBCRAS# F12 L2
FBCD15 DQ14 RAS# FBCD48 DQ15 CAS# FBCCAS# 15
2 F12 L2 FBCCAS# F3 L3 2
FBCD16 DQ15 CAS# FBCD49 DQ16 WE# FBCWE# 15
F3 L3 FBCWE# F2
FBCD17 DQ16 WE# FBCD50 DQ17
F2 DQ17 G3 DQ18
FBCD18 G3 FBCD51 G2 C4
FBCD19 DQ18 FBCD52 DQ19 NC
G2 DQ19 NC C4 J3 DQ20 NC C11
FBCD20 J3 C11 FBCD53 J2 H4
FBCD21 DQ20 NC FBCD54 DQ21 NC
J2 DQ21 NC H4 K2 DQ22 NC H11
FBCD22 K2 H11 FBCD55 K3 L12
FBCD23 DQ22 NC FBCD56 DQ23 NC
K3 DQ23 NC L12 E13 DQ24 NC L13
FBCD24 E13 L13 FBCD57 D13 M3
FBCD25 DQ24 NC FBCD58 DQ25 NC
D13 DQ25 NC M3 D12 DQ26 NC M4
FBCD26 D12 M4 FBCD59 C13 N3
FBCD27 DQ26 NC FBCD60 DQ27 NC
C13 DQ27 NC N3 B10 DQ28
FBCD28 B10 FBCD61 B9 L9
FBCD29 DQ28 FBCD62 DQ29 RFU1
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
B9 DQ29 RFU1 L9 C9 DQ30 RFU2 M10
FBCD30 FBCD63
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSS THERMAL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K4D263238E-GC36
G10
D10
D11
H10
E10
B11
K10
F10
L10
J10
G6
G7
G8
G9
G5
H6
H7
H8
H9
D4
D5
D6
D9
H5
E5
E7
E8
K6
K7
K8
K9
B4
E6
E9
K5
F6
F7
F8
F9
F5
L5
J6
J7
J8
J9
J5
K4D263238E-GC36 Modify-0602
G10
D10
D11
H10
E10
B11
K10
F10
L10
J10
G6
G7
G8
G9
G5
H6
H7
H8
H9
D4
D5
D6
D9
H5
E5
E7
E8
K6
K7
K8
K9
B4
E6
E9
K5
F6
F7
F8
F9
F5
L5
J6
J7
J8
J9
J5
Modify-0602
1 1
Title
BC277 BC276 BC278 BC248 BC214 BC249 BC279 BC222 BC316 BC305 BC303 BC300 BC229 BC234
SCD01U50V3KX SCD01U50V3KX VGA VRAM (DDR)
78.10324.2B1 Size Document Number Rev
2
-1
SCD1U10V2KX SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX SCD1U10V2KX
SCD1U10V2KX SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX
SCD1U10V2KX SCD1U10V2KX
Custom
Gannet
Date: Thursday, December 04, 2003 Sheet 18 of 51
A B C D E
A B C D E
2D5V_S0
2D5V_S0 TV_2D5V_S0
R847 5V_S0 3D3V_S0
6,8,9,10,16,20,23,24,25,31,48,50 2D5V_S0
1 2 3D3V_S0
2,3,8,9,10,11,14,16,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
DUMMY-R2 C605
C600 C614 C602 C606 C611 5V_S0
SCD1U16V
SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2,21,22,23,24,25,26,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
SCD1U16V
4 4
3D3V_S0 3D3V_S0
1
R807 R811
10KR3F 10KR3F
2
ADDR CONF_XLT
1
R808 R810
10KR3F 10KR3F
3 U95 3
51 PD15 VSYNC 22 DP0_VSYNC 9
50 23
2
ADDR 53 49
ADDR GND
GND 62
4K64R3F 1 R813 2 1622_DE 29 TV_2D5V_S0
10KR2 DE
C603
1 R823 2 1622_TESTMODE 54 TESTMODE COMP 6 1622_COMP
10KR2
2
Dummy-VT1622M
ZZ.01622.00G SCD1U16V
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VT1622-TV Encoder
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 19 of 51
A B C D E
A B C D E
1D5V_S0
2D5V_S0 LVDS_2D5V_S0
2,9,10,14,16,49 1D5V_S0
R384
2D5V_S0
1 2
6,8,9,10,16,19,23,24,25,31,48,50 2D5V_S0
DUMMY-R2 3D3V_S0
DUMMY-SRN0 U47
LVDS_2D5V_S0
2,3,8,9,10,11,14,16,19,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
4K7R2
4 12 1631_PRE 1 R333 2 4
R624 DUMMY-R3 1631_DE PRE
76 DE RESV1 13
1 2 LD16 CLK 87 19
9,14 AGP_AD18 CLKINP RESV2
CLK_N 88 20
HS CLKINM NC
RN83 75 24
LD12 VS HSYNC NC
9,14 AGP_ADSTB1# 1 8 74 VSYNC NC 54
2 7 VS C274 C277
9,14 AGP_DEVSEL#
3 6 HS LD0 94 58
9,14 AGP_FRAME# D0 GPIO1-1
4 5 CLK_N SCD1U16V LD1 93 56
9,14 AGP_WBF# D1 GPIO2-1
SCD1U16V LD2 92 57
LD3 D2 GPIO1-2
DUMMY-SRN0 91 55
LD4 D3 GPIO2-2
RN88 90 62
D4 RESV3
9,14 AGP_ADSTB0 1 8 LD2 A0 63
9,14 AGP_ADSTB0# 2 7 LD4 LD5 89 D5 A1 64
9,14 AGP_AD10 3 6 LD1 LD6 86 D6 A2 65
9,14 AGP_AD11 4 5 LD23 LD7 85 D7 RESV4 66
LD9 84 3D3V_S0
LD8 D8 1631_I2CSEL R358 1 4K7R2
DUMMY-SRN0 83 61 2
D9 I2CSEL 1631_I2CCLK R356 1 4K7R2
RN92 59 2
I2CCLK
9,14 AGP_AD5 1 8 LD7 LD10 82 D10 DSEL/I2CDAT 60 1631_I2CDAT R357 2 4K7R2
1
9,14 AGP_AD6 2 7 LD6 LD11 81 D11
9,14 AGP_AD7 3 6 LD5 LD12 8 D12 TST1 72
9,14 AGP_C/BE#0 4 5 LD3 LD13 7 D13 TST2 73
LD14 6 18 1631_R_FB R3321 4K7R2
2
D14 R_FB 1631_PDB R3171 4K7R2
DUMMY-SRN0 22 2
LD15 PDB 1631_DUAL R3152 4K7R2
RN93 5 23 1
D15 DUAL
9,14 AGP_AD1 1 8 LD11 LD16 4 D16 MSEN 21 1631_MSEN R3301 4K7R2
2 5/15
2 7 LD9 1D5V_S0 LD17 3 R314 1 4K7R22
9,14 AGP_AD0
3 6 LD10 LD18 2
D17
41 Remove the 5V_S0 C701~705
9,14 AGP_AD3 D18 CLK1P TXACLK+ 14,22
3
9,14 AGP_AD4 4 5 LD8 LD19 1 D19 CLK1M 42 TXACLK- 14,22 and 3D3V_S0 C693~C695 3
Dummy-VT1631
ZZ.V1631.00G
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VT1631-LVDS Transmitter
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 20 of 51
A B C D E
A B C D E
5V_S0
14
1R2
U97
1
L1 BLM11B750S
2 3 HSYNC_5 1 2 JVGA_HS 5 4 CRT_G R854 R4 CRT1
9,14 VGA_HSYNC 2K2R3 2K2R3 BC4
10KR3
U57A 68.00082.051 CRT_R 6 3 SCD01U50V3KX 16
TSAHCT125
2
14
4
7 2
2
L55 BLM11B750S
5 6 VSYNC_5 1 2 JVGA_VS 8 1 CRT_B 6
9,14 VGA_VSYNC
40 CRT_IN# 11
U57B CRT_R 1
TSAHCT125 BC398 BC18 BC399 BC17 PACDN009 7
SC47P SC47P SC3P50V2CN SC3P50V2CN 69.48001.001 12
7
9,14 VGA_DDCDAT_3
CRT_G 2
8
BCB15 JVGA_HS 13
SC47P CRT_B 3
CRT_VCC 9
JVGA_VS 14
4
10
9,14 VGA_DDCCLK_3 15
5
PUT SC47P FOR 3 68.00082.051
L53 BLM11B750S ADD for EMI BCB14
3 BYPASS Cap. 1 2 CRT_R SC47P 3
9,14 VGA_RED
17
L56 BLM11B750S
1 2 CRT_G D48 D52
9,14 VGA_GREEN
2 5V_S0 2 5V_S0
L54 BLM11B750S FOX-CONN15-1-U
1 2 CRT_B VGA_DDCCLK_33 VGA_DDCDAT_33 Modify-0602
9,14 VGA_BLUE
1
BC1 1 1
R851 R852 R853 BC404 BC3 SC3P50V2CN
75R3F 75R3F 75R3F BC403 SC47P SC3P50V2CN BAV99LT1 BAV99LT1
BC401 SC47P BC2 83.00099.01A
SC47P SC3P50V2CN
2
3D3V_S0
2,3,8,9,10,11,14,16,19,20,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
2 2
TV CONN
EMI
EC39
SCD1U16V
68.1R220.1N1 1
R809 BC349 BC351
75R3F SC100P50V2JN SC270P50V BAV99LT1
TV1 83.00099.01A
2
8
3
2
5
L51 7
IND-1D2UH MH1
1 2 COMP_B 6
14,19 VGA_COMP_B
2
1
4
R814 BC352 BC362 9 EMI
75R3F SC100P50V2JN SC270P50V
MINDIN7-8 EC38
2
J8-SC SCD1U16V
2
1
BC361 DUMMY-SC47P
change new TV1 1
D53
ZZ.47034.1B1 2 3D3V_S0
14,19 CRMA 1
L52
2 TV_CRMA 3 Wistron Corporation
IND-1D2UH 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 21 of 51
A B C D E
A B C D E
INVERTER/LED
1 2 2,3,8,9,10,11,14,16,19,20,21,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
R869 10KR3 U54D 5V_S0
14
U8A Layout trace 20 mil
14
1
14 BL_ON 12 2,19,21,23,24,25,26,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
11 FPBACK_1 DCBATOUT
13 2 3 STDBY_LED#_INV 3D3V_S5
TSLCX08-U
40 BACKLT_OFF# 23,24,25,27,29,34,37,43,45,48,50,51 3D3V_S5
1
TSLCX125 +5V_UP_S5 BC373 BC371
7
3D3V_S3
7
4 4
1 2 INV1 SCD1U50V5KX SC10U35V0ZY-U
40 CHARGE_LED#
J8-SC 31
2
10,28,34,37,48 3D3V_S3
DB1 S1N4148 5V_S0
07-03 BC354 DCBATOUT
J8-SD 37,43 AC_IN 2 1
1
3D3V_S0 SCD1U BC376
G
DUMMY Q1 DUMMY-2N7002 Q1 4 3 SC1U10V3ZY
3D3V_S3 27,44,45,46,47,48,49 DCBATOUT
UB2 Low enable. 2 3 6 5
1 5 1 2 CHARGER_LED_EN# 8 7
A VCC 44 CHARGE_LED
R941 0R3-U MEDIA_LED#
D
34,37 LID# 2 B 10 9
3 4 FPBACK 12 11
GND Y 37 NUM_LED#
NC7SZ08-1
37 CAP_LED#
FPBACK 1 2 FPBACK_2
14
16
18
13
15
17
80211_LED#
1
TOP VIEW 29
20 19 PWR_LED#_INV
D47
RB11 10KR3 22
24
21
23
STDBY_LED#_INV
INV CONN
37 BRIGHTNESS (LED USE) 3D3V_S0
40 DR0#_5 1 6 MEDIA_LED# 26 25 2 30
1
BC355 BC356 BC357 BC358 28 27
30 29 BC390
2 5 BC360 SC100P50V2JN BC381 BC384 SC100P50V2JN
26 HDD_LED#_5
SCD1U SC100P50V2JN SC100P50V2JN 32 BC395 BC377 SC100P50V2JN SC100P50V2JN
2
SC100P50V2JN SCD1U SCD1U
3 4 3D3V_S0 ETY-CONN30D-U
26 CDROM_LED#_5
1
83.R2002.08E 20.F0322.030
RB731U BC359
SC100P50V2JN
1
3D3V_S0 3D3V_S3 3D3V_S5
2
R963 R969
3 47KR2 10KR2 1 2 3
1
1
2
DUMMY-R3 80211_ACTIVE 33
U15B U65C Q72
14
14
0R3-U
3
D R923 5 1
VCC A RF_LED# 40
PWRLED_COMP 4 1 1 2 2 80211_ACTIVE#
2
PWR_LED_INV B
6 5 6 PWR_LED#_INV 80211_LED# 4 3
2
G 34 80211_LED# Y GND
PWRLED_ON 5 S DUMMY-R2
2
2N7002
2
TSLCX08-U TSLCX14-U J8-SD SN74LVC1G32DCKR
73.01G32.L02
7
3D3V_S0
Layout trace 20 mil 3D3V_S0
2
TOP VIEW 40
RN1
LCD CONN
2
F2
1
2
8
7
PL_ID0
PL_ID1 LCDPOWER_S0 LCD CONN
PL_ID2 1 39
LCD POWER MINISMDC110-U 3 6
4 5 PL_ID3
K3D-SC
Layout trace 20 mil SRN10K LCD1 BC372 BC348 BC347
1
BC346 42
U93 LCDPOWER_S0 J8-SD SC10U10V6ZY-U SCD1U SCD1U
SI3445DV for SIV panel pwr on sequence 1 2 78.10693.4I1
2 2
SC1U10V3ZY
6 1 2 VCCLCD 3 4
LCDVDD_S0 4 5 R806 Discharge circuit 5 6
D
2 47R3 7 8
S
15 16
14
TXAOUT2+ 14,20
DUMMY-C3 31 32 TXAOUT2- 14,20
33 34 TXAOUT1+ 14,20 ODD CHANNEL
35 36 TXAOUT1- 14,20
37 38
1
TXAOUT0+ 14,20
3D3V_S5 39 40 TXAOUT0- 14,20
P22_1 1 2 41
BLINK_LED# 24
R904 0R2-0
14
J8-SC:for J8 SYN-CONN40A-U
U8B R906 0R2-0 20.F0312.040
1 2 P22_2 5 6 P22_5 1 2 STDBY_LED#_1
37 STDBY_LED#
R905 0R2-0 3D3V_S5
TSLCX125 1 2 STDBY_LED#_2 34
1 1
R907 DUMMY-R2 P22_5 1 2 K38V PANEL ID SETTING
7
R937 100KR2
3D3V_S5 P22_6 PL_ID2 PL_ID1 PL_ID0
P22_4 1 2 BLINK_LED#
1
R938
2
100KR2 Wistron Corporation
R909 0R2-0 15 XGA 0 0 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
14
10
3D3V_S0 3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
1
1
CB1 CB2 C66 C84 C47 C48 3D3V_S5
C79 3D3V_S0
SCD1U50V3KX (BOT) SCD1U50V3KX (BOT) SC1U16V3KX SC1U16V3KX SCD1U50V3KX SCD1U50V3KX SC4D7U10V6MX-U1
22,24,25,27,29,34,37,43,45,48,50,51 3D3V_S5
2
2
5V_S0
Modify-0602
2,19,21,22,24,25,26,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
W10
W11
W17
W18
W19
W21
H10
H11
H12
R19
U19
V19
V21
Y21
T19
3D3V_S0
W9
W8
2D5V_S0
M8
H9
N8
R8
U8
K8
P8
V8
T8
L8
J8
U58A
P_AD0 G2 MLB-201209-11
6,8,9,10,16,19,20,24,25,31,48,50 2D5V_S0
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
4 P_AD1 AD0 USBVDD L27 4
J4 AD1 USBVDD A22 1 2
P_AD2 J3 B22
AD2 USBVDD
1
3D3V_S0 3D3V_S0 P_AD3 H3 C22 C313 C300 C305
P_AD4 AD3 USBVDD SC4D7U10V6MX-U1
F1 AD4 USBVDD D22
RN15 RN17 P_AD5 G1 E22 SCD1U50V3KX SCD1U50V3KX
AD5 USBVDD
1 8 P_INTA# 1 8 P_DEVSEL# P_AD6 H4 F22
2
AD6 USBVDD
2 7 P_INTB# 2 7 P_TRDY# P_AD7 F2 AD7 USBVDD J13 Modify-0602
3 6 GPIO14 3 6 P_IRDY# P_AD8 E1 AD8 USBVDD J14
4 5 GPIO15 4 5 P_FRAME# P_AD9 G3 J15 2D5V_S0
P_AD10 AD9 USBVDD
E3 AD10 USBVDD J16
SRN4K7 SRN4K7 P_AD11 D1 J17
AD11 USBVDD
P_AD12 G4 AD12 USBVDD J18 Modify-0602
RN53 RN58 P_AD13 D2
P_GNT#5 P_STOP# P_AD14 AD13 C311
1 8 1 8 D3 AD14
2 7 P_REQ#5 2 7 P_GNT#1 P_AD15 F3 SCD01U50V3KX
P_REQ#4 P_GNT#3 P_AD16 AD15 2D5V_S0
3 6 3 6 K3 AD16
4 5 P_GNT#4 4 5 P_INTF# P_AD17 L3 C24
P_AD18 AD17 USBSUS25 MLB-201209-11
K2 AD18
SRN4K7 SRN4K7 P_AD19 K1 USBVCCA L37 1 2
P_AD20 AD19
M4 AD20 PLLVDDA A23
1
RN59 RN16 P_AD21 L2 B23 C314 C301 CB3
P_INTE# P_GNT#0 P_AD22 AD21 PLLVDDA SC4D7U10V6MX-U1
1 8 1 8 N4 AD22
P_SERR# P_REQ#1 P_AD23 SCD1U50V3KX MLB-201209-11 SCD1U50V3KX
2
3
7
6 P_REQ#3
2
3
7
6 P_REQ#0 P_AD24
L1
M2
AD23 USB PLLGNDA D23
C23 USBGNDA L28 1 2
2
AD24 PLLGNDA
4 5 P_PERR# 4 5 P_INTC# P_AD25 M1 AD25
Modify-0602
P_AD26 P4 E20 USBP0+ 1 R253 2 22R2
AD26 USBP0+ USBP0P 33
SRN4K7 SRN4K7 P_AD27 N3 D20 USBP0- 1 R254 2 22R2
AD27 USBP0- USBP0N 33
3D3V_S0 P_AD28 N2 A20
AD28 USBP1+ USBP1P 28
P_AD29 N1 B20
AD29 USBP1- USBP1N 28
RN60 P_AD30 P1 E18
29,31,33 P_AD[31..0] AD30 USBP2+ USBP2P 28
1 8 P_INTD# P_AD31 P2 AD31 USBP2- D18 USBP2N 28
3 2 7 P_REQ#2 USBP3+ A18 USBP3P 28 3
6 P_GNT#2 P_C/BE#0
3
4 5 P_C/BE#1
E2
C1
CBE0 PCI USBP3- B18
D16
USBP3N 28
CBE1 USBP4+ USBP4P 28
P_C/BE#2 L4 E16
29,31,33 P_C/BE#[3..0] CBE2 USBP4- USBP4N 28
SRN4K7 P_C/BE#3 M3 A16
CBE3 USBP5+ USBP5P 28
USBP5- B16 USBP5N 28
P_FRAME# J1 D14 USBP6P
29,31,33 P_FRAME# FRAME NC
P_DEVSEL# H2 E14 USBP6N
29,31,33 P_DEVSEL# DEVSEL NC
0507-03' 29,31,33 P_IRDY#
P_IRDY#
P_TRDY#
J2
H1
IRDY NC A14
B14
USBP7P
USBP7N
3D3V_S0
29,31,33 P_TRDY# TRDY NC
To VT8235 Bug. PCIRST#_2 1
R557
2 SB_PCIRST#
29,31,33 P_STOP#
P_STOP#
P_SERR#
K4
C2
STOP USB3_OC# 1
RP3
10
VT8237 unknow 29,31,33 P_SERR#
29,31,33 P_PAR
P_PAR F4
SERR
PAR USBOC0 C26 USB0_OC# USB2_OC# 2 9 USB6_OC# EMI
DUMMY-R2 P_PERR# C3 D24 USB1_OC# USB1_OC# 3 8 USB7_OC#
29,33 P_PERR# PERR USBOC1
SB_PCIRST# R1 B26 USB2_OC# USB0_OC# 4 7 USB4_OC# EC20
PCIRST USBOC2 USB3_OC# USB5_OC# SCD1U16V
USBOC3 C25 5 6
3D3V_S0 P_INTA# A4 B24 USB4_OC# 3D3V_S0
9,14 P_INTA# P_INTB# INTA USBOC4
B4 A24 USB5_OC# SRP4K7
6,25,50 PWROK_SB 31 P_INTB# P_INTC# INTB USBOC5
B5 A26 USB6_OC#
31 P_INTC# INTC NC
U54C P_INTD# C4 A25 USB7_OC#
14
31 P_INTD# INTD NC
P_INTE# D4 Layout trace 15 mil
29 P_INTE# INTE
1 2 PWROK_SB_0 9 33 P_INTF#
P_INTF# E4 INTF USBCLK E23 CLK48_USB 3
R551 0R2-0 8 PCIRST#_1 GPIO14 A3
SB_PCIRST# 1 PCIRST#_0 10 GPIO15 INTG USBREXT R285 1
2 B3 INTH USB REXT B25 2 USBREXTB 1 2 USBP6P 1 2
RB9 33R3 TSLCX08-U MAYBE DUMMY 5K11R3F R284 1K02R3F R282 15KR3
P_REQ#0 A5 D26 SB_TP112 TP137 USBP6N 1 2
P_REQ#1 REQ0 NC SB_TP113 TP135 R281 15KR3
B6 D25
7
14
RSTDRV#_5 26
RN29
TSAHCT14 KA20G 1 8
TSAHCT14 VT8235-CE MSCK
H23
C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21
H13
H14
H15
H16
H17
H18
A13
A15
A17
A19
A21
B13
B15
B17
B19
B21
E13
E15
E17
E19
E21
F25
2 7
J21
J25
A1
A2
B1
B2
E8
MSDATA 3 6
7
KBRC 4 5
3D3V_S0 SRN4K7
3D3V_S0
BC139 U37C
14
14
SCD1U16V3KX U37D
U35A 3D3V_S5
4
3D3V_S0 TSLCX74
5 Q 14
PR
3D3V_S0 VCC
D 2
14
CL
PCIRST_BUF GND
11 10 13 12 1 2 PCIRST_BUF# 14,19,29,31,33,34,37,39,40,42 U18
1 5 R123
OE VCC
1
1
24 PM_SUSCLK A
TSLCX14 TSLCX14 R967 SB_32KHZ
47R2
3 GND Y 4 1 2 CLK32_G768 27
Wistron Corporation
7
2D5V_S0 3D3V_S5
NC7SZ126-U R300 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
U46 1 2 SUS_PCIRST# 37 Taipei Hsien 221, Taiwan, R.O.C.
1 5
2
26 PIDE_D[0..15] 3D3V_S0
RN37
PIDE_D14 1 8 PD14 3D3V_S5
2 7 PIOR#
26 PIDE_IOR# 2D5V_S0 3D3V_S5 PCISTP#
3 6 PDACK# 2D5V_S5 3D3V_S5 VBAT 1 R13 2 4K7R3
26 PIDE_DACK#
4 5 PDA_1 PWROK_NB# 1 R116 2 10KR3
26 PIDE_A1
SRN33 6509_T8 R692 1 2 100KR3 PM_CPUSTP# 1 R18 2 4K7R3
RN38 BATLOW# 1 R553 2 10KR3
PIDE_D4 1 8 PD4 J8-SD R696 1 2 DUMMY-R3 P_SERIRQ 1 R19 2 4K7R3
PIDE_D3 2 7 PD3 PME#_SB 1 R224 2 10KR3
M18
AA4
AB4
AB5
AB6
N18
R18
U18
P18
V10
V11
V12
V13
V14
V15
V16
V17
V18
T18
L18
J10
J11
J12
PIDE_D2 PD2 TEST_OUTPUT 1 R709 2 4K7R3
M9
N9
R9
U9
U4
3 6
K9
P9
V9
T9
T4
L9
J9
4 5 PIOW# U58B ECSWI# R701 1 2 4K7R3 PM_SUS_STAT#1 R220 2 10KR3
26 PIDE_IOW# SPKR_SB
SRN33 PD0 AA22 1 R11 2 4K7R3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSUS33
VSUS33
VSUS33
VSUS33
VSUS25
VSUS25
PDD0
RN63 PD1 Y24 PDD1
Modify-0605 PM_SUSCLK 1 R171 2 10KR3
4 PIDE_D7 1 8 PD7 PD2 AA26 SDCS1# 1 R710 2 4K7R3 4
PIDE_D8 PD8 PD3 PDD2 BLINK_LED#
2 7 AA25 PDD3 1 R706 2 10KR3
PIDE_D10 3 6 PD10 PD4 AB26 T1 PDCS1# 1 R221 2 4K7R3
PDD4 ACBITCLK AC97_BITCLK_SB 35
PIDE_D5 4 5 PD5 PD5 AC26 U3 AC97_DIN0 SMBALT# 1 R617 2 10KR3
PDD5 ACSDIN0 AC97_DIN0 34,35
SRN33 PD6 AC23 V2 AC97_DIN1 PDACK# 1 R597 2 4K7R3
PDD6 ACSDIN1 AC97_DIN1 28,33
RN48 PD7 AD25 U1 AC97_DIN2 GPO0 1 R187 2 4K7R3
PIDE_D12 PD12 PD8 PDD7 ACSDIN2 MP3BT_ON# SXI 1 R22 2 4K7R3
PIDE_D9
1
2
8
7 PD9 PD9
AD26
AC24
PDD8 AC97 ACSDIN3/SLP_BTN V3
T2 AC_SYNC R235 1 2 0R2-0
MP3BT_ON# 25,43 RI#_SB 1 R215 2 4K7R3
PDD9 ACSYNC AC97_SYNC 28,33,34
PIDE_D6 3 6 PD6 PD10 AC25 U2 AC_SDOUT R230 1 2 0R2-0 SOE# 1 R25 2 4K7R3
PDD10 ACSDO AC97_DOUT 28,33,34
4 5 IRQ14R PD11 AB24 T3 AC_RESET# R241 1 2 0R2-0 SUSA# 1 R198 2 4K7R3
26 PIDE_IRQ14 PDD11 ACRST AC97_RST# 28,33,34
SRN33 PD12 AB23 MP3BT_ON# 1 2
RN50 PD13 PDD12 GPO1
AA24 PDD13 1 R101 2 4K7R3
1 8 PDRDY PD14 Y26 W4 PME#_SB R214 DUMMY-R3
26 PIDE_IORDY PDD14 PME PME#_SB 29,31,33,42
2 7 PDA_2 PD15 AA23 V4 BATLOW# R562 1 2 0R3-U PM_THRM# 1 R607 2 4K7R3
26 PIDE_A2 PDD15 BATLOW EM_OFF 6
3 6 PDREQ Y1 CPUMISS
26 PIDE_DREQ CPUMISS MP3PWR_ON# 1 R615
PIDE_D1 4 5 PD1 PDREQ Y23 Y2 RI#_SB 2 10KR3
PDDREQ RING RI#_SB 31
SRN33 PDACK# V24 Y3 PM_SUS_STAT#
PDDACK SUSST1 PM_SUS_STAT# 9,14
RN49 PIOR# W26 Y4 PM_THRM# SMBCK2 2 R157 1 4K7R3
PIDE_D15 PDIOR AOLGP/THRM PM_THRM# 27
1 8 PD15 PIOW# Y25 AA1 ECSMI#
PDIOW EXTSMI ECSMI# 37
PIDE_D13 2 7 PD13 PDRDY Y22 AB1 SMBALT# SMBDT2 2 R671 1 4K7R3
PIDE_D0 PD0 PDCS1# PDRDY SMBALRT ECSCI#
3 6 V22 PDCS1 LID AC1 ECSCI# 37
PIDE_D11 PD11 PDCS3# PM_PWRBTN#
4 5
SRN33 PDA_0
V23
W23
PDCS3 IDE PWRBTN AD2
AF1 PWROK_NB#
PM_PWRBTN# 43
Modify-0605
PDA0 PWROK PWROK_NB# 6,9 ECSCI#
RN26 PDA_1 P_CLKRUN# 1 R138 2 10KR3
1 8 PDA_0 PDA_2
V25
W24
PDA1 PMU CLKRUN AB7
AC7 PM_CPUSTP# P_CLKRUN# 33,40
26 PIDE_A0 PDA2 CPUSTP ECSMI#
2 7 PDCS3# IRQ14R AD24 AD6 PCISTP# 1 R609 2 10KR3
26 PIDE_CS#1 IRQ14 PCISTP PCISTP# 3
3 6 PDCS1#
26 PIDE_CS#0 CPUMISS
4 5 SD0 AC20 AE1 6509_T8 2 R594 1 4K7R3
SDD0/TBC1 INTRUDER 6509_T8 27
SRN33 SD1 AB20 J8-SD
SD2 SDD1/VALID PM_SUSCLK AC97_DIN1
3 AC21 SDD2 SUSCLK AB3 PM_SUSCLK 23 1 R219 2 4K7R3 3
SD3 AE18
26 SIDE_D[0..15] SDD3/RXD2 AC97_DIN2
RN41 SD4 AF18 AC4 SMBCK1 1 2 1 R222 2 4K7R3
SDD4/RXD3 SMBCK1 SMBDT1 SMBCK 25 3D3V_S0
SIDE_D6 1 8 SD6 SD5 AD18 AB2 0R2-0
1 R657
2
SDD5/RXD4 SMBDT1 SMBDT 25
SIDE_D1 2 7 SD1 SD6 AD19 0R2-0 R651 MLB-201209-11 P_CLKRUN# 1 R197 2 4K7R3
SIDE_D5 SD5 SD7 SDD6/RBC0 SMBCK2 A33VDD L18
3 6 AF19 SDD7/RBC1 SMBCK2 AC3 1 2
26 SIDE_DREQ 4 5 SDDREQ SD8 AE20 SDD8/RXD5 SMBDT2 AD1 SMBDT2 TEST_VT8235 1 R708 2 4K7R3
1
SRN33 SD9 AF20 C31
RN64 SD10 SDD9/RXD6 SUSA# SC4D7U10V6MX-U1
AD20 SDD10/RXD7 SUSA AA2
1 8 SDRDY SD11 AE21 AD3 SB_SUSB# R128 1 2 0R3-U
26 SIDE_IORDY SIDE_D3 SDD11/RXD8 SUSB SUSB# 50
2 7 SD3 SD12 AF21 AF2 SB_SUSC# R714 1 2 0R3-U
2
SDD12/RXD9 SUSC SUSC# 50
SIDE_D4 3 6 SD4 SD13 AD21
SIDE_D7 SD7 SD14 SDD13/TXD0 ECSWI#
4 5 AD22 SDD14/TXD1 GPI0 AE2 ECSWI# 37
SRN33 SD15 AF22 AC2 MP3PWR_ON#
SDD15/TXD2 GPI1 MP3PWR_ON# 43
RN68 AA3 GPO0 R911 1 2 0R3-0-U
GPO0 BLINK_LED# 22
SIDE_D8 1 8 SD8 SDDREQ AD17 AE3 GPO1
SDDRQ/RXD1 NC
SIDE_D9
SIDE_D11
2
3
7
6
SD9
SD11
SDACK# AD23
SIOR# AF23
SDDACK/TBC0
SDIOR/TXD4
SA17
SA18
AE5
AD5
GPIOA
GPIOB
J8-SC:for Annie
Power Up Strappings
SIDE_D12 4 5 SD12 SIOW# AE23 AF5 GPIOC
SRN33 SDRDY AF17 SDIOW/TXD3 SA16 GPIOD
SDRDY/RXD0 SA19 AC6 GPIO[A,C]==>LDT Frequency
RN70 SDCS1# AF25
SIDE_D15 SD15 SDCS3# AF26 SDCS1/TXD8 P_SERIRQ
00--> 200MHz (Default)
1 8 SDCS3/TXD9 SERIRQ AD9 P_SERIRQ 31,34,37,40,42
2 7 SIOW# SDA_0 AF24 AF8 SPKR_SB
26 SIDE_IOW# SIOR# SDA0/TXD6 SPKR SPKR_SB 35
SDA_1 AC22 SIO_OSC GPIOB==>LDT Width
26 SIDE_IOR# 3
4
6
5 SDA_2 SDA_2 AE24 SDA1/TXD5 Hardware Trap OSC AB8 SIO_OSC 3
0--> 8 Bit (Default)
26 SIDE_A2 SDA2/TXD7 TEST_OUTPUT
SRN33 IRQ15R AE26 AF9
RN45 IRQ15 TPO TEST_VT8235
TEST AE9 SDA2==>ROMSIP Select
SIDE_D13 1 8 SD13 AC19 NC PDA2==>ROMSIP Select [for VT8237]
SIDE_D2 2 7 SD2 R76 360R3F
NC AC10 A0VDD
2
SIDE_D10 3 6 SD10 1 2AB21_NC
AB21 0--> Disable (default) 2
SIDE_D0 SD0 NC GPIOA R7031
4 5 NC AB10 2 4K7R2
SRN33 AB13 SDCS3#==> Test Mode Select
RN47 NC GPIOC
AC13 NC NC AD11 SREXT R7041 2 4K7R2 PDCS3#==> Test Mode Select
1 8 IRQ15R
26 SIDE_IRQ15 0--> Disable (Default)
2 7 SDCS3# AF13 AE10 SOE# GPIOB R7021 2 4K7R2
26 SIDE_CS#1 SDACK# NC SOE
26 SIDE_DACK# 3 6 AE13 NC
4 5 SDCS1# AF10 SXI SDA_2 R7461 2 4K7R2 SDCS1#==>Internal EEPROM Strapping
26 SIDE_CS#0 ROMCS
SRN33 AB15
RN46 NC 1--> External EEPROM (Default)
AC15 NC NC AE11 A33VDD PDA_2 R1591 2 4K7R2
1 8 SDA_0 SEEDI ==>Internal EEPROM Strapping [for VT8237]
26 SIDE_A0
2 7 SDA_1 AF15 AF11 SDCS3# R7481 2 4K7R2 0--> External EEPROM (Default)
26 SIDE_A1 2D5VATS_S0 NC NC
SIDE_D14 3 6 SD14 AE15 NC PDCS3# R5631
4 5 GND W5 2 4K7R2 SXI==>LPC ROM Select
SRN33 W12 V5
5V_S0 NC GND GPIOD R91 1
1--> Enable LPC ROM (Default)
W13 NC GND M16 2 4K7R2
W14 NC GND N11 GPIOD==>Transmit PLL Skew Control 1 [0]
PIDE_IRQ14 R96 1 2 4K7R3 W15 N12 SDA_0 R7471 2 4K7R2
NC GND SDA0==>Transmit PLL Skew Control 2 [0]
W16 NC GND N13
SIDE_IRQ15 R47 1 2 4K7R3 N14 PDA_0 R5701 2 4K7R2 PDA0==>Transmit PLL Skew Control 2 [0]
GND
AC17 NC GND N15
PD7 R700 1 2 10KR3 AC11 N16 SDA_1 R48 1 2 4K7R2 SDA1==>External loop test mode [0]
NC GND
AB17 NC PDA1==>External loop test mode [for VT8237]
SD7 R75 1 2 10KR3 AB11 PDA_1 R5821 2 4K7R2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AC16NC
AC12NC
AB16 NC
AB12 NC
SOE#==>Auto Reboot
K18
L11
L12
L13
L14
L15
L16
R5
K5
P5
F6
F7
J5
3D3V_S5
2D5V_S0 VT8235-CE
2D5VATS_S0 2D5V_S0 Wistron Corporation
MLB-201209-11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MLB-201209-113D3V_S0
1
SC1U16V3KX SCD1U50V3KX C359 C373 C381 C64 C63 R118 5K1R3F R119 1K02R3F Title
1
SC4D7U10V6MX-U1 C12
VT8235-IDE_AC97_PMU
2
A3
Gannet -1
2
Modify-0602 Modify-0602
Date: Thursday, December 04, 2003 Sheet 24 of 51
A B C D E
A B C D E
2D5V_S0 3D3V_S0
Modify-0602
2D5V_S0 2D5V_S5 3D3V_S5
2,3,8,9,10,11,14,16,19,20,21,22,23,24,27,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
1
1
C68 C62 C67 C54 5V_S0
C56 C80
SC1U16V3KX SC1U16V3KX SCD1U50V3KX SCD1U50V3KX SCD01U50V3KX SCD01U50V3KX
2,19,21,22,23,24,26,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
2
M21
M22
M23
M24
M25
M19
N21
N22
N23
N24
N25
N26
N19
D12
K21
P22
P23
P24
P25
P26
P19
E12
E10
E11
L23
L21
L19
2D5V_S0
D9
E9
U58C
9 VLAD[0..7]
VLAD0 H25 6,8,9,10,16,19,20,23,24,31,48,50 2D5V_S0
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
MIISUS25
MIISUS25
MIIVCC
MIIVCC
MIIVCC
MIIVCC
VLAD1 VD0 SB_TP114 TP118
G26 VD1 MCRS A11
Layout trace 20 mil VLAD2 K26 B11 SB_TP115 TP129 3D3V_S5
2D5V_S0 VLAD3 VD2 MCOL
4 J23 VD3 4
VLAD4 F26 C11 SB_TP116 TP16
VD4 MTXENA 22,23,24,27,29,34,37,43,45,48,50,51 3D3V_S5
VLAD5 G25 A10 SB_TP117 TP117
VLAD6 VD5 MTXD0 SB_TP118 TP127 VBAT
K22 VD6 MTXD1 B10
1
1
UPCMD K23 A7 SB_TP137 TP113 3D3V_S5
2
2
9 UPSTB UPSTB NC
J24
VL_VREF is 0.625V 9 UPSTB# UPSTB
D11 SB_TP139 TP20
EECS SB_TP140 TP133
Cross SB as short as possible 9 DNSTB H26 DNSTB EEDO B12
H24 A12 SB_TP141 1 2 TP119 2D5V_S0
9 DNSTB# DNSTB EEDI
C12 SB_TP142 TP21 R458 0R2-0
EECK DPSLP R859 1 2 4K7R3
LPAR F24 E7 2D5SBRAM
9 LPAR VPAR RAMVCC SLP# R217 1 2 4K7R3
LVREFSB H22 J8-SC
VLREF GHI R868 1
3
RAMGND E6 2 4K7R3 3
R252 1 2 360R3F VCOMPP J22 VCOMPP
U24 FERR#
CLK66_VCLK FERR A20M# TP164 3D3V_S0
3 CLK66_VCLK L22 VCLK A20M U26
T24 IGNNE# TP2
IGNNE INT# TP147
INIT R26
TP9 SB_TP146 F23 T25 INTR TP148 LPC_LDRQ#0 R115 1 2 4K7R3
NC INTR NMI TP150
NMI T26
TP5 SB_TP149 G22 U25 SMI# TP152 TP_LDRQ#1 R99 1 2 4K7R3
NC SMI STPCLK# TP3
HOST STPCLK R24
V26 SLP# J8-SC GPI6 R752 1 2 4K7R3
34,37,39,40,42 LPC_LAD[3..0] SLP
LPC_LAD0 AD8 R22 GHI
LPC_LAD1 LAD0 GHI DPSLP FERR# R229 1
AF7 LAD1 DPSLP P21 1 2 HTT_STOP# 6,8 2 4K7R3
LPC_LAD2 R202 0R2-0
LPC_LAD3
AE7
AD7
LAD2 LPC AC9 PICD0 R545 1 2 330R3
LAD3 NC VIDSEL
VIDSEL AC8
AB9 VRDSLP PICD1 R225 1 2 330R3
VRDSLP GPI6
AGPBZ/GPI6 AD10
AF6 VIDSEL R750 1 2 4K7R3
34,37,39,40,42 LPC_LFRAME# LFRM
LPC_LDRQ#0 AE6
TP186 TP_LDRQ#1 LREQ0 VRDSLP R751 1
AE8 NC 2 4K7R3
TPAD30 PCICLK R23 CLK33_SB 3
LDRQ#0_OZ263 1 R935 2 4K7R3
PWROK_SB AC5 U23 APICCLK R216 1 2 33R3
6,23,50 PWROK_SB PWRGD APICCLK APICCLKSB 3
2D5V_S5 2D5V_S0 LDRQ#0_SIO 1 R936 2 4K7R3
RSMRST# AD4 R25 PICD0
27 RSMRST# RSMRST APICD0/APICCS
T23 PICD1 L32 1 2 MLB-201209-11 J8-SC
APICD1/APICACK
1
1
2 2
SCD1U50V3KXSCD01U50V3KX SCD1U50V3KX SCD01U50V3KX
SBX1 AE4 U22 C65
2
2
P11 GND
P12 GND
P13 GND
P14 GND
P15 GND
P16 GND
R11 GND
R12 GND
R13 GND
R14 GND
R15 GND
R16 GND
R21 GND
T11 GND
T12 GND
T13 GND
T14 GND
T15 GND
T16 GND
W22 GND
W25 GND
AA21 GND
AB19 GND
AB22 GND
AB25 GND
AC18GND
AE17 GND
AE19 GND
AE22 GND
AE25 GND
AA9 GND
AB18 GND
T21 GND
AA10 GND
K19 GND
RTCX2
1 2
X3 3D3V_S0
3 2 U98
J8-SD VT8235-CE
4 1
LPC_LDRQ#0 1 8
X-32D768KHZ-12-U COM VCC
2 INH Y1 7 LDRQ#0_OZ263 34
1
3 GND Y2 6 LDRQ#0_SIO 40
C32 C37 3D3V_S5 4 5
SC12P SC12P GND A MP3BT_ON# 24,43
2D5V_S5
2
1
SSLVC2G53DCUR
2D5V_S5
3D3V_S5
Layout trace 20 mil Pdiss(max)=1.2W
2
VBAT U39
1
R691 2
OUT
1
R694 R661 3
IN
1
BATVDD D44 2 BAT54 VBAT 10KR3 R698 R668
BC144
1
Modify-0602 10KR3 10KR3 4K7R3 4K7R3 APL1117 R444 BC145
SC1U10V3ZY
1
2
1 1
Q55
2
1
2
G
1
Wistron Corporation
2
1
BATVCC R755 SC4D7U16V6ZY-U SMBCK 3 2
2
I max = 666 mA R440 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G
3 SMBDT
24 SMBDT 3 2 SMBD_SB 3,11,30
Title
2
2
D
20.D0012.103 Q54
SMBUS in S) for SMBus 2.0 Size Document Number Rev
compliance 2N7002 A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 25 of 51
A B C D E
A B C D E
5V_S0
2,19,21,22,23,24,25,27,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
4 CDROM 4
HDD
IDE1
24 SIDE_D[15..0]
51
HDD1 2 1
35 CD_AUDR CD_AUDL 35
24 PIDE_D[15..0] 47
45 4 3 CD_AGND 35
SIDE_D8 6 5 RSTDRV#_5
44 43 SIDE_D9 8 7 SIDE_D7
23 RSTDRV#_5 PIDE_D7 PIDE_D8 SIDE_D10 SIDE_D6
42 41 10 9
PIDE_D6 40 39 PIDE_D9 SIDE_D11 12 11 SIDE_D5
PIDE_D5 38 37 PIDE_D10 SIDE_D12 14 13 SIDE_D4
PIDE_D4 36 35 PIDE_D11 SIDE_D13 16 15 SIDE_D3
PIDE_D3 34 33 PIDE_D12 SIDE_D14 18 17 SIDE_D2
PIDE_D2 32 31 PIDE_D13 SIDE_D15 20 19 SIDE_D1
PIDE_D1 30 29 PIDE_D14 22 21 SIDE_D0
24 SIDE_DREQ
3 PIDE_D0 28 27 PIDE_D15 24 23 3
24 SIDE_IOR#
26 25 26 25 SIDE_IOW# 24
24 PIDE_DREQ 24 23 24 SIDE_DACK# 28 27 SIDE_IORDY 24
22 21 TP11 TPAD30 BAY_ID0 30 29
24 PIDE_IOW# SIDE_IRQ15 24
1
20 19 TP10 TPAD30 BAY_ID1 32 31
24 PIDE_IOR# SIDE_A1 24
18 17 D27 34 33
24 PIDE_IORDY 24 SIDE_A2 SIDE_A0 24
24 PIDE_DACK# 16 15 B220LFA 24 SIDE_CS#1 36 35 SIDE_CS#0 24
24 PIDE_IRQ14 14 13 38 37 CDROM_LED#_5 22
24 PIDE_A1 12 11 K3D-SC 40 39 1 2
10 9 42 41 R259 4K7R3
2
24 PIDE_A0 PIDE_A2 24 5V_S0 5V_S0
24 PIDE_CS#0 8 7 PIDE_CS#1 24 44 43
22 HDD_LED#_5 6 5 46 45 R250
4 3 48 47 CSEL CDROM_CSEL 1 2
5V_S0 5V_S0
2
DASP# 50 49
1
2
2 1 C83 C85 C82 52 0R2-0
R513 BC49 BC61 BC45 TC7 D32 SCD1U16V SCD1U16V SCD1U16V
4K7R3 SC10U10V6ZY-U SCD1U 46 SCD1U ST47U6D3V-U1 78.10491.4F1 SPD-CONN50-4R-4U
F1J2F
48
2
5V_S0
1
1
R266
5V_S0 4K7R3
5V_S0 SIDE_IORDY
2
1
1
2 2
D31 D29
BC46 BC44
B220LFA B220LFA
1
SCD1U SC10U10V6ZY-U
R262
4K7R3
2
PIDE_IORDY
2
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDD / CDROM
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 26 of 51
A B C D E
A B C D E
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,28,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S5
22,23,24,25,29,34,37,43,45,48,50,51 3D3V_S5
Put these two Caps near the thermal diode.
5V_S0
2,19,21,22,23,24,25,26,28,30,32,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
R771
5V_S0 0R3-0-U 5V_G768_S0 THERMDP2 THERMDP1 VCC_CORE_S0
4 4
1 2 2,7,47 VCC_CORE_S0
3
BC247 1 BC264 DCBATOUT
BC205 BC317 SC470P50V3JN SC470P50V3JN
EC36 SCD1U DUMMY-SC10U10V6ZY-U Q20
22,44,45,46,47,48,49 DCBATOUT
SC1000P50V ZZ.10693.421 THERMDN MMBT3904-U
2
SYSTEM SENSOR
THERMDP1 THERMDP2
1
THERMDN THERMDN
5V_G768_S0 R772 R498
DUMMY-R3 10KR3
THERMDP1/DP2/THERMDN ON THE SAME LAYER
W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS U19
2
CAPS CLOSE TO G768B K3D-SB
2
VCC_FAN_1 1 16 G768D_OUT2 HW_THRM_SDN_EN#
OUT1 OUT2 Q45
2 VCC VCC 15
3
3 3 14 D 2N7002 3
6 THERMDP1 DXP1 SMBCLK SMBC_KBC 37,43
180 ms after VCC_G768 > 4.38v, p2, 7 6 THERMDN 4 DXN FG2 13 1 G768_RST#
THERMDP2 5 12 G
DXP2 SMBDATA SMBD_KBC 37,43
for EMI RUNPWROK 1 2 G768_RST# 6 11 S
50 RUNPWROK RESET# ALERT#
7 10 FAN_FB
2
14
10
GND FG1
1
R732 0R5 R180 4K7R3 8 9 U57C
VCC_FAN_1 GND CLK CLK32_G768 23
VCC_FAN 1 2
R181 9 8 HW_THRM_SDN
10KR3 G768D
BC289 74.00768.A79 TSAHCT125
PM_THRM# 24
SC1U10V3ZY
7
For Ni-MH Battery BL3 Soltion
1 2
DCBATOUT
K3D-SB R495
K3D-SC(STUFF) DUMMY-R3
1
MAX807_OUT 1 5
MAX807_VDD OUT NC U100_1
2 VDD 1 SET VCC 5 2U100_5 1 5V_G768_S0
3 VSS NC 4 2 GND
U100_3 3 4 R960 DUMMY-R2
OUT# HYST
1
1
S-80740SN-D4-U
2 2
RB1 BC14 R885
51KR3D DUMMY-SCD1U MAX6509HAUK-T-U
20KR3F
1
Gannet-1
2
2
2
R886
D43 0R2-0
R72
1 2 S1N4148 J8-SC
0R2-0 Put under CPU Socket
2
1
D18
5V_S0 1 2
45 QUICK_SDN#
3D3V_S5
J8-SD
K3D-SB DUMMY-RB751V-40 1 2 6509_T8 24
1
3D3V_S5 3D3V_S5
FAN1 R606 D22
FAN_FB 100KR3 U65A U65B
2
14
14
3 BAT54
2 VCC_FAN
1 THRM_SDN# THRM_SDN
1 2 3 4
2
RSMRST# 25
2
CON3-4
20.D0012.103 D37
S1N4148 BC68 BC70 BC113 BC30 TSLCX14-U TSLCX14-U
SC10U10V6ZY-U SCD1U SCD1U SCD1U
7
1 1
1
D D
HW_THRM_SDN SW_THRM_SDN
1
G G
1
Wistron Corporation
1
J8-SD
5V_USB1_S3 USB1
5V_USB2_S3 USB2 5
5 1
4
1
4
USBP4N TR3 USB_N_CON3 2
23 USBP4N
USBP1N TR4 USB_N_CON1 2 7
23 USBP1N L112UH
7 USBP4P USB_P_CON3 3
L112UH 23 USBP4P 68.03216.201
USBP1P USB_P_CON1 3
23 USBP1P 68.03216.201
Modify at 05-08 03' 4
4 6
6
1
USB_P_CON1 R842 1 2 15KR2 SKT-USB-19-U
2
1
SKT-USB-19-U 22.10218.701
22.10218.701 USB_N_CON1 R841 1 2 15KR2
4
1
3
1
SKT-USB-19-U
2
SKT-USB-19-U 22.10218.701
22.10218.701
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,29,31,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S3
DUMMY-R3
CN3 R589
35
1
1 2 BT_DETACH 33,40
3 4 R603
AUD_PHONE 33,35
1
32
USBP3P 23
13 14 USBP3N D
USBP3N 23
15 16 MDC_C_16 1 R576 2 0R3-0-U 1 Q46
2
40 BT_PWR_ON 2N7002
MDC_S3_1 17 18 AUD_AGND
2
BT_WAKEUP 33,40 G
19 20 S Bottom Side
21 22
2
AC97_SYNC 24,33,34
23 24 ACSDATAIN1_A 1 2
24,33,34 AC97_DOUT AC97_DIN1 24,33
25 26 ACSDATAIN1_B 1 2 0R3-U R574 22R3 CN8
24,33,34 AC97_RST#
3
27 28 R600 J8-SD
BT_LED_2 1 2 BT_LED_1 29 30 AC_BTCLK_MDC_C 1 2 L2 MLB160808
AC97_BITCLK 33,35
R890 DUMMY-0R3-0-U R596 0R3-0-U 1 TIP_MDC 1 2 TIP
TIP 30
1
1
AMP-CONN30A-1 DUMMY-C3 SC22P C694 C695
36
4
78.47593.411 ZZ.1021S.241 ZZ.1021S.241
2
2
1 1
1
3D3V_S0 R942
U101
Wistron Corporation
1
GND Y BT_LED# 34
R912 0R3-0-U Q70 Title
3
2N7002
D
USB / MDC I/F and LAN
2
SN74LVC1G32DCKR 1 BT_LED_2
G Size Document Number Rev
1
C533
1
BC221 BC273 BC204 BC257 BC228 C520 SCD1U10V2MX-1 BC287 BC157 BC159 BC231 C512 C71 C544 BC233 BC236
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY BC161 BC225 BC271 SCD1U10V2MX-1 SCD1U10V2MX-1SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC4D7U10V5ZY SC1U10V5KX
S.B. S.B. S.B. S.B. S.B. SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 S.B.
2
2
S.B. S.B. S.B.
2
1D2V_LAN_S5
4 L47 4
1D2V_LAN_S5 2D5V_LAN_S5
1
3D3V_LAN_S5 3D3V_LAN_S0 AVDDL_LAN 1 2 C666 C667 C668 C669
DUMMY-0R5 BIASVDD_LAN
3D3V_LAN_S0
R248 1 2 3D3V_LAN_S5
PLLVDD2_LAN 2D5V_LAN_S5 MLB-1608080600A SCD1U10V2MX-1 SCD1U10V2MX-1
PLLVDD3_LAN N29_1 N29_2 N29_3 N29_4
2
0R5 SCD1U10V2MX-1 SCD1U10V2MX-1
R246 1 2 3D3V_S0
M14
N14
H14
E12
K10
P12
P13
P14
A11
K12
K14
P11
A13
A14
F11
F14
F12
F13
L10
L12
L13
1
J10
J14
U72 R147 R148 R153 R154 R163 R164 R161 R162
G1
H5
H6
H7
H8
C5
N6
K5
K6
K7
K8
K9
P8
A7
B3
E1
E4
K3
P2
P7
L5
L4
J5
J6
J7
J8
J9
BCM5705: 3D3V_S0 BC163 C554
49D9R5F
49D9R5F
49D9R5F
49D9R5F
49D9R3F
49D9R3F
49D9R3F
49D9R3F
SCD1U10V2MX-1 SC1U10V5KX BCM4401
BCM4401: 3D3V_LAN_S5
VDDIO
VDDIO
VDDIO
VDDIO
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
AVDD
AVDD
BIASVDD
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDP
VDDP
VDDP
NC
XTALVDD
AVDDL
AVDDL
PLLVDD2
S.B. S.B.
2
Remove
Place RDAC CKT as close to chip as possible
2
A6 D10 RDAC 1 2 Place Register as close to chip as possible
24,31,33,42 PME#_SB PME_L RDAC
J2 R183 1K21R3F
23,33 P_PERR# PERR_L
J8-SC:Tune output voltage
TX TRD0- B14 BCM4401:R183=1.21K TTGN0
TTGP0 TTGN0 30
23 P_REQ#2 C3 REQ_L TRD0+ B13 TTGP0 30
23,31,33 P_TRDY# G3 TRDY_L RX TRD1- C14 RTGN1
RTGP1
RTGN1 30
TRD1+ C13 RTGP1 30
D14 TGN2
TRD2- TGN2 30
J1 D13 TGP2
23,31,33 P_PAR PAR TRD2+ TGN3 TGP2 30
TRD3- E14 TGN3 30
P_AD0 N7 E13 TGP3
23,31,33 P_AD[0..31] AD0 TRD3+ TGP3 30
P_AD1 M7
P_AD2 AD1
P6 AD2
P_AD3 P5 H13 POWER FOR LAN
AD3 SPD100LEDB 100M_LED# 30
P_AD4
Broadcom LAN
N5 AD4 SPD1000LEDB G12 1G_LED# 30
P_AD5 M5 G13
AD5 LINKLEDB 10M_LED# 30
3 P_AD6 P4 G14 LAN_ACT_LED# 30 2D5V_LAN_S5 3
P_AD7 AD6 TRAFFICLEDB
N4 AD7
P_AD8 P3 BCM4401
P_AD9 AD8
N3 AD9 SI E10 Remove Q53
3
P_AD10 N2 G11
P_AD11 AD10 SO CTRL_12 Q53
M1 AD11 SCLK E11 1
P_AD12 M2 H11 R867
P_AD13 AD12 CS_L LAN_EECLK BCP69T1
M3 AD13 EECLK M10 LAN_EECLK 30
P_AD14 L1 P10 LAN_EEDATA 1 2
2
AD14 EEDATA LAN_EEDATA 30
P_AD15
BCM5705M
L2 AD15
P_AD16 K1 H12 DUMMY-R2 1D2V_LAN_S5
AD16 GPIO0
1
P_AD17 E3 K13 LAN_EE_WP
AD17 GPIO1 LAN_EE_WP 30
P_AD18 D1 J13 C224
P_AD19 AD18 GPIO2 SCD1U10V2MX-1
D2 AD19
1
P_AD20 D3 A10 ALERT_CLK
2
AD20 SMB_CLK ALERT_CLK 30
P_AD21 C1 C9 ALERT_DAT C225 C428
AD21 SMB_DATA ALERT_DAT 30
P_AD22 B1 SCD1U10V2MX-1 SC22U10V-1
P_AD23 AD22
B2
2
AD23
P_AD24 B4 AD24 REGCTL12 B10 CTRL_12 S.B.
P_AD25 A5 A9
AD25 REGSEN12 1D2V_LAN_S5 3D3V_LAN_S5
P_AD26 B5 B9
P_AD27 AD26 REGSUP12 2D5V_LAN_S5
B6 AD27
P_AD28 C6 C11 CTRL_25
P_AD29 AD28 REGCTL25
C7 AD29 REGSEN25 C10 2D5V_LAN_S5 BCM4401
3
P_AD30 A8 B11
P_AD31 AD30 REGSUP25 3D3V_LAN_S5 Q56
Remove Q56
B8 AD31 1
BCP69T1
23,31,33 P_C/BE#[0..3]
P_C/BE#0 M4 C12 2D5V_LAN_S5
CBE_0_L TCK
P_C/BE#1 L3 D12 BCM5705: 3D3V_LAN_S5
2
2
P_C/BE#2 F3 CBE_1_L TDI 2
B12 BCM4401: 3D3V_LAN_S5
DUMMY-SC10U6D3V5MX
P_C/BE#3 C4 CBE_2_L TDO
SC10U6D3V5MX
A12
DUMMY-SC10U6D3V5MX
CBE_3_L TMS
1
D11 LAN_ITP_RSTR178 1 2 4K7R3 C163 C164 C215 C211 C221
SC10U6D3V5MX
SCD1U10V2MX-1
TRST_L
23,31,33 P_DEVSEL# H3 DEVSEL_L
F2 R877 DUMMY-R2
23,31,33 P_FRAME# FRAME_L S.B. S.B. S.B. S.B.
J3 A1 1 2 S.B.
2
P_AD23 R646 23 P_GNT#2 GNT_L VESD3 3D3V_LAN_S0
1 2 LAN_IDSEL A4 G2 VESD
100R3 IDSEL VESD2 0R2-0 1 R876
23 P_INTE# H2 INTA_L VESD1 P1 2 3D3V_LAN_S5
23,31,33 P_IRDY# F1 IRDY_L
F4 M66EN
H1 C8 CSTSCHG
23,31,33 P_STOP# STOP_L CSTSCHG
NC (SPROMDOUT)
14,19,23,31,33,34,37,39,40,42 PCIRST_BUF# C2 PCI_RST_L
J12 VAUXPRSNT R156 1 2 1KR3F
NC (SPROMDIN)
23,31,33 P_SERR# A2 SERR_L VAUXPRSNT 3D3V_LAN_S5
2
A3 R656 R878
3 CLK33_LAN PCI_CLK
N10 LAN_X0 1 2
LOW_POWER
XTALO
LAN_X0_1
1
N11 LAN_X1
R245 XTALI 200R3 DUMMY-R2
CLKRUN#
DUMMY-10R3 2D5V_LAN_S5
X4 J8-SD
1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1 2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Broadcom
PCLK_L
2
M11
G10
X-25MHZ-11
N12
N13
H10
K11
F10
L11
L14
J11
M6
M8
M9
G4
G5
G6
G7
G8
G9
D4
D5
D6
D7
D8
D9
H9
N1
H4
N8
N9
B7
E2
E5
E6
E7
E8
E9
K2
K4
P9
F5
F6
F7
F8
F9
L6
L9
L7
L8
J4
BCM4401:71.04401.00U BIASVDD_LAN 1 2
BC272 BC259
BCM5705:71.05705.A0U
1
BC242 BCM_CLKRUN SC33P SC33P
DUMMY-SC10P 3D3V_LAN_S5 C553 C558
SC1000P50V3KX SCD1U10V2MX-1
BCM_LOW_PWR
1
SPROMDIN
2
1 SPROMDIN 30 1
1
2
1
DUMMY-MLB-1608080600A S.B.
1
G
J8-SD S Size Document Number Rev
2
A3
Gannet -1
2
DUMMY
Date: Thursday, December 04, 2003 Sheet 29 of 51
A B C D E
A B C D E
1
R194
10KR3 LAN EEPROM Modify at 05-08 03' 22,23,24,25,27,29,34,37,43,45,48,50,51 3D3V_S5 3D3V_S5
BCM4401:DUMMY-R121,R126,R110
3D3V_LAN_S5 TDP_RJ45-1 0R2-0 1 2 R855 TDP_RJ45-1_C
SMB_SB_ALTERT
BCM5705:R121,R126,R110
3
4
TDN_RJ45-2 0R2-0 1 2 R856 TDN_RJ45-2_C
2
RDP_RJ45-3 0R3-0-U 1 2 R834 RDP_RJ45-3_C
RJ45-4 29,33 3D3V_LAN_S5 3D3V_LAN_S5
RN2 0R3-0-U 1 2 R836 RJ45-4_C
1
SRN10KJ RJ45-5 0R3-0-U 1 2 R835 RJ45-5_C
4 R121 R126 R110 C30 RDN_RJ45-6 0R3-0-U 1 2 R833 RDN_RJ45-6_C
RJ45-7 29 2D5V_LAN_S5 2D5V_LAN_S5 4
4K7R3 1KR3 U82 SCD1U16V 0R3-0-U 1 2 R838 RJ45-7_C
1
4K7R3 RJ45-8 0R3-0-U 1 2 R837 RJ45-8_C
2
1
Q17 8 1
VCC A0 22,27,44,45,46,47,48,49 DCBATOUT DCBATOUT
2 3 ALERT_CLK LAN_EE_WP 7 2 CLOSE TO CONNECTOR
2
3,11,25 SMBC_SB ALERT_CLK 29 29 LAN_EE_WP WP A1
DUMMY-2N7002 LAN_EECLK 6 3
29 LAN_EECLK SCL NC
1
S LAN_EEDATA
D
5 4
G
29 LAN_EEDATA SDA GND
Q18 FOR EMI
2 3 ALERT_DAT
3,11,25 SMBD_SB ALERT_DAT 29
DUMMY-2N7002
24C256N-10SI LAN_ACT_LED#
S
D
32K*8 EEPROM
100M_LED#
3D3V_LAN_S5
10M_LED#
U79
2D5V_LAN_S5 1 8
CS VCC
Broadcom 2 SK DC 7
3 6 C597 C18 C613
suggested 29 SPROMDOUT DI ORG SC1000P50V SC1000P50V SC1000P50V
29 SPROMDIN 4 DO GND 5
10/100M Lan Transformer
1
DUMMY-M93C46-W-U
R863 R864
0R3-U 0R3-U
U90 S.B
2
R88
29 RTGP1
RTGP1
RTGN1
8
9
TD3+ MX3+ 17
16
RDP_RJ45-3
RDN_RJ45-6 DOC_TIP,DOC_RING,TIP,RING:
29 RTGN1 TD3- MX3-
2
0R3-U
TTGP0 TDP_RJ45-1
W/S : 10/100 @ Surface layers 2
11 14
29 TTGP0
29 TTGN0
TTGN0 12
TD4+
TD4-
MX4+
MX4- 13 TDN_RJ45-2 10/20 @ Inner layers
2
TCT 1 24 MCT1
TCT1 MCT1 MCT2
4 TCT2 MCT2 21
7 18 MCT3
TCT3 MCT3 MCT4
10 TCT4 MCT4 15
RJ45 Connector
DUMMY-SCD01U16V2KX
DUMMY-SCD01U16V2KX
XFORM-114
LG-2422S
68.02422.301
2
BC107
29 LAN_ACT_LED# 1 2
C609
330R3 LAN_TERMINAL
1
SC1KP2KV
DUMMY-SCD01U16V2KX
DUMMY-SCD01U16V2KX
U2
BC111
BC110
3 R87
29 100M_LED# BAT54C-U
1 2 LAN_100M_LED#
U86 330R3
2
1
BAT54C-U
1
100M_LED#_1 1
10M_LED#_1 3
Wistron Corporation
2
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
2D5V_S0
6,8,9,10,16,19,20,23,24,25,48,50 2D5V_S0
3D3V_S0 3D3V_S0
NF1 NFM41PC204F1H3L
1 3 3D3V_554AVCC_S0
1
4 C173 4
1
C243 C170 C171 C172 SCD1U16V
SC10U6D3V5MX SCD1U16V SCD1U16V SCD1U16V C494 C495 C427 C426 C406
2
78.10610.511 78.10491.4F1 SC1000P50V SC1000P50V SCD1U16V SCD1U16V SC10U6D3V5MX
2
2
U64B
C410 P9 B15
C235 C230 C496 C419 SCD1U16V VCCPCI2 AVCC_PHY2
P10 VCCPCI3 AVCC_PHY3 B8
SC10U6D3V5MX SCD1U16V SCD1U16V SCD1U16V P11 A8
VCCPCI4 AVCC_PHY4
78.10610.511 78.10491.4F1
2
B12 1394_TPAP0
C510 C408 C240 TPAP0 3D3V_S0
F10 VCC_3V1
SC10U6D3V5MX SCD1U16V SCD1U16V P12 D10
VCC_3V2 TPBIAS1
78.10610.511 78.10491.4F1 A11
2
TPBN1
1
P_AD31 P6 B11 TR1
P_AD30 AD31 TPBP1 R662
R6 AD30 TPAN1 A10 2 3
P_AD29 T6 B10 0R3-U
P_AD28 AD29 TPAP1
V6 63.R0004.151
AD28
1
P_AD27 W6 1 4 BC391
P_AD26 AD27 CPS_554
P7 D15 R565
2
AD26 CPS R564
P_AD25 R7 CLOSE TO RICOH R5C554 1394_1 SCD33U16V3ZY 56R3
AD25 VREF_554 56R3
P_AD24 T7 D14 C517 SCD01U50V2ZY 6 DLW31SN900SQ2-U1 78.33491.4B1
2
P_AD23 AD24 VREF 78.10394.4F1 1394_TPA0- 1394_TPA0+ 1394_TPBIAS0
R8 AD23 3 4
3 P_AD22 T8 B14 REXT_554 R654 1 2 10KR3F 1394_TPAN0 3
2
P_AD21 AD22 REXT 64.10025.651 1394_TPB0- 1394_TPB0+ 1394_TPAP0
V8 AD21 1 2
PCI/1394_OHCI PORTION
P_AD20 W8 A14 FIL0_554 C493 SCD01U50V2ZY 5 1394_TPBP0
P_AD19 AD20 FIL0 78.10394.4F1 1394_TPBN0
R9 AD19
P_AD18 T9 SKT-1394-4P-6-U TR2 R620 5K1R3F
P_AD17 AD18 XO_554 C492 1
23,29,33 P_AD[31..0] V9 AD17 XO B16 2 SC10P50V2JN-1 22.10218.B41 1 4 1 2 1 2
1
P_AD16 W9 A16 XI_554 R605 56R3
AD16 XI
2
P_AD15 V12 R649 1394_TPB1_R
P_AD14 AD15 DUMMY-R3 X5 BC392
W12 AD14 2 3 1 2
P_AD13 P13 B17 X-24D576MHZ-9-U R586 56R3
P_AD12 AD13 AGND1 SC270P50V3JN
R13 AD12 AGND2 A17 82.30023.121 DLW31SN900SQ2-U1 J8-SD
P_AD11 T13 E16 1 2
1
P_AD10 AD11 AGND3 C491
V13 D16 J8-SD
2
P_AD9 AD10 AGND4 SC10P50V2JN-1
W13 AD9 AGND5 E15 change TR1,TR2,1394_1 CLOSE TO CONNECTOR CLOSE TO RICOH R5C554
P_AD8 R14 E12 78.10034.1F1
P_AD7 AD8 AGND6
V14 AD7 AGND7 D13
P_AD6 W14 E13
P_AD5 AD6 AGND8
T15 AD5 AGND9 E14
P_AD4 V15 D11
P_AD3 AD4 AGND10
W15 AD3 AGND11 E10
P_AD2 V16 E9
3D3V_S0 P_AD1 AD2 AGND12
W16 AD1 AGND13 D9
P_AD0 V17 B9
P_PAR AD0 AGND14 3D3V_S0
23,29,33 P_PAR R12 PAR AGND15 A9
1
P_C/BE#3 V7 E11
R508 P_C/BE#2 C/BE3# AGND16 R306 10KR3
23,29,33 P_C/BE#[3..0] R10 C/BE2#
10KR3 P_C/BE#1 T12 R4 HWSUSP#_554 1 2
R509 0R3-U P_C/BE#0 C/BE1# HWSUSP# 63.10334.151
63.10334.151 T14 C/BE0#
P_AD22 1 2 P_CARD_IDSEL W7 IDSEL RI_OUT P1 RI#_554 R573 1 2 0R3-U RI#_SB 24
2 2
P_PERR#_554
2
P_REQ#1 W5 P2
23 P_REQ#1 REQ# SPKROUT# CB_SPKR 35
P_GNT#1 V5 R559 1 2 100KR3
23 P_GNT#1 GNT#
3D3V_S0 P_FRAME# T10 V19 TEST_554 R578 1 2 0R3-U 3D3V_S0
23,29,33 P_FRAME# FRAME# TEST
P_IRDY# V10
23,29,33 P_IRDY# IRDY#
P_TRDY# W10 T1 IRQ3_554 TP68 C145 SCD1U16V
23,29,33 P_TRDY# TRDY# IRQ3
1
1
R556 P_STOP# T11 U1 IRQ5_554 TP51
23,29,33 P_STOP# STOP# IRQ5
2K2R3 P_PERR#_554 V11 V1 IRQ7_554 TP50 R503 R537 U60
P_SERR# PERR# IRQ7 IRQ9_554 R499
63.22234.151 23,29,33 P_SERR# W11 SERR# IRQ9-SIRQ V2 1 2 0R3-U P_SERIRQ 24,34,37,40,42
10KR3 10KR3
W2 IRQ10_554 TP61 63.R0004.151 8 1
GBRESET# GBRESET# IRQ10 IRQ11_554 TP60 VCC A0
T2 V3 7 2
2
2
14,19,23,29,33,34,37,39,40,42 PCIRST_BUF# PCIRST# IRQ12 SCL A2
CLK33_PCM T5 T4 SDA_554 5 4
3 CLK33_PCM PCICLK IRQ14 SDA GND
C168 V4 IRQ15_554 TP59
SC1U10V3ZY R552 CLKRUN#_554 W4 IRQ15 AT24C02N-10SI
78.10593.4B1 PME#_554 CLKRUN#
24,29,33,42 PME#_SB 1 2 R1 PME# INTA# W17 P_INTA#_554 R507 1 2 0R3-U P_INTB# 23
INTB# W18 P_INTB#_554 R506 1 2 0R3-U P_INTC# 23 J8-SC
DUMMY-R2 V18 P_INTC#_554 R504 1 2 0R3-U
INTC# P_INTD# 23 Change new U60
1
GND9 GND12
J10 K10
2
GND10 GND11
1
1 1
C232
DUMMY-C2 R5C554
71.5C554.A0U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
Title
RICOH_R5C554(1/2)_1394
Size Document Number Rev
A3 -1
Gannet
Date: Thursday, December 04, 2003 Sheet 31 of 51
A B C D E
A B C D E
5V_S0
2,19,21,22,23,24,25,26,27,28,30,33,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
UPPER SIGNAL A 3D3V_S0
LOWER SIGNAL B 2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
SIGNAL B SIGNAL A
B_SKT_VCC_S0 A_SKT_VCC_S0
4 4
3D3V_S0 3D3V_S0
151
1
1
CN6
R658 R587 R575 R636
DUMMY-R3 DUMMY-R3 MH1 DUMMY-R3 DUMMY-R3
1
1
47K Ohm 100K Ohm 1 76 100K Ohm 47K Ohm
C405 C310 C229 U64A C431 C218 C304
SC10U6D3V5MX SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC10U6D3V5MX 2 77
78.10610.511 78.10491.4F1 J6 J14 78.10491.4F1 78.10610.511 B_CCD2# 3 78 A_CCD2#
2
2
VCC_3V3 VCC_3V5 B_CCLKRUN# A_CCLKRUN#
K6 VCC_3V4 VCC_3V6 K14 1 76 4 79
B_CAD31 5 80 A_CAD31
B_CAD19 G1 CAD19 H14 A_CAD19 B_RSVD_D2 6 81 A_RSVD_D2
B_CAD17 BCADR25 ACADR25 A_CAD17 B_CAD30 A_CAD30
G4 BCADR24
CAD17 J18 7 82
B_CFRAME# G6 BCADR23
CFRAME# ACADR24 J15 A_CFRAME# B_CAD29 8 83 A_CAD29
B_CTRDY# F2 BCADR22
CTRDY# ACADR23
ACADR22 K18 A_CTRDY# 9 84
B_CDEVSEL# F5 CDEVSEL#ACADR21 K15 A_CDEVSEL# B_CAD28 10 85 A_CAD28
BCADR21
B_CSTOP#
B_CBLOCK#
E1
E4
BCADR20
BCADR19
CSTOP# ACADR20
CBLOCK# ACADR19
L18
L15
A_CSTOP#
A_CBLOCK# LOWER UPPER B_CAD27
B_CSTSCHG
11
12
86
87
A_CAD27
A_CSTSCHG
B_RSVD_A18 D1 RSVD_A18ACADR18 M19 A_RSVD_A18 B_CAD26 13 88 A_CAD26
R655 0R3-U B_CAD16 BCADR18 A_CAD16 R626 0R3-U B_CAUDIO A_CAUDIO
D4 BCADR17
CAD16 ACADR17 M16 14 89
B_CCLK 1 2 BCCLK F4 CCLK K16 ACCLK 1 2 A_CCLK B_CAD25 15 90 A_CAD25
BCADR16
B_CIRDY# F1 BCADR15
CIRDY# ACADR16 K19 A_CIRDY# B_CC/BE#3 16 91 A_CC/BE#3
B_CPERR# E5 BCADR14
CPERR# ACADR15
ACADR14 L14 A_CPERR# 17 92
B_CPAR D2 CPAR M18 A_CPAR B_CAD24 18 93 A_CAD24
BCADR13
B_CC/BE#2 G5 BCADR12
CC/BE2# ACADR13
ACADR12 J16 A_CC/BE#2 75 150 B_CREQ# 19 94 A_CREQ#
B_CAD12 A2 CAD12 N16 A_CAD12 B_CAD23 20 95 A_CAD23
B_CAD9 BCADR11 ACADR11 A_CAD9 B_CSERR# A_CSERR#
B4 BCADR10
CAD9 ACADR10 P18 21 96
B_CAD14 B1 CAD14 N19 A_CAD14 B_CAD22 22 97 A_CAD22
BCADR9
B_CC/BE#1 C1 BCADR8
CC/BE1# ACADR9
ACADR8 M15 A_CC/BE#1 B_CRST# 23 98 A_CRST#
3 B_CAD18 G2 CAD18 J19 A_CAD18 B_CAD21 24 99 A_CAD21 3
B_CAD20 BCADR7 ACADR7 A_CAD20
H6 BCADR6
CAD20 ACADR6 H15 25 100
B_CAD21 H4 CAD21 H18 A_CAD21 C489 B_CVS2 26 101 A_CVS2 C477
B_CAD22 BCADR5 ACADR5 A_CAD22 SCD01U50V2ZY B_CAD20 A_CAD20 SCD01U50V2ZY
H1 BCADR4
CAD22 ACADR4 G14 27 102
B_CAD23 J4 CAD23 G16 A_CAD23 78.10394.4F1 B_CAD19 28 103 A_CAD19 78.10394.4F1
B_CAD24 BCADR3 ACADR3 A_CAD24 B_CAD18 A_CAD18
J1 BCADR2
CAD24 ACADR2 G19 29 104
B_CAD25 K4 CAD25 F16 A_CAD25 B_CAD17 30 105 A_CAD17
B_CAD26 BCADR1 ACADR1 A_CAD26 B_SKT_VPP_S0 B_CC/BE#2 A_CC/BE#2 A_SKT_VPP_S0
K1 CAD26 F19 31 106
CARDBUS PORTION
1
B_CAD6 A_CAD6 B_CTRDY# A_CTRDY#
B_CAD4
B6
E6
BCDATA13
BCDATA12
CAD6
CAD4 ACDATA13
ACDATA12
R18
R15 A_CAD4 Upper = Slot0 / Signal A = Conn B R674 B_CCLK
35
36
110
111 A_CCLK R667
B_CAD2
B_CAD31
B7
M5
BCDATA11
CAD2
CAD31 ACDATA11
T18
B18
A_CAD2
A_CAD31 Lower = Slot1 / Signal B = Conn A 100KR3
63.10434.151
C527
SCD01U50V2ZY
37
38
112
113
C521
SCD01U50V2ZY
100KR3
63.10434.151
BCDATA10
B_CAD30 L1 BCDATA9
CAD30 ACDATA10
ACDATA9 C18 A_CAD30 78.10394.4F1 39 114 78.10394.4F1
B_CAD28 L4 CAD28 D18 A_CAD28 B_CINT# 40 115 A_CINT#
2
B_CAD7 BCDATA8 ACDATA8 A_CAD7 B_CDEVSEL# A_CDEVSEL#
A6 BCDATA7
CAD7 ACDATA7 R19 41 116
B_CAD5 D6 CAD5 R16 A_CAD5 B_SKT_VCC_S0 B_CGNT# 42 117 A_CGNT# A_SKT_VCC_S0
B_CAD3 BCDATA6 ACDATA6 A_CAD3
A7 BCDATA5
CAD3 ACDATA5 T19 43 118
B_CAD1 D7 CAD1 T16 A_CAD1 B_CSTOP# 44 119 A_CSTOP#
B_CAD0 BCDATA4 ACDATA4 A_CAD0 B_CPERR# A_CPERR#
E7 BCDATA3
CAD0 ACDATA3 U18 45 120
1
B_RSVD_D2 M6 RSVD C19 A_RSVD_D2 CBUS1 B_CBLOCK# 46 121 A_CBLOCK#
B_CAD29 BCDATA2 ACDATA2 A_CAD29 C540 C536 B_CPAR A_CPAR C566 C562
L2 BCDATA1
CAD29 ACDATA1 D19 1 2 47 122
B_CAD27 L5 CAD27 E19 A_CAD27 SC47U6D3V0ZY SCD01U50V2ZY B_RSVD_A18 48 123 A_RSVD_A18 SCD01U50V2ZY SC47U6D3V0ZY
BCDATA0 ACDATA0 B_CC/BE#1 A_CC/BE#1
78.47690.431 78.10394.4F1 49 124 78.10394.4F1 78.47690.431
2
B_CAD13 B2 CAD13 N18 A_CAD13 4 B_CAD16 50 125 A_CAD16
B_CAD15 BIORD# AIORD# A_CAD15
C2 BIOWR#
CAD15 AIOWR# M14 3 51 126
B_CAD11 A3 CAD11 N14 A_CAD11 B_CAD14 52 127 A_CAD14
2
B_CGNT# BOE# AOE# A_CGNT# CARDBUS-SKT28-U1 B_CAD15 A_CAD15 2
E2 BWE#
CGNT# AWE# L16 53 128
B_CAD10 A4 CAD10 P19 A_CAD10 21.I0027.001 B_CAD12 54 129 A_CAD12
B_CC/BE#0 BCE2# ACE2# A_CC/BE#0 B_CAD13 A_CAD13
B5 BCE1#
CC/BE0# ACE1# P15 55 130
B_CC/BE#3 K5 CC/BE3# AREG# F15 A_CC/BE#3 B_CAD11 56 131 A_CAD11
B_CRST# BREG# A_CRST# A_SKT_VPP_S0 B_CVS1 A_CVS1
H2 BRESET
CRESET# ARESET H19 57 132
B_CSERR# J5 CSERR# G15 A_CSERR# B_CAD9 58 133 A_CAD9
BWAIT#
B_CCLKRUN# M4 BWP
CCLKRUN# AWAIT#
AWP B19 A_CCLKRUN# 59 134
B_CINT# F6 CINT# L19 A_CINT# B_CAD10 60 135 A_CAD10
B_CAUDIO BRDY ARDY A_CAUDIO B_CC/BE#0 A_CC/BE#0
K2 BBVD2
CAUDIO ABVD2 F18 61 136
B_CSTSCHG L6 CSTSCHG ABVD1 E18 A_CSTSCHG C557 B_CAD8 62 137 A_CAD8
B_CVS2 BBVD1 A_CVS2 SCD1U16V B_CAD7 A_CAD7
H5 BVS2
CVS2 AVS2 H16 63 138
B_CVS1 B3 CVS1 N15 A_CVS1 78.10491.4F1 B_RSVD_D14 64 139 A_RSVD_D14
B_CCD2# BVS1 AVS1 A_CCD2# B_CAD5 A_CAD5
M2 BCD2#
CCD2# ACD2# A18 65 140
B_CCD1# F7 CCD1# U19 A_CCD1# A_SKT_VCC_S0 B_CAD6 66 141 A_CAD6
B_CREQ# BCD1# ACD1# A_CREQ#
J2 BINPACK#
CREQ# AINPACK# G18 67 142
B_CAD3 68 143 A_CAD3
BVCC5EN# N4 P4 AVPPEN1 5V_S0 U76 B_CAD4 69 144 A_CAD4
BVCC3EN# BVCC5EN# AVPPEN1 AVPPEN0 B_CAD1 A_CAD1
N5 BVCC3EN# AVPPEN0 P5 23 AVPPIN AVPPOUT 24 70 145
BVPPEN0 N6 N1 AVCC3EN# 1 2 C561 B_CAD2 71 146 A_CAD2
BVPPEN1 BVPPEN0 AVCC3EN# AVCC5EN# AVCC5IN AVCCOUT SCD1U16V B_CAD0 A_CAD0
M1 BVPPEN1 AVCC5EN# N2 3 AVCC5IN AVCCOUT 26 72 147
1
152
2
BVCC3EN# 20
C538 BVPPEN0 BVCC3EN
R2 RSV1 SC1U10V3KX BVPPEN1
21
22
BEN0
BEN1
B_SKT_VCC_S0 Wistron Corporation
78.10523.5B1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,34,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S3
2,19,21,22,23,24,25,26,27,28,30,32,35,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
4 4
3D3V_LAN_S5 3D3V_S0
3.3V+-5%
P_AD[31..0] 23,29,31
BC295 BC186 BC280 BC298 BC216 BC260 STANDBY 30mA
SCD1U SC1U10V3ZY SC4D7U10V5ZY SCD1U SCD1U SCD1U
P_C/BE#[3..0] 23,29,31 MAX 150mA
5V_S0 3D3V_BT_S0
MINI1
1
125
TP178 TIP 1 2 RING Other traces or vias should be far C574 I max = 150 mA C582 R778
SC1U10V3ZY SC20P 18KR3F
TPAD30 away from these two pins 100
3 4 78.10593.4B1 78.20034.1B1
5 6 mils. U85
7 8 1 5 3D3V_BT_SET
2
40 BT_PWREN SHDN# SET
K3D-SB 9 10
1
22 80211_ACTIVE
80211_ACTIVE 11 12 6/1 change LED signals 2 GND
3D3V_BT_S0
H=Enable 13 14 R775 R779
40 WIRELESS_EN
L=Disable 15 16 USBP0P 10KR3 3 4 11KR3F
R769 0R3-0-U USBP0P 23 IN OUT
MINI_P_IRQG# 17 18 63.10334.151
5V_S0
19 20 MINI_P_IRQG# 1 2 G913C-U
3D3V_S0 P_INTF# 23
21 22 USBP0N C594 EC37
2
3D3V_BT_S0 USBP0N 23
3 23 24 (3.3VAUX) 3D3V_LAN_S5 SC4D7U10V5ZY SCD1U16V 3
1
3D3V_S0 P_AD21 51 52 P_AD22 10R3
P_AD19 53 54 P_AD20 USBP0N R770 1 2 15KR2 R680
55 56 100KR3
P_AD17 P_PAR 23,29,31
57 58 P_AD18 63.10434.151
1
P_C/BE#2 59 60 P_AD16
R642 61 62
2
23,29,31 P_IRDY#
10KR3 63 64 P_FRAME# 23,29,31
24,40 P_CLKRUN# 65 66 P_TRDY# 23,29,31
23,29,31 P_SERR# 67 68 P_STOP# 23,29,31
69 70
2
1
2 P_AD10 2
81 82
83 84 P_AD9 R628
P_AD8 85 86 P_C/BE#0 100KR3
P_AD7 87 88 63.10434.151
89 90 P_AD6
P_AD5 91 92 P_AD4
2
3D3V_LAN_S5 BT_RESET 93 94 P_AD2
P_AD3 95 96 P_AD0
5V_S0 97 98 (VCC)
2
P_AD1 99 100
R296 101 102
10KR2 103 104 (M66EN)
24,28,34 AC97_SYNC
105 106 3D3V_S0
24,28 AC97_DIN1 AC97_DOUT 24,28,34
1 2 AC97_BITCLK_1 107 108
28,35 AC97_BITCLK
R286 0R2-0 3D3V_LAN_CON 109 110
1
AC97_RST# 24,28,34
1
For BENZ H/W Modem AUD_PHONE 1 2 AUD_PHONE_1 111 112 BT_DETACH
DUMMY-0R2-0 R304 113 114 R538
115 116 AUD_PHONE_2 1 2 10KR3
28,35 AUD_MDC_OUT AUD_PHONE 28,35
117 118 R569 0R2-0
R558 119 120
2 1 BT_IN# 121 122 MINI_BUSY# TP71
2
3D3V_S0
100KR3 TPAD30
123 124 (3.3VAUX) 3D3V_LAN_S5
5V_S0
126
BC185 PCIMODEM124A1U1
SCD1U
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MINI-PCI
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 33 of 51
A B C D E
A B C D E
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,35,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S3
25,37,39,40,42 LPC_LAD[3..0]
R308 100KR3
10,22,28,37,48 3D3V_S3
1 2
63.10434.151 CLKRUN#_NOTUS 3D3V_S5
10
11
12
17
29
41
MAIL_LED# 22
2
9
5
RN75 R896 DUMMY-R2 J8-SC: For J8
CLK33_NOTUS_RC SEG1 1 8 DJ_SEG1 R898 DUMMY-R3 J8-SC: For Annie
12
IRQ
LCLK
VCC
VCC
VCC
VCC
LRESET#
LFRAME#
LDRQ#
CLKRUN#
SEG2 2 7 DJ_SEG2 1 2
C169 SEG3 3 6 DJ_SEG3 R899 DUMMY-0R2-0 C126 C137
DUMMY-C2 SEG0 4 5 DJ_SEG0 J8-SD SCD1U16V CN7 SCD1U16V
LPC_LAD0 7 43 SEG0 78.10491.4F1 41 78.10491.4F1
LPC_LAD1 LAD0 SEG0 SEG1
6 39 SRN100 MH1
LPC_LAD2 LAD1 SEG1 SEG2
4 LAD2 SEG2 40 2 1
LPC_LAD3 3 42 SEG3 RN76 RN66
2
REW/SCAN_REW#
COM0 COM1 SEG10 DJ_SEG10 R9001 DUMMY-R3 DJ_SEG8 DJ_SEG3
24,28,33 AC97_DOUT 21 HSDATA_OUT COM1 34 3 6 28 BT_LED# 2 24 23
DJ_SEG9
FW/SCAN_FW#
19 SEG9 4 5 R901 DUMMY-R3 DJ_SEG11 26 25 DJ_SEG2
PLAT/PAUSE#
STOP/EJECT#
35 AC97_BITCLK_OZ CBIT_CLK
VOL_DOWN#
DJ_SEG10 28 27 DJ_SEG1
MEDIA_SEL
3 SRN100 R902 DUMMY-R3 DJ_SEG9 30 29 3
VOL_UP#
80211_LED DJ_SEG4
CLK32K
22 80211_LED# 1 2 32 31
COM0 DJ_SEG7
For Non-MP3 Model 34 33
GND
GND
GND
GND
1
Modify-0602 COM1 36 35 DJ_SEG6
PUT INSIDE OZ263 J8-SC: For Annie R903 38 37 DJ_SEG5
DUMMY-OZ263 DUMMY-0R2-0 40 39
20
32
44
30
28
27
26
23
24
25
31
ZZ.00263.00G MH2
8
RN6 J8-SD 42
AC97_DOUT 1 8 AC97_CSDOUT R567 10KR3
2
AC97_SYNC 2 7 AC97_CSYNC NOTUS_CLK 1 2 NOTUS_CLK_RC ETY-CONN40D-1 K3D-SB EMI
AC97_RST# 3 6 AC97_CRST# MP3_MEDIASEL
4 5
3D3V_S0 SC470P50V3JN EC22 SC1000P50V EC29
SRN0-1 VOL_DOWN# U63 VOL_UP#_CN DJ_SEG8
66.R0035.08A VOL_UP# 5 1
STOP/EJECT# VCC NC SC470P50V3JN EC23 SC1000P50V EC30
A 2
PLAY/PAUSE# 4 Y 3 VOL_DOWN#_CN DJ_SEG11
FW/SCAN_FW# C236 GND
1
3D3V_S0 3D3V_S3 REW/SCAN_REW# DUMMY-SCD1U DUMMY-NC7SZ14-U SC470P50V3JN EC24 SC1000P50V EC31
ZZ.10492.4B1 ZZ.7SZ14.0AH C331 STOP/EJECT#_CN DJ_SEG10
DUMMY-SC4700P50V3KX
1
2
R940 R939 PLAY/PAUSE#_CN DJ_SEG9
1
DUMMY-R3
SC470P50V3JN EC26 SC100P50V2JN EC33
0R3-0-U FW/SCAN_FW#_CN COM0 1 2
P34_1
RN73 To KBC SC470P50V3JN EC27 SC100P50V2JN EC34
2
1 8 REW/SCAN_REW#_CN COM1 1 2
2
2
2 7 FW/SCAN_FW# 3D3V_S0 SC470P50V3JN EC42 2
FW/SCAN_FW# 37
REW/SCAN_REW# BT_BTN SC470P50V3JN EC28 SC1000P50V EC8
3
4
6
5 MP3_MEDIASEL
REW/SCAN_REW# 37 MP3 POWER BUTTON MP3_PWRBTN#_CN DJ_SEG0
1
STOP/EJECT# 37
4 5 PLAY/PAUSE# R473
PLAY/PAUSE# 37
1
1
MP3_PWRBTN#_CN 1 2 SC470P50V3JN EC5 SC1000P50V EC12
2
MP3_PWRBTN# 43 KEY4#
63.47134.151 R816 DJ_SEG4
47KR3
2
2
INTERNET# 1 8 LID# 1 2 LID_SW SC470P50V3JN EC44 SC1000P50V EC14
3D3V_S0 22,37 LID# 1
MAIL# 2 7 S_LED DJ_SEG6
KEY3# 100R2 2
3 6
KEY4# BC365 CON2-10-U SC470P50V3JN EC45 SC1000P50V EC15
4 5
POWER BUTTON
1
COM1
2
1 1
R494
1
10KR3
1
R472 63.10334.151
10KR3 R493 470R3 R485 Wistron Corporation
PWRBTN#_CN 1 2 J8-SD:For J8 330R3 J8-SD:For 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
PWRBTN# 43
63.47134.151 Taipei Hsien 221, Taiwan, R.O.C.
Annie
2
SCD1U PWRBTN_LED#
78.10492.4B1
1 2
0Z263-NOTUS & Launch/AudioDJ BD CONN
DUMMY-R3 Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 34 of 51
A B C D E
5 4 3 2 1
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,36,37,38,39,40,41,42,43,47,48,49,51 3D3V_S0
5V_S0
EC1 5V_AUDIO_S0
SCD1U
2,19,21,22,23,24,25,26,27,28,30,32,33,36,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
K3D-SB EMI
1
R673 R690
1 2 AC97_BITCLK_ALL 1 2 BC136 R132
24 AC97_BITCLK_SB SC22P
5V_S0 28K7R3F EC35
33R3 DUMMY-R3 SCD1U16V
D R672 U5 D
1 2 3D3V_S0 U73 1 5 5VA_SET
2
34 AC97_BITCLK_OZ SHDN# SET
1 5V_AUDIO_S0
OE#
1
33R3 5 2 5V_AUDIO_S0
VCC BITCLK_BUFF BC320 GND R735
2 U89A
14
R670 A
1 2 4 SC1U10V3ZY 3 4 10KR3F
28,33 AC97_BITCLK Y IN OUT
GND 3 1
1
33R3 MAX8863-S 31 CB_SPKR 3 AUD_BEEP1
1
NC7SZ125-1-U 74.08863.A3F BC318 2
2
24 SPKR_SB
R689 SC10U10V6ZY-U
10KR3 BC281 For High limit --> H45 TSAHCT86
K3D SB DUMMY-C3 AUD_AGND 5V_AUDIO_S0
7
AUD_AGND
J8-SC AUD_AGND U89B
2
14
36 S/PDIF
Remove:pin44 to GND 5V_AUDIO_S0 4
1
EMI 5V_AUDIO_S0 6 AUD_SYS_BEEP
U89C 5
14
BC124
3D3V_S0 L48 APA2020_SD# 36
AUD_AGND
BLM11P600S 9 TSAHCT86
AUD_AGND SCD1U 37 AUDIO_KBC_BEEP AUD_BEEP2
8
7
MDM_BEEP 10
BC146 BC147 BCB10 AUD_AGND
2
BCB9
2
SCD1U SCD1U SCD1U TSAHCT86
2
R69
SPDIF_OUT
7
R857 R949 DUMMY-SCD1U 10KR2
1KR3 ZZ.10492.4B1 AUD_AGND
BC155 0R2-0
XTALIN_CODEC
1
C C
1
AUD_MDC_OUT 28,33
2
SC22P EAPD
X1 J8-SD
X-24D576MHZ-3-U BC119 AUD_LOR 36
BC154 82.30023.041 SC1000P50V
48
47
46
45
44
43
42
41
40
39
38
37
XTALOUT_CODEC U78 AUD_LOL 36
1
AUD_AGND
EAPD
HPP
NC
LNL/HP_OUT_r
NC
S/PDIF_OUT
ID1
ID0
AVSS2
LNL/HP_OUT_L
MONO_OUT
AVDD2
SC22P BC127 BC128
SC1000P50V SC1000P50V
BC137 R135
1 2 U32_RC 1 2 AUD_AGND AUD_AGND
1 DVDD1
DUMMY-C3 DUMMY-R3 2 36
XTL_IN L_OUT_R BC326 SC1000P50V
34 AC97_CSDOUT 3 XTL_OUT L_OUT_L 35
4 34 AUDIO_FLTO BC343 DUMMY-C3
R699 33R3 DVSS1 NC ADCAP1
5 SDATA_OUT NC 33 1 2
BITCLK_BUFF 1 2 AC97_CBITCLK 6 32 ADVRDA
BIT_CLK CAP2 ADVRAD BC342 SCD01U16V3KX
7 DVSS2 NC 31 AUD_AGND
8 30 ADAF2 BC341 DUMMY-SC1U10V3ZY
SDATA_IN AFLT2 ADAF1
9 DVDD2 AFLT1 29
R175 22R3 10 28 BC329 SC1000P50V VREFOUT
AC97_DATIN SYNC VREF_OUT CODECVREF BC328 SC1000P50V
24,34 AC97_DIN0 1 2 11 RESET# VREF 27
12 PC_BEEP AVSS1 26
34 AC97_CSYNC AVDD1 25 5V_AUDIO_S0
LINE_IN_R
LINE_IN_L
34 AC97_CRST#
VIDEO_R
VIDEO_L
CD_GND
PHONE
AUX_R
AUX_L
CD_R
CD_L
MIC1
MIC2
AUD_SYS_BEEP 1 2 AUD_BEEP AUD_PC_BEEP BC140 BC130
R173 22KR3 BC118 BC330 BC338 SC1U10V3ZY SCD1U
1
B SC1U10V3ZY B
BC176 SCD1U SCD1U SCD1U
13
14
15
16
17
18
19
20
21
22
23
24
R172 VT1612A-U
1
10KR3
BC197 R705
DUMMY-C3 10KR3 VREFOUT_1
2
AUD_AGND
2
AUD_AGND
2
1 2 VREFOUT
BC290 SCD1U
AUD_TONE R924 DUMMY-R2
28,33 AUD_PHONE CUT MOAT
1
G7 G1
ADD by review meeting BC288 BC325 SC2D2U16V5ZY 1 2 1 2
SCD01U16V2KX AUDLINR
AUD_LINR 36
GAP-CLOSE GAP-CLOSE
2
36 AUD_MICIN
BC319 Wistron Corporation
AUD_AGND SC1U10V3ZY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO (1/2) -- CODEC VT1612A
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 35 of 51
5 4 3 2 1
A B C D E
Q69_3
2,19,21,22,23,24,25,26,27,28,30,32,33,35,37,38,39,40,41,42,43,46,47,48,50,51 5V_S0
3
BC322 R90 R84 D
SC10U10V6ZY-U 10KR3 15KR3 1 2Q69_1 1 Q69
40 SIO_HP_IN
CSOUTL1 1 2 HP_L 1 2 R888 0R3-0-U G
S 2N7002
SB-31-4
2
4 4
5VA_OP_S0
BC114
SC220P For depop 5V_S0
1
Q6
DTA124EUA-U1 R889
2
SB-31-4 0R3-0-U 5V_S0
22 K D20
BC323 R93 R92 U29C S1N4148 U29D
14
14
CSOUTL2 1 2 L_LINE_IN 1 2 83.04148.011
2
35 AUD_LOL R354
SC10U10V6ZY-U 15KR3 22KR3 2 SE#/BTL 5 6 ENAUDIO 1 2 ENAUDIO_1 9 8 ENAUDIO#_5
1
40 ENAUDIO#
U1
3
22 K
K3D-SB D
4 10 SPKR_L- 1 ENAUDIO#_5 TSAHCT14 100KR3 BC308 TSAHCT14
HP_L LLINEIN LOUT- SPKR_L+ SC4D7U10V5ZY
5 3
7
LHPIN LOUT+ G
S Q7
HP_R 20 15 SPKR_R- 2N7002
2
RHPIN ROUT- SPKR_R+
21 22
3
35 APA2020_SD# RLINEIN ROUT+
5VA_OP_S0 SPK1
J8-SD R9501 2 8 2 SPKR_L- 6
HP_IN
10KR2 HP_IN SHUTDOWN TJ
16 HP/LINE#
14 23 SPKR_L+ 4
SE/BTL# NC
1
AUD_AGND 17 3
ENAUDIO# NC R97 SPKR_R+
11 MUTE_IN 2
9 100KR3 5V_S0 5VA_OP_S0 1
BC324 BC60 BC97 MUTE_OUT SPKR_R-
GND 25
SC10U10V6ZY-U SCD1U SCD1U R_BYPASS 19 R947 DUMMY-R5 5
L_BYPASS RBYPASS 3D3V_S0
6 1 1 2
2
3 LBYPASS GND/HS BC15 BC16 BC24 BC23 MOLEX-CON4 3
GND/HS 12
18 13 1 2 SC680P SC680P SC680P SC680P 20.D0012.104
AUD_AGND RVDD GND/HS AUD_AGND R780 0R5
7 LVDD GND/HS 24
J8-SD C583
SC4D7U10V5ZY K3D-SB EMI K3D-SB EMI
AUD_AGND BC345 R81 APA2020ARI-TR AUD_AGND
CSOUTR1 1 2 R_LINE_IN 1 2 MIC_JKIN
MIC_JKIN 40
1
SC10U10V6ZY-U 15KR3 R56 22KR3 AUD_AGND 5VA_OP_S0
SB-31-4
K3D-SB
LINE IN R10
1
BC80 10KR3
SC220P
R9
2
1KR3 LIN1
AUD_AGND 5
R14 1 2 AUD_LINE_R MICJK_PWR 4
2
35 AUD_LINR
10KR3 SB-31-4 R850 1KR3 3
CSOUTR2 1 2 HP_R 1 2 6
35 AUD_LOR AUD_LINE_L
35 AUD_LINL 1 2 2
BC57 R21 R8 1KR3 1
1
SC10U10V6ZY-U 15KR3 R849
MIC PREAMP
1
R12 R831 EXT_MIC_IN 1 2 PHONE-JK65-U
BC378 BC19 22.10088.161
R_BYPASS DUMMY-4K7R3 DUMMY-4K7R3 0R2-0
MIC_VREF_S0 ZZ.47234.151 ZZ.47234.151
2
BC75 SC100P50V2JN SC100P50V2JN
2
1
SC220P
RB3 AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND
2 1KR3 2
L_BYPASS
If R->L 避免 noise
RB29_2 MIC_VREF_S0 1000P -> 100P
J8-SD: Remove EC40,EC41
LINE OUT
BC98 BC58
2
SC4D7U10V5ZY SC4D7U10V5ZY
R29 0R3-0-U U96 3D3V_S0 MODIFY BY EMI
1
1
DUMMY-R3 TC29 MINDIN10-1-U1
R27
R30 SE100U6D3VM-6-U1 R20 R15 BC42 22.10257.001
MIC_G 1 2 1 2 79.10710.101 1KR3 1KR3 SC680P For no S/PDIF,
MIC_VREF_S0
1
DUMMY-15KR3 BC36
BC22 DUMMY-2K2R3 BCB8 RB7 SC680P P/N: 22.10257.001
ZZ.15334.151
2
DUMMY-SC4D7U10V5ZY
ZZ.22234.151 AUD_MICG AUD_MICFB 5V_AUDIO_S0 SC22P 10KR3 FOXCONN
2
ZZ.47593.411 63.10334.151
BC77 AUD_AGND UB4 AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND
DUMMY-SC330P50V3KX 1 5 5VA_SET_MIC
2
SHDN# SET
1 ZZ.33124.2B1 1
1
2 MIC_VREF_S0
BCB7 GND RB8
SB-31-5 SC1U10V3ZY 10KR3
Remove Q16,U30,BC200,R168,R167
3 IN OUT 4
63.10334.151 Wistron Corporation
MAX8863-S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AUD_AGND 74.08863.A3F BCB6 Taipei Hsien 221, Taiwan, R.O.C.
2
SC1U10V3ZY
For High limit --> H45 Title
AUD_AGND
SB-0724-1 AUD_AGND AUDIO (2/2)
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 36 of 51
A B C D E
A B C D E
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,38,39,40,41,42,43,47,48,49,51 3D3V_S0
3D3V_S3
10,22,28,34,48 3D3V_S3
3D3V_S5
22,23,24,25,27,29,34,43,45,48,50,51 3D3V_S5
4 5V_S0 4
2,19,21,22,23,24,25,26,27,28,30,32,33,35,36,38,39,40,41,42,43,46,47,48,50,51 5V_S0
NEAR M38859
KROW[8..1] 38
38 KCOL[16..1]
RP7
5V_S0 5 6 KROW8
KROW6 4 7 KROW7
2 1 SMBC_KBC KROW5 3 8 KROW1
R723 10KR3 KROW4 2 9 KROW2
2 1 SMBD_KBC KROW3 1 10
R729 10KR3
3D3V_S3 SRP10K-1
K3D-SC R3 DUMMY-R3
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
DUMMY
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
1 2
Q19_C
3D3V_S3 BC40 BC32 Q62 D50
SCD1U
SC4D7U16V6ZY-U 3D3V_S3 Q61 3 OUT 1 2 CNVSS
47K 3 OUT Q19-B 2 R1
1
1
KBCFLASH 2 R1 IN 1 GND 5V_S0 DUMMY-S1N4148
IN 1 GND R2 ZZ.04148.011 R36 BC8
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
62
61
60
59
58
57
56
55
71
1
R593 R2 DUMMY-DTA124EE
DUMMY-R3 R100 R94 DUMMY-DTC144EUA ZZ.00124.01H DUMMY-10KR3
VCC
P3-0/PWM-00
P3-1/PWM-10
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7
3 10KR3 100KR3 ZZ.00144.B1K DUMMY-SCD1U16V3KX 3
2
38 1
2
2
34 VOL_DOWN# P2-1 P6-1/AN-1
34 REW/SCAN_REW# 36 P2-2 P6-2/AN-2 79 BAT_IN# 48
34 PLAY/PAUSE# 35 P2-3 P6-3/AN-3 78 KEY4# 34
34 77 J8-SC:for Annie D13 S1N4148
34 FW/SCAN_FW# P2-4(LED-0) P6-4/AN-4 KEY5# 34
33 76 P6-5 R9131 2 AC_IN_1 1 2 3D3V_S0
22 CAP_LED# P2-5(LED-1) P6-5/AN-5 BT_BTN# 34 AC_IN 22,43
32 75 0R2-0
22 NUM_LED# KBCFLASH P2-6(LED-2) P6-6/AN-6 MAIL# 34
J8-SC: 31 74 P6-7 1 2 PM_SUS_STAT#_KBC 1 2
P2-7(LED-3) P6-7/AN-7 STDBY_LED# 22
R914 0R2-0 BL2#_KBC 1 2 R738 10KR3
EMAIL_LED# : S3_WAKE# R744 1 INTERNET# BL2# 44
28,33 BT_IN# 27 P4-0/XCOUT P5-0/INT-5 17 2 INTERNET# 34
S0--LOW R9251 2 P4-1 26 16 0R2-0 D7 S1N4148 3D3V_S3
22 EMAIL_LED# P4-1/XCIN P5-1/INT-20 ECSMI# 24
S3--HIGH 0R2-0 P4-2 23 15 R739 DUMMY-R3
P4-2/INT-0 P5-2/INT-30 ECSWI# 24
22 14 PM_SUS_STAT#_KBC 1 2 BL2#_KBC 1 2
(for Annie) 34 STOP/EJECT# P4-3/INT-1 P5-3/INT-40 PM_SLP_S3# 23,43,45,46,48,50
21 13 R737 10KR3
23 KBRCIN# P4-4/RXD P5-4/CNTR-0 BL2#_KBC LID# 22,34
23 KA20GATE 20 P4-5/TXD P5-5/CNTR-1 12
19 11 R683 P6-5 1 2
24 ECSCI# P4-6/SCLK P5-6/DA-1/PWM-01 KBCSPKR BRIGHTNESS 22
KBC_CLKRUN# 18 10 DUMMY-R3 R926 100KR2
TP168 P4-7/SRDY#/CLKRUN# P5-7/DA-2/PWM-11
3
TPAD30 P6-7 1 2
XIN_KBC R927 100KR2
P8-4/LFRAME#
28
P8-5/LRESET#
XIN
1
P8-7/SERIRQ
XOUT
P8-0/LAD-0
P8-1/LAD-1
P8-2/LAD-2
P8-3/LAD-3
38859_VREF P4-1
P8-6/LCLK
72 1 2
P7-6/SDA
P7-7/SCL
VREF
RESET#
R740 R928 100KR2
CNVSS
10KR3 X9
AVSS
P7-2
P7-1
P7-0
VSS
BC29 RESON-8MHZ-U P4-2 1 2
1
SC1U10V3ZY 82.10009.001 R929 100KR2
2
(3.3V) 1 2 5V_S3
70
69
68
67
66
65
64
63
25
24
30
73
1
2 2
U68
2
3
4
5
6
7
8
9
M38857M8V2D13-U1 R145
R143 470R3
KBDATA_5
25,34,39,40,42 LPC_LAD0
3
MDATA_5
15KR3F
KBCLK_5
TDATA_5
MCLK_5
25,34,39,40,42 LPC_LAD1
TCLK_5
2
25,34,39,40,42 LPC_LAD3
CNVSS (2.5V) APL431-U
25,34,39,40,42 LPC_LFRAME# 3D3V_S5
2
14,19,23,29,31,33,34,39,40,42 PCIRST_BUF# 1 2 PCIRST_KBC# SUS_PCIRST# 23
3D3V_S5
0R2-0 R160 R174
2
47KR3F U19_Q-
3 CLK33_KBC
TDATA_5 38
BC31 R188
MDATA_5 38
1 2KBCCLK_RC
2 1 BC6 U35B
10
KBDATA_5 38
SCD1U
TCLK_5 38
SC10P50V2JN-1 10KR3 14 9
MCLK_5 38
PR
VCC Q AUDIO_KBC_BEEP 35
24,31,34,40,42 P_SERIRQ KBCLK_5 38 J8-SC GPIO Update 12 D
SMBD_KBC 27,43
2003/07/14 KBCSPKR 11
SMBC_KBC 27,43 CLK
P6-7 - STDBY_LED# Q 8
1
P6-5 - BT_BTN# 7
CL
GND
P4-2 - EMAIL_LED# R736
100KR3 TSLCX74
13
P/N: 85.49S01.001 1 2 U19_CL
2
3D3V_S0
R265 10KR3
BC48 SCD01U50V3KX
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
KBC
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 37 of 51
A B C D E
A B C D E
3D3V_S0
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,39,40,41,42,43,47,48,49,51 3D3V_S0
5V_S0
4
5V_S0
TOUCH PAD 4
1
2
3
4
RN97 NEAR
5V_S0 5V_S0
SRN10K KBC
CHIP
1
1
8
7
6
5
BC62 BC65 TPAD1
R289 R272 SCD1U SC1U10V3ZY
10KR3 10KR3 1
37 MCLK_5
2
1 2 R273 100R3 TP_DATA 3
2
2
37 MDATA_5 37 TDATA_5
37 TCLK_5 1 2 R290 100R3 TP_CLK 4
37 KBDATA_5 5
6
37 KBCLK_5
BC66 BC53 MOLEX-CON6-U1
SC47P SC47P 20.K0021.006
3 3
KCOL12 1 2 KROW8 1 2
C670 SC150P25V2JN C671 SC150P25V2JN
KCOL11 1 2 KROW7 1 2
C672 SC150P25V2JN C673 SC150P25V2JN
K/B
49 8 1 2 1 2
KCOL16 48 9 KCOL16 C682 SC150P25V2JN C683 SC150P25V2JN
RN65 KCOL15 47 10 KCOL15
MATRIXID1# 2 3 30 1 KCOL14 46 11 KCOL14 KCOL5 1 2 KROW1 1 2
MATRIXID2# 1 4 KCOL13 45 12 KCOL13 C684 SC150P25V2JN C685 SC150P25V2JN
KCOL12 44 13 KCOL12
SRN100KJ KCOL11 43 14 KCOL11 KCOL4 1 2 KCOL16 1 2
EC21 KCOL10 42 15 KCOL10 C686 SC150P25V2JN C687 SC150P25V2JN
SCD1U16V KCOL9 41 16 KCOL9
KCOL8 40 17 KCOL8 KCOL3 1 2 KCOL15 1 2
KCOL7 39 18 KCOL7 C688 SC150P25V2JN C689 SC150P25V2JN
KCOL6 38 19 KCOL6
KCOL5 37 20 KCOL5 KCOL2 1 2 KCOL14 1 2
KCOL4 36 21 KCOL4 C690 SC150P25V2JN C691 SC150P25V2JN
KCOL3 35 22 KCOL3
KCOL2 34 23 KCOL2 KCOL1 1 2 KCOL13 1 2
KCOL1 33 24 KCOL1 C692 SC150P25V2JN C693 SC150P25V2JN
SB 32 25
31 26
Keyboard matrix ( from vendor ) MATRIXID2# 30 27 MATRIXID2#
MATRIXID2# 40
MATRIXID1# 29 28 MATRIXID1#
MATRIXID1# 40
US Jap Eur Other ETY-CON28
20.K0108.028
1 1
Low Bit MATRIXID1# 1 1 0 0
3D3V_S0
RN25
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,40,41,42,43,47,48,49,51 3D3V_S0
3 2 LPC_FGPI0
4 1 LPC_FGPI1 5V_S0
25,34,37,40,42 LPC_LAD[3..0]
SRN10KJ
3D3V_S0 2,19,21,22,23,24,25,26,27,28,30,32,33,35,36,37,38,40,41,42,43,46,47,48,50,51 5V_S0
VCC_CORE_S0
RN51
2,7,47 VCC_CORE_S0
8 1 LPC_FGPI3
4 7 2 LPC_FGPI2 BC382 BC28 BC27 BC33 BC386 4
6 3 LPC_FGPI4 SC4D7U16V6ZY-U SCD1U SCD1U SCD1U SCD1U
5 4 SELECT_LPC
SRN10K
3D3V_S0
1
R239 3D3V_S0
DUMMY-0R3-0-U
ZZ.00000.001 SELECT_LPC
LPC_CE# 1 2
VPP
2
R158 0R3-0-U
U17
25
32
29
28
27
1NC
VCC
VCC
IC(VIL)/IC(VIH)
NC
CE#
3D3V_S0
1
12 13 LPC_LAD0
R608 ID0/A0 LAD0/DQ0 LPC_LAD1
11 ID1/A1 LAD1/DQ1 14
10KR3 10 15 LPC_LAD2
ID2/A2 LAD2/DQ2 LPC_LAD3
LAD3/DQ3 17
3 3
8
TOP VIEW GOLDEN FINGER FOR DEBUG BOARD
2
40 LPCROM_WP# TBL#/A4
7 WP#/A5
ID3/A3 9
LPC_FGPI0 6 22 5V_S0 5V_S0
LPC_FGPI1 GPI0/A6 RFU/NC
5 18 CN5
LPC_FGPI2 GPI1/A7 RFU/DQ4
LPC_FGPI3
4 GPI2/A8 RFU/DQ5 19 A15 (B1)
3 GPI3/A9 RFU/DQ6 20 A1 A1 B1 B1
LPC_FGPI4 PCIRST_BUF# PCIRST_BUF#
30 GPI4/A10 RFU/DQ7 21 A14 (B2) LPC_LFRAME#
A2 A2 B2 B2
LPC_LFRAME#
A3 A3 B3 B3
LFRAME#/W#
A4 A4 B4 B4
CLK33_LPCROM_1 CLK33_LPCROM_1
....
....
A5 A5 B5 B5
CLK/RC#
INIT#/G#
A6 A6 B6 B6
LPC_INIT# A7 B7 LPC_INIT#
RST#
A7 B7
VSS
A2 (B14) A8 B8
NC
LPC_LAD3 A8 B8 LPC_LAD3
A9 A9 B9 B9
LPC_LAD2
A1 (B15) A10 A10 B10 B10 LPC_LAD2
24
31
23
26
16
SST49LF040 LPC_LAD1 A11 B11 LPC_LAD1
2
2 2
J8-SD LPC_LFRAME# 25,34,37,40,42
R948 DUMMY-R3
CLK33_LPCROM_1 1 2
3 CLK33_LPCROM
PLCC 32pin ST: 72.50040.003
ROMCLK_RC PLCC 32pin SST:
1 2 1 2
72.49004.B03
BC385 R550
U17_RST#
DUMMY-C3 DUMMY-R3
3D3V_S0
1
R543
10KR3
U54A
14
EXT_LPC# 1
2
3 LPCRST# 1 2
14,19,23,29,31,33,34,37,40,42 PCIRST_BUF# 2
R968 33R2
TSLCX08-U J8-SD: For SIV
7
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LPCROM / DEBUG PORT
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 39 of 51
A B C D E
A B C D E
PRNACK#_5
AUTOFD#_5
ERROR#_5
07-03
SLCTIN#_5
STROB#_5
PRINIT#_5
BUSY_5
SLCT_5
PE_5
PD_0
PD_1
PD_2
PD_3
PD_4
PD_5
PD_6
PD_7
3D3V_S0
PNF
4 41 SLCTIN#_5 4
41 PE_5
41 BUSY_5 U34
89
64
38
13
36
37
40
41
47
49
52
50
48
46
45
44
43
42
51
53
54
35
41 PRNACK#_5
41 SLCT_5 PC87392
71.87392.00G RP4
41 PRINIT#_5
VSS
VSS
VSS
VSS
SLCT/WGATE#
PE/WDATA#
BUSY_WAIT#/MTR1#
ACK#/DR1#
SLIN_ASTRB#/STEP#
INIT#/DIR#
PD0/INDEX#
PD1/TRK0#
PD2/WP#
PD3/RDATA#
PD4/DSKCHG#
PD5/MSEN0
PD6/DRATE0
PD7/MSEN1
ERR#/HDSEL#
AFD_DSTRB#/DENSEL/DRATE1
STB_WRITE#
PNF/XRDY#
5 6 PNF
LPCPD# 4 7 PCCS1#
41 ERROR#_5
IO_PME# 3 8
41 AUTOFD#_5 CHARGE_LED# 2 9 RF_LED#
41 STROB#_5
34 ENAUDIO# 1 10
DRATEO/IRSL2 3MODE#_5
DENSEL 33
30 DR0#_5 SRP100K
PCB_VER0 95 DR0# MTR0#_5 DR0#_5 22
GPIO20/XA0 MTR0# 31
PCB_VER1 94 WP#_5 3D3V_S0
PCB_VER2 93 GPIO21/XA1 WP# 24
21 DSKCHG#_5 J8-SC
ON Board LAN Setting
GPIO22/XA2 Parallel Port DSKCHG# INDEX#_5 3D3V_S0
22 CHARGE_LED# 92 GPIO23/XA3 INDEX# 32
GP24 91 GPIO24/XA4/XSTB0# TRK0# 25 TRK0#_5 High : 10/100M PHY
1
J8-SC GP25 72 28 STEP#_5
GPIO25/XCS0#/XRDY/DR1# STEP#
1
GP26 87 FDD 29 FDIR#_5 R915 R916R917 R931R932 Low : Giga LAN
GP27 GPIO26/XA6/PIRQA/XSTB2# DIR# HDSEL#_5 R918
100KR2 R505
86 GPIO27/XA7/PIRQB HDSEL# 22
3D3V_S0 R871 100KR2 26 WGATE#_5 100KR2 100KR2 100KR2 10KR2
WGATE# WDATA#_5 100KR2 100KR2
1 2 WDATA# 27
GP17 74 23 RDATA#_5 1 2 GP17
2
GPIO17/XA19/DCD2#/JOYABTN0 RDATA# 44 FLASH_GPIO2
1 R872 2 GP16 75 R919 0R2-0 GP32
2
28 BT_PWR_ON GPIO16/XA18/DSR2#/JOYBBTN0
0R2-0 BOOTBLOCK# PCCS1# 2 GP14
NS87392
76 GPIO15/XA17/SIN2/JOYAX XCS1#/MTR1#/DRATEO/XIOWR# 73 44 FLASH_GPIO1 1
1
GP14 77 90 R920 0R2-0
GPIO14/XA16/RTS2#/JOYBX XSTB1#/XCNF2/NC
CHK_PW 78 GPIO13/XA15/SOUT2/JOYBY XWR#/XCNF1 4 28 BT_DFM_LED# 1 2 GP27
22 BACKLT_OFF# 1 2 GP12 79 GPIO12/XA14/CTS2#/JOYAY SOUT1/XCNF0 59 SOUT1_5 41
R921 0R2-0 R480
3 R873 0R2-0 80 58 1 2 GP24 DUMMY-R2 3
43 MP3_CLR# GPIO11/XA13/DTR2_BOUT2#/JOYBBTP1 RTS1#/TEST RTS1#_5 41 38 MATRIXID1#
39 LPCROM_WP# 1 2 GP10 81 GPIO10/XA12/RI2#/JOYABTN1 DTR1_BOUT1/BADDR 61 DTR1#_5 41
R922 0R2-0
R874 0R2-0
38 MATRIXID2# 1 2 GP25 (100KR2)
GP07_1 1 2 GP07 96 85 R933 0R2-0
2
GPIO07/XD7/JOYABTN0 GPIO30/XA8/PIRQC BT_WAKEUP 28,33
R875 0R2-0 97 84 1 2 GP26
33 WIRELESS_EN GPIO06/XD6/JOYBBTN0 GPIO31/XA9/PIRQD/MTR1# BT_RESET 33 36 SIO_HP_IN
CHRG_OFF 98 83 GP32 R934 0R2-0
44 CHRG_OFF GPIO05/XD5/JOYAX GPIO32/XA10/MDRX/XIORD#
LEGACY_FDD_IN# 99 82 5V_S0
GPIO04/XD4/JOYBX GPIO33/XA11/MDTX/XIOWR# BT_DETACH 28,33
36 MIC_JKIN 100 GPIO03/XD3/JOYBY GPIO34/XRD#/WDO# 5 WIRELESS_SET 33
1 19 IO_PME# R533 RP6
36 ENAUDIO# GPI002/XD2/JOYAY GPIO35/SMI#
2 6 1 2 CHRG_OFF INDEX#_5 1 10
22 RF_LED# GPIO01/XD1/JOYBBTN1 IR GPIO36/CLKRUN# P_CLKRUN# 24,33
21 CRT_IN# 3 GPIO00/XD0/JOYABTN1 GPIO37/DR1#/IRSL2/XIORD# 71 BT_PWREN 33 2 9 WP#_5
10KR3 8 TRK0#_5
PWUREQ#/IRSL3
3
LPC DSKCHG#_5 4 7 RDATA#_5
IRRX2_IRSL0
5V_S0 5 6
LFRAME#
LRESET#
LPCPD#
SERIRQ
SRP4K7
LDRQ#
DCD1#
DSR1#
CTS1#
CLKIN
IRRX1
IRSL1
FDD
LCLK
LAD0
LAD1
LAD2
LAD3
IRTX
SIN1
RI1#
VDD
VDD
VDD
VDD
3D3V_S0
NC
88
63
39
14
65
69
68
70
67
66
20
10
11
12
15
16
17
18
57
60
56
55
62
1
9
8
7
3D3V_S0 R479 FDD1
HDSEL#_5 27 1 HDSEL#_5
1KR3 28 2
RI#_5 41
RDATA#_5 29 3 RDATA#_5
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LAD0
LPCPD#
DCD1#_5 41 LEGACY_FDD_IN#
LEGACY_FDD_IN# 30 4
2
DSR1#_5 41
BC367 BC366 BC380 BC339 TP179 IRRX_3 WP#_5 1 2 WP#_FDD 31 5 WP#_FDD
CTS1#_5 41
SC4D7U10V5ZY SCD1U SCD1U SCD1U TP180 IRSL0_3 R463 33R3 32 6
SIN1_5 41 TRK0#_5
TP181 IRTX_3 1 2 TRK0#_FDD 33 7 TRK0#_FDD
2 2
R462 100R3 34 8
BC150 WGATE#_5 35 9 WGATE#_5
3D3V_S0 3 CLK14_SIO LPC_LAD[3..0] 25,34,37,39,42
36 10
BC368 DUMMY-SCD01U WDATA#_5 37 11 WDATA#_5
1 2 LPC_LFRAME# 25,34,37,39,42 ZZ.10324.1B1 38 12
STEP#_5 39 13 STEP#_5
8
7
6
5
FIR
20.K0021.026
1
PCB_VER0 VCC2/IRED_ANODE
SA 0 1 1 2
2
1 IRED_CATHODE 1
PCB_VER1 10mil IRTX_3 3
PCB_VER2 3D3V_S0 IRRX_3 R38 TXD
2 33R3 IRRXD
SB 0 1 0 R43 10R5
10mil
10mil IRSL0_3
1 4 RXD
SC 1 1 0 1 2 FIR_VCC_S0
5
6
SD
VCC1
Wistron Corporation
1
FIR-TFDU6102
-2 1 1 1
2
FIR_GND A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 40 of 51
A B C D E
A B C D E
3D3V_S0
2,19,21,22,23,24,25,26,27,28,30,32,33,35,36,37,38,39,40,42,43,46,47,48,50,51 5V_S0
PRPD0
PRPD1
PRPD2
4 PRPD3 4
PRPD4
PRPD5
PRPD6
PRPD7
1
SERIAL PORT
1
BC417 BC410
1
BC418 SC100P50V2JN BC412 SC100P50V2JN
1
BC419 SC100P50V2JN BC414 SC100P50V2JN
2
BC420 SC100P50V2JN BC416 SC100P50V2JN
2
SC100P50V2JN SC100P50V2JN
2
5V_S0
2
PRT1
26
STROB#_D5 1
BC156 BC158 AUTOFD#_D5 14
SCD1U 2
1
ERROR#_D5 15
BC104 BC151 DY-SCD33U25V5ZY 3
DY-SCD33U25V5ZY DY-SCD047U25V3KX U44 PRINIT#_D5 16
MAX3243_C1+ 28 26 BC69 4
2
1
MAX3243_C2- 2 DY-SCD33U25V5ZY 18
C2- PSOUT1 TP29 BC415 BC411 BC405
40 SOUT1_5 14 T1IN T1OUT 9 6
1
13 10 PRTS1# TP34
TPAD30 SC100P50V2JN SC100P50V2JN SC100P50V2JN 19
3 40 RTS1#_5 T2IN T2OUT PDTR1# TP27 BC413 BC409 3
12 11 TPAD30 7
2
R467 40 DTR1#_5 T3IN T3OUT
1 2 COM_RI0# 20 TPAD30 SC100P50V2JN SC100P50V2JN 20
3D3V_S0 R2OUTB PDSR1# TP37
19 4 8
2
40 DSR1#_5 R1OUT R1IN PRI1#
DUMMY-10KR3 18 5 TP33
TPAD30 21
40 RI#_5 R2OUT R2IN PCTS1# TP36
40 CTS1#_5 17 R3OUT R3IN 6 TPAD30 9
16 7 PSIN1 TP31
TPAD30 22
Check H2 40 SIN1_5 R4OUT R4IN PDCD1# TP35 PRNACK#_D5
40 DCD1#_5 15 R5OUT R5IN 8 TPAD30 10
23 FORCEON TPAD30 23
1 2 MAX3243_ON 22 BUSY_D5 11
5V_S0 FORCEOFF#
21 INVALID# GND 25 24
R468 DUMMY-100KR3 PE_D5 12
DUMMY-MAX3243 25
ZZ.03243.0F9 SLCT_D5 13
1
27
SA DV-3 Change MAX3243CDB TI to MAX3243 MAXIM BC423 BC421
SC100P50V2JN SC100P50V2JN PRNT25-17
1
20.B0030.025
2
BC422 BC424
SC100P50V2JN SC100P50V2JN
2
5V_S0
2
RN96 D54 FROM SIO
SLCTIN#_5 1 8 SLCTIN#_D5
2
PD_2 PRPD2 RB411D 2
2 7 83.3R002.A81
PRINIT#_5 3 6 PRINIT#_D5
PD_1 PD_[0..7] 40
4 5 PRPD1
3
PRN_PU_5V
SRN33 RP1
ERROR#_D5 1 10
PRPD0 2 9 PRPD1
SLCT_5 40
AUTOFD#_D5 3 8 PRINIT#_D5
RN98 STROB#_D5 4 7 PRPD2
PD_6 SLCTIN#_D5 PE_5 40
1 8 PRPD6 5 6
PD_5 2 7 PRPD5
PRNACK#_5 40
PD_4 3 6 PRPD4 SRP1K
PD_3 4 5 PRPD3
ERROR#_5 40
RP2
SRN33 SLCT_D5 1 10 PRINIT#_5 40
PE_D5 2 9 PRPD3
PRNACK#_D5 3 8 PRPD4
SLCTIN#_5 40
RN94 PRPD7 4 7 PRPD5
SLCT_5 1 8 SLCT_D5 5 6 PRPD6
PE_5 PE_D5 AUTOFD#_5 40
2 7
PRNACK#_5 3 6 PRNACK#_D5 SRP1K STROB#_5 40
PD_7 4 5 PRPD7
R5 1KR3
BUSY_5 40
SRN33 1 2 BUSY_D5
RN95
ERROR#_5 1 8 ERROR#_D5
PD_0 2 7 PRPD0 CHECK PULL HIGH
1
AUTOFD#_5 3 6 AUTOFD#_D5 1
STROB#_5 4 5 STROB#_D5
SRN33
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R7
BUSY_5 1 2 BUSY_D5 Title
33R3 PORTS
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 41 of 51
A B C D E
A B C D E
3D3V_S0
3D3V_S0
R481 33R3
2,3,8,9,10,11,14,16,19,20,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37,38,39,40,41,43,47,48,49,51 3D3V_S0
SDCLK1 1 2 SDCLK
MSCLK1 1 2 MSCLK 5V_S0
R526 33R3
1
1
2,19,21,22,23,24,25,26,27,28,30,32,33,35,36,37,38,39,40,41,43,46,47,48,50,51 5V_S0
1
C312 C302
MSPOWER#
SCD01U16V2KX SCD01U16V2KX C327 C316
SDPOWER#
Close to W83L518D DY-SC33P50V2JN DY-SC33P50V2JN
2
MSCLK1
SDLED
2
MS1
MS2
MS3
MS4
Close to W83L518D POWER K3D-SB
4 PIN EMI ADD 7/31 3D3V_S0 3D3V_CARD_S0 3D3V_S0 4
36
35
34
33
32
31
30
29
28
27
26
25
8
7
6
5
1
U50
R431 R529
MSLED
VSS
MSCLK
SDPWR#/GP21
SDLED/GP20
SCC4
SCC8
MSPWR#
MS1
MS2
MS3
MS4
3D3V_S0 10KR3 RN14 DUMMY-R3
5V_S0 Close to W83L518D SRN4K7
K3D-SB
1
2
3
4
2
SDCLK1 37 24 MS5
SD_1 SDCLK/GP22 MS5 CARD_XIN SD_DET
38 23 X8
SD_2 SD1/GP23 XIN CARD_XOUT
39 SD2/GP24 XOUT 22 1 2
40 21 SD_4
SD_3 VDD3V SCRST# SD_5
41 20 XTAL-48MHZ-7
SD3/GP25 SCIO
1
SD_4 42 19
SD_5 SD4/GP26 SCCLK SCPSNT L38 R446 SDCLK
43 SD5/GP27 SCPSNT 18
LPC_LAD3 44 17 MLB201209 1 2
LPC_LAD2 LAD3 SCPWR#
45 LAD2 SCLED 16
1
LPC_LAD1 46 15 C299 1MR3F SD_2
LAD1 VDD
1
LPC_LAD0 47 14 PHEFRAS R439 K3D-SB C315 SD_1
P_SERIRQ LAD0 GP10/PHEFRAS SD_DET 4K7R3F SC10P50V2JN-1 SD_3
48 13
CARD_XOUT# 2
24,31,34,37,40 P_SERIRQ SERIRQ GP11/CARD_DETECT/EX_CD SC10P50V2JN-1
2
R527
SDLED 1 2 SDLED_CN
2
2
LFRAME#
1
RESET#
1KR3
PCICLK
LDRQ#
K3D-SB R517
PME#
GP17
GP16
GP15
GP14
GP13
GP12
VSS
1
DUMMY-56R3
3 R441 3
W83L518D-VD6 C324 1MR3 K3D-SC(DUMMY)
10
11
12 SC4D7U10V5ZY
1
2
3
4
5
6
7
8
9
2
2
SDCLK#
3 CLK33_PCM_CARD
5V_S0
25,34,37,39,40 LPC_LFRAME#
14,19,23,29,31,33,34,37,39,40 PCIRST_BUF#
24,29,31,33 PME#_SB 1 2PME#_U50
1
1
R881 DUMMY-R2 Pull-low : Addr - 4E h C319
C297 DY-SC10P50V2JN-1
J8-SC SCD01U16V2KX PHEFRAS
2
2
2
K3D-SB
EMI ADD 7/31
ref schematics is 4.7k R432
10KR3
25,34,37,39,40 LPC_LAD[0..3]
MS SD/MMC
1
3D3V_S0
3D3V_CARD_S0 3D3V_CARD_S0
1
R443 M_BAY1
ref schematics is 4.7k 10KR3 20 SDLED_CN
SD_DET 21 22
2 2
MH2
10
2
MS1 11 8 SD_4
12 7 SD_3
MS2 13 6
MS3 14 5 SDCLK
MS4 15 4
MS5 16 3
MSCLK 17 2 SD_2
1
18 1 SD_1
R486 19 9 SD_5
R442 200KR3 MH1
DUMMY-56R3 23
3D3V_S0
K3D-SC(DUMMY) CARDBUS-SKT33
2
62.10051.121
For SD/MS Card Power
MSCLK#
1
3D3V_S0
R536 U53 3D3V_S0 3D3V_CARD_S0
3D3V_S0
1
8K2R2 2 5
R519 GND IN
3 NC
1
U54B CARD_PWR# 4 1
2
14
MSPOWER# 4 D DY-SC10P50V2JN-1
6 CARD_PWR 1 Q41 AAT4250-U C323
2
2
SDPOWER# 5 G 2N7002 SCD1U16V
1 1
S C334
TSLCX08-U SCD1U16V
2
1
U49A
14
R787 Modify-0602
Origin: Fuse between Jack & inductor AD+ 56KR3 C580 1
1
U94 K3D-SB SC1U10V3ZY 3
DCIN1
F4:R451007, P/N: 69.47001.011 R797
AD_AC_IN 44
1 8 2
Layout trace 200 mil Layout trace 200 mil
S D
L5 FBMJ3216HS480NT 2 7 10KR3
2
S D AC_IN 22,37
1 AD_JACK+ 1 2 ADJACK 3 6 TSAHCT32 K3D-SB
3
S D
4 5 D
7
1
1
G D
BC52 1 Q4
2
4 1 2 BC76 FDS6675-U R805 G R464 4
S 2N7002
1
2 SC100P50V2JN SCD1U 1KR3F N43-2 1 2
1
LB1 FBMJ3216HS480NT
2
3
K 22
3 C14 D DUMMY-R2
1
SCD1U50V3KX 1 Q66
2
4 78.10424.2B1 R33 1 2 12VGATE_S0_1 +5V_UP_S5
2
C16 G 47,48 12VGATE_S0
AD_OFF# 2 1 2 N43-1 S 2N7002 0R2-0 R37
DC-JACK49-U2 100KR3
2
3
1
K 22
R828 10KR3 D SCD1U50V3KX
1
1 2AD_OFF_1 1 Q68 BC79
2
40 AD_OFF 2N7002 SCD1U50V5KX
G R799 R34 R44
1
S 10KR3 10KR3 10KR3
1
BC363
G
2
R827 SC1U10V3ZY Q2
2
100KR3 DTA124EUA-U1 2 3 BT_SDA_5
2
R35 27,37 SMBD_KBC BT_SDA_5 44,48
AD_SWITCH 1 2
D
2
Change to SIO GPIO07 56KR3 Q3 2N7002
1
G
5V_S0
2 3 BT_SCL_5
27,37 SMBC_KBC BT_SCL_5 44,48
D
R375 Q11 2N7002
10KR2
+5V_AUX_S5
3D3V_S5 +5V_AUX_S5
MP3_CLR
2
3 2 1 MP3_PRE# 3
3
R360 22KR3 D D
C120 1 1 MP3_CLR# 40
SCD1U +5V_AUX_S5 G G +5V_AUX_S5
1
U38A S S
4
2
10KR2 1 2 MP3_PWERON 5 U55E DUMMY-2N7002 DUMMY-2N7002 U55F
VCC 14
14
14
PR
Q
D 2 TSAHCT14 K3D-SB TSAHCT14
1
DUMMY-R2 R299
D36 3 MP3_BTN 1 2MP3_PWRBTN10 11 MP3_PWRBTN# R349 MP3_SLP_S3 12 13 PM_SLP_S3#
2
GND U52
RB751V-40
14
K3D-SB C107 5 1 U55A
7
SCD1U VCC A
K3D-SB
1
R500
MP3_PWERON# 2 DL_ALL_PG 2 1 1 2
B
3
D 10KR3
1HI_PAUSE 4 3
MP3_SLP_S3_1
Y GND
3
7
2N7002 Q23
2
G
2N7002
S
PWR_CTL Logic BY Hardware J8-SC 5V_S0
2
1
R483 47KR3
3D3V_S5 PWRBTN_3 1 2 PWRBTN_2 BC178 R882
SC1U10V3ZY 4K7R3
2 2
BC169 +5V_AUX_S5
U50_PR
1
2
R880 +5V_AUX_S5 K3D-SB 1 2
4K7R3 +5V_AUX_S5
U55B
1
U38B 10KR3
14
10
TSAHCT14
D10 47KR3
2
14
24 PM_PWRBTN#
PR
Q VCC
6 D 12 TSAHCT14
1
To SB S1N4148 5 PM_SLP_S5# 12VGATE_S0
2
PM_SLP_S5# 23,46,48,49,50
11 6 5 PWRBTN# R516
CLK PWRBTN# 34
TSAHCT32 8 100KR3 K3D-SB
7
Q
SD#_S5_1
7 +5V_AUX_S5
7
CL
GND
1
+5V_AUX_S5 +5V_AUX_S5 D40
1
S1N4148 K3D-SC Q22
G
7
2
13
U55D U49C U61 2N7002
14
14
D
8 9 8 4 3
2
45,49 SHUTDOWN_S5 Y GND
10 AC_IN 1 2 Q26_G
1 Q29
0R3-0-U G 2N7002 BC138
TSAHCT32 10KR3 S SCD1U NC7SZ125-U
SB-40-1
7
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PWR CTL LOGIC / ADT / DC CONN
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 43 of 51
A B C D E
A B C D E
3
D
BT_TH 1 Q48 DUMMY
G 2N7002
1
S D25
2 1 1645_AD+_1
R31,BC16,R39,BC26
2
R541 AD+ DCBATOUT
DUMMY-R3 R585 SSM34 Rating 4A must close to R27
1
DUMMY-R3 83.3R004.C8M Modify-0602
D34 R591
R584 U21 FDS6675-U 1 2
2
S1N4148-1 DUMMY-R3 D G 4
4 5 4
1
D 6 D S 3 D02R7520F BC394
1
1 Q42 7 D S 2 SCD1U50V5ZY
2
40 CHRG_OFF 2N7002 8 D S 1 L40 L39
2
G
1
S
1645_DCIN
R522 1645_PDS 4D7R3 R270 FBMJ3216HS480NT FBMJ3216HS480NT
1
100KR3 R258 1645_CSSP 1 2 4D7R3 R269
1645_CSSN 1 2
2
1KR3
2
2 LDO_VCC M1645_DH
BC59 BC56
1
SC1U50V5ZY SC1U50V5ZY
2
BC26 BC25
R595 SC10U35V0ZY-U SC10U35V0ZY-U
4
3
2
1
4
3
2
1
BC35 LDO_VCC DUMMY-R3
1
BC43 SC1U50V5ZY BC47 (10R3) U11 U16
G
S
S
S
G
S
S
S
D28
5
6
7
8
J8-SC R549 SC1U50V5ZY SCD1U50V5ZY R539 33R3
1645_CVS
Reduce total 28K7R3F 2 1 2 1 N44-1 SI4425DY SI4425DY
12
D
D
D
D
power to 85% U30 S1N4148-1 BC375 U26
G
S
S
S
BC379 SCD1U BC389
2
D
D
D
D
D
D
D
D
1 28 SI4892DY DUMMY-C3
DCIN CVS
BC387 R548 30KR3F 2 27 J8-SC (SC1000P100V3KX) J8-SC
4
3
2
1
5
6
7
8
5
6
7
8
1645_CLS LDO PDS SCD1U16V3KX
1 2 3 CLS CSSP 26 added rating J8-SC Change new U11,U16
1645_REF 4 25
2
SC1U10V5KX 1645_CCS REF CSSN 1645_BST R5110R3-0-U
Change new
5 CCS BST 24
1645_CCI 6 23 1645_DH1_1 1 2 1645_DH1_2 L21 IND-15UH-19 R65 D02R7520F
BC39 1645_CCV_1 1645_CCV CCI DHI 1645_LX
1 2 7 CCV LX 22 1 2 1 2 BT+
BC38 R240 10KR3 +5V_UP_S5 8 21 1645_DLOV
GND DLOV
Modify-0612
1645_LX1
3 SCD01U50V3KX 9 20 1645_DLO_1 1 2 1645_DLO_2 3
BATT DLO
1
SCD01U50V3KX 1645_DAC 10 19 R510 0R3-0-U
DAC PGND
1
11 18 1645_CSIP 63.00000.001
VDD CSIP
5
6
7
8
12 17 1645_CSIN R242 TC2 TC1
BC383 THM CSIN 1645_PDL U28 DUMMY-R3 SE47U35VGM-1 SE47U35VGM-1
13 16
D
D
D
D
SCD01U50V3KX SCL PDL
BC34 14 15 1645_ALERT# (10R3)
2
SC1U25V5ZY SDA INT# FDS6690S
R18 = 30KR3F , J8-SC
TP134
1645_LX_12
R41 = 49K9R3F , BC37 MAX1645EEI TPAD30
R40 = 100KR3F, SCD1U16V3KX BC55 BC54
G
S
S
S
1
SCD1U50V5ZY SCD1U50V5ZY
1645_TH
4
3
2
1
1R3 1R3
Total Power = BC41
1 2
2.56A*20V = 64W(<65W)
BC374
2
+5V_UP_S5 SC1500P50V3KX DUMMY-C3
G8 (SC1000P100V3KX)
1 2
1
R547 GAP-CLOSE
100KR3
K3D-SC R546 notice sense resistor noise and trace
10KR3
2
48 BT+SENSE
2
48 BT_TH
43,48 BT_SCL_5
43,48 BT_SDA_5
2 2
+5V_UP_S5
1
R525
100KR2 U33
2 6 BT_SCL_5
37 BL2# XTAL1/PB3 PB1/MISO/INT0/AIN1
3 5 PB0
2
0R2-0 4 8
GND VCC +5V_UP_S5
R532
1KR2 C330 1
SCD1U16V ATTINY12L-4SI C88
3+5V_UP_S5_2
SCD1U10V2MX-1
2
R523 R531
43 AD_AC_IN 1 2 PB0_1 1 2
20KR2 20KR2
R515 3
Q38 1 2FLASH2 2 Q40
1 R542 40 FLASH_GPIO2 1
3
1KR2 R518
Wistron Corporation
1
G
R544 S 1 2 10KR2
1
(SCD1U10V2MX-1) Title
2
CHARGER CIRCUIT
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 44 of 51
A B C D E
A B C D E
SYSTEM DC/DC
3D3V_S5/5V_S5/1D5V_S5/UP+5V
G15 G20
1 2 I=6A 1 2
GAP-CLOSE GAP-CLOSE
G28
3D3V_DC_S5 1 2 3D3V_S5 G5
1 2
GAP-CLOSE DCBATOUT_MAX1999
R77 MAX1999_LDO5 MAX1999_VCC GAP-CLOSE
G27 1 2 MAX1999_V+
1 2 4D7R5 R53 C380
1 2 1 2 DCBATOUT_MAX1999
GAP-CLOSE 4D7R5
1
R98 10R3 SC1U10V3ZY
3
G26 DCBATOUT_MAX1999 K3D-SB C360 C11
I=5A 1 2 SC10U35V0ZY-U SCD1U
K3D-SC D14
2
OCP=6.5A~8.5A GAP-CLOSE BAW56LT1
1
C10 C358
5
6
7
8
MAX1999_BST3 MAX1999_BST5 SC10U35V0ZY-U SCD1U25V5KX
U77 K3D-SB
2
D
D
D
D
1
SCD1U16V3KX
C41 SCD1U25V5KX FDS9412
C354
SCD1U16V3KX
part:J8-SC
2
SC10U35V0ZY-U
C485
8
7
6
5
2
K3D-SB R95 U70 R749
2
U69 R666
D
D
D
D
20
17
G
S
S
S
220KR3 0R3-U
FDS9412-U 0R3-U
4
3
2
1
VCC
V+
3 3
1
BST3 28 14 BST5 5V_DC_S5
1
BST3 BST5
S
S
S
G
3D3V_DC_S5
MAX1999_DH3 26 16 MAX1999_DH5
1
2
3
4
8
7
6
5
SC47P
MAX1999_LX5_1
C39 SC47P 5V_DC_S5
ST150U6D3V-1-U
22 OUT3 OUT5 21
1
5
6
7
8
SC100P D24 U66
TC5
ST150U6D3V-1-U
D
D
D
D
1
SSM14 MAX1999_FB3 MAX1999_FB5 U81
TC4
7 9
D
D
D
D
SI4892DY FB3 FB5 D8
1
G
S
S
S
SSM14
2
1
G
S
S
S
C38
2
2
R114 R130 MAX1999_SD_3 3 SI4892DY SC100P
1
2
3
4
4
3
2
1
2
R6840R3-U ON5 PRO# 100KR3 DUMMY-R3
NC 1 J8-SC
1
MAX1999_SHDN# 6 SHDN# adjusted OCP R50
2
2MR3
2
11 MAX1999_ILIM5
ILIM5
1
R722
2
R117 1 2 TON 13
MAX1999_VCC TON
0R3-U 10KR3 5 MAX1999_ILIM3 MAX1999_FB5
ILIM3
1 2
DUMMY-R3 R665
2 2
R753 8 2 PGOOD 2 1
2
1
MAX1999_REF
2
1
C363 DUMMY-R3 R54
MAX1999_SKIP# 12 0R3-U
10KR3
R697
10KR3
R715
SKIP# GND 23
SCD22U10V3KX
LDO3
LDO5
1
2
MAX1999EEI
2
MAX1999_VCC
Ton = GND : 400KHz/500KHz
25
18
(5V/3D3V) MAX1999_LDO5
MAX1999_LDO3
K3D-SB MAX1999_SHDN#
1
R580
DCBATOUT
1
1
100KR3 R41
1
R581 R647 56KR3 R717
100KR3 51KR3 K3D-SB 2K15R3F R693
1
K3D-SC 2K49R3F
2
MAX1999_SKIP# R611
2
MAX1999_VCC_1 DUMMY-20KR3F Modify-0602
2
2
QUICK_SDN# 27
J8-SA
2
R40
3
R616 Q8
G 2N7002 G 2N7002 1 2 1 5
1 OUT VEE 3 1
S S DUMMY-2MR3 D 2N7002
2 1
2
R561
1
K3D-SC(DUMMY)
Size Document Number Rev
2
A3 -1
Gannet
Date: Thursday, December 04, 2003 Sheet 45 of 51
A B C D E
A B C D E
SC4D7U25V6KX
1 2 1 2 1 2
SCD1U25V5KX
1D2V_S0
1
1 2
R721 10R3 SCD1U50V3ZY
C356
C361
4 GAP-CLOSE GAP-CLOSE 4
M1715VCCF 1 2 BC400 DUMMY-R2
G34
2
23,37,43,45,48,50 PM_SLP_S3#
1
I=7A 1 2 BC397
SC1U10V3ZY R781 BC7 G30
OCP=8.5A~11.5A
3
GAP-CLOSE 1 2 M1715VCC R758 SC4D7U10V5ZY 1 2
0R3-U D9
0R3-U
1715_SKIP#
R759 GAP-CLOSE
BAW56
2 VGACORE_ON
SC4D7U25V6KX
1
2
83.00056.A11
8
7
6
5
5
C365 MAX1715_VDD G31
1
SCD1U25V5KX U13 0R3-U U12
D
D
D
D
1 2
2
M1715BST1 SI4834DY VGARAM VVGADDR
C364
SI4800
84.04800.A37
M1715BST2_1 84.04834.037 I=3A GAP-CLOSE
2
OCP=3.8A~5.3A
1
Ivgacore=7.05A;OCP@9.0A
11
10
21
20
R777
4
1 2 M1715DH2_G Ivgaram3.7A;OCP@5.5A
S
S
S
G
BC13 R765
3
VCC
VDD
ON2
ON1
V+
VGAVCORE SCD1U16V3KX 4D7R3 0R3-U
1
2
3
4
68.4R71B.101 6 BC5 VGARAM
SKIP# M1715BST2 SCD1U16V3KX 68.4R71B.101
1 2 25 18
2
L30 IND-4D7UH-16 BST1 BST2
R720 1 2
1
8
7
6
5
1
U14 0R3-U M1715LX1 27 16 M1715LX2
D39 R51 FDS6680S LX1 LX2 C508 R764
D
D
D
D
ST100U4VBM
R754
1
R743 0R3-U
1
M1715LX1_1 0R3-U
77.22271.041
TC6
ST220U4VDM-1
1 14
TC24
12
OUT1 OUT2
1
C377 M1715LX2_2
SSM5817SL
1
1
3 SC47P M1715FB1 2 BC408 M1715LX2_1 3
2
12
S
S
S
G
B220LFA D15 M1715LX1_3 BC396 FB1 SC2K2P
77.22271.041
SSM5817SL
D33
ST220U4VDM-1
TC23
2
1
C9 B220LFA SC2K2P M1715ILIM1 M1715FB2 C488
R=R90K9,
D17
3 13
1
2
3
4
DUMMY-C3 R745 ILIM1 FB2 R790 DUMMY-C3
2
2
2MR3 12 M1715ILIM2 VGARAM=2.8V 2MR3
2
ILIM2
8
2
2
AGND
1
M1715TON
2
22
7
PGND TON 5
9 R39 Remove R90K9,
2
PGOOD REF
VGARAM=2.5V
N.C.
N.C.
N.C.
243KR3F
1
Modify-0602
1
R64 U9
28
15
23
1
C379 2KR3F R49 MAX1715EEI-U
1
SC100P 330KR3F
R1 R767 C490 R760
18KR3F 90K9R3F SC100P 56R3
2
M1715REF
5V_S3
1
Gannet-1 R42
1
R52 DUMMY-R3
1VDDIOSENSE_1
2
2
2D5V_S3 9K76R3F
1
R46
1
R45 DUMMY-R3
1
100KR3 R31
2
R389 10KR3F
10KR3 BC10
2
SCD22U16V3ZY
2
R756
2
CM8501_SD DUMMY-R2
2
M1715_PG
M1715_PG 50
3
2 2
D
1 Q35 VDDIOSENSE
2
23,43,48,49,50 PM_SLP_S5# 2N7002
G
S
2
2D5V_CM8500
K3D-SB
1D25V_S3
1D25V_S3 ADD 3 VIAS FOR TC22(PWR & GND) CLOSE TO IC PIN
BC340
SCD1U
L29 L-3D3UH-3
68.3R35A.201
BC336
SCD1U
TOTAL CAP
1 2 CM8500_3 0.001U 2 PCS
1
0.1U 6 PCS
1
TC22
ST100U4VBM R366
5D1R3F 150U 1 PCS
2
VCC1 VCC2
2 PVDD1 PVDD2 15
BC337 3 14 BC99
SCD1U BC334 VL1 VL2 SCD1U
4 PGND1 PGND2 13
CLOSE TO IC PIN SCD1U 5 AGND1 AGND4 12
CM8501_SD 6 11
CM8500_7 7 SD VFB BC333
VIN-2 VCCQ 10
8 9 SCD1U
BC327 AGND2 AGND3
1 GND 17 1
SC1000P50V3KX R434
CONTACT DIRECTLY 78.10224.2B1 2D5V_CM8500 1 2 2D5V_S3
1
VDDIOSENSE 6
63.10234.151 BC315 78.10224.2B1
R398 DUMMY-R2 Size Document Number Rev
5 DDRVTT_SENSE 1 2 A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 46 of 51
A B C D E
A B C D E
DCBATOUT_ISL
R406 DUMMY-R2 R382 DUMMY-R2
1 2 1 2 R417 1 2
1 2 DCBATOUT_ISL C468 SC10U25V6MX
6 COREFB#
Dummy-10k Dummy-80.6k
DUMMY-R3 DCBATOUT_ISL 1 2
R411 C445 SC10U25V6MX
OVP 1 2
6 COREFB
1 2
5V_S0 U40 Remote Sense DUMMY-R3 C437 SC10U25V6MX
Tie to CPU D
15 7 FB 5V_S0 1 2
VCC FB
2
Q47 C432 SC10U25V6MX
C290 SC1U10V3KX 29 9
4 OVP IDROOP 4
1 2
J8-SC :Vdrop is over 1 2 ISL6559_OFS 5 10 VDIFF 1
2
R297 4K99R3F OFS VDIFF V_RMSEN+ SUD50N03-11 C424 DUMMY-C3
spec under max loading VSEN 11 R476 G
VID0_PWM 3 12 V_RMSEN- 1 2 BOOT_2#C2091 SCD22U10V3KX
2
VID1_PWM VID0 RGND 2D2R3 78.22423.2B1 VCC_CORE_S0
2
3
S
BOOT_2
VID1
1
VID2_PWM 1 21 ISL6559_PWM1
6 VID[4..0] VID3_PWM VID2 PWM1 ISL6559_PWM2 R385 R450
32 VID3 PWM2 20 Reverse for EMI issue L16
VID4_PWM 30 16 ISL6559_PWM3 5V_S0 51R3 51R3 UG2
VID4 PWM3 PHASE_2
24 U56 1 2
ISEN1 PWM4
22 ISEN1
1
ISEN2 18 26 ISL6559_DIS 1 8 IND-D68UH-4-U
2
ISEN3 ISEN2 FS/DIS UGATE PHASE ISL6207_EN2 D4
17 ISEN3 2 BOOT EN 7
23 ISEN4 PGOOD 25 VCC_CORE_S0 ISL6559_PWM2 3 PWM VCC 6 Q19 Q21 SSM34 Modify-0609
1
R359 C98 C97 4 5 LG_2 4 4 83.3R004.C8M
GND LGATE
1
R415
G G
GND 13 3 3
1
2 1 FB_1 1 2 FB 1 2 COMP 6 14 3D3V_S0 107KR3F R475 2
S S
2
2
COMP GND R534
S S
19 ISL6207CB-U 1 5678 5678 1
GND
1
SC56P 499KR3F 0R2-0 J8-SC
S D D S
27 EN GND 28 74.06207.071
1
DUMMY-R3 DUMMY-C3 C174
NC
NC
NC
33
2
R334 R295 GND R445 D38 SCD01U16V2KX SI7886DP-U1 SI7886DP-U1
adjust OCP
2
C96
1
1 2 1 2FB/COMP 1 2 ISL6559CR 10KR3 1 2
2
31
R453
1
1KR3F J8-SC SC4700P50V3KX 2K74R3F 1K33R3F
J8-SC Q15 MBR0530T1 C208
SB ADD
2
50 VRM_PG
SC1U10V3KX
D
VDIFF
frequency is float
VCORE_EN VID0_PWM VID0
2 3 78.10523.5B1
2
VCORE_EN 50
ISEN2
VCC_CORE_S0 PLACE IN THE BACK OF CPU 2N7002 12VGATE_S0
G
12VGATE_S0 43,48
1
3 Q25 3
D
VID1_PWM 2 3 VID1
1
1
TC18 SE220U2D5VM-1
TC17 SE220U2D5VM-1
TC3
TC15 SE220U2D5VM-1
TC10 SE220U2D5VM-1
TC13 SE220U2D5VM-1
TC28 SE220U2D5VM-1
TC9
TC11 SE220U2D5VM-1
G
R301
SE220U2D5VM-1
SE220U2D5VM-1
2
1
Q30 VID0_PWM 1 2 VID0
DUMMY-R2
D
VID2_PWM 2 3 VID2 R291
VID1_PWM 1 2 VID1
DUMMY-R2
2N7002 R348 DCBATOUT_ISL
G
VID2_PWM 1 2 VID2 1 2
1
Q44 DUMMY-R2 C111 SC10U25V6MX
R451
D
VID3_PWM 2 3 VID3 VID3_PWM 1 2 VID3 DCBATOUT_ISL 1 2
DUMMY-R2 C110 SC10U25V6MX
R404
2N7002 VID4_PWM 1 2 VID4 1 2
G
DUMMY-R2 C109 SC10U25V6MX
1
Q39 D
R249
1 2 5V_S0 1 2
S
2
VID4_PWM 2 3 VID4 Q32 C108 SC10U25V6MX
0R1206
R247 1 2
1 2 2N7002 1
G
G
0R1206 DCBATOUT_ISL C573 SC10U25V6MX 1 2 BOOT_3#C89 1 SCD22U10V3KX
2
78.22423.2B1
3
R243 S
BOOT_3
2 1 2 DCBATOUT_ISL 1 2 2D2R3 VCC_CORE_S0 2
DCBATOUT
C568 SC10U25V6MX Reverse for EMI issue
0R1206 UG3 L24
1 2 U36 PHASE_3 1 2
C563 SC10U25V6MX
1
D 1 8 IND-D68UH-4-U
5V_S0 UGATE PHASE ISL6207_EN3 D21
1 2 2 BOOT EN 7
2
1
G G
1 2 3 3
1
R298
S S
1 2 2
2
R82 SUD50N03-11 C541 DUMMY-C3 R287
S S
G ISL6207CB-U 1 5678 5678 1
1
2 BOOT_1#C21 1 SCD22U10V3KX 499KR3F 0R2-0 J8-SC
S D D S
1 2 74.06207.071
78.22423.2B1 VCC_CORE_S0 C90 SI7886DP-U1
3
S adjust OCP
BOOT_1
1
Reverse for EMI issue 1 2
2
UG1 L6 R452
1
U4 PHASE_1 1 2 1K33R3F
MBR0530T1 C95
1
1 8 IND-D68UH-4-U SC1U10V3KX
UGATE PHASE ISL6207_EN1 Q10 Q16 D2
2 7 78.10523.5B1
2
ISL6559_PWM1 BOOT EN
3 PWM VCC 6 4 4 SSM34 Modify-0609
4 5 LG_1 3
G G
3 83.3R004.C8M ISEN3
GND LGATE
1
S S
2 2
1
R776
S S
1 5678 5678 1
2
S D D S
ISL6207CB-U R83
1
1 2
2
1 R454 1
1
1K33R3F
MBR0530T1 C26
SC1U10V3KX
78.10523.5B1 Wistron Corporation
2
Title
CPU Vcore
Size Document Number Rev
Custom
Gannet -1
Date: Thursday, December 04, 2003 Sheet 47 of 51
A B C D E
A B C D E
3
FDS9412 DUMMY-SC22U10V6ZY-U 1 8
1
S D
4 BCB13 RB10 ZZ.22693.421 BC100 2 7 4
SC1U10V3ZY
S D
SCD22U50V5KX 470KR3 D49 3 6
3
S D
78.22424.211 63.47434.151 MMBZ5248B 4 5 BCB3 BCB4
SCD1U16V SCD1U16V
G D
2
FDS9412 78.10491.4F1 78.10491.4F1
1
43,47 12VGATE_S0
84.09412.037
Q36 BC313
DCBATOUT TP0610T SCD1U
3
Q60 D 84.00610.031
DCBATOUT TP0610T 1 Q57 3D3V_S0 3D3V_S5 R386
84.00610.031 G DUMMY-2N7002 1 2 PM_2D5CTL 2 1
R782 S K3D-SB H2U-SB CHANGE
1 2 PM_RUNCTL 2 1 U25 3D3V_S0 10KR3
3
1 S D 8
10KR3 2 7 1 2 PM_2D5CTL_G R399 D26
3
S D
3 6 BC314 330KR3
MMBZ5248B
1
PM_RUNCTL_G
S D
1 2 PM_RUNPWR_CTL 4 5 EC19 R387 330KR3 SCD1U50V3ZY
3
G D
SCD1U16V R392
1
3
R783 330KR3 FDS9412 1KR3
1
R742 BC393 R652 84.09412.037
1KR3 SCD1U50V3ZY 330KR3 D41 5V_S5
MMBZ5248B BC388
3Q30_D
2
SC22U10V6ZY-U
U6
3Q29_D 2
1
D Q27 1 D D 6
PM_SLP_S3# 1 2N7002 2 D D 5
3D3V_S0 G 3 G S 4 5V_S3
D Q59 3 D J8-SC S
1 2N7002 1 Q51 FDC653N
2
23,37,43,45,46,50 PM_SLP_S3#
1
3
G G 2N7002 3
S S R669 3D3V_S5
DUMMY-R3
2
2
1 2 PM_SUSCTL 2 1 PM_SUSPWR_CTL 3 G S 4 3D3V_S3
1
Q52_3 10KR3 FDC653N
PM_SUSCTL_G D30 R560
R785 BC11 330KR3
3
1 2 1 2 SCD1U50V3ZY MMBZ5248B
3
Q34_D
1 Q52 330KR3 R762 1KR3
2
G DUMMY-2N7002
S
3
D Q64
2
1 2N7002
23,43,46,49,50 PM_SLP_S5#
G
S
2
D12 D6
+5V_UP_S5 2 2 +5V_UP_S5
Charger CONN
3 3
2 2
1 1
BAV99LT1 BAV99LT1
43,44 BT_SDA_5
43,44 BT_SCL_5
BT+
BAT CONN
CN2
BT_TH 2 1 BTSMCLK
BT+SENSE 4 3 BTSMDATA
6 5
8 7
10 9 R766 100R3
BT+ 44 BT_TH
12 11 BT_SCL_5 1 2 BTSMCLK
14 13 D46 S1N4148 BT_SDA_5 1 2 BTSMDATA
16 15 BAT_IN# 1 2 BT_TH
37 BAT_IN#
EC16 EC17 G14 R761 100R3
SPD-CONN16D-7 SCD1U16V SCD1U16V BT+SENSE 1 2
44 BT+SENSE
1
GAP-CLOSE BC9 BC12 BC402
1
BC407 ZZ.CON2C.XX1
SCD1U50V5KX SCD1U50V3KX SC1000P50V SC1000P50V
78.10424.2B1
2
2
Change for EMI C483 C513
DUMMY-C3
Near DC/DC DUMMY-C3
2
connector:
CN12
SB FOR EMI
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC/DC (1/2) -- 5V / 3.3V / 2.5V
Size Document Number Rev
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 48 of 51
A B C D E
A B C D E
2D5V_DC_S3
G18
2D5V OCP SETTING 1 2
DCBATOUT_5110 2.27+2.035*1.8/2.5+2.46*1.25/2.5
2
GAP-CLOSE
C350 R612 G17 =4.9652 A peak
SC6800P50V3KX 200R3F 1 2
1
4 TPS5110_INV_2 GAP-CLOSE 4
TPS5110_INV_1 C346 C347 R610 I=6.5A
21
2
SCD1U SCD1U 15K4R3F
R619 R614 OCP=4.7A~6.2A
330R3 19K6R3F
Gannet-1 5V_S3 C500 2D5V_DC_S3 2D5V_S3
2
R604
SC2K2P
5
6
7
8
1 2 1 G25
1
U80 1 2
D
D
D
D
1
1
10K2R3F
R618 D19 SI4800 C507 GAP-CLOSE
2KR3 SC4D7U25V-U G24
S1N4148-U
TPS5110_TRIP
1 2
2
5V_S3
4 G
3 S
2 S
1 S
1
TPS5110_FB_1 Close to pin GAP-CLOSE
5110_UP
2
2
C501 G23
2
2
0R3-U
TPS5110_INV 1 INV BST 24 TPS5110_BST SCD1U L7 J8-SC GAP-CLOSE
TPS5110_FB 5110_DH 0R3-U
TPS5110_SS
TPS5110_SKIP
2
3
FB
SS
TPS5110 DH
LX
23
22 5110_LX
5110_DL
1
Change new L7
2 1
G21
2
4 21
1
1
6 GND TRIP 19
5
6
7
8
R613 TPS5110_REF 7 18 TC26
REF VIN_SENSE
1
DUMMY-R3 2D5V_ON 8 17 ST150U6D3VM-U
D
D
D
D
1D8V_ON STBY REG5V_IN 5V_S3 DCBATOUT_5110 D5
9 16
2
TPS5110_FLT STBY_LDO LDO_IN SSM14
10 FLT LDO_CUR 15
G
S
S
S
11 PG LDO_GATE 14
3 12 13 3
1
5110_DN 4
3
2
1
2
2
C52 C51
C44 C45 C50 C57 TPS5110PW-U SCD1U SCD1U SI4892DY
SC4700P50V3KX SC20P SCD1U SCD01U50V3KX R716
1 2
1
Close to pin17&18
5V_S3 0R3-U
R218 0R3-U
1
1D8V_ON 1 2 1D8V_S0_EN 50
R231
5110_LDO_GATE
DUMMY-R3 R213 0R3-U
2D5V_ON 1 2 PM_SLP_S5# 23,43,46,48,50
2
TPS5110_PGOOD D C355
SC4D7U10V-U
2
2A
1
G
Q13 1D8V_DC_S0 1D8V_S0
SUD50N03-11
3
S
C61 G9 VVGADDR 3D3V_S0
INV_LDO 1 2 1 2
2
2 2
SC4700P50V3KX GAP-CLOSE
1D5V_S0/ 2520mA
ST100U4VBM
R233 R293 R292
1
0R5 DUMMY-R3
TPS5110 1.8V LDO Portion
1 2 G10
2
R223 10KR3F
287R3F GAP-CLOSE
2
2
Pdiss(max)=1.2W
1
1D5V_S0
INV_LDO_1 APL1117_IN U48
21
1 APL1117_ADJ
R232 ADJ
VOUT 2
1
8K66R3F
BC67
VIN 3
1
R435
SC1U10V3ZY
APL1085 110R3 BC335 TC20
+5V_AUX_S5 SC10U6D3V5YZ ST100U4VBM
1
2
R338 R383
1 2 1 2
2
MAX1999_LDO5
0R3-U
0R3-U R335
DCBATOUT
1
DUMMY-R3 C114
+5V_UP_S5 1 2 LP2951_FB_1 LP2951_FB I max = 3 A R438
22R3
SC330P50V3KX
SC10U10V6ZY-U
2
SCD1U BC73 OUT INPUT
2 SENSE FB 7
LP2951_SD 3 6
SD 5V/TAP SC1U50V5ZY
4 GND ERROR 5
1
BC105 1
LP2951ACM
R416
43,45 SHUTDOWN_S5
SHUTDOWN_S5 1 2 K3D-SB Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
A3
Gannet -1
Date: Thursday, December 04, 2003 Sheet 49 of 51
A B C D E
A B C D E
5V_S5
27,45,48,51 5V_S5
1D8V_S0
DC/DC:1D2V_S0 J8-SC
63.R0001.111
5V_S0
added rating U10 Replace MAX4490AXK-T -> G1211X
1
J8-SC +5V_AUX_S5
for price cost down R67
1 S D 8 adjust 1.2V's
1
2 7 UH1B
14
S D 5V_S0 4K32R3F Vref higher R89 TSAHCT32
4 3 S D 6 4
4 5 10KR3 4
G D 24 SUSB#
6
2
PM_SLP_S3# 23,37,43,45,46,48
U3 5
1D2V_REF Q5
MAX4490_5VS2
SI4892DY 5 1
2
VDD IN+
3
Current Limit : 1A 1D2V_PWM 4
VSS 2
3
D 2N7002
1
7
OUT IN- C20 G
1
40Mils C581 MAX4490AXK-T SCD1U16V S
C19 SCD1U16V 78.10491.4F1 R68 Q9 +5V_AUX_S5
3
SC100P50V2JN 78.10491.4F1 10KR3F D 2N7002
G2 C60 SC20P 78.10134.1F1 1 UH1A
14
1D2V_HT0A_S0 1 2 1D2V_FB1_1 1D2V_FB1 1 2 1D2V_FB G TSAHCT32
R151 S 1
2
24 SUSC#
2 1 1D2V_HT0A_S0_1 GAP-CLOSE 78.20034.1B1 R155 1K5R3 3
2
PM_SLP_S5# 23,43,46,48,49
1
0R5 G4 VRM_PG 2
R144
1 2 C59 TC19 1 2
SCD1U16V ST100U6D3V-U
1
GAP-CLOSE 78.10491.4F1 77.21071.011 1KR3F
7
R142
DUMMY-R3 1D2V_S0_EN
2
2D5V_S0 2D5V_S3
3 3
1
R395 R396 5V_S5
10KR3 10KR3 5V_S5 5V_S5 C101
SCD1U16V
14
14
2D5V_S3_PG 1
14
5V_S5 3 VDDA_2D5_PG 4
2D5V_S0_PG 2 6 VTT_VDDA_PG 13
5 11 VCORE_EN 47
1
1
UN1A 12
R456 C280 C281 TSAHCT08-U UN1B
7
10KR3 SCD1U10V2MX-1 SCD1U10V2MX-1 73.07408.0JB TSAHCT08-U UN1C
7
73.07408.0JB TSAHCT08-U
7
5V_S5 SUSB# 73.07408.0JB
1D2V_PG 5V_S5
2
3
1
1D2V_S0_PG# 1 Q34
G 2N7002 R313
2
S 10KR3
R430 C122
2
SCD1U10V2MX-1 5V_S5
4K7R3 5V_S5 1D25V_S3_PG
2
14
3
R390 4K7R3 D
1
1
S VRM_PG 9
2 C121 C119 2
2
2
7
0R2-0 U43 73.07408.0JB
1MR3F
5V_S5 J8-SD 1 8 1D25V_S3
R408 U43_2 OUTPUT_A V+
2 7
1
1
R381 C289
10KR3 LM393M SC1U10V3ZY R477
74.00393.D21 10KR3
14
5V_S5
2
5V_S0_1 1
2
R340
1 2 1D25V_PG_SET 3 1D8V_S0_EN 49
PM_SLP_S3# 2
1
470KR3
R341 U51A
SB change R583 from 470KR3 to 47KR3, R584 from 100KR3 to 10KR3 100KR3F TSAHCT08-U
7
73.07408.0JB
2
SB ADD
5V_S5
5V_S5 5V_S5 C136
SCD1U16V
14
5V_S5
14
1 1
VTT_VDDA_PG 4 3D3V_S5
14
6 VTT_1D2V_PG 13 U102
14
1D2V_PG VTT_VRM_PG
5
12
11 10
8 ALL_PG 1 1 NC VCC 5 Wistron Corporation
1
47 VRM_PG
27 RUNPWROK 73.01G17.0HHN1
1 2 M1715_PG_1 Size Document Number Rev
2
46 M1715_PG
R460 0R3-U Custom
Gannet -1
J8-SD
Date: Thursday, December 04, 2003 Sheet 50 of 51
A B C D E
A B C D E
14
14
9 12 U29E U29F U8D U15A U15C U15D
14
14
14
13
14
14
14
8 11
10 13 1 9 12
11 10 13 12 12 11 3 8 11
TSAHCT32 TSAHCT32 2 10 13
7
4 TSAHCT14 TSAHCT14 TSLCX125 TSLCX08-U TSLCX08-U 4
TSLCX08-U
7
5V_S0 5V_AUDIO_S0
+5V_AUX_S5 3D3V_S0
3D3V_S5 3D3V_S5 3D3V_S5
U49D U37A U89D U65F U65E U65D
14
14
14
14
14
14
U57D
14
13
12 12
11 1 2 11 13 12 11 10 9 8
13 12 11 13
7
7
AUD_AGND AUD_AGND
14
14
14
MDC Stand Off LCD Stand Off P/N: 4 13 10
P/N: P/N: 34.41T02.001
6 11 8
5 12 9
34.41Q08.001 34.41T01.001
SPARE GATES TSAHCT08-U TSAHCT08-U TSAHCT08-U
1
7
HOLE6 HOLE23 HOLE9 HOLE8 HOLE10 HOLE22 HOLE12 HOLE13 HOLE14 HOLE15 HOLE16
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
ZZ.0HOLE.XXX
1
1
HOLE17 HOLE21 HOLE19 HOLE20 HOLE11 HOLE18 HOLE7 HOLE24 HOLE25 HOLE26
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
2 2
1
1
J8-SD
1
1
MODIFY J8-SD
S3:34.42P26.001 S1:34.39S03.001 BY EMI MODIFY BY EMI
GND13
GND15 GND1 GND2 GND21 GND3 GND22 GND23 GND24 GND25 GND17 GND19 GND16 GNDPAD-S2
1 1
GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD GNDPAD-S3 GNDPAD-S3 GNDPAD-S3 34.41T19.001
Wistron Corporation
1
1