Combinational Logic Circuits

Dr. Mohammed Najm Abdullah

What is Combinational Logic?

1
 Combinational Circuits
• Output is function of input only
i.e. no feedback

Combinational
n inputs •
•
•
•
m outputs
• Circuits •


When input changes, output may change (after a
delay)

4 / 65

2
 Combinational Circuits
• Analysis
– Given a circuit, find out its function
A
B
C
A
B
F1
?
C
A
B

– Function may be expressed as: ?

A
F2
C

B
C

• Boolean function
• Truth table
• Design
– Given a desired function, determine its circuit
– Function may be expressed as:
• Boolean function ?
• Truth table

5 / 65

Analysis Procedure
• Boolean Expression Approach
A
B
F1
C T2=ABC
A T1=A+B+C
B T3=AB'C'+A'BC'+A'B'C
C
A
B F’2=(A’+B’)(A’+C’)(B’+C’)

A
F2
C
F2=AB+AC+BC
B
C
F1=AB'C'+A'BC'+A'B'C+ABC
F2=AB+AC+BC 6 / 65

3
 Analysis Procedure
• Truth Table Approach A B C F1 F2
A=0 0 0 0 0 0
B=0 0 0
F1
C= 0
A=0
B=0 0 0
C= 0
1
A=0 0
B=0

A=0 0 0
F2
C
=0
B
C= 0 0
=0

7 / 65

Analysis Procedure
• Truth Table Approach A B C F1 F2
A=0 0 0 0 0 0
B=0 0 1
F1 0 0 1 1 0
C= 1
A=0
B=0 1 1
C= 1
1
A=0 0
B=0

A 0 0
=0 F2
C
=1
B
C= 0 0
=1

8 / 65

4
 Analysis Procedure
• Truth Table Approach A B C F1 F2
A=0 0 0 0 0 0
B=1 0 1
F1 0 0 1 1 0
C= 0
0 1 0 1 0
A=0
B=1 1 1
C= 0
1
A=0 0
B=1

A=0 0 0
F2
C
=0
B
C= 1 0
=0

9 / 65

Analysis Procedure
• Truth Table Approach A B C F1 F2
A=0 0 0 0 0 0
B=1 0 0
F1 0 0 1 1 0
C= 1
A=0
0 1 0 1 0
B=1 1 0 0 1 1 0 1
C= 1
0
A=0 0
B=1

A 0 1
=0 F2
C
=1
B
C= 1 1
=1

10 / 65

5
 Analysis Procedure
• Truth Table Approach A B C F1 F2
A=1 0 0 0 0 0
B=0 0 1
F1 0 0 1 1 0
C= 0
A=1
0 1 0 1 0
B=0 1 1 0 1 1 0 1
C= 0 1 0 0 1 0
1
A=1 0
B=0

A=1 0 0
F2
C
=0
B
C= 0 0
=0

11 / 65

Analysis Procedure
• Truth Table Approach A B C F1 F2
A=1 0 0 0 0 0
B=0 0 0
F1 0 0 1 1 0
C= 1
A=1
0 1 0 1 0
B=0 1 0 0 1 1 0 1
C= 1
0 1 0 0 1 0
A=1 0 1 0 1 0 1
B=0

A 1 1
=1 F2
C
=1
B
C= 0 0
=1

12 / 65

6
 Analysis Procedure
• Truth Table Approach A B C F1 F2
A=1 0 0 0 0 0
B=1 0 0
F1 0 0 1 1 0
C= 0
A=1
0 1 0 1 0
B=1 1 0 0 1 1 0 1
C= 0 1 0 0 1 0
0
A=1 1 1 0 1 0 1
B=1
1 1 0 0 1
A=1 0 1
F2
C
=0
B
C= 1 0
=0

13 / 65

Analysis Procedure
• Truth Table Approach A B C F1 F2
A=1 0 0 0 0 0
B=1 1 1
F1 0 0 1 1 0
C= 1
A=1
0 1 0 1 0
B=1 1 0 0 1 1 0 1
C= 1
0 1 0 0 1 0
A=1 1 1 0 1 0 1
B=1
1 1 0 0 1
A 1 1
=1 F2 1 1 1 1 1
C
=1
B
C= 1 1
=1 B B
0 1 0 1 0 0 1 0
A 1 0 1 0 A 0 1 1 1
C C

F1=AB'C'+A'BC'+A'B'C+ABC F2=AB+AC+BC
14 / 65

7
 Design Procedure
• Given a problem statement:
– Determine the number of inputs and outputs
– Derive the truth table
– Simplify the Boolean expression for each output
– Produce the required circuit
Example:
Design a circuit to convert a “BCD” code to “Excess 3” code

 4-bits  4-bits
?
 0-9 values  Value+3
15 / 65

Design Procedure
• BCD-to-Excess 3 Converter
C C
A B C D w x y z
1 1 1
0 0 0 0 0 0 1 1
1 1 1 1
0 0 0 1 0 1 0 0 B B
x x x x x x x x
0 0 1 0 0 1 0 1 A 1 1 x x
A 1 x x
0 0 1 1 0 1 1 0
D D
0 1 0 0 0 1 1 1
0 1 0 1 1 0 0 0 w = A+BC+BD x = B’C+B’D+BC’D’
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0 C C
1 0 0 0 1 0 1 1 1 1 1 1
1 0 0 1 1 1 0 0 1 1 1 1
1 0 1 0 x x x x x x x x
B x x x x
B
A 1 x x
A 1 x x
1 0 1 1 x x x x
1 1 0 0 x x x x D D
1 1 0 1 x x x x
1 1 1 0 x x x x y = C’D’+CD z = D’
1 1 1 1 x x x x 16 / 65

8
 Design Procedure
• BCD-to-Excess 3 Converter
A B C D w x y z A
0 0 0 0 0 0 1 1 w
0 0 0 1 0 1 0 0
0 0 1 0 0 1 0 1
0 0 1 1 0 1 1 0
0 1 0 0 0 1 1 1 x
B
0 1 0 1 1 0 0 0
0 1 1 0 1 0 0 1
0 1 1 1 1 0 1 0
1 0 0 0 1 0 1 1 C y
1 0 0 1 1 1 0 0
1 0 1 0 x x x x
D z
1 0 1 1 x x x x
1 1 0 0 x x x x
1 1 0 1 x x x x w = A + B(C+D) y = (C+D)’ + CD
1 1 1 0 x x x x x = B’(C+D) + B(C+D)’ z = D’
1 1 1 1 x x x x 17 / 65

Combinational Logic Circuits

Basic Adders
Parallel Binary Adders
Comparators
Decoders
Encoders
Code Converters
Multiplexers (Data Selectors)
Demultiplexers
Parity Generator/Checkers

9
Basic Adders
There are full-adder and half-adder
•Half-adder:
The half-adder accepts two binary digits on its
inputs and produces two binary digits on its
outputs, a sum bit and a carry bit
Similar to XOR
•Full-adder:
The full-adder accepts two input bits and an input
carry and generates a sum output and an output
carry

Symbols used for adders

10
Binary Half Adder

Binary Half Adder - Circuit

11
Full Adder

Full Adder - Minimization

12
Full Adder - Circuit

Full Adder from Half Adders

13
Binary n-bit Adder

Ripple-Carry Adder

14
Subtraction
Two binary numbers are subtracted by subtracting each pair
of bits together with borrowing, where needed.
Subtraction Example:

0 0 1 1 1 1 1 0 0 Borrow
X 229 1 1 1 0 0 1 0 1
Y - 46 - 0 0 1 0 1 1 1 0
183 1 0 1 1 0 1 1 1

Half Subtractor
• Subtracting a single-bit binary value Y from anther X (I.e. X -Y ) produces a
difference bit D and a borrow out bit B-out.
• This operation is called half subtraction and the circuit to realize it is called a
half subtractor.

Half Subtractor Truth Table D(X,Y) = S (1,2)

Inputs Outputs D = X’Y + XY’
D = X Y
X Y D B-out
0 0 0 0 B-out(x, y, C-in) = S (1)
0 1 1 1 B-out = X’Y
1 0 1 0
1 1 0 0 X Difference
D
Y
X Half D
Y Subtractor B-OUT B-out

15
 Full Subtractor
• Subtracting two single-bit binary values, Y, B-in Difference D X
from a single-bit value X produces a difference XY
bit D and a borrow out B-out bit. This is called B-in 00 01 11 10
full subtraction. 0 2 6 4
0 1 1
Full Subtractor Truth Table 1 3 7 5
Inputs Outputs 1 1 1 B-in

X Y B-in D B-out Y
0 0 0 0 0 S = X’Y’(B-in) + XY’(B-in)’ + XY’(B-in)’ + XY(B-in)
S = X  Y  (C-in)
0 0 1 1 1
0 1 0 1 1 Borrow B-out X
0 1 1 0 1 XY
1 0 0 1 0 B-in 00 01 11 10
0 2 6 4
1 0 1 0 0 0 1
1 1 0 0 0 1 3 7 5
1 1 1 1 B-in
1 1 1 1 1

D(X,Y, C-in) = S (1,2,4,7)

Y

B-out = X’Y + X’(B-in) + Y(B-in)

B-out(x, y, C-in) = S (1,2,3,7)

Full Subtractor Circuit Using AND-OR

16
Full Subtractor Circuit Using XOR

n-bit Subtractors

17
4-bit Borrow Ripple Subtractor

4-bit Subtractor Using 4-bit Adder

18
 Block diagram of 2-bit and 4-bit
parallel adders

74LS283 4-bit parallel adder

19
Adder expansion

20