IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 18, NO.

3, MARCH 2010

473

A Low-Cost VLSI Implementation for Efficient Removal of Impulse Noise
Pei-Yin Chen, Member, IEEE, Chih-Yuan Lien, Student Member, IEEE, and Hsu-Ming Chuang
Abstract—Image and video signals might be corrupted by impulse noise in the process of signal acquisition and transmission. In this paper, an efficient VLSI implementation for removing impulse noise is presented. Our extensive experimental results show that the proposed technique preserves the edge features and obtains excellent performances in terms of quantitative evaluation and visual quality. The design requires only low computational complexity and two line memory buffers. Its hardware cost is quite low. Compared with previous VLSI implementations, our design achieves better image quality with less hardware cost. Synthesis results show that the proposed design yields a processing rate of about 167 M samples/second by using TSMC 0.18 m technology. Index Terms—Image denoising, impulse noise, pipeline architecture, VLSI.

I. INTRODUCTION N SUCH applications as printing skills, medical imaging, scanning techniques, image segmentation, and face recognition, images are often corrupted by noise in the process of image acquisition and transmission. Hence, an efficient denoising technique is very important for the image processing applications [1]. Recently, many image denoising methods have been proposed to carry out the impulse noise suppression [2]–[17]. Some of them employ the standard median filter [2] or its modifications [3], [4] to implement denoising process. However, these approaches might blur the image since both noisy and noise-free pixels are modified. To avoid the damage on noise-free pixels, an efficient switching strategy has been proposed in the literature [5]–[17]. In general, the switching median filter [5] consists of two steps: 1) impulse detection and 2) noise filtering. It locates the noisy pixels with an impulse detector, and then filters them rather than the whole pixels of an image to avoid the damage on noise-free pixels. Generally, the denoising methods for impulse noise suppression can be classified into two categories: lower-complexity techniques [6]–[13] and higher-complexity techniques [14]–[17]. The former uses a fixed-size local window and requires a few line buffers. Furthermore, its computational complexity is low and can be comparable to

I

Manuscript received March 14, 2008; revised September 14, 2008 and December 02, 2008. First published May 29, 2009; current version published February 24, 2010. This work was supported in part by the National Science Council under Grant 96-2221-E-006-027-MY3 and Grant97-2622-E-006-012-CC3 and by the use of Shared Facilities supported by the Program of Top 100 Universities Advancement, Ministry of Education, Taiwan. The authors are with the Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan 701, Taiwan (e-mail: pychen@csie.ncku.edu.tw; lian@csie.ncku.edu.tw; hsuming@gmail.com). Digital Object Identifier 10.1109/TVLSI.2008.2012263

conventional median filter or its modification [2]–[4]. The latter yields visually pleasing images by enlarging local window size adaptively [15], [16] or doing iterations [14]–[17]. In this paper, we focus only on the lower-complexity denoising techniques because of its simplicity and easy implementation with the VLSI circuit. In [6], Zhang and Karim proposed a new impulse detector (NID) for switching median filter. NID used the minimum absolute value of four convolutions which are obtained by using 1-D Laplacian operators to detect noisy pixels. A method named as differential rank impulse detector (DRID) is presented in [7]. The impulse detector of DRID is based on a comparison of signal samples within a narrow rank window by both rank and absolute value. In [8], Luo proposed a method which can efficiently remove the impulse noise (ERIN) based on simple fuzzy impulse detection technique. An alpha-trimmed meanbased method (ATMBM) was presented in [9]. It used the alphatrimmed mean in impulse detection and replaced the noisy pixel value by a linear combination of its original value and the median of its local window. In [10], a decision-based algorithm (DBA) is proposed to remove the corrupted pixel by the median or by its neighboring pixel value according the proposed decisions. For real-time embedded applications, the VLSI implementation of switching median filter for impulse noise removal is necessary and should be considered. For customers, cost is usually the most important issue while choosing consumer electronic products. We hope to focus on low-cost denoising implementation in this paper. The cost of VLSI implementation depends mainly on the required memory and computational complexity. Hence, less memory and few operations are necessary for a low-cost denoising implementation. Based on these two factors, we propose a simple edge-preserved denoising technique (SEPD) and its VLSI implementation for removing fixed-value impulse noise. The storage space needed for SEPD is two line buffers rather than a full frame buffer. Only simple arithmetic operations, such as addition and subtraction, are used in SEPD. We proposed a useful impulse noise detector to detect the noisy pixel and employ an effective design to locate the edge of it. The experimental results demonstrate that SEPD can obtain better performances in terms of both quantitative evaluation and visual quality than other state-of-the-art lower-complexity impulse denoising methods [6]–[13]. Furthermore, the VLSI implementation of our method also outperforms previous hardware circuits [11]–[13], [19], [20] in terms of quantitative evaluation, visual quality, and hardware cost. The rest of this paper is organized as follows. In Section II, the proposed SEPD is introduced. The VLSI implementation of

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Restricon aply. If Authorized licensd use limted to: IE Xplore. Extreme Data Detector The extreme data detector detects the minimum and maxand ) in imum luminance values ( those processed masks from the first one to the current one in the image. If . B. the edge-oriented noise filter pinpoints a directional edge and uses it to generate the estimated value of current pixel. In the current . If a pixel is corrupted by the fixed-value impulse noise. SEPD is composed of three components: extreme data detector. If a bit in is equal to 1. If is corrupted by the fixed-value impulse noise. MARCH 2010 Fig. and are not denoised yet. we adopt a 3 3 mask centering on for image denoising. the impulse arbiter brings out the proper result. is equal to or . and store the binary compared results into . and its luminance values coordinate before and after the denoising process are represented as and . its luminance value will jump to be the minis not equal to imum or maximum value in gray scale. SEPD locates a directional edge and uses it to determine the reconstructed value existing in . . 3. NO. Downlade on May 13. and are determined at the previous de. Pseudo code of our scaling method. and the six pixels at coordinates . it means that the pixel related to the binary flag is suspected to be a noisy pixel. A. 2. VOL. 1. Conclusions are presented in Section VI. The three components of SEPD are described in detail in the following subsections. we conclude that is a noise-free pixel and the following steps for denoising are skipped. 3 2 3 mask centered on p . To decide the edge. The implementation results and comparison are provided in Section V. Using is a the 3 3 values in . check whether its five neighboring pixels are equal to the extreme data. noising process. as shown in Fig. By observing the spatial correlation. as shown in Fig. Directions passing through the suspected pixels are discarded to reduce misdetection. we set to 1. 1. . II. Fig. as shown in Fig. and determines whether the lumiluminance values in and its five neighboring pixels are equal nance values of to the extreme data.474 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. Finally. . If positive. In Section IV. its luminance value will jump to be the minimum or maximum value in gray scale. a simple edgecatching technique which can be realized easily with VLSI circuit is adopted. from composed of noise-free pixels are taken into account to avoid possible misdetection. Here. Only those differences. we know that the three denoised values at coordinates . the implementation of reduced SEPD is introduced. In each condition. so we assume that the denoised value of is still in the pipeline and not available. at most four . SEPD is described briefly in Section III. Edge-Oriented Noise Filter To locate the edge existed in the current . we consider 12 directional to . 3. 2. PROPOSED SEPD Assume that the current pixel to be denoised is located at and denoted as . edge-oriented noise filter and impulse arbiter. SEPD will determine whether noisy pixel or not. 18. Fig. respectively. The extreme data detector detects the minimum and maximum .20 at 1:423 UTC from IE Xplore. A pipelined hardware architecture is adopted in the design. 2 shows the pseudo code of SEPD. otherwise.

If current mask has high spatial correlation. the threshold affects the performance of the proposed method. is equal to or .” it means that and are suspected to be noisy values. is differences are equal to the mean of luminance values of the two pixels which . Since the operation of SRAM access belongs to the first pipeline stage of our design. so (the estimated value of ) is equal to the weighted average of luminance values of three previously denoised pixels and calculated as . In our implementation. The smallest one smallest directional difference implies that it has the strongest . C. denoted as . If is equal to or . . or In other words. we divide the remaining denoising steps into 6 pipeline stages evenly to keep the propagation delay of each pipeline stage around 6 ns. Fig. III. treated as . To Authorized licensd use limted to: IE Xplore. wise. overcome this drawback. Hence. According to our experimental results. we adopt the pipelined architecture which can produce an output at every clock cycle. otherthe reconstructed luminance value . Restricon aply. Fig. Downlade on May 13. 4). the mean of luminance values of the two pixels which possess the smallest directional difference is . and (see Fig. set the threshold is equal to . so its cost of VLSI implementation is low. edge-oriented . VLSI IMPLEMENTATION OF SEPD SEPD has low computational complexity and requires only two line buffers. Twelve directional differences of SEPD. only four of them are chose according to the variation in angle. is a predefined value. Finally. possess the smallest directional difference among and . If there appear over four directions. a pixel whose value is might be identified as a noisy pixel even if it is not corrupted. and are all If suspected to be noisy pixels “ ” . if is equal to “10011. we add another condition to reduce the is a noise-free pixel and the possibility of misdetection. For example. and are discarded because they contain those suspected pixels (see Fig. might be a or noise-free pixel but the pixel value is if is small.18 m TSMC/Artisan memory compiler [21]. If is judged as a corrupted pixel. should be close to and is small. . we as 20. For better timing performance. we can conclude that if is corrupted. we found that the access time for SRAM is about 6 ns.CHEN et al. That is to say. register bank. The architecture consists of five main blocks: line buffer. Thirty-two possible values of B and their corresponding directions in SEPD. may be corrupted or just in the region with the highest or lowest luminance. Obviously. no edge can be processed.20 at 1:423 UTC from IE Xplore. with a threshold to determine whether The threshold. . the SRAM used to store the image luminance values is generated with the 0. Therefore. 2. 3). extreme data detector. the converse is not true. According to the simulation. and probably there exists an edge spatial relation with in its direction. . . Impulse Arbiter Since the value of a pixel corrupted by the fixed-value impulse noise will jump to be the minimum/maximum value in gray scale. In other conditions “ ” the edge filter calculates the except when directional differences of the chosen directions and locates the among them. The four chosen directional . We measure and compare it is corrupted or not. However. 4. 3. as shown in Fig. 4 shows the mapping table between and the chosen directions adopted in the design. However.: LOW-COST VLSI IMPLEMENTATION FOR EFFICIENT REMOVAL OF IMPULSE NOISE 475 Fig. Fig. . it is not easy to derive an optimal threshold through analytic formulation. directions are chosen for low-cost hardware implementation. 5 shows block diagram of the 7-stage pipeline architecture for SEPD. A more appropriate threshold can achieve a better detection result.

Restricon aply. At the same time. respectively. and set all four selection signals to 0. only 3 When the denoising process shifts from are needed to be read new values into RB (Reg2. 6 shows its architecture where each 3 registers are connected serially in a chain to provide three pixel values of a row in . respectively. noise filter and impulse arbiter. MARCH 2010 Fig. we set all selections signals to 1. After the denoising process has been completed. Two examples of the interconnections between two line buffers and RB. If are processed. are needed to perform the denoising process. B. Line Buffer SEPD adopts a 3 3 mask. The 2-stage min-max tree module is and . the denoising process for enterers from the input device. as shown in Fig. Obviously. we realize three scanning lines with two line buffers. 7(b). As shown in Fig. Extreme Data Detector Fig. so three scanning lines are needed. 7 to illustrate the interconnections between the two line buffers and RB. If the size of an image is bytes in which 3 the size required for one line buffer is represents the number of pixels stored in the register bank. Authorized licensd use limted to: IE Xplore. is completed. 5). 5. respectively. Register Bank The register bank (RB). while those denoised samples of the whole samples of are stored in Line Buffer-odd. Block diagram of VLSI architecture for SEPD. to . The samples of device. The previous value in Reg8 and the denoised results generated by the arbiter are written back to Line Buffer-odd and Line Buffer-even. To . while those denoised samples of are all stored in Line Buffer-even. Reg5 and Reg8. a series of shifter registers.20 at 1:423 UTC from IE Xplore. 8 shows the 3-stage pipeline architecture of the extreme data detector in which P represents the pipeline register and EC is the equality comparator that will output logic 1 if both two input values are identical.476 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. A. Fig. the previous value in Reg8 (the previous input value from the input device. The nine values until stored in RB are then used simultaneously by subsequent extreme data detector and noise filter for denoising. 18. consisting of 9 registers. and . Two columns of EC used to find . those samples of and are stored in Line Buffer-odd and Buffer-even. Line Buffer-odd and Line Buffer-even are designed to store the pixels at odd and even rows. Assume that we denoise . three pixels from . VOL. the reconOnce the denoising process for generated by the arbiter is outputted structed pixel value and written into the line buffer storing to replace . Fig. NO. After the has been completed. ) is written back to the line buffer for subsequent denoising process. as shown in Fig. respectively. Line Buffer-even is now full with of . the line buffer is implemented with a dual-port SRAM (one port for reading out data and the other port for writing back data concurrently) instead of . Fig. storing The selection signals of the four multiplexers are all set to 1 or 0 for denoising the odd or the even rows. Line Buffer-odd denoising process of is now full with the whole samples of . Architecture of register bank in SEPD. C. 7(a). and Reg4 of the current pixel to be dekeeps the luminance value does not start noised. 7. With the help of four crossover multiplexers (see Fig. Downlade on May 13. Each of them is described briefly in the following subsections. Thus the predenoise vious value in Reg8 and the denoised results generated by the arbiter are written back to Line Buffer-even and Line Buffer-odd. To reduce cost and power consumption. are inputted from the input respectively. Two examples are shown in Fig. 3. 6. respectively) and other 6 pixel values are shifted to each one’s proper register. is used to store the 3 3 pixel values of the current mask . 5.

when In the design. When more edges are considered. IMPLEMENTATION OF REDUCED SEPD In SEPD. one clock cycle is needed to fetch a value from one line buffer and then load it into RB. units are used to determine whether the lower six pixels in are equal to or . and as shown in Fig. In this condiand to avoid tion. repin . Fig.: LOW-COST VLSI IMPLEMENTATION FOR EFFICIENT REMOVAL OF IMPULSE NOISE 477 Fig. When plexer will output “ ” the multiplexer will output the mean of the two . 8. more complex computations are required. Using from the detector.20 at 1:423 UTC from IE Xplore. When . Three clock cycles are needed for the extreme data detector. The resents the eight neighboring pixels’ values of six OR gates are employed to generate the binary comparison results and . Impulse Arbiter Fig. respectively.CHEN et al. If the clock cywidth of an image is . Four directional differences are calculated with the four units. pixel values which possess E. named as reduced SEPD (RSEPD). Edge-Oriented Noise Filter Fig. we consider 12 directional differences to decide the proper edge. D. it means is a noise-free pixel and the following operations can be skipped. 9 shows the 2-stage pipeline architecture of the edge-oriented noise filter in which the unit is used to output the absolute value of difference of two inputs. the mean of luminance values of the two pixels which possess the smallest directional difference can be obtained. RSEPD. 12 shows the pseudo code of RSEPD. To further reduce the cost of implementation. Architecture of register bank in SEPD. The final value generated by the noise filter multiplexer is used to output is corrupted. 9. When “ ” the final multi. seven clock cycles are needed to perform the denoising processing of a pixel. Table I shows part of the scheduling of these operations. Downlade on May 13. we disable those registers storing unnecessary power consumption. . are considered in ferences. As demonstrated in Section V. 10. 10 shows the architecture of the impulse arbiter in which comparator CMP is used to output logic 1 if the upper input is greater than the lower one . respectively. Architecture of impulse arbiter. RSEPD offers slightly poorer image quality but requires much lower cost than SEPD. minimum tree unit. Then the smallest one is determined by using the Authorized licensd use limted to: IE Xplore. TABLE I PART OF THE SCHEDULING OF THE SEPD CHIP Fig. To complete their functions. Fig. After that. Only three directional dif. Two-stage pipeline architecture of edge-oriented noise filter. Totally. or when is noise-free. we modify SEPD and propose another design. the output latency is cles in which 7 means the number of pipeline stage. 4 to locate the four directions which are composed of noise-free pixels. IV. Restricon aply. the edge-oriented noise filter and impulse arbiter require two and one clock cycles. the mapping module implements the table shown in Fig. 11.

Three directional differences in RSEPD. there are some difference between the extreme detector and noise filter and those of SEPD: 1) In the extreme data detector of RSEPD. RB. only one neighis considered for edge preservation. Pseudo code of RSEPD method. As boring pixel shown in Fig. however. Totally. TABLE II PART OF THE SCHEDULING OF THE RSEPD CHIP Fig. 3. 13. As shown in Fig. Fig. the impulse arbiter requires one clock cycle to complete its job. five clock cycles are needed for RSEPD to perform the denoising processing of a pixel. 13. Fig. and then determine the smallest one with the minimum tree unit. 10. . Table II shows part of the scheduling of these operations. 14. Authorized licensd use limted to: IE Xplore. both the extreme data detector and noise filter need three clock cycles to complete their functions. The mapping module used in SEPD becomes unnecessary and is removed. The output latency clock cycles in which 5 means the of RSEPD is number of pipeline stage. NO. line buffer and impulse arbiter of RSPED are identical to those of SEPD. 14. 2) In the noise filter of RSEPD.20 at 1:423 UTC from IE Xplore. VOL. As shown in Fig. 12. 3) In RSEPD. Downlade on May 13. Extreme data detector in RSEPD. Noise filter in RSEPD. 18. the extreme data detector of RSEPD contains four EC units where two EC units are used to determine and another two are used to determine . MARCH 2010 Fig. 11.478 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. The VLSI architecture of RSEPD is also composed of five main blocks. Restricon aply. we can apply three units to calculate three differences. They work in parallel because there exists no data dependency between them. three directional differences are considered.

(d) peppers. Downlade on May 13. . Couple. DBA [10]. methods (MND [15]. (i) AMF [12]. (f) goldhill. IMPLEMENTATION RESULTS AND COMPARISONS To verify the characteristics and performances of various denoising algorithms. 15. In the simulations. ERIN [8]. NID. As shown in Fig. eight recent lower-complexity denoising methods (NID [6]. (n) SEPD. (a) Lena. ERIN. Airplane. (o) RSEPD. (g) DBA [10]. a variety of simulations are carried 512 8-bit gray-scale test out on the six well-known 512 images: Lena. Totally. (b) noisy image. (c) NID [6]. 15. Fig. (e) ERIN [8]. GPF [17]). We employ the peak signal-to-noise ratio (PSNR) to illustrate the quantitative quality of the reconstructed images for various methods. it can be observed that the performances of SEPD are always the best. 16. Obviously. (h) RVNP [11]. we show the reconstructed images of different denoising methods in restoring 60% corrupted image “Lena” in Fig. Restricon aply. (c) couple. (e) airplane. even the noise ratio is as high as 90%. where “salt” and “pepper” noise are with equal probability. (a) Noise-free image. and our methods (SEPD. a wide range of noise ratios varied from 10% to 90% with increments of 10% is tested. NAVF [13]). AMF [12]. (l) BDND [16]. DRID [7]. (j) NAVF [13]. RVNP [11].: LOW-COST VLSI IMPLEMENTATION FOR EFFICIENT REMOVAL OF IMPULSE NOISE 479 Fig. Boat. To explore the visual quality. (f) ATMBM [9]. Comparisons of PSNR for the reference images. Peppers. V.CHEN et al. three higher-complexity denoising Authorized licensd use limted to: IE Xplore.20 at 1:423 UTC from IE Xplore. (k) MND [15]. BDND [16]. (b) boat. 16. (m) GPF [17]. Results of different methods in restoring 60% corrupted image “Lena”. images are corrupted by impulse noise (salt-and-pepper noise). and RSEPD) are compared in terms of objective testing (quantitative evaluation) and subjective testing (visual quality) where the parameters or thresholds of these methods are set as suggested. ATMBM [9]. Furthermore. (d) DRID [7]. and Goldhill.

79 MHz (with 1249 logic elements) and 105. AMF and GPF produce noticeable black and white dots. 15 and 16. respectively. and verified by MENTOR GRAPHIC Calibre (for DRC and LVS checks). subtracting. RSEPD obtains better image quality than those methods [11]–[13] as shown in Figs.18 m cell library. Furthermore. It can be observed that our SEPD and RSEPD still perform well. In [11]. our RSEPD requires the lowest hardware cost and works faster than RVNP [11]. we compared our RSEPD with three recent denoising chips [11]–[13]. TABLE IV FEATURES OF FIVE DENOISING IMPLEMENTATIONS we have implemented our design by using three different technologies. 18. To explore the advantage of low cost for our design.480 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. AMF [12] and NAVF [13]. 17. They were realized with different VLSI implementations. We used SYNOPSYS Design Vision to synthesize the designs with TSMC’s 0. The layouts for the designs were generated with SYNOPSYS Astro (for auto placement and routing). Fig. respectively. Hence. (a) “Peppers” by software. SEPD and RSEPD are also implemented on the Altera Cyclone II EP2C8F256C6 FPGA board for verification. DRID. Nanosim was used for post-layout transistor-level simulation. Our SEPD and RSEPD produce visually pleasing images as the higher-complexity MND and BDND do. VOL. the author claims that their .95 MHz (with 706 logic elements). 17. the denoised results of SEPD with software program and with the VLSI circuit are identical. Finally. Results of SEPD with software program and VLSI circuit at different noise ratio. Downlade on May 13. MARCH 2010 TABLE III COMPARISONS OF RESTORATION RESULTS FOR NOISE-FREE “LENA” IMAGE Hint: mis-detected pixels are those noise-free pixels which are detected as the noisy pixels by the detection approach. Authorized licensd use limted to: IE Xplore. Since our design just requires simple operations (fixed bit-width adding. Table IV shows the detailed comparisons for various implementations. (b) “peppers” by circuit. Moreover. as shown in Fig. or comparing). RVNP brings out blur reconstructed image. and the result is shown in Table III. The synthesis results show that the SEPD chip contains 6352 gate counts and the RSEPD chip contains 3719 gate counts. we also verify these methods on the noise-free “Lena” image. respectively.20 at 1:423 UTC from IE Xplore. NO. The proposed VLSI architectures of SEPD and RSEPD were implemented by using Verilog HDL. ATMBM. As demonstrated. so it is very difficult to compare our chip with them directly. Restricon aply. Furthermore. 3. SYNOPSYS PrimePower was employed to measure the total power consumption. Both of them work in a clock period of 6 ns and can achieve a processing rate of about 167 mega pixels per second. DBA and NAVF are not good enough with regard to edge preservation. The operating clock frequencies of SPED and RSPED are 112.

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