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Chapter 11

DC – AC Converters (Invertors)
10
Three-Phase, Step-Wave Inverter
Circuits

10.1 SKELETON INVERTER CIRCUIT


The form of voltage-source inverter (VSI) most commonly used consists of a
three-phase, naturally commutated, controlled rectifier providing adjustable direct
voltage Vdc as input to a three-phase, force-commutated inverter (Fig. 10.1). The
rectifier output–inverter input section is known as the dc link. In addition to a
shunt capacitor to aid direct voltage stiffness the link usually contains series
inductance to limit any transient current that may arise.
Figure 10.2a shows the skeleton inverter in which the semiconductor recti-
fier devices are shown as generalized switches S. The notation of the switching
devices in Fig. 10.2 is exactly the same as for the controlled rectifier in Fig. 7.1
and the naturally commutated inverter of Fig. 9.1. In high-power applications the
switches are most likely to be SCRs, in which case they must be switched off
by forced quenching of the anode voltages. This adds greatly to the complexity
and cost of the inverter design and reduces the reliability of its operation.
If the inverter devices are GTOs (Fig. 10.2b), they can be extinguished
using negative gate current. Various forms of transistor switches such as BJTs
(Fig. 10.2c), and IGBTs (Fig. 10.2d) can be extinguished by control of their base
currents, as briefly discussed in Chapter 1. In Fig. 10.2 the commutating circuitry
is not shown. It is assumed in the following analysis that each switch can be
opened or closed freely.

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310 Chapter 10

FIG. 1 Basic form of voltage-source inverter (VSI) [20].

From the power circuit point of view all versions of the skeleton inverter
of Fig. 10.2 are identical. In each case the frequency of the generated voltages
depends on the frequency of gating of the switches and the waveforms of the
generated voltages depend on the inverter switching mode.The waveforms of the
associated circuit currents depend on the load impedances.
Many different voltage waveforms can be generated by the use of appropriate
switching patterns in the circuit of Fig. 10.2. An invariable requirement in three-
phase systems is that the three-phase output voltages be identical in form but phase
displaced by 120 electrical from each other. This does not necessarily create a bal-
anced set of load voltages, in the sinusoidal sense of summing to zero at every in-
stant of the cycle, but it reduces the possibility of gross voltage unbalance.
A voltage source inverter is best suited to loads that have a high impedance
to harmonic currents, such as a series tuned circuit or an induction motor. The
series inductance of such loads often results in operation at low power factors.

10.2 STEP-WAVE INVERTER VOLTAGE


WAVEFORMS
For the purpose of voltage waveform fabrication it is convenient to switch the
devices of Fig. 10.2 sequentially at intervals of 60 electrical or one-sixth of a
period. The use of a dc supply having equal positive and negative voltage values
ⳲVdc is common. The zero point of the dc supply is known as the supply zero
pole but is not grounded.

10.2.1 Two Simultaneously Conducting Switches


If two switches conduct at any instant, a suitable switching pattern is defined in
Fig. 10.3 for no-load operation. The devices are switched in numerical order, and
each remains in conduction for 120 electrical. Phase voltages vAN, vBC, and vCN

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Three-Phase, Step-Wave Inverter Circuits 311

FIG. 2 Skeleton switching circuit of voltage source inverter: (a) general switches, (b)
GTO switches, (c) BJT switches, and (d) IGBT switches [20].

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


312 Chapter 10

FIG. 3 Load voltage waveforms with two simultaneously conducting switches. No load
and resistive load [20].

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Three-Phase, Step-Wave Inverter Circuits 313

consist of rectangular pulses of height ⳲVdc. If equal resistors R are now con-
nected in star to the load terminals A, B, and C of Fig. 10.2, the conduction
pattern of Fig. 10.4 ensues for the first half period.
In interval 0 ⬍ ␻t ⬍ ␲/3,

2Vdc
vAN = − I L R = − R = −Vdc
2R
vBN = 0
2Vdc
vCN = I L R = R = +Vdc
2R
v AB = vAN + vNB = vAN − vBN = −Vdc (10.1)

In the interval ␲/3 ⬍ ␻t ⬍ 2␲/3,

vAN = 0
vBN = I L R = +Vdc
vCN = I L R = +Vdc
vAB = +Vdc (10.2)

In the interval 2␲/3 ⬍ ␻t ⬍ ␲,

vAN = I L R = +Vdc
vBN = I L R = −Vdc
vCN = 0
vAB = 2Vdc (10.3)

For each interval it is seen that the load current during conduction is

±2Vdc V
IL = = ± dc (10.4)
2R R
The results of Eqs. (10.1)–(10.4) are seen to be represented by the waveforms
of Fig. 10.3. For this particular mode of switching the load voltage and current
waveforms with star-connected resistive load are therefore identical with the
pattern of the open-circuit voltages. The potential of load neutral point N is always
midway between ⳭVdc and ⳮVdc and therefore coincides with the potential of
the supply midpoint 0.
Phase voltage waveform vAN in Fig. 10.3 is given by an expression

240° 60° , 360°


vAN = (ωt ) = Vdc − Vdc
120° 0°, 300° (10.5)

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


314 Chapter 10

FIG. 4 Current conduction pattern for the case of two simultaneously conducting
switches: (a) 0 ⬍ ␻t ⬍ 60, (b) 60 ⬍ ␻t ⬍ 120, and (c) 120 ⬍ ␻t ⬍ 180 [20].

This has the rms value

1 2π 2 2
2π ∫0
VAN = v AN (ωt ) dωt = Vdc = 0.816Vdc (10.6)
3
The fundamental Fourier coefficients of waveform vAN (␻t) are found to be
1 2π 2 3
a1 =
π ∫0
vAN (ωt ) cos ωt dωt = −
π
Vdc (10.7)

1 2π
π ∫0
b1 = vAN (ωt )sin ωt dωt = 0 (10.8)

2 3
c1 = a12 + b12 = a1 = − Vdc (10.9)
π
a1
ψ1 = tan −1 = tan−1 (−∞) = −90°
b1 (10.10)

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Three-Phase, Step-Wave Inverter Circuits 315

It is seen from Eqs. (10.9) and (10.10) that the fundamental (supply frequency)
component of the phase voltages has a peak value (2兹3/␲) Vdc, or 1.1Vdc with
its origin delayed by 90. This (2兹3/␲)Vdc fundamental component waveform
is sketched in Fig. 10.3.
The distortion factor of the phase voltage is given by

VAN1 c1 / 2 3
Distortion factor = = =
VAN VAN π (10.11)

Line voltage vAB (␻t) in Fig. 10.3 is defined by the relation

120° , 240° 60° , 300° 180° 360°


vAB (ωt ) = Vdc − Vdc + 2Vdc − 2Vdc
60° , 180° 0, 240° 120° 300° (10.12)

This is found to have fundamental frequency Fourier coefficients of value

3 3
a1 = − Vdc
π
3
b1 = + Vdc
π
6
Therefore, c1 = Vdc ψ1 = − tan−1 3 = −60°
π (10.13)

The fundamental component of vAB (␻t) is therefore given by

6
vAB1 (ωt ) = Vdc sin(ωt − 60° ) (10.14)
π
It is seen in Fig. 10.3 that vAB1 (␻t) leads vAN1 (␻t) by 30, as in a balanced three-
phase system, and comparing Eqs. (10.9) and (10.13), the magnitude |VAB1| is
兹3 times the magnitude |VAN1|.
With a firing pattern of two simultaneously conducting switches the load
voltages of Fig. 10.3 are not retained with inductive load. Instead, the load volt-
ages become irregular with dwell periods that differ with load phase-angle. Be-
cause of this, the pattern of two simultaneously conducting switches has only
limited application.

10.2.2 Three Simultaneously Conducting Switches


A different load voltage waveform is generated if a mode of switching is used
whereby three switches conduct at any instant. Once again the switching devices
conduct in numerical sequence but now each with a conduction angle of 180

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


316 Chapter 10

electrical. At any instant of the cycle three switches with consecutive numbering
are in conduction simultaneously. The pattern of waveforms obtained on no load
is shown in Fig. 10.5. With equal star-connected resistors the current conduction
patterns of Fig. 10.6 are true for the first three 60 intervals of the cycle, if the
load neutral N is isolated.
For each interval,

2Vdc 4V
I= = dc
R+ R/2 3R (10.15)

FIG. 5 Output voltage waveforms with three simultaneously conducting switches. No


load [20].

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Three-Phase, Step-Wave Inverter Circuits 317

FIG. 6 Current conduction pattern for the case of three simultaneously conducting
switches. Star-connected R load: (a) 0 ⬍ ␻t ⬍ 60, (b) 60 ⬍ ␻t ⬍ 120, and (c) 120
⬍ ␻t ⬍ 180 [20].

In the interval 0 ⬍ ␻t ⬍ ␲/3,


I 2
vAN = vCN = R = Vdc
2 3
4
vBN = − IR = − Vdc
3
vAB = vAN − vBN = 2Vdc (10.16)

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


318 Chapter 10

In the interval ␲/3 ␻t ␲,


1 2
vAN = vBN = R = Vdc
2 3
4
vCN = − IR = − Vdc
3
vAB = 2Vdc (10.17)
In the interval 2␲/3 ␻t ␲,
1 2
vAN = vBN = R = Vdc
2 3
4
vCN = IR = − Vdc
3
vAB =0 (10.18)
The load voltage waveforms obtained with star-connected resistive load are plot-
ted in Fig. 10.7. The phase voltages are seen to be different from the corresponding
no-load values (shown as dashed lines), but the line voltages remain unchanged.
Although the no-load phase voltages do not sum to zero, the load currents, with
three-wire star connection, must sum to zero at every instant of the cycle. In Fig.
10.7 the phase voltage vAN is given by
2 60° , 180° 2 240° , 360° 4 120° 4 300°
vAN (ωt ) = Vdc − Vdc + Vdc − Vdc
3 0, 120 ° 3 °
180 , 300 ° 3 60° 3 240°
(10.19)
It can be seen by inspection in Fig. 10.7 that the fundamental frequency compo-
nent of vAN (␻t) is in time phase with it, so that
α1 = 0
α1
ψ1 = tan−1 =0
b1 (10.20)
Fundamental frequency Fourier coefficient b1 for the load peak phase voltage is
found to be
4
b1 = c1 = Vdc (10.21)
π
The corresponding fundamental (supply) frequency Fourier coefficients for line
voltage vAB (␻t) are given by
2 3
a1 = Vdc
π
6
b1 = Vdc
π

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Three-Phase, Step-Wave Inverter Circuits 319

FIG. 7 Output voltage waveforms with three simultaneously conducting switches. Star-
connected R load, isolated neutral. No-load waveforms [20].

4
c1 = 3Vdc = 3 × the phase value
π
1
ψ1 = tan−1 = 30°
3 (10.22)

The positive value Ⳮ30 for ␺1 implies that its origin lies to the left of the zero
on the scale of Fig. 10.7. Line voltage component ␯AB (␻t) is plotted in Fig. 10.7,
consistent with Eq. (10.22).

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


320 Chapter 10

The fundamental components of the load voltages, plotted in Fig. 10.7


show that, as with a three-phase sinusoidal system, the line voltage leads its
corresponding phase voltage by 30. The rms value of phase voltage vAN (␻t) is
found to be

1 π 2 2 2
π ∫0
VAN = v AN (ωt ) dωt = Vdc = 0.943Vdc (10.23)
3
Combining Eqs. (10.21) and (10.23) gives the distortion factor of the phase
voltage,
c1
VAN1 3
Distortion factor = = 2 =
VAN VAN π (10.24)

This is seen to be identical to the value obtained in Eq. (10.11) for the phase
voltage waveform of Fig. 10.3 obtained with two simultaneously conducting
switches. Although the distortion factors are identical, waveform ␯AN (␻t) of Fig.
10.7 has a slightly greater fundamental value (4/␲)Vdc than the corresponding
value (2兹3/␲)Vdc for ␯AN (␻t) of Fig. 10.3, given by Eq. (10.7). The switching
mode that utilizes three simultaneously conducting switches is therefore poten-
tially more useful for motor speed control applications. The properties of relevant
step waves and square waves are summarized in Table 10.1.
It can be deduced from the waveforms of Fig. 10.7 that load neutral point
N is not at the same potential as the supply neutral point 0. While these points
remain isolated, a difference voltage VNO exists that is square wave in form, with
amplitude Ⳳ Vdc/3 and of frequency three times the inverter switching frequency.
If the two neutral points are joined, a neutral current will flow that is square wave
in form, of amplitude ⳲVdc/R, and of three times the inverter switching frequency.

10.3 MEASUREMENT OF HARMONIC


DISTORTION
The extent of waveform distortion for an alternating waveform can be defined
in a number of different ways. The best known of the these, the distortion factor
defined by Eq. (10.24), was used in connection with the rectifier circuits of
Chapters 2–9.
An alternative measure of the amount of distortion is by means of a property
known as the total harmonic distortion (THD), which is defined as
2 2
VAN − VAN VANh
THD = 2
1
=
VAN VAN1 (10.25)
1

Copyright 䉷 2004 by Marcel Dekker, Inc. All Rights Reserved.


Chapter 6

Digitally Controlled DC/AC


Inverters

As described in Chapter 3, all DC/AC pulse-width-modulation (PWM) inverters are


treated as a first-orde -hold (FOH) element in digital control systems. We will discuss
this model in various circuits in this Chapter.

6.1 INTRODUCTION
DC/AC inverters are a newly developed group of the power switching circuits applied
in industrial applications in comparison with other power switching circuits. Although
choppers were popular in DC/AC power supply long time ago, power DC/AC invert-
ers were used in industrial application since later 1980s. Semiconductor manufacture
development brought power devices, such as gate turn-off thyristor, Triac, bipolar tran-
sistor, insulated gate bipolar transistor and metal-oxide semiconductor fiel effected
transistor (GTO, Triac, BT, IGBT, MOSFET, respectively) and so on, in higher switch-
ing frequency (say from thousands Hz upon few MHz) into the DC/AC power supply
since 1980s. Due to the devices such as thyristor (silicon controlled rectifie , SCR)
with low switching frequency, the corresponding equipment is low power rate.
Square-waveform DC/AC inverters were used in early ages before 1980s. In those
equipment thyristors, GTOs and Triacs could be used in low-frequency switching opera-
tion. High-frequency/high-power devices such as power BTs and IGBTs were produced
in the 1980s. The corresponding equipment implementing the PWM technique has
large range of the output voltage and frequency, and low total harmonic distortion
(THD). Nowadays, most DC/AC inverters are DC/AC PWM inverters in different
prototypes.
Digitally controlled DC/AC inverters 163

DC/AC inverters are used for inverting DC power source into AC power applications.
They are generally used in following applications:

1. Variable voltage/frequency AC supplies in adjustable speed drives (ASDs), such


as induction motor drives, synchronous machine drives and so on.
2. Constant regulated voltage AC power supplies, such as uninterruptible power
supplies (UPSs).
3. Static var compensations.
4. Active filters
5. Flexible AC transmission systems (FACTSs).
6. Voltage compensations.

Adjustable speed induction motor drive systems are widely applied in industrial
applications. These systems requested the DC/AC power supply with variable frequency
usually from 0 to 400 Hz in fractional horsepower (HP) to hundreds of HP. A large
number of the DC/AC inverters were in the world market. The typical block circuit is
shown in Figure 6.1.
From this block diagram we can see that the power DC/AC inverter produces
variable frequency and voltage to implement the ASD.
The power devices used for ASD can be thyristors, Triacs and GTOs in the 1970s
and early 1980s. Power IGBT was popular in the 1990s, and greatly changed the
manufacturing of DC/AC inverters. The DC/AC power supply equipment is totally
changed. The corresponding control circuit is gradually changed from analog control
to digital control system since late 1980s. The mathematical modeling for all AC/DC
rectifier is well discussed widely in worldwide. Finally, an FOH is generally accepted
to be used for simulation of all DC/AC inverters.
The generally used DC/AC inverters are introduced below:

1. Single-phase half-bridge voltage source inverter (VSI)


2. Single-phase full-bridge VSI
3. Three-phase full-bridge VSI
4. Three-phase full-bridge current source inverter (CSI)
5. Multistage PWM inverters

ASD
Vi

DC link IM
Rectifier Inverter

Figure 6.1 A standard ASD scheme.


164 Digital power electronics and applications

6. Multilevel PWM inverters


7. Soft-switching inverters.

As mentioned in Chapter 3, we list some parameters as follows:

• The modulation index ma (also known as the amplitude-modulation ratio in


Chapter 3):
VC
ma = (6.1)
V
where VC is the amplitude of the control or the preliminary reference signal, and
V is the amplitude of the triangle signal. Generally, linear-modulation operation
is considered, so that ma is usually smaller than unity (e.g. ma = 0.8).
• The normalized carrier frequency index mf (also known as the frequency-
modulation ratio in Chapter 3):
f
mf = (6.2)
fC
where f is the frequency of the triangle signal, and fC is the frequency of the
control signal or the preliminary reference signal. Generally, in order to obtain
low THD, the mf has usually taken large number (e.g. mf = 9).

In order to well understand each inverter, we have shown some typical circuits below.

6.1.1 Single-Phase Half-Bridge VSI


A single-phase half-bridge VSI is shown in Figure 6.2. The carrier-based PWM tech-
nique is applied in this single-phase half-bridge VSI. Two large capacitors are required
to provide a neutral point N, therefore, each capacitor keep the half of the input DC
voltage. Two switches S+ and S− are switched by the PWM signal.
Figure 6.3 shows the ideal waveforms associated with the half-bridge VSI. We can
fin out the output of the phase delayed between the output current and voltage.

ii
 S D
Vi /2
C IO
Vi  a 

N _ VO

Vi /2
C S D

Figure 6.2 Single-phase half-bridge VSI.


Digitally controlled DC/AC inverters 165

VC V

vt
90 270
180 360

(a)

S
on

vt
(b) 0 90 180 270 360

S on

vt
(c) 0 90 180 270 360

VO1
VO Vi /2

vt
0 90 180 270 360
(d)

iO iO1

vt
0 90 180 270 360
(e)

Figure 6.3 Ideal waveforms associated with the single-phase half-bridge VSI (ma = 0.8,
mf = 9). (a) Carrier and modulating signals, (b) switch S+ state, (c) switch S− state, (d) AC
output voltage and (e) AC output current.

6.1.2 Single-Phase Full-Bridge VSI


A single-phase full-bridge VSI is shown in Figure 6.4.
The carrier-based PWM technique is applied in this single-phase full-bridge VSI.
Two large capacitors may be used to provide a neutral point N, therefore, each capacitor
keep the half of the input DC voltage. Four switches S1 + and S1 − plus S2 + and S2 −
are applied and switched by the PWM signal. Figure 6.5 shows the ideal waveforms
166 Digital power electronics and applications

ii
 S1 D1 S2 D2
Vi/2
iO
 a 
Vi  VO
N b 

Vi/2
S1 D1 S2 D2

Figure 6.4 Single-phase full-bridge VSI.

VC V

vt
90 180 270 360

(a)

S1
on

vt
(b) 0 90 180 270 360

S2
on

vt
(c) 0 90 180 270 360

VO1
VO Vi

vt
0 90 180 270 360
(d)

iO

vt
0 90 180 270 360

(e)

Figure 6.5 Ideal waveforms associated with the full-bridge VSI (ma = 0.8, mf = 8). (a) Carrier
and modulating signals, (b) switch S1 + and S1 − state, (c) switch S2 + and S2 − state, (d) AC
output voltage and (e) AC output current.
Digitally controlled DC/AC inverters 167

ii
 S1 D1 S3 D3 S5 D5
Vi /2
ioa
a 
 V
Vi 
b  ab
N c

Vi /2
S4 D4 S6 D6 S2 D2

Figure 6.6 Three-phase full-bridge VSI.

associated with the full-bridge VSI. We can fin out the output of the phase delayed
between the output current and voltage.

6.1.3 Three-Phase Full-Bridge VSI

A three-phase full-bridge VSI is shown in Figure 6.6.


The carrier-based PWM technique is applied in this single-phase full-bridge VSI.
Two large capacitors may be used to provide a neutral point N, therefore, each capacitor
keep the half of the input DC voltage. Six switches S1 –S6 are applied and switched by
the PWM signal. Figure 6.7 shows the ideal waveforms associated with the full-bridge
VSI. We can fin out the output of the phase delayed between the output current and
voltage.

6.1.4 Three-Phase Full-Bridge CSI


A three-phase full-bridge CSI is shown in Figure 6.8.
The carrier-based PWM technique is applied in this single-phase full-bridge CSI.
The main objective of these static power converters is to produce AC output current
waveforms from a DC current power supply. Six switches S1 –S6 are applied and
switched by the PWM signal. Figure 6.9 shows the ideal waveforms associated with
the full-bridge CSI.
We can fin out the output of the phase ahead between the output voltage and current.

6.1.5 Multistage PWM Inverter


Multistage PWM inverter consists of many cells. Each cell can be a single- or three-
phase input plus single-phase output VSI, which is shown in Figure 6.10. If the
168 Digital power electronics and applications

Vca Vcb Vcc

vt
90 270 360
180

(a) V∆

S1
on

vt
(b) 0 90 180 270 360

S3
on

vt
(c) 0 90 180 270 360

Vab1
Vab Vi

vt
0 90 180 270 360
(d)

ioa

vt
0 90 180 270 360
(e)

Figure 6.7 Ideal waveforms associated with the three-phase full-bridge VSI (ma = 0.8, mf = 9).
(a) Carrier and modulating signals, (b) switch S1 + state, (c) switch S3 state, (d) AC output voltage
and (e) AC output current.

iI S1 S3 S5

D1 D3 D5 ioa
a V

Vi 
b  ab
c
S4 S6 S2 C C C

D4 D6 D2

Figure 6.8 Three-phase full-bridge CSI.


Digitally controlled DC/AC inverters 169

ica icb icc

ωt
90 180 270 360
(a) i∆

S1
on

(b) ωt
0 90 180 270 360

S3
on

(c) ωt
0 90 180 270 360

ioa1
ioa ii

ωt
0 90 180 270 360
(d)

vab
vab1

ωt
0 90 180 270 360
(e)

Figure 6.9 Ideal waveforms associated with the three-phase full-bridge CSI (ma = 0.8, mf = 9).
(a) Carrier and modulating signals, (b) switch S1 + state, (c) switch S3 state, (d) AC output current
and (e) AC output voltage.

ii

L
D1 D3 D5 S1 S2
 D1 D2
Vi /2 C
isa
iO
N a 
b  VO
D4 D6 D2 
Vi /2 C S1 S 
D1 2 D2

Figure 6.10 Three-phase input plus single-phase output VSI.


170 Digital power electronics and applications

Multicell
Multipulse
AC arrangement
transformer
mains n
3
C13
C12

C11 V
 O11

isa
Vsa
C23
C22

C21 V
 O21

C33
C32

C31 V
 O31
isa

IM

Figure 6.11 Multistage converter based on a multicell arrangement.

three-phase AC supply is a secondary winding of a main transformer, it is floatin


and isolated from other cells and common ground point. Therefore, all cells can be
linked in series or parallel manner.
A three-stage PWM inverter is shown in Figure 6.11. Each phase consist of three
cells with difference phase-angle shift by 20◦ each other.
The carrier-based PWM technique is applied in this three-phase multistage PWM
inverter. Figure 6.12 shows the ideal waveforms associated with the full-bridge VSI.
We can fin out the output of the phase delayed between the output current and voltage.

6.1.6 Multilevel PWM Inverter

A three-level PWM inverter is shown in Figure 6.13. The carrier-based PWM technique
is applied in this multilevel PWM inverter. Figure 6.14 shows the ideal waveforms
associated with the multilevel PWM inverter. We can fin out the output of the phase
delayed between the output current and voltage.
Digitally controlled DC/AC inverters 171

Vca V1 V2 V3 Vca

vt
0 90 180 270 360

(a)

VO211
VO21 Vi

vt
0 90 180 270 360

(b)

VO111
Vi
VO11

vt
0 90 180 270 360

(c)

VO311
Vi
VO31

vt
0 90 180 270 360

(d)

VaN 3·Vi

vt
0 90 180 270 360
(e)

Figure 6.12 Ideal waveforms associated with the multicell PWM inverter (three stages,
ma = 0.8, mf = 6). (a) Carrier and modulating signals, (b) cell c11 AC output voltage, (c) cell c21
AC output voltage, (d) cell c31 AC output voltage and (e) phase a load voltage.
172 Digital power electronics and applications

ii
S1a D1a S3a D3a S5a D5a


Vi /2 C
S1b S S
Da Db 3b Dc 5b D5b
D1b D3b
ioa
a 
V
N b  ab
c

S4a S6a S2a


Da Db Dc D2a
D4a D6a

Vi /2 C

S4b S6b S2b


D4b D6b D2b

Figure 6.13 Three-phase three-level PWM VSI.

= 1/f
τ = L/

iO-k = iO-(k−1) (1 ± e−t/

iO-(k−