This action might not be possible to undo. Are you sure you want to continue?
What are the various registers in 8085? - Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter are the various registers in 8085 . In 8085 name the 16 bit registers? - Stack pointer and Program counter all have 16 bits. What are the various flags used in 8085? - Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag. What is Stack Pointer? - Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack. What is Program counter? - Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction. Which Stack is used in 8085? - LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first. What happens when HLT instruction is executed in processor? - The Micro Processor enters into Halt-State and the buses are tri-stated. What is meant by a bus? - A bus is a group of conducting lines that carriers data, address, & control signals. What is Tri-state logic? - Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line. Give an example of one address microprocessor? - 8085 is a one address microprocessor. In what way interrupts are classified in 8085? - In 8085 the interrupts are classified as Hardware and Software interrupts. What are Hardware interrupts? - TRAP, RST7.5, RST6.5, RST5.5, INTR. What are Software interrupts? - RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7. Which interrupt has the highest priority? - TRAP has the highest priority. Name 5 different addressing modes? - Immediate, Direct, Register, Register indirect, Implied addressing modes. How many interrupts are there in 8085? - There are 12 interrupts in 8085. What is clock frequency for 8085? - 3 MHz is the maximum clock frequency for 8085. What is the RST for the TRAP? - RST 4.5 is called as TRAP. In 8085 which is called as High order / Low order Register? - Flag is called as Low order register & Accumulator is called as High order Register. What are input & output devices? - Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD display, CRT Monitor are the examples of output devices. Can an RC circuit be used as clock source for 8085? - Yes, it can be used, if an accurate clock frequency is not required. Also, the component cost is low compared to LC or Crystal. Why crystal is a preferred clock source? - Because of high stability, large Q (Quality Factor) & the frequency that doesn¶t drift with aging. Crystal is used as a clock source most of the times. Which interrupt is not level-sensitive in 8085? - RST 7.5 is a raising edge-triggering interrupt. What does Quality factor mean? - The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of a circuit. Higher the Q, the lower are the losses. What are level-triggering interrupt? - RST 6.5 & RST 5.5 are level-triggering interrupts.
6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25.
1. In Synchronous data Transfer type both Transmitter and Receiver will operate in a) Same Clock pulse b) Different Clock pulse c) None of the above
2. The term PSW Program Status word refers a) Accumulator & Flag register b) H and L register c) Accumulator & Instruction register d) B and C register
3. In 8085 the MAR, or «.. register, latches the address from the program counter. A bit later the MAR applies this address to the ««, where
In micro ± processors like 8080 and the 8085. ROM b) Memory address. Interaction between a CPU and a peripheral device that takes place during and imput output operation is known as a) handshaking b) flagging c) relocating d) sub±routine 8. the «. PROM d) Memory address EPROM 4. Addressing in which the instructions contains the address of the data to the operated on is known as a) immediate addressing b) implied addressing c) register addressing d) direct addressing . 6.a read operations performed a) Memory address.cycle may have from one to live machine cycle a) micro ± instruction b) source program c) instruction d) fetch cycle 5. RAM c) Memory address. programmed multiplication is used in most microprocessors because a) that ALU¶s can only add and subtract b) this saves on memory c) a separate set of instructions is needed for the two d) None of the above.. it does this because that ANI sets all other bits to Zero a) subroutine b) flag c) label d) mask 7. Repeated addition is one way to do multiplication. A ²² is used to isolate a bit.
9. 8085 has «« software restarts and «. Serial input data of 8085 can be loaded into bit 7 of the accumulator by a) executing a RIM instruction b) executing RST1 c) using TRAP c) None of the above 12.5.5 are«. non maskable b) maskable.6 11. The maximum addressable memory space is a) 64K b) 16 K c) 8K . TRAP is «.maskable. RST 6.4 c) 7. RST 5. non ± maskable d) non .maskable. maskable c) non . 5 b) 8.5. hardware restarts a) 10..5 d) 6.whereas RST 7. maskable 14.. a) maskable. Resart is a special type of CALL in which a) the address is programmed but not built into the hardware b) the address is programmed built into the hardware c) the address is not programmed but built into the hardware d) None of the above 10. The address to which a software or hardware restart branches is known as a) vector location b) SID c) SOD d) TRAP 13. micro processor with a 16 ± bit address bus is used in a linear memory selection configuration address bus lines are directly used as chip selects of memory chips with four memory chips.
load b) random. The length of program counter is ²²± bits 22. and «« instructions a) random. 19. push. push.. pop d) sequential. The length of stack pointer is ²²± bits 23. The stack is a specialized temporary «« access memory during «. store. store.bits .bits 21. pop 17. What is the direction of address bus ? a) Uni ± directional into microprocessors b) Uni ± directional out of microprocessors c) Bi ± directional d) mixed direction is when lines into micro processor and some other out of micro processes. load c) sequential. of control lines are ²²- 20. The No.d) 4K 15. How many outputs are there in the output of a 10-bit D/A converter? a) 1000 b) 1023 c) 1024 d) 1224 16. The length of A ± register is ²². The length of status word is ²². The memory address of the last location of a 1K byte memory chip is given as OFBFFH what will be the address of the first location ? a) OF817H b) OF818H c) OF8OOH d) OF801H 18.
If instruction RST is written in a program the program will jump ²². of interrupts are ²²- 28. 33. The length of Data buffer register ²².bits 26. of flags are ²²- 27. What is the addressing mode used in instruction MOV M. The No. of input output ports can be accessed by memory mapped method ²² K 31.5 interrupt service routine start from ²²± location.bits 25. The No.location. 34. When TRAP interrupt is triggered program control is transferred to ²². c) It is used to provide for proper showing down of fast peripheral devices so as to communicate at micro processors speed. What is the purpose of using ALE signal high ? a) To latch low order address from bus to separate A0 ± A7 b) To latch data Do ± D 7 from bus go separate data bus c) To disable data bus latch 35. 32. of input output ports can be accessed by direct method ²²- 30. The No. The RST 5. The memory word addressing capability is ²² K 29.24. What is the purpose of READY signal? a) It is used to indicate to user that microprocessor is working and ready to use b) It is used to provide for proper WAIT states when microprocessor is communicating with slow peripheral device. C? a) Direct b) Indirect c) Indexed . The No. 36. The length of temporary register ²².location.
RST 7. of software interrupts are a) 8 b)7 c)5 d)4 41.RST 7 c)both a b d)none of the above 39..5 and INTR b)RST o. RST 5. In the TRAP.5 d)RST 6.5. Vector address for the TRAP interrupt is a)0024 H b)003C H c)0034 H .5. RST 1«.5.5 40.5 c)RST 6.5. which is having top priority a)TRAP b)RST 7. In the following interrupts which is the non-vectored interrupt a)TRAP b)INTR c)RST 7.In 8085 the no .RST 6. RST 5. In 8085 the direction of address business is a)bidirectional b)unidirectional out of MP c)unidirectional int MP d)none of the above 38.5 42.d) Immediate 37.5 d)RST 5. In 8085 the hardware interrupts are a)TRAP.RST 7.5. RST 6.
The maximum number of I\o devices which can be interfaced in the memory mapped I\o technique are a) 256 b) 128 c) 65536 d) 32768 48.5 b) Rst 6. The maximum number of I\o devices can be interfaced with 8085 in the I\o mapped I\o technique are a) 128 b) 256 c) 64 d) 1024 47. Shadow Address will exist in a) absolute decoding b) linear decoding .5 c) TRAP d) INTR 44. In 8085 the Interput Acknowledge is represended by _______ (a) INTA b)INTA c) INTR d) none of the above 46.d)002C H 43. In the following interrupt which is non-maskable interrupt (a) Rst7. Vector location Address for RST O Instruction is inflex (a) ooooH b) ooo8H c) oo1oH d)oo18H 45.
The Instructions used for data transfer in I\o mapped I\O are a) IN. LDA add c) STA add d) None of the above 50. Number of Address lines required to interface 1KB of memory are a) 10 b)11 c) 12 d) 13 . OUT b) IN.c) partical decoding d) none of the above 49.
This action might not be possible to undo. Are you sure you want to continue?
We've moved you to where you read on your other device.
Get the full title to continue listening from where you left off, or restart the preview.