PIC16F87XA

PIC16F87XA Rev. B0 Silicon/Data Sheet Errata
The PIC16F87XA Rev. B0 parts you have received conform functionally to the Device Data Sheet (DS39582A), except for the anomalies described below. This Errata Sheet supersedes any previously published Errata for PIC16F87XA Rev. B0. All the problems listed here will be addressed in future revisions of the PIC16F87XA silicon. Work around This problem is specific to the Rev. B0, and has been resolved by Rev. B2 of the silicon (date codes later than 0242xxx).

1. Module: A/D (Electrical Specifications)
Note: This issue applies only to 28-pin parts of this device family (PIC16F873A and PIC16F876A). PIC16F874A and PIC16F877A devices are not affected.

The linearity and error specifications of the A/D module vary from the originally published specifications. The new values for 28-pin devices are shown in Table 1 (below). To meet these specifications while operating the microcontroller at the maximum clock speed of 20 MHz, the A/D conversion clock must always be configured for divide-by-64 operation (ADCON0<7:6> = 10, ADCON1<6> = 1). The 40-pin devices of the PIC16F87XA product family continue to meet the previously published specifications in the Device Data Sheet.

TABLE 1:

A/D CONVERTER CHARACTERISTICS (PARTIAL): PIC16F873A/876A (INDUSTRIAL) PIC16LF873A/876A (INDUSTRIAL)
New Specification Data Sheet Specification Min — — — Typ — — — Max <±1 <±1 <±1 LSb LSb LSb

Param No. A03 A04 A07

Sym.

Characteristic Min Typ — — — Max ±1.4 ±1.4 ±2.0

Units

EIL EDL EGN

Integral linearity error Differential linearity error Gain error

PIC16F873A/876A PIC16F873A/876A PIC16F873A/876A

— — —

 2003 Microchip Technology Inc.

DS80128D-page 1

. with the sequence shown in Example 1 (below). B2 of the silicon (date codes later than 0242xxx).5 of the Device Data Sheet. INTCON.second instruction cycle after BSF EECON1. and six NOPs should follow the instruction that sets the read bit. EXAMPLE 1: BCF NOP BSF NOP NOP NOP NOP NOP NOP BSF INTCON. shown in Example 3-3 of the Data Sheet. . RD .PIC16F87XA 2. GIE .This NOP is required for the workaround. Module: FLASH Program Memory To ensure proper reading of data from tables in FLASH Program Memory.Any instructions here are ignored while program memory is read in the . Replace the required 3-instruction sequence. GIE EECON1. as described in Section 3. B0. .These four NOP's are required for the workaround. RD. The interrupts should be disabled during this process.Enable the interrupts DS80128D-page 2  2003 Microchip Technology Inc. the following work around is necessary. This problem is specific to Rev.This initiates program memory read. Work around A software workaround will enable FLASH program memory to function as published. . One NOP should precede. and has been resolved by Rev.Disable the interrupts .

1.1 is also amended to include the mechanical drawings of the 44-pin QFN package and its solder mask diagram.) enable the comparators (CMCON<2:0> ≠ 111). the “ML” line item in the “Package” options section should now read (change in bold): ML = QFN For the sake of completeness. Module: A/D (Operation) The ADC is disabled when ADCON1<3:0> = 011x (all inputs digital) and CMCON<2:0> = 111 (comparators are off). it should be evident during statistically significant pre-production testing (minimum suggested sample size 100 units) of your particular code sequence and placement. respectively. This problem has not been observed at operating frequencies below 4 MHz. DS80128D-page 3 . and has been resolved by Rev. 2. 3. “Comparator Operating Modes”. 5. The 44-pin QFN package has been added to the product line since the original publication of the Device Data Sheet. These are shown in Figure 2. Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS39582A). Module: Core Certain code sequence and placement may cause the corruption of a few bits in the instruction fetch when the part is used above 4 MHz. These are shown in Figure 3 and Figure 4. This provides near chip scale package size.0 (“Device Overview”) is replaced with an updated version. In the “PIC16F87XA Product Information System” (page 219). The addition of this option requires the following additions to the Device Data Sheet (DS39582A). Section 19. it is necessary to either: 1. If this failure mechanism exists in your system. Module: Packaging (Pinout and Product Identification) PIC16F874A and PIC16F877A devices are now offered in 44-pin. not CMCON<2:0> = 000 as shown. 4. This is a special case that conflicts with the second sentence of Note 1 on page 129 of the device data sheet: “Pins configured as digital inputs will convert an analog input. The “Pin Diagrams” on pages 2-3 of the Data Sheet are amended with the addition of the 44-pin QFN pinout shown in Figure 1. following the existing drawings. B0. Table 1.PIC16F87XA 3.” Work around For the ADC module to be enabled. “MLF” should be considered an obsoleted term. B2 of the silicon (date codes later than 0242xxx). This problem is specific to Rev.) configure at least one ADC channel as an analog input (ADCON1<3:0> ≠ 011x). All new information is indicated in bold. Work around Use the part at or below 4 MHz. 2. A corrupted instruction fetch will cause the part to execute an improper instruction and result in unpredictable outputs. Module: Comparator In Figure 12-1. This option is in addition to the 28-pin QFN packages already available for PIC16F873A and PIC16F876A devices. If most parts fail your tests. Microchip cannot predict which code sequences and placement will cause this failure. Section 19. 4. Referenced figures and tables follow this text. 2.3 of Section 1. 1. Any code change should be tested in the same manner prior to their implementation. the POR default value is CMCON<2:0> = 111.  2003 Microchip Technology Inc. or if failures are seen at all voltages or at all frequencies.1 (“Package Marking Information”) is amended to include a marking template and example for 44-pin QFN devices. the following clarifications and corrections should be noted. this indicates that the problem experienced does not relate to this failure mechanism. which adds a column for QFN pin assignments. micro lead frame packages (commonly known as “QFN”). it is also noted that the package designation “MLF” is now replaced by “QFN” in all occurrences throughout the Device Data Sheet.

PIC16F87XA FIGURE 1: PINOUT DIAGRAM FOR PIC16F87XA. 44-PIN QFN PACKAGE 44-Pin QFN RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 RD1/PSP1 RD0/PSP0 RC3/SCK/SCL RC2/CCP1 RC1/T1OSI/CCP2 RC0/T1CKI 44 43 42 41 40 39 38 37 36 35 34 RC7/RX/DT RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7 VSS VDD VDD RB0/INT0 RB1 RB2 1 2 3 4 5 6 7 8 9 10 11 PIC16F874A PIC16F877A 33 32 31 30 29 28 27 26 25 24 23 OSC2/CLKO OSC1/CLKI VSS VSS VDD VDD RE2/AN7/CS RE1/AN6/WR RE0/AN5/RD RA5/AN4/SS/C2OUT RA4/T0CKI/C1OUT 22 21 20 19 18 17 16 15 14 13 12 RA3/AN3/VREF+ RA2/AN2/VREF-/CVREF RA1/AN1 RA0/AN0 MCLR/VPP RB7/PGD RB6/PGC RB5 RB4 NC RB3/PGM FIGURE 2: PACKAGE MARKING TEMPLATE FOR PIC16F87XA. 44-PIN QFN 44-Lead QFN Example XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN PIC16F877A -I/ML 0310017 DS80128D-page 4  2003 Microchip Technology Inc. .

Otherwise CMOS. which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate. Analog input 4. Connects to crystal or resonator in Crystal Oscillator mode. 4: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. TTL I/O I Digital I/O. A/D reference voltage (Low) input. Comparator VREF output. SPI slave select input. In RC mode. Comparator 1 output. 3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus). DS80128D-page 5 . Master Clear (Reset) input. Always associated with pin function OSC1 (see OSC1/CLKI. TTL I/O I I O Digital I/O. Oscillator crystal input or external clock source input. OSC2 pin outputs CLKO. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. TTL I/O I I Digital I/O. ST I/O I O Digital I/O – Open drain when configured as output.PIC16F87XA TABLE 1-3: Pin Name OSC1/CLKI OSC1 PIC16F874A/877A PINOUT DESCRIPTION DIP Pin# 13 PLCC Pin# 14 QFN Pin# 32 QFP Pin# 30 I/O/P Type I Buffer Type Description CLKI ST/CMOS(4) Oscillator crystal or external clock input. P = power 3 4 20 20 4 5 21 21 5 6 22 22 6 7 23 23 7 8 24 24 O = output TTL = TTL input I/O = input/output ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.  2003 Microchip Technology Inc. Oscillator crystal output. Analog input 2. Programming voltage input. OSC2/CLKO OSC2 14 15 33 31 O CLKO MCLR/VPP MCLR VPP RA0/AN0 RA0 AN0 RA1/AN1 RA1 AN1 RA2/AN2/VREF-/CVREF RA2 AN2 VREFCVREF RA3/AN3/VREF+ RA3 AN3 VREF+ RA4/T0CKI/C1OUT RA4 T0CKI C1OUT RA5/SS/AN4/C2OUT RA5 SS AN4 C2OUT Legend: I = input — = Not used 1 2 18 18 I/P ST 2 3 19 19 I/O I TTL Digital I/O. Master Clear (input) or programming voltage (output). External clock source input. Analog input 1. Comparator 2 output. PORTA is a bi-directional I/O port. Analog input 3. Timer0 external clock input. This pin is an active low RESET to the device. — Oscillator crystal or clock output. TTL I/O I I O Digital I/O. OSC2/CLKO pins). Analog input 0. A/D reference voltage (High) input. ST buffer when configured in RC mode.

Digital I/O. In-Circuit Debugger and ICSP programming data. Digital I/O. PORTB can be software programmed for internal weak pull-up on all inputs. Low voltage ICSP programming enable pin. External interrupt. TTL TTL TTL I/O I/O Digital I/O. In-Circuit Debugger and ICSP programming clock. P = power O = output TTL = TTL input I/O = input/output ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt. DS80128D-page 6  2003 Microchip Technology Inc. Digital I/O. TTL TTL TTL/ST I/O I/O (2) 34 35 36 37 38 39 10 11 12 9 10 11 I/O I/O Digital I/O. 40 44 17 17 I/O I/O TTL/ST(2) Digital I/O. 37 38 39 41 42 43 14 15 16 14 15 16 I/O I/O Digital I/O. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus). RB0/INT RB0 INT RB1 RB2 RB3/PGM RB3 PGM RB4 RB5 RB6/PGC RB6 PGC RB7/PGD RB7 PGD Legend: I = input — = Not used 33 36 9 8 I/O I TTL/ST(1) Digital I/O.PIC16F87XA TABLE 1-3: Pin Name PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED) DIP Pin# PLCC Pin# QFN Pin# QFP Pin# I/O/P Type Buffer Type Description PORTB is a bi-directional I/O port. . 4: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.

 2003 Microchip Technology Inc. Timer1 oscillator input. ST I/O O I/O Digital I/O. I2C data I/O. Timer1 oscillator output. Capture2 input. DS80128D-page 7 . USART 1 synchronous clock. ST I/O I I/O Digital I/O. P = power 16 18 35 35 17 19 36 36 18 20 37 37 23 25 42 42 24 26 43 43 25 27 44 44 26 29 1 1 O = output TTL = TTL input I/O = input/output ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt. Timer1 external clock input. ST I/O I I/O Digital I/O.PIC16F87XA TABLE 1-3: Pin Name PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED) DIP Pin# PLCC Pin# QFN Pin# QFP Pin# I/O/P Type Buffer Type Description PORTC is a bi-directional I/O port. Compare2 output. ST I/O I I/O Digital I/O. ST I/O I/O Digital I/O. Capture1 input/Compare1 output/PWM1 output. PWM2 output. USART synchronous data. Synchronous serial clock input/output for I2C mode. ST I/O O Digital I/O. USART asynchronous transmit. 4: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. Synchronous serial clock input/output for SPI mode. 3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus). SPI data out. SPI data in. USART asynchronous receive. RC0/T1OSO/T1CKI RC0 T1OSO T1CKI RC1/T1OSI/CCP2 RC1 T1OSI CCP2 RC2/CCP1 RC2 CCP1 RC3/SCK/SCL RC3 SCK SCL RC4/SDI/SDA RC4 SDI SDA RC5/SDO RC5 SDO RC6/TX/CK RC6 TX CK RC7/RX/DT RC7 RX DT Legend: I = input — = Not used 15 16 34 32 I/O O I ST Digital I/O. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. ST I/O I/O I/O Digital I/O.

ST/TTL(3) I/O I/O Digital I/O. 3: This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus).31 11.PIC16F87XA TABLE 1-3: Pin Name PIC16F874A/877A PINOUT DESCRIPTION (CONTINUED) DIP Pin# PLCC Pin# QFN Pin# QFP Pin# I/O/P Type Buffer Type Description PORTD is a bi-directional I/O port or parallel slave port when interfacing to a microprocessor bus. Analog input 6. Positive supply for logic and I/O pins. ST/TTL(3) I/O I/O Digital I/O. P = power 20 22 39 39 21 23 40 40 22 24 41 41 27 30 2 2 28 31 3 3 29 32 4 4 30 33 5 5 8 9 25 25 9 10 26 26 10 11 27 27 12. These pins should be left unconnected. PORTE is a bi-directional I/O port. 28. . ST/TTL(3) I/O I/O Digital I/O. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 30. Parallel Slave Port data. Parallel Slave Port data. Parallel Slave Port data. ST/TTL(3) I/O I/O Digital I/O. Read control for parallel slave port. Parallel Slave Port data.34 P P — O = output TTL = TTL input I/O = input/output ST = Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.28 12. Analog input 5. These pins are not internally connected. ST/TTL(3) I/O I I Digital I/O. ST/TTL(3) I/O I/O Digital I/O. 8. Parallel Slave Port data. 28. ST/TTL(3) I/O I I Digital I/O. ST/TTL(3) I/O I/O Digital I/O. ST/TTL(3) I/O I/O Digital I/O.32 — 13. ST/TTL(3) I/O I I Digital I/O.34 12. Chip select control for parallel slave port . Write control for parallel slave port. — — — Ground reference for logic and I/O pins. Analog input 7. Parallel Slave Port data. 31 7. 4: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. 33.13.40 6. Parallel Slave Port data. DS80128D-page 8  2003 Microchip Technology Inc. Parallel Slave Port data.29 7.35 1. 29 13 6. RD0/PSP0 RD0 PSP0 RD1/PSP1 RD1 PSP1 RD2/PSP2 RD2 PSP2 RD3/PSP3 RD3 PSP3 RD4/PSP4 RD4 PSP4 RD5/PSP5 RD5 PSP5 RD6/PSP6 RD6 PSP6 RD7/PSP7 RD7 PSP7 RE0/RD/AN5 RE0 RD AN5 RE1/WR/AN6 RE1 WR AN6 RE2/CS/AN7 RE2 CS AN7 VSS VDD NC Legend: I = input — = Not used 19 21 38 38 I/O I/O ST/TTL(3) Digital I/O.17.

05 6.315 BSC .010" (0. C04-103  2003 Microchip Technology Inc.013 .30 0. JEDEC equivalent: M0-220 Drawing No.315 BSC .80 0.013 .80 8.33 0.35 0.274 .012 .90 0.02 0 0.65 6.262 .274 .026 BSC .65 6.002 .010 REF . PACKAGING) 44-Lead Plastic Quad Flat No Lead Package (ML) 8x8 mm Body (QFN) E EXPOSED METAL PAD p D D2 2 1 n OPTIONAL PIN 1 INDEX ON TOP MARKING PIN 1 INDEX ON EXPOSED PAD E2 L B TOP VIEW BOTTOM VIEW A A1 A3 Number of Pins Pitch Overall Height Standoff Base Thickness Overall Width Exposed Pad Width Overall Length Exposed Pad Length Lead Width Lead Length Units Dimension Limits n p A A1 A3 E E2 D D2 B L MIN . DS80128D-page 9 .35 0.268 .95 0.262 .95 6.000 .031 .00 0.40 MAX 1.65 BSC 0.254mm) per side.018 MILLIMETERS* NOM 44 0.80 0.014 INCHES NOM 44 . Mold flash or protrusions shall not exceed .25 REF 8.PIC16F87XA FIGURE 3: 44-PIN QFN PACKAGE (DRAWING 1.268 .039 .001 .035 .00 BSC 6.00 BSC 6.45 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions.016 MAX MIN .

13 MAX __ __ 0.65 BSC __ __ __ __ 0. C04-2103 Units Dimension Limits p B L M MIN __ __ .005 INCHES NOM .PIC16F87XA FIGURE 4: 44-PIN QFN PACKAGE (DRAWING 2.006 MIN MILLIMETERS* NOM 0.026 BSC __ __ MAX __ __ .15 DS80128D-page 10  2003 Microchip Technology Inc. SOLDER MASK) 44-Lead Quad Flat No Lead Package (ML) 8x8 mm Body (QFN) Land Pattern and Solder Mask M B M p PACKAGE EDGE SOLDER MASK Pitch Pad Width Pad Length Pad to Solder Mask *Controlling Parameter Drawing No. .

Rev B Document (8/2002) Added silicon issues 3 and 4 (Oscillator and A/D Operation). Added data sheet clarification issue 1 (Comparator). DS80128D-page 11 .PIC16F87XA APPENDIX A: REVISION HISTORY Rev A Document (5/2002) First revision of this document (silicon issues 1 (A/D) and 2 (FLASH Program Memory)). Rev D Document (3/2003) Added data sheet clarification issue 2 (Packaging Pinout and Product Identification). 2 (FLASH Program Memory). Rev C Document (12/2002) Replaced silicon issue 3 (Oscillator) with Core. and 4 (A/D Operation). Updated silicon issues 1 (A/D Electrical Specifications).  2003 Microchip Technology Inc.

PIC16F87XA NOTES: DS80128D-page 12  2003 Microchip Technology Inc. .

SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U. Microchip is willing to work with the customer who is concerned about the integrity of their code.S. microPort. FlexROM. dsPICDEM. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. Arizona in July 1999 and Mountain View. PowerTool. In addition. FanSense. PICDEM. ECONOMONITOR. SmartShunt. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information. Serial EEPROMs.A. PICSTART. PICmicro.net. All other trademarks mentioned herein are property of their respective companies.A. There are dishonest and possibly illegal methods used to breach the code protection feature. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. dsPIC. Microchip Technology Incorporated. PICC. PowerInfo. or infringement of patents or other intellectual property rights arising from such use or otherwise. ICSP. to our knowledge.  2003 Microchip Technology Inc.” • • • Code protection is constantly evolving. Trademarks The Microchip name and logo. Microchip believes that its family of products is one of the most secure families of its kind on the market today. © 2003.A. implicitly or otherwise. under any intellectual property rights.A. It is your responsibility to ensure that your application meets with your specifications. PICMASTER. require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. No licenses are conveyed. fuzzyLAB. microperipherals. rfPIC. Select Mode. the Microchip logo. PICkit. MXLAB. MPLAB. SmartSensor. Printed on recycled paper. SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U. FilterLab. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. the person doing so is engaged in theft of intellectual property. non-volatile memory and analog products. KEELOQ® code hopping devices. and other countries. MPSIM.S. Printed in the U. PIC. and other countries. MPASM. Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.Note the following details of the code protection feature on Microchip devices: • • Microchip products meet the specification contained in their particular Microchip Data Sheet. PowerMate.A. Code protection does not mean that we are guaranteeing the product as “unbreakable. when used in the intended manner and under normal conditions.page 13 . design and wafer fabrication facilities in Chandler and Tempe. dsPICDEM. Application Maestro. microID. MXDEV. We at Microchip are committed to continuously improving the code protection features of our products. ICEPIC. PICDEM. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs.net. KEELOQ.. MPLIB. MPLINK. Migratable Memory.S. rfLAB. All of these methods. Most likely. PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U. In-Circuit Serial Programming. All Rights Reserved. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. Microchip received QS-9000 quality system certification for its worldwide headquarters.S. PowerCal. DS80128D . If such acts allow unauthorized access to your software or other copyrighted work.S. California in March 2002. you may have a right to sue for relief under that Act. Accuron.

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