This action might not be possible to undo. Are you sure you want to continue?

Welcome to Scribd! Start your free trial and access books, documents and more.Find out more

Authorised By SANTOSH BHARADWAJ REDDY Email: help@matlabcodes.com Engineeringpapers.blogspot.com

More Papers and Presentations available on above site

Abstract— In this paper, A new parallel-connected single phase power factor correction (PFC) topology using flyback converter in parallel with forward converter is proposed to improve the input power factor with simultaneously output voltage regulation taking consideration of current harmonic norms. Paralleling of converter modules is a well-known technique that is often used in medium-power applications to achieve the desired output power by using smaller size of high frequency transformers and inductors. The proposed approach offers cost effective, compact and efficient AC-DC converter by the use of parallel power processing. Forward converter primarily regulates output voltage with fast dynamic response and it acts as master which processes 60% of the power. Flyback converter with AC/DC PFC stage regulates input current shaping and PFC, and processes the remaining 40% of the power as a slave. This paper presents a design example and circuit analysis for 300 W power supply. A parallel-connected interleaved structure offers smaller passive components, less loss even in continuous conduction inductor current mode, and reduced volt-ampere rating of DC/DC stage converter. MATLAB/SIMULINK is used for implementation and simulation results show the performance improvement. Index Terms — Circuit analysis, PFC, Power Conversion.

INTRODUCTION

A number of power factor correction circuits have been developed recently [1]–[5]. Normally a boost converter is employed for PFC with DC/DC stage to improve performance or a flyback converter is used to reduce the cost. Although both boost converter and flyback converter are capable for PFC applications [6], [7], the main difficulty in two-stage scheme employing a PFC boost and a DC/DC converter is the high cost and lower efficiency. However, single-stage method using the simplest flyback converter is not able to tightly regulate the output voltage. Paralleling of converter power modules [8-9] is a well-known technique that is often used in high-power applications to achieve the desired output power with smaller size power transformers and inductors [10]. Since magnetics are critical components in power converters because generally they are the size-limiting factors in achieving high-density and/or low-profile power supplies, the design of magnetics becomes even more challenging for high-power applications that call for high

power-density and low-profile packaging. Instead of designing large-size centralized magnetics that handle the entire power, low-power distributed high density low-profile magnetics can be utilized to handle the high processing power, while only partial load power flow through each individual magnetics [10, 11]. In addition to physically distributing the magnetics and their power losses and thermal stresses, paralleling also distributes power losses and thermal stresses of the semiconductors due to a smaller power processed through the individual paralleled power stages. As a result, paralleling is a popular approach to eliminating "hot spots" in power supplies. In addition, the switching frequencies of paralleled, lower-power power stages may be higher than the switching frequencies of the corresponding single, high-power processing stages because lower-power, faster semiconductor switches can be used in implementing the paralleled power stages. Consequently, paralleling offers an opportunity to reduce the size of the magnetic components and to achieve a low-profile design for high power applications. Without increasing the number of power stages and control-circuit components, the transformer magnetics can be distributed by direct transformer paralleling. Not only that transformer paralleling distributes the processed power in each magnetics components, but also their power losses and thermal stresses are distributed at the same time. However, current sharing among the paralleled transformers needs to be maintained to ensure power balance. In its basic form, the interleaving technique can be viewed as a variation of the paralleling technique, where the switching instants are phase-shifted within a switching period [12]. By introducing an equal phase shift between the paralleled power stages, the total inductor current ripple of the power stage seen by the output filter capacitor is lowered due to the ripple Cancellation effect [12]. This chapter discusses the paralleling techniques to achieve high-density, low-profile designs for relative high power applications. It analyzes and compares the current sharing in various implementations of transformer paralleling. The goal of the proposed PFC scheme is to reduce the passive component size, to employ lower rated semiconductor, and to improve total efficiency. Simulation results show that the proposed topology is capable of offering good power factor correction and fast dynamic response.

**PFC Cells A. Two Stage PFC Approach
**

A two-stage scheme shown in Fig. 1 is mainly employed for the switching power supplies since the boost stage can offer good input power factor with low total harmonic distortion (THD) and regulate the dc-link voltage and the DC/DC stage is able to obtain fast output regulation without low frequency ripple due to the regulated dc-link voltage [13]. These two power conversion stages are controlled separately. However, two-stage scheme suffers from higher cost, complicated control, low-power density, and lower efficiency B. SINGLE STAGE PFC APPROACH

For low power applications, where cost is a dominant issue, a single-stage scheme using the flyback converter [14] Fig. 2 is more attractive than a two-stage scheme due to the following advantages. Simplified power stage and control circuit (low parts count, low-cost design). Provides isolation and multi-output. Start-up and short circuit protection is done by a single switch. Higher cost electrolytic capacitor in two-stage scheme can be replaced by a small-size film capacitor. No output filter inductor is necessary. A single-stage scheme Fig. 2, on the other hand, cannot provide good performance in terms of ride-through or hold-up time since it mainly regulates input current with rectified voltage input and also output voltage is normally too small to provide hold-up time. Therefore, most of flyback converters need a large electrolytic capacitor at the output terminal to

DC-DC Stage

PFC stage

**Fig. 1. Two-Stage PFC scheme
**

DC-DC Stage

Fig. 2. Single-Stage PFC scheme

reduce the second harmonic ripple. But its transient response is still poor. The limitation of the flyback PFC is the output power level and the high breakdown voltage is required for the switch. When the output power increases, both voltage and current stress increase. Due to the high ripple currents the flyback is less efficient than other designs. That is why the two-stage scheme is more attractive for higher power rating.

C. PARALLEL PFC APPROACH At higher power levels, since it may be beneficial to parallel two or more DC/DC converters rather than using a single higher power unit, a parallel-connected scheme is proposed as shown in Fig. 3. This approach can offer fast output voltage regulation and high efficiency. The forward converter with DC/DC stage can offer good output voltage regulation due to the pretty dc input voltage and the flyback converter with AC/DC PFC stage fulfills input current regulation to obtain highly efficient power factor. The advantages of the proposed approach are as follows. 1) This scheme offers good input power factor and output regulation. 2) Input inductor and dc-link capacitor can be smaller. 3) The power rating of flyback converter-I is lower than that of two-stage structure due to low dc-link voltage and lower current rating. 4) The diode reverse recovery losses can be minimized due to the tailed operating mode in diode current. III. PROPOSED PARALLEL PFC SCHEME Fig. 4 shows the proposed parallel-connected PFC scheme which employs a diode rectifier, dc-link capacitor, forward converter and flyback converter. The function of a forward converter with an electrolytic capacitor is to support output voltage regulation. A flyback converter fulfills the function of power factor correction by making input current sinusoidal and regulating dc-link voltage. The operation of the flyback converter is given in this paragraph considering that the forward converter operates ideally. The PFC Cell (forward converter) operates

DC-DC Stage

PFC Stage

Fig. 3. Proposed parallel-connected single-stage PFC scheme

with continuous conduction mode in both an input inductor and a flyback transformer. The dc-link voltage in this scheme can be lower than other schemes as Vdc=√2Vs (1)

The transfer function of the flyback converter is expressed by defining a conversion ratio as the ratio of the dc output voltage to the input voltage

M =

Vo D = Vdr D (1 −n)

(2)

where, D is the duty

ratio of the switch Qh, n (=Np/Ns), is defined as the ratio of Np to Ns, and Np and Ns denote the number of turns of primary and secondary side, respectively. The operational waveforms are shown in Fig. 6. To analyze the circuit parameters, basic equations for voltages and currents are given by idr = i p +ih , (3) di VL dr = Ldr r , (4) dt Vhi = Vdr − VL dr , (5) . (6) Where idr, ip, and ih are the rectified, DC/DC Cell, and PFC Cell input currents on dc side. VLdr, Vhi, Vhi, Vdr ,Vh1, VQh, and Vo and are the input inductor, flyback converter input, rectified input, transformer primary winding, switch, and output

Vh1 =Vhi − Qh V

Fig. 5(a). Forward Converter Switch Qp is OFF and Flyback Converter Switch Qh is ON

voltages, respectively. Since the two input currents, ip and ih, are interleaved, input current, idr, ripple can be significantly reduced. The operational sequences are as follows

t0-t1: As shown in Fig. 5(a) The current of flyback transformer does not flow simultaneously in both windings. When the switch Qh is turned ON at to, VQh

Fig. 5(b). Forward Converter Switch Qp is ON and Flyback Converter Switch Qh is OFF

becomes zero and diode Doh is turned OFF with a reverse bias. The voltage across the diode Doh equals to Vo + Vhi/n. Energy, LmhI2, is charged in the magnetic field in the primary winding of the flyback transformer. Primary current, ih, ramps up from the remaining magnetizing current and reaches Idr with the slope, (Vhi /Lmh), ip

decreases with a slow current tail, and slowly decreases until ip reaches zero. At the same time the forward converter switch Qp is OFF because, as the switch Qh is ON the potential at he junction of diode Dp and input inductor Ldr i.e. VLdr>Vhi, the diode Dp is reverse biased. The diode Dop is also reverse biassed due to the polarity of the forward transformer and a negative voltage of -nVo. The voltage across the output inductor is VL= -Vo and the inductor current iLf decreases and iLf along with ioh, circulates through diode Df, and supplied to load. t1-t2: The primary current of flyback converter increases by Vdr/(Lmh + Ldr). The voltage across switch Qp decreases from 2Vdr to Vdr. The input inductor current ramps up to till switch Qh is OFF. t2-t3: As shown if Fig. 5(b), when the switch Qh is turned OFF, Doh is turned ON with forward bias. The current in the primary winding ceases to flow. The stored energy is transferred to the secondary winding. At this time, the switch voltage, VQh, becomes Vhi+nVo, ip becomes idr and decreases depending on input voltage, and the secondary current decreases with the slope (n2Vo/Lmh). When the switch Qp is ON, the diode Dp is forward biassed because the

Fig. 6. Operational waveforms of proposed parallel PFC Topology Fig. 8. Current Waveforms in switching period

potential at junction between the diode and inductor is VLdr<Vhi+nVo. The primary current of forward transformer ramps up and the energy stored in the primary winding is instantaneously transferred to secondary, because of the same polarity of the forward transformer. The diode Dop is forward biassed and diode Df is reversed biassed. The output inductor current iLf increases along with ioh which is delivered to load. The current slope through the magnetizing inductor when the switch Qh is turned off is given as nV ∆i mh = − o Toff (7) Lmh Where, Toff is the turn-off time. Similarly, the change of the flyback converter input current ip through a diode is

Vdc −Vdr ∆p =− i Toff Ldr

Fig. 7. Operation m

(8)

Based on two slopes of imh and ip, the tailed diode current mode in which the diode current has current tail is defined as shown Fig. 7 when the slope of imh is greater than that of ip

vdr > Lmh Vdc − nV oLdr Lmh

(9)

In continuous conduction input inductor current mode, when the MOSFET is switched on, the diode Dp is forced into reverse recovery at a high rate of change in the diode current ip. In this tailed mode operation, however, the diode current slowly decreases so that the reverse recovery effect can be minimized. To analyze the flyback converter operation, an open loop duty ratio is obtained from (2) as nVo Dopen , h = vdr + nVo (10) t Where, input voltage vdr = 2Vs Sin ω . Assuming two input currents of each converter have the waveforms shown in Fig. 8, two currents depend on the duty ratio from (10)

ih =

idr Ton = D.idr Ts (11)

Fig. 8. Current Waveforms in switching period

i p = (1 − D). idr

(12)

Where, input current idr = 2 I s Sin ωt .

Fig. 9. Input current analysis (Idr,rms = 1 [ p.u], Ip,rms = 0.6 [ p.u], Ih,rms = O.40 [ p.u]).

Therefore, two currents can be obtained

ih =

2nV oIs Sin ω t 2Vs Sin ω + nV o t

nV o i p = 2 I s Sin ωt − 1 2Vs Sin ωt + nV o = 2 I s Sin ω −ih . t

(13)

(14)

Fig. 9 shows those current waveforms and harmonic components. Now, instantaneous powers through the diode Dp and the transformer T2 are calculated by using the input inductance and the magnetizing inductance L + Ldr P = mh [ p.u ] (15) p , pu 2 Lmh + Ldr Lmh P = [ p.u ] (16) h , pu 2 Lmh + Ldr Where, Lmh and Ldr denote the magnetizing inductance of T2 and input inductance, respectively, and the input total power Pin , pu = Pp , pu +Ph , pu =1[ p.u ] . On the other hand, by employing the open loop duty ratio Dopen, h, two instantaneous powers can be derived by Pp =Vdc .i p = 2Vs 2 I s Sin ω −ih t (17) Ph = P −Pp (18) in t Where, Pin =Vs I s {1 −cos 2ω } . The relations between two inductances and two input average powers of two converters are expressed as

[

]

Pp , ave Lmh + Ldr = Lmh Ph , ave

(19) (20)

Pp , ave Ldr = Lmh −1, Ph , ave

**The output currents of the two cells are given by turns ratio iop =n.i f (21)
**

ioh = n.ih

Since the output load current io may contain only dc and switching frequency components, the harmonic contents for the primary current of the flyback converter-I is expressed as VI io = iop + ioh = s s , (22) Vo i f , x =ih , x (23) Where, x(= 2 , 4, 6, etc.) is harmonic order. From (23), the dc-link capacitor current can be estimated as a second harmonic idc , 2 = − i p , 2 +ih , 2 )C 2ω . ( os t (24) Therefore, the voltage ripple of the dc-link capacitor is obtained as

Vdc , ripple = − i p , 2 +ih , 2 2ω p C Sin 2ωt

(25)

Where, Cp is the capacitance of the dc-link capacitor.

IV. Converter Controls To control the proposed approach, two control stages are required for PFC and output voltage regulation as shown in Fig. 10. Flyback converter is regulated by a conventional PFC controller which consists of inner input current loop and outer dc-link voltage [16] to obtain high power factor Fig. 10(a). DC-link voltage is 1.414*V s, which is better to reduce the voltage across drain-source of MOSFET Qp [16]. Based on the PFC controller, a feed-forward control block is added to improve input current shape. Since the open loop duty ratio Dopen,h of the PFC cell is calculated from (10), the final duty ratio for the switch gate input is obtained as Dh= Dopen,h + Dpi (26) where Dpi, is the closed loop duty ratio obtained from S-R flip flop current controller. The output Dpi of the S-R flip flop current regulator containing a small amount of variations provides the correction to the final duty ratio. On the other hand, output voltage Vo control is achieved by forward converter. Fig. 10(b) shows a simple PI voltage controller with a open loop duty ratio Dopen,h which is calculated similarly to

Fig. 10. Converter Controls

Dopen,p in terms of power ratings of each converter

Dopen , p =

nV o Pp . pu vdr + nV o Pp . pu

(27) Final duty ratio Dp is obtained by adding the duty ratio Dpi from controller with Dopen,p. The output voltage control response is much faster than single stage scheme since two converters are employed for separate control function. V.Design Example The proposed PFC circuit is designed according to the following parameters. Total output power (Po) = 200 [W] Input voltage (Vs) = 150 [V] Output voltage (Vo) = 48 [V]

Line frequency Switching frequency = 37000Hz] Output dc capacitance (Co) = 1500 [μF] Transformer turns ratio (n) = 4.41:1 Forward Converter Power rating Magnetizing inductance (Lmp) = 0.5 [mH] DC capacitance = 660[uF] Flyback Converter Power rating Magnetizing inductance (Lmh) = 1.2 [mH]

= 50[Hz]

= 109.4 [W]

=90.6 [W]

The proposed scheme provides small input inductor since the inductor current depends on, dc-link voltage is smaller so that the voltage stress on the switch of the forward converter is less, the power rating of DC/DC stage is a bit higher than average power due to lower harmonic components, and the diode reverse recovery loss is minimized because of the tailed diode conduction mode. The simulation results of the proposed topology are shown in Fig. 10. Unity power factor and tight output voltage (48 V) regulation can be achieved. The dc-link voltage is 1.414*Vs=325V, and the voltage ripple of the dc-link is 3.4 V which mainly depends on the dc-link capacitance. Fig. 11 shows the analysis of the circuit currents. The primary side current of forward converter has 2nd and 4th harmonics due to the harmonics on the flyback converter. Two control systems are implemented to prove the proposed scheme. In the diode current, current tail is appeared when the diode is turned off. 5.2% input current THD and 86% efficiency are obtained.

VII. CONCLUSION A parallel-connected single phase power factor correction (PFC) topology using forward converter and a flyback converter has been proposed. It has been shown that output voltage regulation is, achieved by DC/DC cell and the input power factor correction is achieved by AC/DC PFC cell. These

Fig. 10. Simulation results of the proposed approach

two power stages have 60% and 40% power sharing, respectively. The proposed approach offers the following advantages: smaller size passive components, lower voltage-ampere rating of DC/DC stage, and higher efficiency. Simulation results demonstrate the capability of the proposed scheme. REFERENCES [1] W. F. Ray and R. M. Davis, “The definition and importance of power factor for power electronic converters,” Proc. European conference on Power Electronics and Applications (EPE), 1989, pp. 799-805. [2] L. Huber, J. Zhang, M. M. Jovanovic, and F. C. Lee, “Generalized topologies of “Single-stage input-current-shaping circuits,” IEEE Trans. Power Electron., vol. 16, pp. 508–513, July 2001. [3] R. Redl, L. Balogh, and N. O. Sokal, “A new family of single-stage isolated powerfactor correctors with fast regulation of the output voltage,” in Proc. PESC’94, 1994, pp. 1137–1144. [4] R. Erickson, M. Madigan and S. Singer, “Design of a simple high power factor rectifier based on the flyback converter,” IEEE Applied Power Electronics Conference, 1990, pp. 792-801.

[5] G. Choe and M. Park, “Analysis and control of active power filter with optimized injection,” IEEE Power Electronics Specialists Conference, 1986, pp. 401-409. [6] K. K. Sen, A. E. Emanuel, “Unity power factor single phase power conditioning,” IEEE Power Electronics Specialists Conference, 1987, pp. 516-524. [7] W. Tang, Y. Jiang, G. C. Hua, F. C. Lee, and I. Cohen, “Power factor correction with flyback converter employing charge control,” in Proc. APEC’93, 1993, pp. 293–298. [8] R. Srinivasan and R. Oruganti, “Single phase parallel power processing scheme with power factor control,” Power Electron. Drive Syst., pp. 40–47, 1995. [9] Y. Jiang and F. C. Lee, “Single-stage single-phase parallel power factor correction scheme,” in Proc. PESC’94, 1994, pp. 1145–1151. [10] W. A. Tabisz, M. M. Jovanovi}, and F. C. Lee, “Present and future of distributed power systems,” Proc. IEEE Appl. Power Electron. Conf., 1992, pp. 11-18. [11] G. Suranyi, “The value of distributed power,” Proc. IEEE Appl. Power Electron. Conf., 1996, pp. 104-110. [12] B.A. Miwa, D.M. Otten, and M.F. Schlecht, "High efficiency power factor correction using interleaving techniques," Proc. IEEE Appl. Power Electron. Conf., 1992, pp. 557- 568. [13] J. Zhang, M. M. Jovanovic, and F. C. Lee, “Comparison between CCM single-stage and two-stage boost converter,” in Proc. APEC’99, 1999, pp. 335–341. [14] M. Daniele, P. K. Jain, and G. Joos, “A single-stage power-factor-corrected AC/DC converter,” IEEE Trans. Power Electron., vol. 14, pp. 1046–1055, Nov. 1999.

- Equilibrium, Kinetic and Thermodynamic Studies on ion of Copper and Zinc From Mixed Solution by Erythrina Variegata Oriental Is Leaf Powder
- Waste-Water Reuse by Improved Application of Existing Techno
- Removal of Cr(VI) From Waste Water Using Hyacinth Roots Kinetic, Equilibrium and Thermodynamic Studies
- Treatment of Textile Waste Water Containing Black Sulfur Dye Using Ceramic Membrane Based Separation Process
- The Manufacture of Ethanol From Casein Whey a Two-fold Solution to the Dilemmas of Waste Disposal and Energy Crunch
- Study of Economic Viability of Using Ammonium Hydroxide as Part Replacement of Sodium Hydroxide in Regeneration Media in Water Treatment Plant
- Study for Recovery of Uranium From Waste Effluent by Nitrogen Based Sorbent
- Studies in Adsorptiondesorption of Carbon Dioxide
- Selectivity Engineering in on of Mesitylene With Isopropyl Alcohol Over Cesium Substituted Hetero Pol Ya Cid Supported on K-10 Clay
- Removal of Tetra Hydro Fur An Using Isolated Strain From Municipal Seweage Effulent
- Potential Use of Eichhornia Crassipes for Treatment of Highly Toxic Sulphur Black Effluent
- Pollution Sources From Petrochemial Plants
- Photo Catalytic Degradation of Organic Pollutants in Dairy Effluent
- Modeling and Simulation for S.S. Re-Rolling Mills Waste Treatment
- Kinetics of Condensation Reaction of Crude Glycerol With Acetaldehyde in a Reactive Extraction Process
- IP (Intellectual Property) Means to Enhance Performance Factors (Cost, Quality & Speed) in R&D
- Friedel-Crafts Alkylation of Xylenes With Tert-Butanol Over Me So Porous Superacid UDCaT-5
- Experimental Studies on Remediation of Arsenic Contaminated Soils Using a Novel Solvent Extract Ant Mixture
- Evaluation of a novel sorbent for recovery of radio-nuclides –a comparison of batch and column operation
- Equilibrium Studies for ion of Zinc Onto Gallus Domestic Us Shell Powder
- Defluoridation of Water Using Phosphoric Acid Modified Activated Carbon Obtained From Sugarcane-thrash
- ion of Basic Dye Using Industrial Waste Spent Brewery Yeast
- Atom Economical Synthesis of 4'-Methylpropiophenone by Friedel-Crafts Acylation of Toluene With Propionic Anhydride Over Solid Me So Porous Superacid UDCaT-5
- Assessment of Water Quality of Tolly’s Nullah using CCME Water Quality Index Method
- Adsorption of CD(II) and Pb(II) From Aqueous Solutions on Saw Dust and Neem Bark

- EVL6599A-90WADPfte Poder Laptop
- Vishay ESTAmat PFC-N Manual
- 9 Grid Interface sdStandard
- sol test 1
- Formal Framework for Nonlinear Control of PWM ACDC Boost Rectifiersamp; Controller Design and -TB7
- test emc1
- Cp 35508515
- Reactive Energy Compensation
- PF Measurement
- Electrical Grounding
- Datasheet (1)
- ALPFC Industrial
- CIRED2011_0518_final.pdf
- 07a40201 Power Systems i
- 07 TT 01 Doble Testing
- paper-n[1]
- Load Flow Analysis
- WCE2010_pp878-883
- Metoda Budeanu.pdf
- 6_TLMS
- Transformer
- Transformers 2
- 111_33KV Capacitor Bank .
- Rate DP, Service at Primary Distribution Voltage
- Transformer Presentation
- Switch-Mode Power Supplies
- sandy3
- overall (1).docx
- PSU Calculator
- 00510726dafb162b488fc898e8bd93df

Are you sure?

This action might not be possible to undo. Are you sure you want to continue?

We've moved you to where you read on your other device.

Get the full title to continue

Get the full title to continue reading from where you left off, or restart the preview.

scribd