DLP Pico Series 210 DMD & System Reference Design Mechanical and Thermal Application Note

TI Drawing # 2510323 Rev A 2 Mar 2009

May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated

1

S. contained herein or provided separately in any format or via any medium. The foregoing exclusion and disclaimer of warranty does not affect or diminish any warranty rights with regard to DLP® products. IMPLIED OR STATUTORY. By providing Technical Information TI does not intend to offer or provide engineering services or advice concerning User’s design. No Warranty. INCLUDING LACK OF VIRUSES. No Engineering Services.S. EXPRESS. AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE TECHNICAL INFORMATION OR THE USE OF THOSE MATERIALS. OR COMPLETENESS. FITNESS FOR A PARTICULAR PURPOSE. Unless prior authorization is obtained from the U. any Technical Information. directly or indirectly. Compliance with Export Control Laws. The term “Technical Information” includes reference designs. TI DISCLAIMS ANY WARRANTY OF TITLE. 5. 2. INCIDENTAL. drawings. 4. re-export or release of the Technical Information or direct product is prohibited by the Export Administration Regulations of the U. User may not export. 1. Such rights are governed exclusively by the terms of a written and signed purchase agreement with TI.IMPORTANT NOTICE BEFORE USING TECHNICAL INFORMATION. TI is providing Technical Information for the convenience of purchasers of DLP® products (“Users”). HOWEVER CAUSED. specifications. and other information relating to TI DLP® products or applications. Warranty for Products Not Affected. Department of Commerce (“EAR”). 3. Limitations and Exclusion of Damages. then User should rely on its retained employees and consultants and/or procure engineering services from a licensed professional engineer (“LPE”). User is fully responsible for all design decisions and engineering with regard to its products. Any use or reliance on Technical Information is strictly the responsibility of the User. ARISING IN ANY WAY OUT OF THE TECHNICAL INFORMATION OR THE USE OF THE TECHNICAL INFORMATION. or release. and will not accept any responsibility or liability arising from providing the Technical Information or its use. If User desires engineering services. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL. QUIET POSSESSION. including decisions relating to application of DLP® products. THE TECHNICAL INFORMATION IS PROVIDED “AS IS”. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 2 . Department of Commerce. ON ANY THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. ACCURACY. QUIET ENJOYMENT. TI MAKES NO WARRANTIES OR REPRESENTATIONS. directly or indirectly. CONSEQUENTIAL OR INDIRECT DAMAGES. THE USER SHOULD CAREFULLY READ THE FOLLOWING TERMS. or export. any direct product of such Technical Information to any destination or country to which the export. ANY IMPLIED WARRANTIES OF MERCHANTABILITY. SPECIAL. re-export.

this Application Note will address the following topics: • • • • Terminology Specification and Design Details of a Series-210 DMD Series 210 System Reference Design concept.1. including key attributes and important design considerations System connector 2.0 Terminology The primary features of the Series 210 DMD are illustrated in the Figure 1 Figure 1 – Series 210 Features • • • • • • • WLP Chip – Wafer level package DMD chip which contains the DMD active array DMD Active Array – The array of active DMD mirrors Window glass – Clear glass cover that protects the DMD active area Frame – part used to cover and protect the wire bond wires Ceramic – the main support structure of the DMD for the mechanical datums and electrical interface System Connector – the electrical interface connector in the system DMD Test Pads – electrical interface pads used for testing at Texas Instruments May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 3 .0 Scope As an aid to the successful first time utilization and implementation of the Series 210 DMD.

tolerances. Table 1 . The overall size. etc. In case of conflict between this document and either the DMD data sheet or mechanical ICD. Table 1 summarizes which document technical information is located in. The functional characteristics are in the DMD data sheet.1 Documentation Structure The technical information for the DMD is contained in two documents.0 DMD Specifications The key mechanical and thermal DMD specifications are summarized in this application note. 3. and other geometry information is in the DMD Mechanical ICD.Document Information DMD Technical Information Package Geometry (Dimensions. the DMD Data Sheet (2510298) and the DMD Mechanical ICD (2509058). the DMD data sheet and mechanical ICD should be followed. A 3D-CAD file of the DMD nominal geometry is also available in STEP format..3. datum locations. Mounting Datums.) Thermal Characteristics Mechanical Mounting Loads Optical Properties Electrical Characteristics (signal names) Part Identification DMD Data Sheet 2510298 DMD Mech ICD (Mech Data sheet) 2509058 X X X X X X May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 4 .

DMD Datum Features May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 5 . Datum ‘B’ – Secondary datum Datum ‘B’ is the center of a theoretically perfect 1. Datum ‘C’ is not the entire edge thickness of the ceramic but rather the 0. Datum ‘B’.0 mm slot on the edge of the ceramic. Datum ‘C’ – Tertiary datum Datum ‘C’ is the center of the 3.35 mm thickness closest to the Datum ‘A’ areas as shown in Figure 2. The dimensions and sizes of the datum areas are in the mechanical ICD drawing 2509058. While Datum ‘A’ positions the Active Array plane along the optical axis of the optical system. The three datum features are described below and illustrated in the Figure 2. Datum ‘A’ – Primary datum Datum ‘A’ is a plane specified by 3 areas on the surface of the ceramic. The plane of the DMD Active Array is parallel to the plane formed by the three Datum ‘A’ areas. Datum ‘B’ establishes the X and Y position of the Active Array within the required plane (refer to the DMD Mechanical ICD for specific values and tolerances). Figure 2 . Datum ‘A’ allows the plane of the Active Array to be precisely (and repeatable) oriented along the optical axis of the optical system. and Datum ‘C’). Datum ‘B’ is not the entire edge thickness of the ceramic but rather the 0.4 mm thickness closest to the Datum ‘A’ areas. The DMD Active Array has a controlled distance and parallelism from Datum ‘A’ (refer to the DMD Mechanical ICD for specific values and tolerances).5 mm diameter pin that contacts the edge of the ceramic in the areas shown.2 Optical Interface Features The Series 210 DMD incorporates three principle datum features (Datum ‘A’. Datum ‘C’ establishes the rotation of the Active Array within the required plane and X-Y position established by Datum ‘B’ (refer to the DMD Mechanical ICD for specific values and tolerances). These datum features facilitate physical orientation of the DMD Active Array relative to the optical system.3.

The DMD data sheet identifies the BTB connector pins and signal names. The system interface connector on the DMD is the Panasonic AXK6L46347G or equivalent. Information about this connector is available on the Panasonic web site by searching on the part number. Figure 3 .3. Figure 3 illustrates the electrical interface features. The DMD also has a set of land-grid-array (LGA) pads.3 Electrical Interface Features The Series 210 DMD incorporates a 46 contact. Ensure the LGA pads are not directly or inadvertently connected or shorted by a mounting plate or something that would short the pads together or connect them to ground. 0. These LGA pads are test connections and should not be connected in the system.5 mm pitch Board-To-Board (BTB) type connector for the electrical interface to the system.Electrical Interface May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 6 .

The thermal resistance (R Array-To-Ceramic) from the array to the ceramic measurement point (TC3) is 5 oC/W (see data sheet). the thermocouple measurement (see TC3 in Figure 4). The relationship to calculate the array temperature from the reference ceramic temperature (TC3) is shown in the DMD data sheet and below. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 7 . The electrical load is defined in the DMD data sheet as 0. The absorbed energy from the optical load will need to be determined for the specific application. Figure 4 – Thermal Measurement Point The absolute minimum and maximum operating temperatures apply to both the measurement point (TC3) and the active array.4 Thermal Characteristics The operating and storage temperatures for the DMD and specific measurement points used to monitor the temperature are defined in the DMD data sheet and summarized here. and the absorbed energy from the optical illumination. Table 2 – Absolute Minimum and Maximum Temperatures Parameters Min Max Operating Temperature: -20 75 • Array and reference locations TC3 in Figure 4 Storage Temperature (non-operating): -40 80 • Reference locations TC3 in Figure 4 Operating Relative Humidity (non-condensing) 0 95 Storage Relative Humidity (non-condensing) 0 95 Units o C C o % % The array temperature can not be measured directly but must be computed analytically from information in the DMD data sheet.3. The thermal load on the DMD results from the DMD electrical power.075 watts. A summary of the minimum and maximum temperatures is shown in Table 2. and the thermal load absorbed from the illumination energy. The recommended operating temperature of the active array and thermocouple location TC3 shown in Figure 4 is 25o to 45oC.

1 Calculation of Array temperature from TC3 Measurement The array temperature can be calculation using the formulas below.125 watts • 5 °C/watt) = 45. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 8 .05 = 0.6°C The Series 210 DMD does not have a specifically defined thermal contact area to aid in conducting the thermal load from the DMD. or about 40 lumens of illumination directly on the DMD. The amount of energy can vary over time with many illumination sources so it is important to verify the amount of illumination energy when verifying the thermal design of an application each time a temperature measurement is taken.05 watts (determined for each specific application) TCeramic = 45 °C (measured) QArray = 0.3.075 + 0.055 watts.4. This load is expected to be distributed across the entire active array. highly collimated laser beams) have not been characterized and need to be investigated for the specific illumination source and application.125 watts TArray = 45 °C + (0. TArray = TCeramic + (Q Array • R Array-To-Ceramic) Q Array = Q ELE + Q ILL Where: TArray = computed array temperature (°C) TCeramic = measured ceramic temperature (°C) (TC3 location in DMD data sheet) Q Array = Total DMD array power (electrical + absorbed) (watts) R Array-To-Ceramic = DMD package thermal resistance from array to ceramic TC3 (°C/watt) which is 5 °C/watt (from DMD Data sheet) Q ELE = Nominal electrical power = 0.075 watts (from DMD data sheet) Q ILL = Absorbed illumination energy (watts) (application specific value) Sample Calculation for: Q ILL = 0. The DMD is characterized for an illumination load which is distributed across the active array. For a display application this would be less than 20 lumens measured on the screen. Applications with illumination that has high energy density (for example. For this reason the typical application for the Series 210 DMD would be for an absorbed illumination load less than 0.

3% on the array border and window aperture.00274 • SL Where: TArray = computed array temperature (°C) TCeramic = measured ceramic temperature (°C) (TC3 location in DMD data sheet) Q Array = Total DMD array power (electrical + absorbed) (watts) R Array-To-Ceramic = DMD package thermal resistance from array to ceramic TC3 (°C/watt) which is 5 °C/watt (from DMD Data sheet) Q ELE = Nominal electrical power = 0.3.075 watts (from DMD data sheet) Q ILL = Absorbed illumination energy (watts) (application specific value) SL = measured screen lumens (lumens) Sample Calculation for: SL = 20 lumens (measured) TCeramic = 55 °C (measured) QArray = 0.075 + (0. This assumes a spectral efficiency of 300 lumens/watt for the projected light and illumination distribution of 83.4. An example of the array temperature calculation for a display application is shown below.00274 times the measured screen lumens.7% on the active array and 16.13 watts TArray = 55 °C + (0. TArray = TCeramic + (Q Array • R Array-To-Ceramic) Q Array = Q ELE + Q ILL Q ILL = 0.00274 • 20) = 0.13 watts • 5 °C/watt) = 55.2 Sample Array Calculation for a 1-Chip Display Application For a typical 1-Chip display application with a total projection efficiency from the DMD to the screen of 87% the illumination heat load is 0.7°C May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 9 .

Mechanical Load on the Datum ‘A’ areas The Series 210 DMD will accommodate a mechanical load evenly distributed across the three Datum ‘A’ areas. This load functions to counteract the combined loads from mounting the DMD and the Electrical Interface.5 Mechanical loading The maximum mechanical load limits which can be applied to the different areas of the DMD are illustrated in Figure 5. The load associated with the electrical connection is for the load applied during the mating of the system connector. and what must be continuously maintained to assure proper electrical connection. Mechanical Load on the Connector area The Series 210 DMD is designed to accommodate a mechanical load evenly distributed across the Connector area.3. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 10 . Figure 5 . This is the maximum load during the process of mounting the DMD in a system.DMD Loads Loads in excess of the specified limits can result in mechanical failure of the DMD package. and the continuous load after the DMD has been installed in the system.

• Establish (and maintain) a dust-proof seal between the DMD and the optical chassis. Controlling the loads on the DMD can be done by design details. or a combination of both. The functional design objectives of the mounting system include the following: • Establish (and maintain) the physical placement of the DMD’s Active Array relative to the optical system. • Establish (and maintain) a low electrical impedance connection between the DMD’s Electrical Interface and the system connector on the flex or printed circuit board.0 System Reference Design 4.4. assembly processes. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 11 .1 Critical considerations for mounting and utilizing the DMD The mounting system for the DMD needs to meet the functional design objectives while also controlling the mechanical loads being applied to the DMD. The system reference design presented in this Application Note achieves the design objectives listed above.

To avoid bending and damaging the DMD ceramic package the mounting forces should be applied perpendicular to the substrate and directly opposite the ceramic Datum ‘A’ areas. This section will review the suggested mating features on the optical system for the DMD Datums ‘A’. An example is shown in Figure 6 above. Figure 6 illustrates the following suggested mating features: • Three Datum ‘A’ tabs (coplanar) • One 1. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 12 .5 mm diameter pin. The optical chassis features that contact the DMD Datum ‘B’ and Datum ‘C’ should be lower in height than the ceramic thickness and associated tolerance.2 Opto-Mechanical alignment features The DMD Opto-Mechanical Alignment Features are used to establish and maintain the physical placement of the DMD’s Active Array relative to the optical system..5 mm diameter post (pin) feature to contact Datum ‘B’ • One Datum ‘C’ post • Three threaded bosses to secure the DMD into the system Figure 6 . ‘B’. The coplanar requirements are established by the depth of focus of the specific optical design.4. This clearance is illustrated in Figure 7.Optical Alignment features – 3 Tab The simplest form for the Datum ‘B’ interface is a precision 1. and ‘C’. The earlier section reviewed the Optical Interface Features of the DMD. The three Datum ‘A’ tabs need to be coplanar to ensure uniform focus of the array and repeatability between systems. other shapes could be used to create a more robust feature that would be easier to manufacture. The lower height will prevent interference with the mating connector or supporting parts associated with it. However.

Use of the fourth tab may have a slight impact to focus but for many applications the optical design can accommodate this. and reduce chances of damage during assembly.3 Basic System Reference Design The active array is maintained parallel to the three Datum ‘A’ areas identified on the DMD mechanical ICD drawing. The four Datum ‘A’ tabs need to be coplanar to ensure uniform focus of the array and repeatability between systems. Contacting only these three Datum ‘A’ areas assures the parallelism of the active array to the Datum ‘A’ optical chassis features. Figure 8 .Figure 7 .Optical Alignment features – 4 Tab May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 13 .Section of Optical Alignment Features 4. uniform clamping pressure. The Datum ‘A’ areas are not symmetrical so it may be desirable to contact a fourth tab to ensure strength for high shock loads. Figure 8 illustrates the addition of the fourth tab and threaded boss to the features described in Figure 6.

the amount of overfill. The clamp is used to secure the Datum ‘A’ and Datum ‘B’ of the DMD to the corresponding features on the optics chassis. Figure 9 .4. The tolerance requirements will vary for each specific optical design but the capability of manufacturing the parts needs to be considered when doing the optical design. The key areas for consideration are the alignment of the illumination to the array. This concept utilizes the fourth tab and threaded boss described previously for strength and better shock resistance. Control of loads on the DMD are heavily dependant on the assembly process rather than the specifics of design parts or features. and the focus across the array.Basic System Reference Design Concept May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 14 . The optical interface includes typical features for mounting and securing the DMD to the optics chassis. The assembly drawing number for this concept is 2510317. This concept represents a “drop-in-place“ design where the DMD is not adjusted during or after assembly for optical alignment. The drawings and 3D-CAD models in STEP format of the parts are available for study and use during product design.4 Detailed System Reference Design A system reference design concept for mounting the Series 210 DMD is shown Figure 9. This simplifies the assembly of the DMD to the optics but does require adequate tolerances between the optical chassis features for mounting the DMD and other optical components to ensure proper optical performance.

The clamp contacts the side of the DMD opposite the Datum ‘B’. The position of the DMD Datum ‘B’ is in contact with the optical chassis Datum ‘B’ post. The optics Datum ‘A’ tabs are in contact with the DMD Datum ‘A’.Basic System Reference Design Concept Figure 11 .Figure 10 illustrates the Series 210 DMD in the proper location on the optical interface. The Figures 10 and 11 illustrate these concepts. Figure 10 .Basic System Reference Design Concept – clamp contact May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 15 . and must be manually pushed in the direction shown prior to tightening the screws to assure the proper Datum ‘B’ contact. For proper orientation of the array the DMD needs to be pushed into contact with the Datum ‘B’ post and held in place. The design shown includes a simple clamp to achieve this.

When installing the DMD to the optical chassis using the 4 screws into the optics threaded bosses. Figure 12 . The control of the loads applied to the DMD must be done by a combination of part tolerances and assembly processes. This gap is illustrated in the Figure 12. The use of the raised areas helps to ensure the mounting load is applied to the Datum ‘A’ areas of the DMD. A summary of these is below: • Partial tighten all 4 screws prior to final tightening • Controlling the maximum torque on the screws in the threaded bosses • Use alternating order when tightening the screws for both partial and final torque • Tolerance the critical dimension on the optical interface and clamp to minimize the gap between the threaded boss and the clamp.Other clamp designs are possible which could automatically push the DMD to make the Datum ‘B’ contact. The clamp design has raised areas which correspond to areas on the side of the DMD ceramic opposite the Datum ‘A’ areas. ensure the loads applied to the DMD by tightening the screws do not exceed the DMD specification.Clamp Raised Areas This mounting concept design is simple and has the fewest number of parts. The selection of the material and finish of the clamp should be such that the LGA pads are not electrically connected or shorted together. This concept does not include a flexible feature or compliant part like a coil spring to absorb the part manufacturing variations or tolerances. The raised areas are shown in Figure 12.Basic System Reference Design Concept – Critical gap May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 16 . Figure 12 .

Minimizing the gap between the threaded boss and clamp helps to reduce the chances of applying excess forces to the DMD but does not guarantee it. The clamp will usually bow until the clamp contacts the threaded boss. May not be reproduced without permission from Texas Instruments Incorporated Copyright © 2009 Texas Instruments Incorporated 17 . Specific requirements like size or other geometry configuration associated with a specific implementation may require alternate designs for a final product. Information about this connector is available on the Panasonic web site by searching on the part number. Generally the force on the DMD will vary widely because of these. 5.0 System Connector A mating system connector for the connector on the DMD is the Panasonic AXK5L46347G or equivalent. This concept is an example of mounting the DMD. Space available and the control of the loads on the DMD are critical considerations.The use of torque on the screws to control the forces applied to the DMD is highly dependant on the material variations and friction factors of the screws and optical interface material.

Sign up to vote on this title
UsefulNot useful