Dec 2004 (ver g

)

Training Materials Prepared by: ALVIE RODGERS C.E.T.

2002 and 2003 MODEL RELEASE DIGITAL HD READY PTV
Chassis DP-27 Model # Aspect 51SWX20B 16X9 57SWX20B 65SWX20B 57TWX20B 16X9 65TWX20B 65XWX20B 16X9 57XWX20B 51XWX20B 43FWX20B 16X9 57GWX20B 16X9 51GWX20B 46F500 16X9

DP-27D DP-26

DP-24 DP-23G DP-23K DP-23

57UWX20B 16X9 57F500 57G500 51UWX20B 51F500 51G500

CONTENTS...

2002 DP-2X Chassis Projection Television Information INSTRUCTOR… Alvie Rodgers C.E.T. (Chamblee, GA.)

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Dec 2004 (ver f)

DP-2X TABLE OF CONTENTS
TOPICS

Materials prepared by Alvie Rodgers C.E.T. PAGE

SECTION (1) POWER SUPPLY DIAGRAMS:

• • • • • • • • • • • • • • • • • • •

+6V Lo Voltage Regulation Circuit Diagram Explained ------------------------------------------ 01-01 +6V Lo Voltage Regulation Circuit Diagram DP-26 and DP-27 ------------------------------------- 01-02 +6V Lo Voltage Regulation Circuit Diagram DP-23, DP-23G and DP-24 ---------------------------- 01-03 Power On Relay Controls Circuit Diagram Explained --------------------------------------------- 01-04 Power On Relay Controls Circuit Diagram DP-23, DP-23G and DP-24------------------------------- 01-06 Power On Relay Controls Circuit Diagram DP-26 --------------------------------------------------- 01-07 Power On Relay Controls Circuit Diagram DP-27 and DP-27D ------------------------------------- 01-08 Low Voltage Shut Down Circuit Diagram Explained --------------------------------------------- 01-09 Low Voltage Shut Down Circuit Diagram ----------------------------------------------------------- 01-13 SW +115V Hi Voltage Regulation Circuit Diagram Explained ---------------------------------- 01-14 SW +115V Hi Voltage Regulation Circuit Diagram ----------------------------------------------- 01-15 Additional Hi Voltage Shut Down Circuit Diagram Explained ----------------------------------- 01-16 Additional Hi Voltage Shut Down Circuit Diagram ------------------------------------------------ 01-17 Protect (Deflection) Hi Volt Shut Down Circuit Diagram Explained --------------------------- 01-18 Protect (Deflection) Hi Volt Shut Down Circuit Diagram ---------------------------------------- 01-19 LEDs (Visual Trouble Shooting) Lo Voltage Power Supply Circuit Diagram Explained ---- 01-20 LEDs (Visual Trouble Shooting) Circuit Diagram DP-23, 23G and DP-24 ------------------------------- 01-21 LEDs (Visual Trouble Shooting) Circuit Diagram DP-26 ------------------------------------------------ 01-22 LEDs (Visual Trouble Shooting) Circuit Diagram DP-27 and DP-27D ----------------------------------- 01-23

SECTION (2) MICROPROCESSOR INFORMATION:

• • • • • • • • • • • • • • • •

Microprocessor DATA COMMUNICATION Explanation ------------------------------------Microprocessor DATA COMMUNICATION Circuit Diagram DP-23, 23G, 24, 27 & 27D ---------Microprocessor DATA COMMUNICATION Circuit Diagram DP-26-----------------------------Microprocessor Sync Input Circuit Diagram Explained ----------------------------------------Microprocessor Sync Input Circuit Diagram Circuit Diagram DP-23, 23G, 27 & 27D ---------------Microprocessor Sync Input Circuit Diagram Circuit Diagram DP-24 -------------------------------Microprocessor Sync Input Circuit Diagram Circuit Diagram DP-26 --------------------------------

02-01 02-04 02-05 02-06 02-07 02-08 02-09

SECTION (3) VIDEO CIRCUIT INFORMATION: Video NTSC Circuit Diagram Explained ----------------------------------------------------------- 03-01 Video NTSC Circuit Diagram Circuit Diagram DP-23, 23G, 27 & 27D -------------------------------- 03-03 Video NTSC Circuit Diagram Circuit Diagram DP-24 ------------------------------------------------ 03-04 Video NTSC Circuit Diagram Circuit Diagram DP-26 ------------------------------------------------ 03-05 Video Component, OSD & NTSC Circuit Diagram Explanation -------------------------------- 03-06 Video Component, OSD & NTSC Circuit Diagram DP-23, 23G, 27 & 27D ------------------------ 03-08 Video Component, OSD & NTSC Circuit Diagram DP-24 ---------------------------------------- 03-09 Video Component, OSD & NTSC Circuit Diagram DP-26 ---------------------------------------- 03-10 ATSC (Digital Tuner) Block Diagram DP-26 Only ------------------------------------------------- 03-11 Continued on Next Page

Table of Contents Page 1 of 4

Dec 2003 (ver g) DP-2X TABLE OF CONTENTS TOPICS Materials prepared by Alvie Rodgers C. Not Running Info.T.03-12 ABL Circuit Diagram Explanation ------------------------------------------------------------------.03-20 Component Sync Circuit Diagram --------------------------------------------------------------------.03-14 ABL Switch (Black Side Bars) Circuit Diagram and Explanation -----------------------------.03-18 DVI Input Circuit Diagram ---------------------------------------------------------------------------. 27 & 27D ----------------------Digital Convergence Interconnect Circuit Diagram DP-24 -----------------------------------------Remote CLU4321UG (Digital Convergence Mode Functions) DP-23.03-21 SECTION (4) AUDIO CIRCUIT INFORMATION: Audio Main Terminal Circuit Diagram Explanation ---------------------------------------------. 26.) -----------Sweep Loss Detection Circuit Diagram Explanation ---------------------------------------------Sweep Loss Detection Circuit Diagram ------------------------------------------------------------Vertical Output Circuit Diagram Explanation ---------------------------------------------------Vertical Output Circuit Diagram -------------------------------------------------------------------Pincushion Circuit Diagram-------------------------------------------------------------------------Pincushion Circuit Diagram-------------------------------------------------------------------------05-01 05-03 05-04 05-05 05-06 05-07 05-08 05-09 05-10 SECTION (6) DIGITAL CONVERGENCE CIRCUIT INFORMATION: Digital Convergence Interconnect Circuit Diagram Explanation -----------------------------Digital Convergence Interconnect Circuit Diagram DP-23. PAGE SECTION (3) VIDEO CIRCUIT INFORMATION: (Continued) • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • Rainforest IC Pulse Explanation Explained -------------------------------------------------------.03-16 Audio Video Mute Circuit Diagram ----------------------------------------------------------------. 23G.03-15 Audio Video Mute Circuit Diagram Explanation ------------------------------------------------.03-19 Component Sync Circuit Diagram Explanation ----------------------------------------------------. DP-23G & DP-24 -------Remote CLU5721TSI (Digital Convergence Mode Functions) DP-26 -------------------------Remote CLU5722TSI (Digital Convergence Mode Functions) DP-27 -------------------------43" Overlay Dimensions ----------------------------------------------------------------------------46" Overlay Dimensions ----------------------------------------------------------------------------51" Overlay Dimensions ----------------------------------------------------------------------------57" Overlay Dimensions ----------------------------------------------------------------------------65" Overlay Dimensions ----------------------------------------------------------------------------06-01 06-05 06-06 06-07 06-08 06-09 06-10 06-11 06-12 06-13 06-14 SECTION (7) ADJUSTMENT INFORMATION: Adjustment Order -----------------------------------------------------------------------------------Pre Heat Run -----------------------------------------------------------------------------------------Cut Off Adjustment ----------------------------------------------------------------------------------Pre-Focus Adjustment -------------------------------------------------------------------------------Continued on Next Page 07-01 07-02 07-03 07-04 Table of Contents Page 2 of 4 .03-13 ABL Circuit Diagram ---------------------------------------------------------------------------------.04-01 Audio Main Terminal Circuit Diagram ------------------------------------------------------------.E.04-02 SECTION (5) DEFLECTION CIRCUIT: Horizontal Drive Circuit Diagram Explanation --------------------------------------------------Horizontal Drive Circuit Diagram -----------------------------------------------------------------IH01 Horizontal Drive IC Voltages and Waveforms (Also.

PAGE 07-05 07-06 07-07 07-08 07-09 07-10 07-11 07-12 07-13 07-14 07-15 07-16 07-17 07-18 07-19 07-20 07-21 07-22 07-23 07-24 07-25 07-25 07-25 07-26 07-27 07-28 07-29 07-30 07-31 07-32 07-33 07-34 07-35 07-36 07-37 07-38 07-39 07-40 07-41 07-42 SECTION (7) ADJUSTMENT INFORMATION (Continued): • • • • • • • • • • • • • • • • • • • • ◊ DCU Crosshatch Phase Settings ------------------------------------------------------------------Horizontal Position (Coarse) Adjustment --------------------------------------------------------Raster Tilt Adjustment ------------------------------------------------------------------------------Beam Alignment Adjustment -----------------------------------------------------------------------Off-Set for Red and Blue Raster Position Adjustment ----------------------------------------Vertical Size Adjustment ----------------------------------------------------------------------------Horizontal Size Adjustment -------------------------------------------------------------------------Beam Form Adjustment -----------------------------------------------------------------------------Lens Focus Adjustment ------------------------------------------------------------------------------Static Focus Adjustment -----------------------------------------------------------------------------DCU Character Set-Up and DCU Data Confirmation Adjustment -------------------------DCU Pattern (Sensor Position) Set-Up Adjustment --------------------------------------------43" Overlay Dimensions ----------------------------------------------------------------------------51" Overlay Dimensions ----------------------------------------------------------------------------57" Overlay Dimensions ----------------------------------------------------------------------------65" Overlay Dimensions ----------------------------------------------------------------------------Remote CLU5721TSI (Digital Convergence Mode Functions) --------------------------------Remote CLU5722TSI (Digital Convergence Mode Functions) --------------------------------Remote CLU4321UG (Digital Convergence Mode Functions) ---------------------------------Read from ROM Notes ------------------------------------------------------------------------------ DIGITAL CONVERGENCE ALIGNMENT PROCEDURE -----------------------------◊ (Clearing RAM) Clearing Digital Convergence Data -------------------------------------------◊ Centering Magnet Adjustment ---------------------------------------------------------------------◊ Static Centering Adjustment (Freeze Button) -----------------------------------------------------◊ Green 3X3 Mode Adjustment -----------------------------------------------------------------------◊ Red and Blue 3X3 Mode Adjustment --------------------------------------------------------------◊ Green 7X5 Mode Adjustment -----------------------------------------------------------------------◊ Red and Blue 7X5 Mode Adjustment --------------------------------------------------------------◊ Green 9X13 Mode Adjustment ----------------------------------------------------------------------◊ Red and Blue 9X13 Mode Adjustment -------------------------------------------------------------◊ Storing Digital Convergence Data (Write to ROM) ---------------------------------------------◊ Initializing Magic Focus Sensors ------------------------------------------------------------------◊ Convergence Touch Up Minor Adjustments -----------------------------------------------------◊ ERROR CODES for DCU HD FOCUS Description -------------------------------------------- • • • • • • Blue De-Focus Adjustment --------------------------------------------------------------------------White Balance and Sub Brightness Adjustment ------------------------------------------------White Balance Adjustment Flow Chart -----------------------------------------------------------Sub Picture (PIP) Amplitude Adjustment --------------------------------------------------------Horizontal Position (Fine) Adjustment ------------------------------------------------------------Magnet Locations ------------------------------------------------------------------------------------- Continued on Next Page Table of Contents Page 3 of 4 .E.T.Dec 2003 (ver f) DP-2X TABLE OF CONTENTS TOPICS Materials prepared by Alvie Rodgers C.

Table of Contents Page 4 of 4 .: This section changes often.E.T.Dec 2003 (ver f) DP-2X TABLE OF CONTENTS TOPICS Materials prepared by Alvie Rodgers C. PAGE SECTION (8) MISCELLANEOUS INFORMATION: • • • • • • • • • • • • Rear Panel DP-27 and DP-27D (Terminal Input) Drawing -------------------------------------Rear Panel DP-23 and DP-23G (Terminal Input) Drawing -------------------------------------Rear Panel DP-26 (Terminal Input) Drawing ----------------------------------------------------Rear Panel DP-24 (43FWX20B Only Terminal Input) Drawing ------------------------------Signal PWB Drawing --------------------------------------------------------------------------------Deflection PWB Drawing ---------------------------------------------------------------------------Power Supply PWB Drawing ----------------------------------------------------------------------CRT PWBs Drawing ---------------------------------------------------------------------------------All but DP-24 Front Control PWBs Drawing ---------------------------------------------------DP-24 Front Control PWBs Drawing -------------------------------------------------------------- 08-01 08-02 08-03 08-04 08-05 08-06 08-07 08-08 08-09 08-10 SECTION (9) THINGS YOU SHOULD KNOW / SERVICE BULLETINS / ETC…. Please go to Section 9 section divider cover page for details ------------------------------------. the index for this section is shown on the Things You Should Know section divider.09-00 Download this Section Separately.

POWER SUPPLY INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 1 .

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When the internal Switch MOS FET turns off. The source is connected internally to pin 2 and then to floating ground pin 9 [6] of T901. The DP-2X power supply Standby voltages are regulated by monitoring the Control +6V which becomes the Sby +5V after it is regulated by I909. (example Sby +6V) this too is always present if the set is plugged into the AC outlet. The Control +6V is generated on the Secondary of T901 pin 10 [7]. DP-27 and DP-27D +6V Regulation Circuit Diagram for details). +5V from pin 2. (Also. AC is routed through the main fuse F901 (a 6 Amp fuse). The floating ground is monitored by three [two] low ohm resistors. The internal receiver receives this light and acts as a variable resistor from pin 4 to pin 3 ground. the regulation route is to pin 1 of I904. This pin will inhibit the drive signal to the gate of the SMOSFET. This action causes pin 6 of I901 to manipulate the internal oscillator within I901. R909] to hot ground. If this current exceeds a specific value. When the internal Switch MOS FET turns on. As an example A+6V would indicate a +6V power supply that’s always present. Note: Items described below for the DP-23.8Vdc. the Raw 150V DC routed through T901. then through the Line filter L901 to prevent any internal high frequency radiation for radiating back into the AC power line. I901 requires 16V DC to operate normal. As soon as the excessive current situation is eliminated. These power supplies are generally labeled as Always power supplies or Standby power supplies. DP-23G and DP-24 +6V Regulation Circuit Diagram for details). REGULATION: Note: Items for the DP-23. 23G and DP-24 are shown in brackets [ ]. This in turn causes the frequency of the drive pulse delivered to the Gate of the internal SMOSFET (Switch Metal Oxide Semiconductor Field Effect Transistor) to manipulate the frequency of the pulse generated on the primary of T901. clamped by a 30V Zener D907 and made available to pin (3) of I901 as start up voltage. the voltage developed by these low ohm resistors is routed back into pin 5 which is the Over Current Protection circuit. (See DP-26. it must produce a power supply to energize certain circuits. R908. the internal Regulator of I901 is turned On and begins the operation of I901. However.DP-2X +6V POWER SUPPLY REGULATION EXPLANATION +6V Power Supply Circuit Diagram explanation: The Primary Chassis Discussed is the DP-27 and DP-27D. Internally. the current drain of the internal SMOSFET is monitored. These circuits are responsible for monitoring the Infrared input or Front control Keys as well as the Auxiliary inputs if the Auto Link feature is active. filtered by C911 then routed clamped by D907 and now becomes run voltage (16V) for I901 pin 3. it causes the transformer to saturate building up the magnet field. R909 and R910 [R908. Note too that Hot Ground is the Negative Leg of the bridge rectifier D901 and the Floating Ground is pin 9 [6] of T901. B+ GENERATION FOR THE LOW VOLTAGE POWER SUPPLY DRIVER IC: Vcc for the Driver IC is first generated by the AC input. the LED is illuminated by degrees dependant upon the Control +6V voltage fluctuations. When AC is applied. to I901 in on pin 1 (Drain) and out on pin 2 which is the Source. filtered by C911. After passing the filters it arrives at the main full wave bridge rectifier D901 where it is converted to Raw 150V DC voltage to be supplied to the power supply switching transformer T901 pin 2 [1]. If the power supply has an Sby prefix. the magnet field collapses and the EMF is coupled over to the secondary windings. Pin 6 [3] of T901 is routed to pin 1 of I901 which is the Drain of the SMOSFET. However. The primary route for the Control +6V is to pin 3 of I909 and output as Sby. However. The Source of the internal Switch MOS FET is routed out of pin 2 through three low ohm resistors to hot ground.8V DC on pin 3 of I901. as well as the drive windings. This voltage is called Start Up Voltage. The pulse is rectified by D941 and filtered by C954 and becomes a +6V Power Supply. it will begin operation at 6. 23G and DP-24 are shown in brackets [ ]. one leg of the AC is routed to a half wave rectifier D904 where it is rectified. When the power supply begins to operate by turning on and off the internal Switch MOS FET. see DP-23. The drive windings at pin 8 [5] of T901 produce a run voltage pulse which is rectified by D905. When this voltage reaches 6. the IC will recover and continue functioning. THIS POWER SUPPLY RUNS ALL THE TIME: When a Projection set is plugged into an AC outlet. Here. PAGE 01-01 . routed through R906 and R907 (both a 68K ohm resistor).

DP-26.79A 3 I909 +5V Reg 1 0.3V 150V F902 2 6 C910A T901 D908 R917 C918 R916 C917 6 3 R906 R907 Start Up Run D905 D910 C911 Osc B+ BD 7 5 D907 R911 1 D I901 OCP Driver/ Output IC FB/OLP ABS 4 C915 S C916 D906 R912 C914 R914 2 R908 0. DP-27 and DP-27D CHASSIS POWER SUPPLY Sby +6V REGULATION Lo Voltage Power Supply T902 AC 8 R913 9 D904 D901 16.47 R909 Ohm R910 Hot Ground from negative leg of Bridge D901 FB 2 D953 R958 1 R957 Regulator Photocoupler C904 Control C969 +6V T901 D941 10 3 I904 R915 4 Floating Ground from pin 9 of T901 Cold Ground Pin 11 Secondary of T901 PPS3 1.0685A 2 2 Sby +5V 11 C954 C972 C985 C973 PAGE 01-02 .

DP.0685A 2 C973 2 Sby +5V 8 PAGE 01-03 .47 C915 Ohm FB Hot Ground from negative leg of Bridge D901 R915 4 3 Floating Ground from pin 6 of T901 2 D953 R958 1 R957 I904 Regulator Photocoupler C904 Control C969 +6V T901 D941 7 C954 Cold Ground from pin 8 of T901 PPS3 1.0 V Low Voltage Regulation T901 AC 5 R913 6 D904 D901 16.79A C972 C985 3 I909 +5V Reg 1 0.DP-23.3V 150V F902 1 3 C910A T901 D908 R917 C918 R916 C917 6 C913 1 D 3 Osc B+ BD 7 5 D906 2 R912 C914 C911 D907 R906 R907 Start Up D905 Run D910 R911 I901 OCP Driver/ Output IC FB/OLP ABS 4 S C916 R914 R908 R909 0.23G and DP-24 Chassis +6.

Here the Audio +38V [+29V] is generated and output from the PPS5 connector pins 1. Components identified inside brackets [ ] are for the DP-23. Here the SW+35V is generated and output from the PPS3 connector pin 8 and on to the Tuners pin 9. S901 This completes the path for AC to reach the High Voltage power supply bridge diode D902. DP-26 ONLY: RELAYS ENERGIZED BY POWER _1 and POWER _2: (See DP-26 Relay Controls Circuit Diagram for details) Power _1: (High when the Set is turned On. This action in turn causes the base of Q025 to go low and turns Q025 to turn Off. then the High from pin 4 is routed to the base of Q907 turning it On.) • When the Customer presses the Power On button on the Front control panel or the Remote control. it causes the following relays to energize. When Q907 turns on. This action starts the High Voltage power supply SW+115V for the deflection circuit. (See the Lo Voltage Power Supply Shut Down Circuit for details). DP-24. it’s collector is connected to the Sby +5V line. 2 and 3 and on to the Audio output circuit. DP-27D Relay Controls Circuit Diagram for details) POWER ON: When the Customer presses the Power On button on the Front control panel or the Remote control. the Microprocessor I001 output a High from pin 59. S902 This completes the path for the pulse generated from pin 14 [11] of T901. S903 This completes the path for the pulse generated from pin 10 [7] of T901 (Control +6V). This high is routed to the PPS3 connector pin 4. rectified by diode D941 which produces SW+6V to reach the PPS4 connector pins 7 and 6 and on to IP52 (Switched +3. then the High from pin 4 is routed to the base of Q908 turning it On. DP-27 and DP-27D) and [+29V for DP-23. • This high is routed to the PPS3 connector pin 4. (See the High Voltage Regulation Circuit for details). (+38V for DP-26. DP-23G. (See the Lo Voltage Power Supply Shut Down Circuit for details). it causes the following relays to energize. (Continued on page 5) PAGE 01-04 .DP-2X POWER ON RELAY CONTROLS EXPLANATION Relay Controls Circuit Diagram explanation: (See DP-23. 23G and DP-24 chassis. DP-23G.3V regulator) and IP53 (Switched +5V regulator) on the Signal PWB. It’s emitter pulls up and supplies a high to the base of Q907 turning it On. This action in turn causes the base of Q025 to go low and turns Q025 to turn Off. Q025 collector is also connected to the Sby +5V line and it’s collector pulls up to 5V. • When Q907 turns on. S905 This completes the path for the pulse generated from pin 13 [10] of T901 (+35V) to reach the Tuning Voltage B+ rectifier diode D943. Q025 collector is also connected to the Sby +5V line and it’s collector pulls up to 5V. Provided the Short Detection transistor Q904 isn’t activated. RELAYS ENERGIZED BY Q907 (DP-23. This high is routed to the base of Q026 which turns this transistor On and it’s collector connected to the Sty +5V line goes low. Provided the Short Detection transistor Q903 isn’t activated. DP-27 and DP-27D: Note: This description refers specifically to the DP-27 and DP-27D chassis. This high is routed to the base of Q026 which turns this transistor On and it’s collector connected to the Sty +5V line goes low. the Microprocessor I001 output a High from pin 59. When Q908 turns on. DP-24 and DP-27. DP-23G and DP-24] to reach the Audio B+ rectifier diode D944.

DP-2X POWER ON RELAY CONTROLS EXPLANATION RELAYS ENERGIZED BY Q907: Activated by Power _1 • S901 This completes the path for AC to reach the High Voltage power supply bridge diode D902. TIMER (Unattended Recording) OPERATION: NOTE: Power _2 is also high when the Timer is set for unattended recordings. This action start the High Voltage power supply SW+115V for the deflection circuit. Here the Audio +38V is generated and output from the PPS5 connector pins 1. • The DM +9V is also routed to the Terminal PWB pin 21of the PST2 connector. MODE Stand By Timer Power ON POWER _1 L L H POWER _2 L H H PAGE 01-05 . Audio Circuit and Monitor outputs remain active. Input to pin 5 is the DM +10V. This voltage is also routed out the PPS7 connector pin 6 DM +28V. This turns on the Selector IC IX01 and the Monitor Out Circuit. Power _2: (High when the set is turned On and/or when the Timer is On). This high is routed to the base of Q909 turning it On. Tuners. the Microprocessor I001 output a High from pin 58. This way. Selector IC and Monitor output become active. IP01 regulates this down to +9V and outputs it from pin 3 to the Digital Module (ATSC Tuner) pin 12 of the PMS1 connector. IP01 regulates this down to 9V and output it from pin 3 to the Digital Module (ATSC Tuner) pin 12 PMS1. • S902 This completes the path for the pulse generated from pin 14 of T901. Here the DM +10V is generated and output from the PPS7 connector pin 2 and 3 and on to the DM +9V regulator IP01.3V regulator) and IP53 (Switched +5V regulator) on the Signal PWB. • When the Customer presses the Power On button on the Front control panel or the Remote control. the Selector IC. it causes the following relays to energize. • S903 This completes the path for the pulse generated from pin 10 of T901 (Control +6V). to become tuning voltage for the Digital Tuner (ATSC) via pin 1 of the PMS2 connector. rectified by diode D941 which produces SW+6V to reach the PPS4 connector pins 7 and 6 and on to IP52 (Switched +3. 2 and 3 and on to the Audio output circuit. Power_1 remains Low. During this time. This is the DM +9V regulator and it turns on. the Tuners. it's routed to pin 2 of IP01 on the Signal PWB. • Power _2 is also routed to the PPS3 connector pin 4 and then to the Power Supply. When the Timer is activated. Input to pin 5. This high is routed to two different circuits. RELAYS ENERGIZED BY Q909: Activated by Power _2 • S905 This completes the path for the pulse generated from pin 13 of T901 (+35V) to reach the Tuning Voltage B+ rectifier diode D943. • DM +9V REGULATOR: • When Power _2 goes high. (+38V) to reach the Audio B+ rectifier diode D944. • When Q909 turns on. (See the High Voltage Regulation Circuit for details). The Table below shows the logic state of Power _1 and Power _2. • S906 This completes the path for the pulse generated from pin 17 (Digital Module +10V) of T901 to reach the rectifier diode D945. Here the SW+35V is generated and output from the PPS3 connector pin 8 and on to the Tuners pin 9.

DP-23.33A PPS4 L923 C959 SW + 6V AC to D902 High Voltage Power Supply C954 AC 7 6 5 Gnd 4 Gnd 3 Gnd PAGE 01-06 . See Power Supply Shut Down Circuit 1.D.0165A C961 C956 On Off Q907 R960 Q908 R959 C957 S-903 SW +6V Supply Relay D943 PPS3 8 1 2 3 4 5 6 7 10 SW + 35V 3 Gnd 7 Gnd 2 Sby +5V D954 R962 R961 Sby +5V T901 8 R963 POWER _1 On Off Q903 4 Q025 Q026 59 I001 Micro Control +6V 7 D941 S-901 Main Power Relay Short Det. L922 PPS5 +29V 11 C962 C957 L921 S-905 SW +35V Supply Relay E911 12 Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sby +5V C978 R992 +35V 0.30A Audio + 29V R985 D965 Sby 5V comes from I909 pin 2 GREEN L. DP-23G and DP-24 Chassis Power On Relay Controls S-902 Audio Power Supply Relay T901 D944 1.E.

30A 0.54A SW + 9V SW + 6V From I911 D941 L923 AC to D902 High Voltage Power Supply PAGE 01-07 AC C959 C954 1 2 7 6 5 Gnd 4 Gnd 3 Gnd .D. 1.55 A From D942 Q909 0.E. See Power Supply Shut Down Circuit 1.55A Audio + 38V R985 D965 Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sby 5V comes from I909 pin 3 PPS5 Audio +38V 14 C952 C957 L921 D945 1.06A 1.DP-26 RELAY CONTROLS D944 L922 GREEN L.006 A R973 PPS7 On Off From Micro Pin 58 PPS3 5 POWER _2 C968 C956 C961 R960 R962 D972 S-903 SW +6V Supply Relay E911 S-902 SW +35V Relay T901 C978 R992 15 Sby +5V 17 0.36 A C963 C958 E912 S-906 Digital Module 10 V Relay 1 2 3 4 5 6 7 T901 16 Sby +5V MODE Stand By Timer TV On POWER _1 L L H POWER _2 L H H DM +10V 2 DM +10V 3 1 Sby +10V 4 Audio Gnd 5 Audio Gnd 6 DM +28V 7 N/C +35V S-905 SW +35V Supply Relay D943 13 R963 R984 On Off Q907 R959 C957 1.25 A R963 Q904 D954 T901 11 SW + 35V 1 SBY + 5V 2 From I909 3 Gnd 7 Gnd On 4 POWER _1 Off From Micro Pin 59 PPS4 Sby +5V Control +6V 10 S-901 Main Power Relay Short Det.

See Power Supply Shut Down Circuit 1. L922 PPS5 +38V 14 C962 C957 L921 S-905 SW +35V Supply Relay E911 15 Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sby +5V C978 R992 +35V 0.D.E.DP-27 and DP-27D CHASSIS RELAY CONTROLS on the POWER SUPPLY S-902 Audio Power Supply Relay T901 D944 1.0165A C961 On Off Q907 R960 Q908 R959 C957 S-903 SW +6V Supply Relay D943 PPS3 8 1 2 3 4 5 6 7 13 C956 SW + 35V 3 Gnd 7 Gnd 2 Sby +5V D954 R962 R961 Sby +5V 11 R963 POWER _1 On Off Q903 4 Q025 Q026 59 I001 Micro Control +6V 10 D941 S-901 Main Power Relay Short Det.95A Audio + 38V R985 D965 Sby 5V comes from I909 pin 3 GREEN L.33A PPS4 L923 AC to D902 High Voltage Power Supply AC C959 C954 7 6 5 Gnd 4 Gnd 3 Gnd SW + 6V PAGE 01-08 .

the diode in effect will have a LOW on its cathode. which isolates the Hot ground from the Cold ground and couples the Shutdown signal to the Hot Ground side. When Q902 is on. (cold ground side detection). Q902 on the hot ground side and Q901 which latches Q902 on. However. The receiver transistor turns On and output a High from pin 3. This power supply creates the Standby voltages SBY +5V which runs anytime the set is plugged into an AC outlet. The light from this internal LED is then coupled to the receiver transistor. the diode is reversed biases. The Power Supply utilizes a Shutdown circuit that can trigger Q902 from 2 input sources. which keeps the base of Q1 pulled up. This will allow a current path for the base bias of Q1. I905 (the Photo Coupler). • Voltage Missing Detection or Short Detection • Voltage Too High Detection • Excessive Current Detection • Negative Voltage Loss Detection The following will explain all of these commonly used circuits. It also creates other voltages that are Switched on when the Set is turned on. POWER SUPPLY SHUTDOWN PHOTO COUPLER I905 EXPLANATION This chassis utilizes I901 as the Osc. which forward biases the internal LED. (1 of these Short Detection circuits are not operational in Stand By mode). forcing it OFF. turning it ON. The Shutdown circuit. I905 is activated by a Low being applied to pin 2. just as the previous chassis have done.\Driver \Switch for the Low Voltage power supply. VOLTAGE LOSS or SHORT DETECTION (See Figure 1) One circuit used is the Voltage Loss Detection circuit. GENERAL INFORMATION: All of the Power Supply Shutdown circuitry can be broken down into the following category. The individual Shut Down circuits will be discussed later. Audio +38V SW +35V SW +9V SW +HVcc The following explanation will describe the Low Voltage Power Supply Shut Down Circuit. This high is routed to the base of Q902 turning it On. disabling the power supply. it removes B+ from pin (3) of I901 (the Vin pin). which grounds out the Vin at pin (3) of I901. Under normal conditions. if there is a short or excessive load on the B+ line that’s being monitored. This circuit consist of a diode connected by its cathode to a positive B+ power supply.DP-2X LOW VOLTAGE POWER SHUT DOWN EXPLANATION Low Voltage Power Supply Shut Down Circuit Diagram explanation: (See DP-27 Signal Power Supply (Low Voltage) Shut-Down Circuit Diagram for details) The Low Voltage power supply is centered around the Switching Transformer T901 and I901. The Service Technician should become familiar with the appearance of these circuit and their function. which will turn it ON and generates a Shutdown Signal. Voltage Loss Detector Any Positive B+ Supply B+ Q1 Shut-Down Signal Figure 1 (Continued on page 10) PAGE 01-09 . Q901 will keep a high on the base of Q902 as long as there is any voltage available at its Emitter. This is a very simple circuit that detects a loss of a particular power supply and supplies a Pull-Down path for the base of a PNP transistor. removes I901 B+ at pin 3 via the following circuit.

In Figure 5. RECOVERING SHUT DOWN INPUT: (Driver IC will recover on it’s own when trouble is removed. In the example shown in Figure 2. R908.47 ohm. the neutral point will go positive. the value is shown as a 0. (Thermal Sensing Device). 1. however it could be any low ohm value. and R910. producing a Shutdown signal that is directed to the appropriate circuit. Any Positive B+ Supply Voltage Too High Detector Shut-Down Signal Figure 2 R1 0. 2. the negative voltage drops or disappears. This in turn will cause the zener diode to fire. the voltage is effectually zero (0) volts.DP-2X LOW VOLTAGE POWER SHUT DOWN EXPLANATION VOLTAGE TOO HIGH DETECTION (See Figure 2) Another circuit used is the Voltage Too High Detection circuit. the voltage at the divider center point will rise as well and trigger or fire the zener diode which produces a Shutdown signal. (OVP) Pin 3 is monitored for Over Voltage Protection at pin 3 of I901. If the voltage source rises too high. LATCHED SHUT DOWN MONITORS: (AC must be removed to recover). temperature or over voltage. there are two resistors of equal value. SPECIFIC INFORMATION: Shut-Down Signal Voltage Loss Detector +12V -12V Figure 4 In addition. (OLP) Over Load Protection monitors the difference between the Hot Ground and Floating Ground. (neutral point). (shown here as +12V) and one to the negative voltage. The value of this resistor is determined by the maximum current allowable within a particular power supply. R909. This block is labeled TSD. In this circuit is a low ohm resistor in series with the particular power supply. the voltage drop across the resistor increases. One to the positive voltage. These sensors circuits protect I901 from excessive current. If the voltage drop is sufficient to reduce the voltage on the base of the transistor.) 4. (Specific to I901).47 B+ Current Sensor Base Bias Figure 3 Shut-Down Signal NEGATIVE VOLTAGE LOSS DETECTION (See Figure 4) The purpose of the Negative Voltage Loss detection circuit is to compare the negative voltage with its’ counter part positive voltage. the zener diode D1 is connected to a voltage divider. the transistor will conduct. the circuit will produce a Shutdown signal. (shown here as -12V). At their tie point. there are 7 Hot Ground side Shutdown inputs that are specifically detected by the main power driver IC I901. creating a Shutdown Signal. (TSD) I901 itself is monitored for Excessive Heat. If at any time. If however. 3. In the case of Figure 1. When the current demand increases. the negative voltage is lost due to an excessive load or defective negative voltage regulator. If these resistors have an excessive (Continued on page 11) PAGE 01-10 . EXCESSIVE CURRENT DETECTION (See Figure 3) One very common circuit used in many Hitachi television products is the B+ Excessive Current Sensing circuit. HOT GROUND SIDE SHUT DOWN SENSING CIRCUITS. (OCP) Pin 5 monitors the low ohm resistors. (labeled B+ in the drawing).

(Note: The Hi Voltage Power Supply Shutdown will be discussed later. There are a total of 4 individual Shutdown inputs to the Relay Inhibit transistor Q903 from the Deflection Circuit. Labeled PROT-SBY on the Schematic. Q910: This transistor’s base is connected to Q911 through D955. Shorted SW+5V (IP53 pin 2) on Signal PWB monitored by DP54. the voltage will rise and pin 5 has an internal Over Voltage detection op-amp. If this voltage rises enough to trigger this opamp.3V generated by IP81 and monitored by (R298) on Signal PWB through PPS3 pin 10 to (D963) on Low Voltage Power Supply PWB. If something were to load this line down. This will assist the Service Technician with trouble shooting the Chassis. 5.3V power supply produced by IP81 on the Signal PWB. COLD GROUND SIDE SHUT DOWN SENSING CIRCUITS. This in turn is connected to R298 which is connected directly to the 3.DP-2X LOW VOLTAGE POWER SHUT DOWN EXPLANATION current condition caused by monitoring the current through the internal Switch MOS FET. the technician can then “Divide and Conquer”. (ABS) Pin 4 also has C915 monitoring spike current in case the CRTs “Snap” indicating a quick discharge of High Voltage. From the Power Supply. D962: The cathode of D963 is connected through R982 to pin 10 of PPS3. Q911 emitter is connected to Q912. by understanding these circuits and having the associated circuit routs. See Power Supply Shutdown Photo Coupler I905 Explanation on the previous page. Q903 Relay Inhibit Activation. SW +115V Voltage Too High Detection • Monitored by (D927) See additional Shut Down Circuit Diagram for details. Labeled PROT-SW on the Schematic. (AC must be removed to recover). RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB. For a total of 10 individual Shutdown inputs that will kill the Lo Voltage Power Supply. This transistor is the Shut down enable circuit. (See DP-27 Signal Power Supply (Low Voltage) Shut-Down Circuit Diagram for details) Looking at Pin 2 of I905 the shut down events are triggered by two routes. SW +115V Excessive Current Detection • Monitored by (Q905) See additional Shut Down Circuit Diagram for details (Continued on page 12) PAGE 01-11 . (BD) Pin 7 Monitors the Run Voltage generated by pin 18 of T901 for excessive voltage. D963 would forward bias and supply a current path for pin 2 of I905. Voltage Loss Detection through I905 Photo coupler • • • • Shorted STBY +3. RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB. There are a total of 3 individual Shutdown inputs to the Relay Inhibit transistor Q903 from the power supply. This in turn would produce a Shut Down event. Shorted SW+2. the IC will stop producing a drive signal.2V (IP52 pin 5) on Signal PWB monitored by RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB. D963. the Shutdown circuits will be grouped. DP-27 SHUT DOWN CIRCUIT: There are a total of 3 individual Shutdown inputs to the photo coupler I905. 6. Shorted SW+3. Labeled PROT-SW on the Schematic.) All of the Cold Ground side Shutdown detection circuits can be categorized by the two previously described circuits In the following explanation. Labeled PROT-SW on the Schematic.3V (IP52 pin 2) on Signal PWB monitored by DP53.

-5V Loss Detection • Monitored by (DK90) See Deflection Protect Power Supply Shutdown Diagram for details. This voltage is called Start Up Voltage. RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB.3V (IP52 pin 2) on Signal PWB monitored by DP53. D703) See Deflection Protect Power Supply Shutdown Diagram for details If any one of these circuits activate the base of Q903 will go High and remove the Power On High from PPS3 connector pin 4 and the power supply will STOP. filtered by C911 then routed clamped by D907 and now becomes run voltage (16V) for I901 pin 3. Labeled PROT-SW on the Schematic. routed through R906 and R907 (both a 68K ohm resistor). The drive windings at pin (8) produce a run voltage pulse which is rectified by D905.DP-2X LOW VOLTAGE POWER SHUT DOWN EXPLANATION SW –28V Loss Detection • Monitored by (D937) See additional Shut Down Circuit Diagram for details From the Deflection Circuit PPD3 connector pin 6. When the power supply begins to operate by turning on and off the internal Switch MOS FET. The Source of the internal Switch MOS FET is routed out of pin (2) through three low ohm resistors to hot ground. The base of Q912 is also connected to the SW +6V line.. • Shorted SW+2. This Low pulls the cathode of D956 low. When the internal Switch MOS FET turns on. Q912s base is connected to the power on/off line. PAGE 01-12 . • Shorted SW+3. SOME SHUTDOWN CIRCUITS ARE DEFEATED IN STANDBY MODE. These voltage loss sensing circuits are defeated because the SW (Switched) power supplies are turned off in standby. Emitter voltage is supplied from the emitter of Q912. This removes the emitter voltage from Q911 and this circuit can not function. Labeled PROT-SW on the Schematic. This voltage must be active for this circuit to function. one leg of the AC is routed to a half wave rectifier D904 where it is rectified. filtered by C911. 3 of the shut down inputs are not active when the set is in standby. When this voltage reaches 6. So to prevent faults triggering of the shutdown circuit. Side Pincushion Failure Detection • Monitored by (D702. removing the base voltage of Q912 turning it OFF. When the set is not on or turned off. Labeled PROT-SW on the Schematic. After passing the filters it arrives at the main full wave bridge rectifier D901 where it is converted to Raw 150V DC voltage to be supplied to the power supply switching transformer T901 pin (2).8V DC on pin (3) of I901. clamped by a 30V Zener D907 and made available to pin (3) of I901 as start up voltage. in on pin 1 (Drain) and out on pin 2 which is the Source. When the internal Switch MOS FET turns off. However. (Set Off). However. As indicated in the Power Supply (Lo Voltage) Shutdown circuit diagram. Q911 supplies the high for shutdown if any of the voltage loss circuits become activated. • Shorted SW+5V (IP53 pin 2) on Signal PWB monitored by DP54. When AC is applied. I901 requires 16V DC to operate normal. the magnet field collapses and the EMF is coupled over to the secondary windings. it will begin operation at 6. Excessive High Voltage Detection • Monitored by (DH15) See Deflection Protect Power Supply Shutdown Diagram for details.8Vdc. as well as the drive windings. Vertical B+ 28V Voltage Excessive Current Detection • Monitored by (Q604) See Deflection Protect Power Supply Shutdown Diagram for details. Q911 requires emitter voltage to operated. the internal Regulator of I901 is turned On and begins the operation of I901. RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB. then through the Line filter L901 to prevent any internal high frequency radiation for radiating back into the AC power line. the Raw 150V DC routed through T901. the sensing circuits are turned off also. it causes the transformer to saturate building up the magnet field. B+ GENERATION FOR THE LOW VOLTAGE POWER SUPPLY DRIVER IC: Vcc for the Driver IC is first generated by the AC input. AC is routed through the main fuse F901 (a 6 Amp fuse). the power on/off line goes Low.2V (IP52 pin 5) on Signal PWB monitored by RP53 through PPS3 pin 11 to to (D961) on Low Voltage Power Supply PWB.

3V SW +2.97V D905 R913 D907 T901 8 10 D941 Control +6V C955 D952 16.3V Reg Protect _Sw +5V Reg SW +35V D946 R982 D961 D960 R980 D957 HZS4A1 R967 10 11 8 Q911 D955 R965 R966 C970 SW +35V R969 D956 C971 +6V SW +6V Sby +5V S901 Relay S-905 SW +35V Supply Relay Q912 R968 C956 AC To Hi Volt Power Supply D954 Q908 Q907 R960 R959 See Relay Control Diagram for all Relay Controls R962 1K R963 220 C957 R962 PPS3 4 Power _1 On Off S-903 SW +6V Supply Relay C987 HZS11B1 Q904 D933 R940 R939 10K Q903 R938 See additional Power Supply Shut Down Circuits 2 I909 Sby +5V Protect _Def 4 from Deflection See Deflection Shut Down Circuits 6 PPD3 C944 A PAGE 01-13 .3V for Short C919 R919 47 Ohm R920 I905 4 3 1 2 R956 Q902 R922 Q910 D962 HZS3C1 D963 C969 R964 C920 R921 PPS3 To R298 Monitors IP81 To RP53 Monitors IP52 and IP53 Protect _Sby 3.3V 3 Vin 9 11 I901 Power IC AC Q901 Monitors SW +5V SW +3.DP-2X SIGNAL POWER SUPPLY (Low Voltage) SHUT-DOWN CIRCUIT D904 C911 R906 R907 16.5V and Stby +3.

When the relay is energized. However. This pin will inhibit the drive signal to the gate of the SMOSFET. filtered by C923 then routed clamped by D912 and now becomes run voltage (16V) for I902 pin 4. However. the regulation route is through E906 to pin 1 of I907. Internally. This will supply a ground path for the power on Relay S901 turning it on. When the internal Switch MOS FET turns on. it’s emitter will go high and drive the base of Q907 high turning it on. However.8Vdc. PAGE 01-14 . clamped by a 36V Zener D912 and made available to pin 4 of I902 as start up voltage. filtered by C927 and then routed through the Excessive Current sensing circuit R941 and Q905. See Relay Controls on the Power Supply for details. the IC will recover and continue functioning. the regulator transistor works as a variable resistor whose resistance is dependant upon the SW +115V voltage fluctuations.DP-2X SW +115V POWER SUPPLY REGULATION EXPLANATION Hi-Voltage Power Supply Circuit Diagram explanation: (See DP-27 Chassis Power Supply SW+115V Regulation Circuit Diagram for details) THIS POWER SUPPLY RUNS ONLY WHEN THE SET IS TURNED ON: TURNING ON THE SW +115V POWER SUPPLY: When the Set is turned on. the magnet field collapses and the EMF is coupled over to the secondary windings. This rectifier develops raw 150V which is routed through F903 to Pins 1 and 2 of T902. When AC is applied to the main full wave bridge rectifier D902 where it is converted to Raw 150V DC voltage to be supplied to the power supply switching transformer T902 pin 1 and 2. L914 to pin 9 and 10 of PPD6 and output as SW +115V to the Deflection Circuit. The Ground return path for the primary voltage is out pin 2 of I902 which is the Source of the internal Switch MOS FET and then through three low ohm resistors R926. The primary route for the SW +115V is through E907. the voltage developed by these low ohm resistors is routed back into pin 1 which is the Over Current Protection circuit as well as the Regulation Control pin. This High will be passed to the base of Q908 provided the Short Detection Shut Down sensor Q903 isn’t activated. As soon as the excessive current situation is eliminated. This in turn causes the frequency of the drive pulse delivered to the Gate of the internal SMOSFET (Switch Metal Oxide Semiconductor Field Effect Transistor) to manipulate the frequency of the pulse generated on the primary of T902. This will cause the voltage at pin 2 of I906 to be manipulated. When the power supply begins to operate by turning on and off the internal Switch MOS FET. one leg of the AC is routed to a half wave rectifier consisting of R924 and R925 (both a 3. the LED is illuminated by degrees dependant upon the SW +115V voltage fluctuations. SW +115 REGULATION SW +115V pulse is generated from pin 11 of T902. The internal variable resistor manipulates the current flow from pin 2 to pin 3 ground. When the internal Switch MOS FET turns off.9K ohm resistor). R927 and R928. The current drain of the internal SMOSFET is monitored by the three low ohm resistors mentioned above. the internal Regulator of I902 is turned On and begins the operation of I902. This action causes pin 1 of I902 to manipulate the internal oscillator within I902. it will begin operation at 6. When this voltage reaches 6. filtered by C923. The Source of the internal Switch MOS FET is routed out of pin (2) through three low ohm resistors to hot ground. I902 requires 16V DC to operate normal. This pulse is rectified by D915. The RED LED D915 can be used to determine if the B+ to I902 is present or not. This voltage is routed through the primary coil inside T902 and out pins 5 and 6 to pin 3 of I902 which is the Drain of the internal Switch MOS FET. See SW+115V Regulation Circuit Diagram for details. This voltage is called Start Up Voltage. When the base of Q908 goes high. The internal receiver receives this light and acts as a variable resistor from pin 4 to pin 3 which is the regulation control signal. as well as the drive windings. This Power On command is routed through Q025 and Q026 to the PPS3 connector pin 4. it causes the transformer to saturate building up the magnet field. The drive windings at pin (8) produce a run voltage pulse which is rectified by D911. in on pin 1 (Drain) and out on pin 2 which is the Source. AC is supplied to the Bridge rectifier D902. the Raw 150V DC routed through T902. If this current exceeds a specific value. the Microprocessor I001 Outputs a Power On command via pin 59. B+ GENERATION FOR THE HIGH VOLTAGE POWER SUPPLY DRIVER IC: Vcc for the Driver IC is first generated by the AC input. Internally.8V DC on pin 4 of I902.

AC for D902 Supplied from Relay S901 From Bridge D902 150V T902 1 F903 2 R934 4 Osc B+ 1 C926 R929 D913 R931 R932 OCP D911 Run R930 D914 4 3 FB R937 1 R935 2 SW + 115V I906 Regulator Photocoupler Hot Ground from pin 9 of T902 I902 Driver/ Output IC 3 D 6 S 2 1 I907 R926 R927 R928 0.DP-2X CHASSIS POWER SUPPLY SW +115V REGULATION High Voltage Power Supply T902 8 7.47 Ohm R943 3K E907 L914 Deflection B+ 115V R945 0.5P/P 9 Start Up AC From Relay S901 R924 R925 16.5K 3 Q905 R941 0.22 Ohm 2 R936 D922 C942 C941 5 6 C933 T902 11 D915 E906 0.3V C923 D912 D915 RED L.69A PPD6 9 SW +115V SW +115V 12 C927 C945 D924 X-Ray Protect D925 D926 R942 10 D927 Cold Ground from pin 12 of T902 R946 D928 C905 PAGE 01-15 .E.D.

the transistor will conduct. If at any time. DP-2X Signal Power Supply (Low Voltage) Shut Down Circuit (Continuation A) The following circuits are routed to the Lo Voltage Shut Down Circuit through connection point (A) depicted on the Circuit drawing: SW +115V EXCESSIVE CURRENT DETECTION (See Figure 1) One very common circuit used in many Hitachi television products is the B+ Excessive Current Sensing circuit. the voltage is effectually zero (0) volts. If however. R941 0. the zener diode D927 is connected to a voltage divider. If the voltage drop is sufficient to reduce the voltage on the base of Q905. The value of this resistor 0. (15K). the negative voltage is lost. In this circuit is a low ohm resistor in series with the SW +115V. This in turn will cause the zener diode D937 to fire. creating a Shutdown Signal through D936 SW +28V SW -28V and on to the appropriate circuit indicated on the drawing as point (A). the D940 neutral point will go positive. VOLTAGE TOO HIGH DETECTION (See Figure 3) Another circuit used is the Voltage Too High Detection circuit. the voltage drop across the resistor increases. the Detector circuit will produce a Shutdown signal. producing a Shutdown signal that is directed to the appropriate circuit indicated on the drawing as point (A).47 ohm. When the current demand increases. SW +115V D927 Voltage Too High Detector Shut-Down Signal D926 Figure 3 PAGE 01-16 . One to the positive voltage SW +28V and one to the negative voltage SW –28V. the voltage at the divider center point will rise as well and trigger or fire the zener diode which produces a Shutdown signal through D926 and on to the appropriate circuit indicated on the drawing as point (A). the negative voltage drops or disappears. (neutral point).DP-2X ADDITIONAL SHUTDOWN CIRCUITS EXPLANATION Additional Power Supply Shut Down Circuit Diagram explanation: (See DP-27 Additional Power Supply Shut Down Diagram for details) Use this explanation and Diagram in conjunction with the following diagrams. If the voltage source rises too high. At their tie point. there are two resistors of equal value.47 SW +115V Current Sensor Base Bias Q905 Figure 1 Shut-Down Signal NEGATIVE VOLTAGE LOSS DETECTION (See Figure 2) Shut-Down Signal Figure 2 The purpose of the Negative Voltage Loss detection circuit is to Voltage compare the negative voltage with its’ counter part positive voltLoss D936 age. Note: The LED D940 used for visual trouble shooting is illuminated by the current draw from +28V to the –28V supply. D937 In Figure 2. In the example shown in Figure 3.

DP-2X ADDITIONAL POWER SUPPLY SHUT DOWN DIAGRAM
C933 T902 11 12 C927 C945 R946 Deflection B+ (115V) Excessive Current Det. R944 D924 D927 D928 C946 D925 Deflection B+ 115V D926 See Signal Power Supply (Lo Voltage) Shut Down Circuit Diagram for continuation. R943 R942 D915 R941 0.47 Ohm 3K E907 R945

Q905

Deflection B+ 115V Deflection B+ (115V) Excessive Voltage Det.

A
D936 L914 SW-28V Short or Loss Det. D937

PPD6
0.69A

9 10

SW +115V SW +115V

D940 C934 10K E901 T902 15 13 C928 D917 + D971 C935 10K E902 T902 14 C929 D918 + L913 + L916 1.09A R952 L912 + C949 R951 L915 0.575A

5

SW -28V

3 4 1 2

Gnd Gnd SW +28V SW +28V

C950

PAGE 01-17

DP-2X PROTECT SHUTDOWN CIRCUIT EXPLANATION
Protect Shut Down Circuit Diagram explanation: (See DP-27 Protect Shut Down Diagram for details) Use this explanation and Diagram in conjunction with the following diagram, DP-2X Signal Power Supply (Low Voltage) Shut Down Circuit (PROTECT _DEF) The following circuits are routed to the Lo Voltage Shut Down Circuit through connection point (PROTECT _DEF) depicted on the Circuit drawing: EXCESSIVE HIGH VOLTAGE DETECTION Whenever the High Voltage fluctuates, every other pin off the flyback will fluctuate as well. In this case, a lower voltage source can be used to determine the status of the High Voltage. Pin 5 (50P) is used to monitor for excessive High Voltage. The pulse off the flyback is rectified by DH13 and filtered by CH17. This voltage sets on the cathode of two zener diodes DH15 and DH14. DH15 is a HZ22V zener. If the voltage at the cathode rises too high, the zener will fire and send a Shut Down signal through PPD3 pin 6. This signal is routed to the appropriate circuit on the Lo Voltage Shut Down Circuit. The Shut Down signal is depicted as PROTECT _DEF. DH14 is a HZ36V zener. If the voltage at the cathode rises too high, the zener will fire and send a Shut Down signal through to pin 7 of IH01 which is the OVP input pin. This high will cause IH01 to stop producing the Hi Voltage Drive signal from pin 1. EXCESSIVE CURRENT TO THE VERTICAL OUTPUT IC DETECTION (See Figure 1) R629 0.68 This circuit uses a low ohm resistor R629 in series with the SW +28V. The value of this resistor 0.68 SW +28V ohm. When the current demand increases, the voltCurrent Sensor age drop across the resistor increases. If the voltage drop is sufficient to reduce the voltage on the base of Base Q604, the transistor will conduct, producing a ShutBias down signal through D608 through PPD3 pin 6. This Q604 signal is routed to the appropriate circuit on the Lo Voltage Shut Down Circuit. The Shut Down signal is depicted as PROTECT _DEF. Shut-Down Signal Figure 1 SIDE PINCUSHION FAILURE DETECTION If the side pincushion circuit fails in such a way as to produce an excessive high on the cathode of D702 (a HZS7C3) the zener will fire producing a Shutdown signal through D703 through PPD3 pin 6. This signal is routed to the appropriate circuit on the Lo Voltage Shut Down Circuit. The Shut Down signal is depicted as PROTECT _DEF. -5V LOSS DETECTION The purpose of the Negative Voltage Loss detection circuit is to compare the negative voltage with its’ counter part positive voltage. If at any time, the negative voltage drops or disappears, the circuit will produce a Shutdown signal. In Figure 2, there are two resistors of equal value. One to the positive voltage +5V and one to the negative voltage -5V). At their tie point, (neutral point), the voltage is effectually zero (0) volts. If the negative voltage is lost, the neutral point will go positive. This high is routed through DK90 through PPD3 pin 6. This signal is routed to the appropriate circuit on the Lo Voltage Shut Down Circuit. The Shut Down signal is depicted as PROTECT _DEF. Shut-Down Signal

DK90

Voltage Loss Detector

+5V

-5V Figure 2

PAGE 01-18

DP-2X DEFLECTION PROTECT POWER SUPPLY SHUTDOWN DIAGRAM
RH32 allows ABL fluctuations to manipulate the Trigger Point of Shut Down as screen brightness varies. ABL is inverse proportionate to brightness. This prevents false triggering. ABL Active Normal Flyback TH01 High Voltage Sensing Circuit RH23 DH13 RH26 Hi Volt H. Drive

ABL Voltage Too High Det.

3
RH32

5
5OP LH06

7 OVP
DH14

IH01

4

Stops H. Drive 29.01V

PPD3 6
DH15 RH24 CH17

PROTECT _DEF
See Power Supply Shut Down Circuit Diagram for continuation. Vertical Output Circuit

Excessive Hi Voltage Det. 28V

I601
10

Any fluctuations in High Voltage will also be reflected by the 50P output P/P. By monitoring the 50P (50 Pulse) rises in High Voltage will be sensed. If High Voltage climbs too high, DH15 will fire and trigger a shut down event.

R629 0.68 Ohm

Q604
R630 C610 R631

Side Pincushion Circuit D702 monitors the Side Pin Drive IC. If the voltage at pin 7 rises too high, D702 will fire generating a Shut Down high.

I701
7
R717

D608 R632 Excessive Vertical Current Det. If the Vertical Output IC has a problem, R629 will sense the current rise. The voltage drop will be reflected at the base of Q604 turning it on and producing a Shut Down high.

D703

D702 HZS7C3

Side Pin Failure High Det.

Convergence Out Circuit RK97 -5V RK98 DK90 +5V -5V Loss Detection

A loss of the Negative 5V will cause the positive 5V to be felt on the anode of DK90 which forward biases the diode and delivers a Shut Down high.

PAGE 01-19

then the power supply that is being monitored can be suspected.DP-2X LED (Visual Trouble Detection) CIRCUIT EXPLANATION LED Used for Visual Trouble Shooting Circuit Diagram explanation: (See DP-2X LED (Visual Trouble Detection) Diodes Signal Power Supply Diagram for details) 5 LEDS. 4 GREEN AND 1 RED In the DP-2X chassis. Use these LEDs to determine if the set is experiencing a problem. D940 and D928. there are 5 total LEDs that can be used for Visual Trouble shooting. this LED will not illuminate and the set will shut down. or the negative SW –28V is shorted. If the LED opens. This IC is used to generate the following voltages. D965 (Audio +38V) • Monitors the Audio +38V output from the PPS5 connector pin 1. NOTE: If D940 LED opens. The LEDs can be used in the following ways. If the voltage is missing. D940 (SW +28V) • Monitors the SW +28V output from the PPD6 connector pin 1 and 2. the LED will not light. D954 (SW +9V) • Monitors the SW +9V generated by the SW +9V regulator I911 pin 3 output from the PPS4 connector pin 1 and 2. then the set will be in shut down condition because of it’s current flow explained below. D954. OFF: • If the LED is off. (Excluding the possibility that the LED itself is malfunctioning). RED LED D915 D915 is used to monitor the Start Up and Run voltage for the Driver IC I902. D928 (SW +115V) • Monitors the SW +115V output from the PPD6 connector pin 9 and 10. • If the LED turns on but then quickly goes off before the others. • Note: This LED requires the SW –28V power supply to be functioning to operated. PAGE 01-20 . GREEN LEDs D965. 4 Green and 1 Red. then the power supply that is being monitored is unavailable. 2 and 3. SW +115V 220V HEATER SW+7V SW-7V SW +28V SW -28V This LED is attached to pin 4 of I902.

DP-23.5P/P D914 I906 4 3 1 R935 2 D912 C923 RED L.D.30A PPS5 1 2 3 4 5 6 7 Audio + 29V Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sty +5V C962 C957 R992 L921 C978 R985 D965 On Off Power _1 T901 E909 PPS3 4 D942 R990 2 1.E. 1.13A L913 R952 L916 See Shut Down Circuit GREEN L.57A PPS4 1 2 3 Gnd 4 Gnd 5 Gnd PPD6 1 2 + 28V + 28V SW + 9V C960 T902 14 +28V E902 13 D918 1.E.E.D. D937 D936 E907 +115V Over Current L914 R945 R946 D928 1. 4 Green and 1 Red) T901 11 12 S-902 Audio Power Supply Relay D944 E911 1.28V T902 +115V 11 12 D915 R941 0.3V 4 R931 From Pin 8 T902 7.E.D.47 Ohm 0. R930 SW + 115V AC From Relay S901 Osc B+ R924 R925 Start Up Run D911 16. 3 R977 R976 R979 C977 D954 L924 9 8 5 C955 0. D915 R934 I902 Driver/Output IC 6 R932 1 D913 Regulator Photocoupler From I907 pin 2 of Regulator IC Hot Ground from pin 9 of T902 R922 PAGE 01-21 .E.E. for visual trouble sensing .D.D.09A C935 C929 C950 D940 R951 .92A I911 SW+9V Reg 1 4 GREEN L. DP-23G and DP-24 CHASSIS L. (Visual Troubleshooting) Low Voltage Power Supply (5 Total L.E.D.D.69A 9 10 6 Gnd 7 Gnd SW + 115V SW + 115V C933 C927 Q905 C945 GREEN L.55A L922 GREEN L.

13A L913 R952 GREEN L.E.D.D.92A I911 SW+9V Reg 1 4 GREEN L.47 Ohm L914 R945 R946 0.D. for visual trouble sensing observation.E.5P/P D914 4 3 I906 1 R935 2 D912 C923 RED L.D.E.D.55A L922 GREEN L. D915 R934 I902 Driver/Output IC 5 R932 1 D913 Regulator Photocoupler From I907 pin 2 of Regulator IC Hot Ground from pin 9 of T902 D922 PAGE 01-22 . L916 1.E.55A PPS5 1 2 3 4 5 6 7 Audio + 38V Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sby+5V On C962 C957 R992 L921 C978 R985 D965 Off Power _1 T901 E909 PPS3 4 D942 R990 2 1.E.D.D.67A PPS4 1 2 3 Gnd 4 Gnd 5 Gnd PPD6 1 2 + 28V + 28V SW + 9V C960 T902 14 +28V E902 13 D918 1.3V 4 R931 7. (Visual Trouble Detection) Diodes Signal Power Supply (5 Total L.69A 9 10 6 Gnd 7 Gnd SW + 115V SW + 115V C933 C927 Q905 C945 D928 GREEN L.09A C935 C929 C950 D940 R951 . 4 Green and 1 Red) T901 14 15 S-902 Audio Power Supply Relay D944 E911 1. 3 R977 R978 R979 C977 D954 L924 12 11 5 C976 0.28V D937 D936 E907 +115V Over Current See Shut Down Circuit T902 +115V 11 12 D916 R941 0.E.DP-26 CHASSIS L.E. 1. R930 SW + 115V AC From Relay S901 Osc B+ R924 R925 Start Up Run From Pin 8 T902 R937 D911 16.

92A I911 SW+9V Reg 1 4 GREEN L.55A L922 GREEN L.E. R930 SW + 115V AC From Relay S901 Osc B+ R924 R925 Start Up Run From Pin 8 T902 R937 D911 16.D.D.E.67A PPS4 1 2 3 Gnd 4 Gnd 5 Gnd PPD6 1 2 + 28V + 28V SW + 9V C960 T902 14 +28V E902 13 D918 1.28V D937 D936 E907 +115V Over Current See Shut Down Circuit T902 +115V 11 12 D916 R941 0. 3 R977 R978 R979 C977 D954 L924 9 8 5 C976 0.E.5P/P D914 4 3 I906 1 R935 2 D912 C923 RED L.E. for visual trouble sensing observation.D.E. 4 Green and 1 Red) T901 14 15 S-902 Audio Power Supply Relay D944 E911 1. D915 R934 I902 Driver/Output IC 5 R932 1 D913 Regulator Photocoupler From I907 pin 2 of Regulator IC Hot Ground from pin 9 of T902 D922 PAGE 01-23 . 1.D. L916 1.69A 9 10 6 Gnd 7 Gnd SW + 115V SW + 115V C933 C927 Q905 C945 D928 GREEN L.E.09A C935 C929 C950 D940 R951 .55A PPS5 1 2 3 4 5 6 7 Audio + 38V Audio Gnd Audio Gnd Audio Gnd Audio Gnd Sby+5V On C962 C957 R992 L921 C978 R985 D965 Off Power _1 T901 E909 PPS3 4 D942 R990 2 1. (VISUAL TROUBLE DETECTION) DIODES SIGNAL POWER SUPPLY (5 Total L.47 Ohm L914 R945 R946 0.D.DP-27/D CHASSIS L.13A L913 R952 GREEN L.E.3V 4 R931 7.D.D.

NOTES .

MICROPROCESSOR INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 2 .

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This bypasses the Flex Converter completely and inputs the 1080i signal directly to the Rainforest IC I401. The Microprocessor controls the Main Tuner by SDA2 (Data) and SCL2 (Clock) I2C communication lines. This output is controlled by sync and by the customer’s menu and how it is set up. BBE Control IA01 (Surround) The DP-2X chassis utilizes BBE Surround. 480I. Interlaced. Data is input to I007 at pins (4 Clock) and is output at pins (16). pulse swallow tuning selection.. Clock is input to I007 at pins (2 Clock) and is output at pins (18). Customer set ups for Video. used by the Flex Converter. 1080i signal. such as the window for Closed Caption detection. Data and Enable lines for the Flex Converter are output from the Microprocessor at pins (52 Data.3V and output at pin 15 into pin 51 of the Microprocessor I001. Data from the Flex is sent out of the PFC1 connector pin 11 to pin 5 of I007. The FCENABLE line is routed through the PFC1 connector pin 12 and the FCDATA line is routed through the PFC1 connector pin 11. Audio. 53 Clock and 55 FCENABLE). Clock. This set also has something called “16X9 Normal Mode”. Flex Converter FC04 The projection television is capable of displaying NTSC as well as ATSC (SDTV) including HD (High Definition). used by the Flex Converter • Pin 14 outputs an Enable signal. SCL2 and SDA2 lines for the Main Tuner are output from the Microprocessor at pins (31 SDA2 and 28 SCL2) respectively. NTSC or Progressive.. (Continued on page 3) PAGE 02-02 . Level Shift I007 The Microprocessor operates at 3. Control for the Flex Converter is Clock. Data travels in both directions on the Data line. Component. Data and Clock lines are SDA1 from pin (30) of the Microprocessor to pin (5) of the EEPROM and SCL1 from pin (29) of the Microprocessor to pin (6) of the EEPROM. Some of the emphasis circuits are controlled by the customer’s menu. or letterbox. S-In. Most of the Circuits controlled by the Microprocessor operate at 5Vdc. As well as some of them being controlled by AI. The Clock.75 Khz output. Communication from the Microprocessor via pins (31 SDA2 and 28 SCL2) to the BBE IC pins (13 and 14) respectively. sent from the Flex Converter Rainforest I401 (Video/Chroma Processor) The Video Processing IC (Rainforest) is responsible for controlling video/chroma processing before the signal is made available to the CRTs. The Level Shift IC steps up the DC voltage to accommodate. Enable is input to I007 at pins (6 Clock) and is output at pins (14). level shifted down to 3. Data from the Flex Converter is also sent back to the Microprocessor. Data and Enable lines. EEPROM I003 The EEPROM is ROM for many different functions of the Microprocessor. Communication from the Microprocessor via pins (31 SDA2 and 28 SCL2) to the Rainforest IC pins (31 and 30) respectively. etc. These lines control band switching. the FC Clock is routed through the PFC1 connector pin 10. • Pin 15 outputs Data. Also. programmable divider set-up information. used by the Flex Converter • Pin 16 outputs a Data signal. some of the Microprocessors internal sub routines have variables that are stored in the EEPROM. 720P. Surround etc… are memorized as well. SDA2 at pin (5) and SCL2 at pin (4).DP-2X MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT EXPLANATION PinP Tuner U302 (monaural only.3Vdc. The Flex Converter can take any NTSC. • Pin 18 outputs a Clock signal. (Artificial Intelligence). The set up can be 4X3 or 16X9 for DTV. Channel Scan or Memory List. These lines go directly to the Main Tuner. Data and Enable lines must be routed through the Level Shift IC I007 to be brought up to 5V. The Flex Converter is responsible for receiving any video input and converting it to 33. but audio not used).

DP-2X MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT EXPLANATION ON THE TERMINAL PWB: (Through the connector PST2) A/V Selector IX01 The A/V Selector IC is responsible for selecting the input source for the Main Picture as well as the source for the PinP or Sub picture. S-Inputs or Components. Communication from the Microprocessor via pins (30 SDA1 and 29 SCL1) to the PST2 connector pins (5 and 4) respectively then to IX01 pins (34 and 33) respectively. Separation takes place digitally. Y Pr/Pb Selector IX02 Any input that is not already in the Y Pr/Pb or Y Cr/Cb state. Main Video Chroma IZ02 The Main Video Chroma IC processes the video and chroma from the 3D Y/C circuit for the main picture. AV Inputs. The Main Y Pr/Pb Selector IC selects the appropriate input between the Tuner. The Microprocessor also is able to turn on and off circuits within the 3D Y/C circuit determined by customer menu set-up. This gives the impression that the signal pops out of the screen or a 3D effect. These signals relate specifically to transitions. It receives the Y and chroma and prepares it for the Flex Converter by outputting Y Cr/Cb (NTSC Only). 3D Y/C IW01 (IC mounted directly on the Terminal PWB). DP-26 MICROPROCESSOR DATA COMMUNICATIONS DIAGRAM The DP-26 has the addition of the Digital Module (ATSC Tuner). PAGE 02-03 . The 3D adds a little more black before the transition goes to white and a little more white just before it gets to white. Using advanced separation technology. The Microprocessor communicates with the 3D Y/C IC via I2C bus data and clock. Communication from the Microprocessor via pins (31 SDA2 and 28 SCL2) to connector PST2 pins (2 and 1) then to IZ02 pins (13 and 14) respectively. this circuit separates using multiple lines and doesn’t produce dot pattern interference or dot crawl. The 3D effect is a process of adding additional emphasis signals to the Luminance and Chrominance. will have be converted to this state by I501. as well as a 3D adder. Communication from the Microprocessor via pins (31 SDA2 and 28 SCL2) to connector PST2 pins (2 and 1) to IX04 pins (31 and 30) respectively. Sub Video Chroma IZ01 (PinP) The PinP Video Chroma IC processes the video and chroma from the 2 Line Comb filter circuit for the Sub picture. The 3D Y/C IC is a Luminance/Chrominance separator. Communication from the Microprocessor via pins (31 SDA2 and 28 SCL2) to connector PST2 pins (2 and 1) then to IZ02 pins (13 and 14) respectively. The communications ports from the Microprocessor are pins (31 SDA2 and 28 SCL2) to connector PST2 pins (2 and 1) to the 3D Y/C IW01 pins (60 and 59) respectively. It also adds a little more white just before it goes dark and a little more dark just before it arrives. It receives the Y and chroma and prepares it for the Flex Converter by outputting Y Cr/Cb (NTSC Only). Transitions are the point where the signal goes from dark to light or vice versa.

24.3V -> 5V Level Shift 52 14 18 4 I007 16 11 FCData 12 FC Enable 10 FC Clock FCEnable 55 6 Clock / Key Out 1 53 2 PAGE 02-04 SIGNAL PWB . 27 and 27D CHASSIS MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT DIAGRAM PST2 SDA1 Terminal PWB PiP Main IZ02 Main Video/Chroma Y Pr/Pb SW IOO1 14 13 60 SDA2 Video/Chroma Y Pr/Pb SW SCL1 5 4 IZ01 Sub 34 SDA1 IX01 33 SCL1 A/V Select IX02 Y Pr/Pb SELECTOR IA01 59 13 14 13 BBE Control SDA2 SCL2 IW01 3D-Y/C 14 26 27 I401 31 30 SCL2 Rainforest Sweep Cont. 23G.DP-23. 2 1 SDA1 30 SCL1 SDA1 SCL1 29 5 SDA1 IOO3 6 SCL1 EEPROM SDA2 31 SDA2 SCL2 SDA2 5 4 4 5 SCL2 U301 SCL2 28 Tuner 1 Main SCL2 U302 Tuner PinP SDA2 PFC1 5 U303 FC04 FLEX & PinP FCData 51 15 Data / Key Out 2 3.

2 1 SDA1 30 SCL1 SDA1 SCL1 29 5 SDA1 IOO3 6 SCL1 EEPROM SDA2 31 SDA2 SCL2 SDA2 5 4 4 5 SCL2 U301 SCL2 28 Tuner 1 Main SCL2 DM ENABLE IN 20 DM TXD 66 PMS1 5 DM ENIN 8 DM TXD UD2002 Digital Module ATSC Tuner U302 Tuner PinP SDA2 DM RXD 67 6 DM RXD DM SCK 68 4 DM SCK DM Enable Out 69 9 DM. ENOUT PFC1 5 16 14 18 11 FCData 12 FC Enable 10 FC Clock U303 FC04 FLEX & PinP DM RESET 70 2 DM RESET FCData 51 15 Data / Key Out 2 52 4 FCEnable 3.DP-26 Chassis Microprocessor Data Communications PST2 SDA1 Terminal PWB PiP Main IZ02 Main Video/Chroma Y Pr/Pb SW IOO1 SCL1 5 4 IZ01 Sub Video/Chroma Y Pr/Pb SW 34 SDA1 IX01 33 SCL1 A/V Select IA01 13 60 SDA2 14 59 13 14 13 BBE Control SDA2 SCL2 IW01 3D-Y/C IX02 Y Pr/Pb SELECTOR 14 26 27 I401 31 30 SCL2 Rainforest Sweep Cont.3V -> 5V Level Shift 55 6 I007 SIGNAL PWB PAGE 02-05 Clock / Key Out 1 53 2 .

• The Microprocessor uses this input signal to align or adjust the precise Oscillator and Programmable divider settings within the PinP Tuner for proper Reception. and for Auto Programming. It uses this same input for stripping V Chip Data. Sub AFC is generated from the Sub Tuner U302 pin 16. Then into pin 93 of the Microprocessor. PAGE 02-06 . Chip Data. • When an NTSC component input is supplied to Input 2. I005 then outputs the Sub composite sync signal input on pin 5. (93) MAIN AFC (Automatic Frequency Control): • Main AFC is input to the Microprocessor at Pin 93. The Microprocessor uses the Sync signal to activate the AFC loop. Main AFC is generated from the Main Tuner U301 pin 16. This composite sync signal is supplied to the Microprocessor from I005 pin 15. Closed Caption. Customer’s Menu. Then routed out the PPD2 connector pin 8 to the Power Supply. this is called 480i. (See DP-2X Chassis NTSC Sync to Microprocessor Signal Path Diagram for Details) The Microprocessor I001 must have Sync inputs from the Chassis to Lock it’s generation of OSD. When the channels are changed for the PinP Tuner. • The Microprocessor uses this input signal to align or adjust the precise Oscillator and Programmable divider settings within the Main Tuner for proper Reception. Then out the PPS2 connector pin 8 to the Signal PWB. (62) H BLK (Horizontal Blanking): • H Blk is input to the Microprocessor at Pin 62. If Input 2 is selected and it is 480i (NTSC). then the Microprocessor outputs a Main CCD Select signal from pin 73 to I005 pin 11 to select 480i input at pin 13. Then routed to Q016 and Q017. then the Microprocessor outputs a Sub CCD Select signal from pin 74 to I005 pin 10 to select 480i input at pin 1. • NOTE: Component inputs other than 480i (NTSC) are not able to display Closed Caption Data. Then routed to Q020 and Q015. (92) SUB AFC (Automatic Frequency Control for PinP Tuner): • Sub AFC is input to the Microprocessor at Pin 92. This must also be monitored for Closed Caption data and for V.DP-2X MICROPROCESSOR NTSC SYNC INPUT CIRCUIT EXPLANATION Microprocessor NTSC Sync circuit diagram. The Chassis feeds back this information in the form of Blanking pulses and Sync from the Video. Then into pin 92 of the Microprocessor. If Input 2 is selected as PinP source and it is 480i (NTSC). • When an NTSC component input is supplied to Input 2. Then out the PPS2 connector pin 12 to the Signal PWB. The following describes the types of feedback sync signals. (64) V BLK (Vertical Blanking): • V Blk is input to the Microprocessor at Pin 64. This composite sync signal is supplied to the Microprocessor from I005 pin 14. H Blk is generated from the Deflection Transformer pulse off pin 7 of T701. this is called 480i. Then routed out the PPD2 connector pin 12 to the Power Supply. Service Menu.. wave shaped by Q706. Chip Data. From here it is sent to the base of Q023 where it gets level shifted and inverted and into pin 64 of the Microprocessor. etc…. (97) Sub CCD IN: • The Microprocessor receives Sub Sync information and strips the V Chip Data. Normally this IC outputs the Main composite sync signal input on pin 3. the Microprocessor outputs a short control signal from pin 24 (SD Sel) to I005 pin 9. (23) M/S Sync Det (Main / Sub Sync Detection): • The composite sync signal from either Main or PinP (Sub) is supplied to the Microprocessor from I005 pin 4. V Blk is generated from the Vertical Output IC I601 pin 11. From here it is sent to the base of Q024 where it gets level shifted and inverted and into pin 62 of the Microprocessor. This must also be monitored for V. (100) MAIN CCD IN: • The Microprocessor receives Main Sync information and strips the Closed Caption Data from line 21.

8 14 10 S-C1 12 Input 2 30 Composite 2 In Composite 2 QX33 QX34 V4 Aux Input 4 Composite 4 Part of Jack S-4 In 64 VBlk 5 Q020 Q015 Sub CCD In for V. Chip Data 93 Main AFC Q016 Q017 Input 2 Component 2 Y 92 Sub AFC Micro Processor Main CCD Infor CCD & V Chip Input 1 Component 1 Y PAGE 02-07 480i Only Terminal PWB SIGNAL PWB 1 of 2 . Composite 3 For 480i Y Component Only for CCD & V Chip NTSC Only Part of Jack S-3 In 15 21 S-Y1 17 S-C1 19 S-Y1 59 IX02 97 Q024 Q023 M/S Sync 23 Det 62 HBlk See Component Sync Separation Circuit Diagram Aux Inputs S4 Det. 27 and DP-27D SERIES CHASSIS NTSC SYNC to MICROPROCESSOR SIGNAL PATH PFT QX12 12 Sub Z Aux Input 5 Q008 Main Q010 Q005 Q006 Q018 Q012 Q019 Q004 Composite 5 V3V 2 22 V4 Main Y /Video QX17 Q014 480i Sub Lum/Audio Selector IC PST2 I005 3 5 1 Y Lo Hi Hi 5V Avx 5 In IX01 44 4 10 15 11 14 9 S-5 In V3Y V3C S5 Det.DP-23. VOut1 7 9 11 53 15 Y In (480i) Main 480i 24 Y4 26 C4 28 S4 10 13 12 Lo Lo Hi X1 2 Front Control PWB Sub Y /Video Signal PWB 2 of 2 PST1 23 TV1V TV2V 480i NTSC U301 Main Tuner 18 63 Video Main PiP Video and Sub Video are the same. 16 SW +9V U302 19 Video I001 Main CCD Sel Sub CCD Sel SD Sel PinP TUNER (Mono) 18 Always PinP 60 PinP 73 74 24 100 Main CCD In Sub CCD In V3 Aux Input 3 S3 Det. 23G.

VOut1 5 3 1 53 15 Y In (480i) Main 480i 24 Y4 26 C4 28 S4 10 13 12 Lo Lo Hi X1 2 Front Control PWB Sub Y /Video Signal PWB 2 of 2 PST1 23 TV1V TV2V 480i NTSC U301 Main Tuner 18 63 Video Main PiP Video and Sub Video are the same. Chip Data 93 Main AFC Q016 Q017 Input 2 Component 2 Y 92 Sub AFC Micro Processor Main CCD Infor CCD & V Chip Input 1 Component 1 Y PAGE 02-08 480i Only Terminal PWB SIGNAL PWB 1 of 2 . 8 14 10 S-C1 12 Input 2 30 Composite 2 In Composite 2 Composite 2 QX33 QX34 V4 Aux Input 4 Composite 4 Part of Jack S-4 In 64 VBlk 5 Q020 Q015 Sub CCD In for V.DP-24 Chassis Microprocessor Sync Input PFT QX12 12 Sub Z Aux Input 5 Q008 Main Q010 Q005 Q006 Q018 Q012 Q019 Q004 Composite 5 V3V 10 22 V4 Main Y /Video QX17 Q014 480i Sub Lum/Audio Selector IC PST2 I005 3 5 1 Y Lo Hi Hi 5V Avx 5 In IX01 44 4 10 15 11 14 9 S-5 In V3Y V3C S5 Det. 16 SW +9V U302 19 Video I001 60 PinP Main CCD Sel Sub CCD Sel SD Sel PinP TUNER (Mono) 18 Always PinP 73 74 24 100 Main CCD In Sub CCD In V3 Aux Input 3 S3 Det. For 480i Composite Only for CCD & V Chip Composite 3 Part of Jack S-3 In 15 21 S-Y1 17 S-C1 19 S-Y1 59 IX02 97 Q024 Q023 M/S Sync 23 Det 62 HBlk See Component Sync Separation Circuit Diagram Aux Inputs S4 Det.

DP-26 SERIES CHASSIS NTSC SYNC to MICROPROCESSOR SIGNAL PATH PFT QX12 12 Sub Z Aux Input 5 Q008 Main Q010 Q005 Q006 Q018 Q012 Q019 Q004 Composite 5 V3V 2 22 V4 Main Y /Video QX17 Q014 480i Sub Lum/Audio Selector IC PST2 I005 3 5 1 Y Lo Hi Hi 5V Avx 5 In IX01 44 4 10 15 11 14 9 S-5 In V3Y V3C S5 Det. 8 14 10 S-C1 12 Input 2 30 Composite 2 In Composite 2 QX33 QX34 V4 Aux Input 4 Composite 4 Part of Jack S-4 In 64 VBlk 5 Q020 Q015 Sub CCD In for V. 16 SW +9V U301 Main Tuner 18 TV2V I001 Main CCD Sel Sub CCD Sel SD Sel 73 74 24 100 Main CCD In Sub CCD In U302 PinP TUNER Always PinP 19 V3 Aux Input 3 S3 Det. Chip Data 93 Main AFC Q016 Q017 Input 2 Component 2 Y 92 Sub AFC Micro Processor Main CCD Infor CCD & V Chip Input 1 Component 1 Y PAGE 02-09 480i Only Terminal PWB SIGNAL PWB 1 of 2 . Composite 3 For 480i Y Component Only for CCD & V Chip NTSC Only Part of Jack S-3 In 15 21 S-Y1 17 S-C1 19 S-Y1 59 IX02 97 Q024 Q023 M/S Sync 23 Det 62 HBlk See Component Sync Separation Circuit Diagram Aux Inputs S4 Det. VOut1 Front Control PWB 53 15 Y In (480i) Main 480i 7 9 11 10 13 12 Lo Lo Hi X1 24 Y4 26 C4 28 S4 2 Sub Y /Video Signal PWB 2 of 2 PST1 28 DM Y DM C Main UD2002 Digital Module 5 18 TV1V NTSC 7 30 23 480i 3 5 63 Video 60 PinP Video PiP Video and Sub Video are the same.

VIDEO INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 3 .

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to the Selector IC IX01 pin 63. an internal mechanical switch is activated which produces a low to the Selector IC IX01 pin 14 and the Selector IC notifies the Microprocessor that and S-Jack is installed. The PinP tuner U302 is also an intergraded tuner. the ATSC tuner is involved because of the Video Output on the (Monitor Out) jack. These inputs are used while viewing an SDTV or HDTV source. to the Selector IC IX01 pin 60. Component 480i. 480P.75Khz ATSC) or Y Cr/Cb (15. into the Selector IC IX01 pin 24 for Y (Luminance) and pin 26 for C (Chroma). (5) INPUT 5: On the Front Control Panel. The S-Input inputs are pin 10 for Y (Luminance) and pin 17 for C (Chroma). It also has an accompanying S-Input. IF decoding. 720P.75Khz ATSC) and will not accept Composite on the Y input. an internal mechanical switch is activated which produces a low to the Selector IC IX01 pin 21 and the Selector IC notifies the Microprocessor that and S-Jack is installed. Remember that the S-Input takes priority over composite input. (3) INPUT 3: This is NTSC composite input only. into the Selector IC IX01 pin 28 and the Selector IC notifies the Microprocessor that and S-Jack is installed. (See the ATSC Block Diagram which is coming up after the Component. (DP-26 also has an ATSC Digital Tuner UD2002) one for the Main picture U301 and one for the PinP (Sub) picture U302. This tuner is UD2002 which also is the input/output access for IEEE1394. (Continued on page 03-02) PAGE 03-01 . U301 is an intergraded tuner with RF front end. • U301 Main Tuner Output pin 18 to PST1 connector pin 23. The Flex Converter will manipulate any input. When an S-Jack is inserted into the plug. The S-Input inputs are pin 8 for Y (Luminance) and pin 12 for C (Chroma). Remember that the S-Input takes priority over composite input. TUNER INPUTS: These sets utilizes two tuners. The tuner communicates with the Microprocessor via I2C bus. be it NTSC. (2) INPUT 2: This input will accept Component Inputs Y Pr/ Pv (31. The S-Input inputs are routed through the PFT connector pin 7 (pin 5 for DP24 only) for Y and pin 9 (pin 3 for DP24 only) for C. Remember that the S-Input takes priority over composite input. the monitor out just have video output. OSD and NTSC Diagram).5Khz to 33. when S-Input is active. The following will discuss the signal flow as show in the above listed Circuit Diagram. Even though this explanation is related to NTSC. the set will still display NTSC video with no problem.75Khz at all times. to the Selector IC IX01 pin 5. It also has an accompanying S-Input. Input 3 is routed into the Selector IC IX01 pin 15. Video Input 5 is routed through the PFT connector pin 2 (pin 10 for DP24 only). AUXILIARY INPUT: This chassis utilizes 5 separate inputs plus a newly added input called DVI. This is NTSC composite input only. when S-Input is active. (4) INPUT 4: This is NTSC composite input only. This makes this chassis very versatile in it’s application. This is accomplished by the ATSC (Digital Tuner) having a Y/C output sent to the NTSC circuit for this purpose. When an S-Jack is inserted into the plug. NOTE: The DP-26 has a Digital Tuner (ATSC-8VSB and Cable QAM Tuner). NTSC). It will also accept Composite Video input as long as there is no Pr plug inserted. Input 2 is routed into the Selector IC IX01 pin 30. The following will break down those input routes to the Selector IC IX01.5Khz to 33. to the Selector IC IX01 pin 3. (DP-26 ONLY): • UD2002 ◊ LUMINANCE: The ATSC (QAM) Tuner (Digital Tuner) Outputs DM Y from pin 7 to the PST1 connector pin 28. It also has an accompanying S-Input. when S-Input is active.DP-2X NTSC VIDEO SIGNAL PATH CIRCUIT EXPLANATION (See DP-2X Chassis Video Signal Path-NTSC Circuit Diagram for details) It’s important to note that this Chassis horizontal deflection operates at 33. Input 4 is routed into the Selector IC IX01 pin 8. into the Selector IC IX01 pin 22. ◊ CHROMINANCE: The ATSC (QAM) Tuner (Digital Tuner) Outputs DM C from pin 5 to the PST1 connector pin 30. an internal mechanical switch is activated which produces a low through the PFT connector pin 11 (pin 1 for DP24 only). so that there will be an output from the Monitor Video Jack. however the Audio output is not used. Both tuners output their respected composite video via pin 18. Input one’s Y line is input directly into IX02 pin 59 (Y Pr/Pb Selector).75Khz. Audio Decoding to Lt/Rt. When ATSC or QAM is viewed. • U302 PinP (Sub) Tuner Output pin 18 to PST1 connector pin 19. 1080i to the appropriate Horizontal Frequency rate of 33. Even though this is twice as fast as NTSC. When an S-Jack is inserted into the plug. (1) INPUT 1: This input is only for Component Inputs Y Pr/Pb (31. (See Microprocessor Data Communications Circuit Diagram for details). This is accomplished by the Flex Converter.735Hz.

Y from pin 24. and Cb from pin 23. and output on the following pins. through QV05. Y from pin 84 and C from pin 83. IZ01: The responsibility of IZ01 is to now convert the separated Y/C components of the PinP (Sub) picture into a usable format for the Flex Converter. Y COMPONENT (For Composite In). IZ02 outputs only NTSC. Cr from pin 22. through QX14. The responsibility of IZ02 is to now convert the separated Y/C components of the Main picture into a usable format for the Flex Converter. Cr from pin 22. OSD for continuation). Component. QV04 and back into the Selector IC IX01 pin 49. Note too that the Chroma component is also routed into the PinP (Sub) Video/Chroma Processor IC IZ01 pin 16. The output control is from the selector IC IX01 pin 59 to Q207. low pass filter XV01. through QX13. and into the 2-Line Comb Filter IV01 pin 4. This is for when the customer presses the Swap button when the PinP Sub window is on. Y is then routed through QZ01 to the connector PST2 pin 23. 4 and/or 5: When the S-Input is selected. It is separated into it’s individual Y/C components. NOTE: The DP-23. The Y (Luminance) component of the PinP (Sub) picture is then output pin 15. through QV01. Shown in the Component input path. QX27 into the PinP (Sub) Video/Chroma Processor IZ01 pin 4. IZ01 outputs only NTSC. so it’s output are Y Cr/Cb.DP-2X NTSC VIDEO SIGNAL PATH CIRCUIT EXPLANATION (Continued from page 03-01) COMPOSITE VIDEO PATH: When a composite input is selected. and QW15. Y from pin 24. From QZ05 the Chroma component is routed into pin 16 of the Main Video/Chroma Processor IC IZ02. S-INPUT 3. It is output from the Selector IC IX01 pin 44. Note too that the Y component is also routed into the PinP (Sub) Video/Chroma Processor IC IZ01 pin 2. QV08 and back into the Selector IC IX01 pin 51. PinP (Sub) Video Path: The PinP (Sub) composite video is output from the Selector IC IX01 pin 53. Then the chroma must be routed through the TILT circuit. through QV09. Not shown is the switch that enables this phase rotation circuit. In this case. Component. 23G. Then through the video low pass filter comprised of QW01. Cr is then routed through QZ08 to the connector PST1 pin 4. it is routed directly into the Main Video Chroma Processor IZ02. Cr is then routed through QZ03 to the connector PST2 pin 26. and into the Main Video Chroma Processor IZ02 pin 19. it must be broken down into it respective parts. The Chroma component is output from the Selector IC IX01 pin 47. The Flex Converter FC4 utilizes component inputs Y Pr/Pb or Y Cr/Cb. and QW12 into the Main Video/Chroma Processor IC IZ02. The Flex Converter FC4 utilizes component inputs Y Pr/Pb or Y Cr/Cb. This circuit is comprised of QZ04 and QZ05. QV10. 26. QW02. 27 and 27D all have a DVI input. and QW04. through QV06. QX26. QW10. Cb is then routed through QZ09 to the connector PST1 pin 5. (See the DP-2X Chassis Video Signal Path-NTSC. QX28 into the PinP (Sub) Video/Chroma Processor IZ01 pin 19. From here. The C component is then routed through a low pas filter comprised of QW13. PAGE 03-02 . Y is then routed through QZ10 to the connector PST1 pin 7. The DP-24 Does NOT have a DVI input. C COMPONENT: (For Composite In). This circuit compensates for the phase relationship of flesh tones between composite and component. Here the composite video is separated into Y/C 3D enhanced. and into the Main Video Chroma Processor IZ02 pin 4. The C component from pin 58 through QX16. LPF XW01. The Y component is then routed through a low pas filter comprised of QW09. MAIN: The Main composite output is routed out of the Selector IC IX01 pin 44 to QX13. QW14. Y and C. Cb is then routed through QZ02 to the connector PST2 pin 24. low pass filter XV02. It arrives at the 3D Y/C chip IW01 pin 88. QX25. and Cb from pin 23. it already is separated into it’s Y and C components. OSD for continuation). through QV02. This is for when the customer presses the Swap button when the PinP Sub window is on. LPF XW02. the Selector IC IX01 output the Y from pin 56 through QX15. (See the DP-2X Chassis Video Signal Path-NTSC. This is accomplished for the Main video by the 3D Y/C and for the PinP (Sub) picture by the 2-Line Comb filter. The C (Chroma) component of the PinP (Sub) picture is then output pin 13. so it’s output are Y Cr/Cb.

Y Out 1 56 SUB OUT 22 V4 C Out 1 58 24 Y4 26 C4 See the DP-2X Chassis Video Signal PathNTSC. Component. Monitor Out Video MON OUT Monitor Out S-Y Monitor Out S-C 41 V Out 3 MON 39 Y Out 3 OUT 37 C Out 3 PAGE 03-03 TERMINAL PWB . OSD for continuation Video/Chroma PST2 Processor QZ03 Sub Cr Out 22 26 QZ02 2 Y1 In Sub Cb Out 23 24 QZ01 16 C1 In Sub Y Out 24 23 See Component Signal Path for Component 1 Video 480i Y Cr/Cb IX01 A/V Select QX12 30 V5 7 S-1 QX13 QX14 QX26 V3 C 47 Out 2 V/Y 44 Out 2 15 V1 59 QZ10 QZ09 QZ08 -6db Component 1 Video MAIN OUT IX02 Y Pr/Pb Select V2 Aux 2 Video (Component Y) Pr 17 Y3 19 C3 21 S-3 8 V2 Y2 S-2 Chroma Tilt Correction QZ04 10 12 C2 14 Pr No Input for Composite V3 Aux 3 Video S3 Aux 1 S-Y Aux 1 S-C IZ02 MAIN Video/Chroma 4 Y2 Processor 2 Y1 Main Cr Out 22 19 C2 16 C1 QZ05 VIDEO LPF QW01 QW02 QW04 88 V In Y AMP Y LPF QW12 QW10 XW01 QW09 Main Cb Out 23 Main Y Out 24 S-3 Det. DP-27 and DP-27D CHASSIS VIDEO SIGNAL PATH .DP-23.NTSC PST1 23 63 TV Y In 1 49 9 3 13 C Out QV05 QX28 19 C2 In QX27 4 Y2 In QV08 PFT 2 7 9 11 SEE DVI SIGNAL PATH DIAGRAM for DVI PATH 7 5 4 QX25 PST1 See Micro. Sync Path 28 S-4 QX16 QX15 QV06 XV02 1 XV01 18 19 60 V6 C In 1 51 15 Y Out 2Line Y/C Separator QV04 QV02 QV01 V Out 1 53 4 V In QV09 QV10 U301 IV01 For PinP Only Main Tuner SIGNAL 18 PWB TERMINAL PWB U302 IZ01 Sub Sub Tuner 18 Front Control PWB V5 Aux 5 Video V3V Aux 5 S-Y V3Y S5 Aux 5 S-C V3C S-5 Det. DP-23G. V4 Aux 4 Video Aux 2 S-Y S4 Aux 2 S-C IW01 3D Y/C Separator 84 Y Out AYO QW15 C AMP QW14 C LPF XW02 QW13 83 C Out ACO S-4 Det.

Y Out 1 56 SUB OUT 22 V4 C Out 1 58 24 Y4 26 C4 See Component Signal Path See Component Signal Path for Component 1 Video 480i Y Cr/Cb IX01 A/V Select QX12 30 V5 7 S-1 QX13 QX14 QX26 V3 C 47 Out 2 V/Y 44 Out 2 15 PiP Video= Sub Video 7 5 4 QX95 PST1 See NTSC Sync Path QZ09 QZ08 V1 59 Component 1 Video MAIN OUT IX02 Y Pr/Pb Select QZ10 V2 Aux 2 Video (Component Y) -6db Pr 17 Y3 19 C3 21 S-3 8 V2 Y2 S-2 Chroma Tilt Correction QZ04 10 12 C2 14 Pr No Input for Composite V3 Aux 3 Video S3 Aux 1 S-Y Aux 1 S-C IZ02 MAIN Video/Chroma 4 Y2 Processor 2 Y1 Main Cr Out 22 19 C2 16 C1 QZ05 VIDEO LPF QW01 QW02 QW04 88 V In QW12 Y AMP Y LPF QW10 XW01 QW09 Main Cb Out 23 Main Y Out 24 S-3 Det. IW01 3D Y/C Separator 84 Y Out AYO QW15 C AMP QW14 C LPF XW02 QW13 83 C Out ACO Monitor Out Video MON OUT Monitor Out S-Y Monitor Out S-C 41 V Out 3 MON 39 Y Out 3 OUT 37 C Out 3 PAGE 03-04 TERMINAL PWB . V4 Aux 4 Video Aux 2 S-Y S4 Aux 2 S-C S-4 Det.DP-24 Chassis Video NTSC PST1 23 63 TV Y In 1 49 9 3 13 C Out QV05 QX28 QX27 4 Y2 In QV08 PFT 10 5 3 1 28 S-4 2 Y1 In 16 C1 In QX16 QX15 QV06 XV02 1 XV01 18 19 60 V6 C In 1 51 15 Y Out 2Line Y/C Separator QV04 QV02 QV01 V Out 1 53 4 V In QV09 QV10 U301 IV01 Main Tuner SIGNAL 18 PWB TERMINAL PWB For PinP Only U302 Sub Tuner 18 Front Control PWB V5 Aux 5 Video V3V Aux 5 S-Y V3Y SUB Video/Chroma IZ01 Processor Sub Video 19 C2 In Chroma PST2 QZ03 Sub Cr Out 22 Sub Cb Out 23 Sub Y Out 24 QZ02 QZ01 26 24 23 S5 Aux 5 S-C V3C S-5 Det.

DP-26 CHASSIS VIDEO SIGNAL PATH . OSD for continuation Video/Chroma PST2 Processor QZ03 Sub Cr Out 22 26 QZ02 2 Y1 In Sub Cb Out 23 24 QZ01 16 C1 In Sub Y Out 24 23 See Component Signal Path for Component 1 Video 480i Y Cr/Cb IX01 A/V Select QX12 30 V5 7 S-1 QX13 QX14 QX26 V3 C 47 Out 2 V/Y 44 Out 2 15 V1 See Micro. Sync Path QX25 59 Component 1 Video MAIN OUT IX02 Y Pr/Pb Select 7 5 4 PST1 QZ10 QZ09 QZ08 -6db V2 Aux 2 Video (Component Y) Pr 17 Y3 19 C3 21 S-3 8 V2 Y2 S-2 Chroma Tilt Correction QZ04 10 12 C2 14 Pr No Input for Composite V3 Aux 3 Video S3 Aux 1 S-Y Aux 1 S-C IZ02 MAIN Video/Chroma 4 Y2 Processor 2 Y1 Main Cr Out 22 19 C2 16 C1 QZ05 VIDEO LPF QW01 QW02 QW04 88 V In Y AMP Y LPF QW12 QW10 XW01 QW09 Main Cb Out 23 Main Y Out 24 S-3 Det.NTSC PST1 18 V Out 1 53 QV04 9 3 13 C Out QV05 QX28 19 C2 In QX27 4 Y2 In QV08 QX16 QX15 QV06 XV02 1 XV01 18 15 Y Out 2Line Y/C Separator QV02 QV01 V In 4 18 Y In 1 49 C In 1 51 7 5 PFT 2 7 9 11 28 S-4 24 Y4 26 C4 30 5 DM C 28 3 DM Y 19 60 V6 23 63 TV QV09 QV10 SEE DVI SIGNAL PATH DIAGRAM for DVI PATH SIGNAL PWB U301 Main Tuner TERMINAL PWB U302 Sub Tuner IV01 For PinP Only UD2002 Digital Module Front Control PWB IZ01 Sub V5 Aux 5 Video V3V Aux 5 S-Y V3Y Y Out 1 56 SUB OUT 22 V4 C Out 1 58 S5 Aux 5 S-C V3C S-5 Det. See the DP-2X Chassis Video Signal PathNTSC. Component. V4 Aux 4 Video Aux 2 S-Y S4 Aux 2 S-C IW01 3D Y/C Separator 84 Y Out AYO QW15 C AMP QW14 C LPF XW02 QW13 83 C Out ACO S-4 Det. Monitor Out Video MON OUT Monitor Out S-Y Monitor Out S-C 41 V Out 3 MON 39 Y Out 3 OUT 37 C Out 3 PAGE 03-05 TERMINAL PWB .

• The Y line is input directly into the Y Pr/Pb Selector IX02 pin 59. through PST1 pin 15 to Y Pr/Pb Selector IX02 pin 17.5Khz to 33. • The Cr/Pr line is input directly into the Y Pr/Pb Selector IX02 pin 9.75Khz ATSC) only. the Digital Module also outputs Composite Video/ Chroma for the Monitor Output. • The Y line is input from the PET connector pin 5 into the Y Pr/Pb Selector IX02 pin 53. This is accomplished by the Flex Converter. • The Main Y component is output from the pin 44 through QX24 into the Main Video/Chroma Y Pr/Pb (Continued on page 7) PAGE 03-06 . IZ01 is used to select the PinP (Sub) picture source. DM-Pb and DM-Pr. • DM-HY (Luminance) from PMS2 pin 16. (See DP-26 NTSC Signal Path for specifics). The following will discuss the Component signal path and the continuation of the NTSC signal path. Component 480i. IZ02 is used to select the Main picture source.735Hz. • The Cv/Pb line is input directly into the Y Pr/Pb Selector IX02 pin 7. The ATSC Tuner output DM-Y. • The Sub Cb/Pb component is output from the pin 48 through QX20 into the PinP (Sub) Video/Chroma Y Pr/Pb Switch IZ01 pin 29. NTSC Signal Path for specifics). (Only in the DP26 Chassis). • The Sub Y component is output from the pin 50 through QX19 into the PinP (Sub) Video/Chroma Y Pr/ Pb Switch IZ01 pin 30. 480P. NTSC).75Khz ATSC) or Y Cr/Cb (15. • The Pb line is input from the PET connector pin 7 into the Y Pr/Pb Selector IX02 pin 55. • The Sub Cr/Pr component is output from the pin 46 through QX21 into the PinP (Sub) Video/Chroma Y Pr/Pb Switch IZ01 pin 28. through PST1 pin 17 to Y Pr/Pb Selector IX02 pin 19. OSD for details) (See Video Signal Path-NTSC Circuit Diagram for details about NTSC) It’s important to note that this Chassis horizontal deflection operates at 33. • DM-Pr (Red Chroma) from PMS2 pin 12. It will also accept Composite Video input as long as there is no Pr plug inserted. COMPONENT VIDEO PATH: The output from the Y Pr/Pb Selector IX02 is then routed to the Video/Chroma Y Pr/Pb Switch. (See DVI Signal Path for further details). Either from component inputs or from the separated NTSC inputs as described in the DP-2X Chassis Video Signal Path-NTSC Circuit Diagram. This makes this chassis very versatile in it’s application. • The Cr/Pr line is input directly into the Y Pr/Pb Selector IX02 pin 63. (4) DIGITAL TUNER (ATSC) UD2002 INPUT: These inputs are provided from the Digital Tuner (ATSC). the set will still display NTSC video with no problem. (3) DVI INPUT (Digital Video Interface): This input will accept Component Inputs Y Pr/ Pv (31. OSD. • The Pr line is input from the PET connector pin 3 into the Y Pr/Pb Selector IX02 pin 57. • DM-Pb (Blue Chroma) from PMS2 pin 14. (1) INPUT 1: This input is only for Component Inputs Y Pr/Pb (31. • The Cv/Pb line is input directly into the Y Pr/Pb Selector IX02 pin 62. through PST1 pin 13 to Y Pr/Pb Selector IX02 pin 15. • The Y line is input directly into the Y Pr/Pb Selector IX02 pin 5. The Flex Converter will manipulate any input. COMPONENT.75Khz at all times.5Khz to 33. Even though this is twice as fast as NTSC. Either from component inputs or from the separated NTSC inputs as described in the DP-2X Chassis Video Signal Path-NTSC Circuit Diagram. • PinP (Sub) NTSC Y component is input into the PinP (Sub) Video/Chroma Y Pr/Pb Switch IZ01 pin 4. COMPONENT INPUTS 1 and/or 2: This chassis utilizes 5 separate inputs plus a newly added input called DVI.DP-2X CHASSIS VIDEO SIGNAL PATH-NTSC. 720P. (2) INPUT 2: This input will accept Component Inputs Y Pr/ Pv (31.75Khz.5Khz to 33. be it NTSC. (See DP-26 Component. The following will break down those input routes to the Y Pr/Pb Selector IC IX02. OSD CIRCUIT EXPLANATION (See the Chassis Video Signal Path-NTSC.75Khz ATSC) and will not accept Composite on the Y input. Component. • Input 2 Composite Video is routed into the Selector IC IX01 pin 30. 1080i to the appropriate Horizontal Frequency rate of 33. ◊ NOTE: When receiving a SDTV or HDTV signal. • Main NTSC Y component is input into the PinP (Sub) Video/Chroma Y Pr/Pb Switch IZ01 pin 2. (NOT in the DP24 Chassis).

In this case. COMPONENT. G and B. through Q401 and into the Rainforest IC pin 5. PinP (Sub) NTSC Y component is input into the Main Video/Chroma Y Pr/Pb Switch IZ02 pin 4. The path is through Q405 and into the Rainforest IC I401 pin 9. • PinP (Sub) Y component Pin 24 through QZ01 to the connector PST2 pin 23. • Main Cb/Pb component Pin 23 through QZ09 to the connector PST1 pin 5. OSD: OSD can be introduced via the Microprocessor and/or in the same fashion the Digital Convergence Module can introduce it’s information. Blue pin 37 and Green pin 38. OSD CIRCUIT EXPLANATION Switch IZ02 pin 30.75Khz (540P) which relates specifically to 1080i deflection rate. all inputs are upconverted to the higher deflection rate. ◊ The primary path is through Q308 to the Flex Converter U303 connector PFC1 pin 5. The path is through Q405 and into the Rainforest IC I401 pin 9. In this case. Then to the Flex Converter U303 connector PFC1 pin 17. the signal is input directly into the Rainforest IC. Here the signal is split.DP-2X CHASSIS VIDEO SIGNAL PATH-NTSC. • Pb is output from pin 18 of the PFC2 connector. Main NTSC Y component is input into the Main Video/Chroma Y Pr/Pb Switch IZ02 pin 2. Red is output pin 43. Simply input a true 1080i signal and bypass the Flex Converter. Blue is output pin 41 and Green is output pin 42. Then to the Flex Converter U303 connector PFC1 pin 19. Here the signal is split. The output from the Flex Converter is as follows. • • • • To the Flex Converter U303: After the selection has been made as to the source for the Main and PinP (Sub) picture. ◊ The primary path is through Q306 to the Flex Converter U303 connector PFC1 pin 3. color. ◊ The secondary path is for 1080i input signals ONLY. etc… and add (if necessary) PinP (Sub) picture information and/or OSD information and output the Main Picture as R. OSD from Microprocessor is Red pin 39. The Main Cr/Pr component is output from the pin 40 through QX22 into the Main Video/Chroma Y Pr/ Pb Switch IZ02 pin 28. • Pr is output from pin 20 of the PFC2 connector. This can be a trouble shooting tool if the Flex Converter is suspected as having problems. RAINFOREST IC I401: This IC processes the input signal source. contrast. IZ01 and IZ02 output the appropriate signal. Then to the Flex Converter U303 connector PFC1 pin 18. ◊ The primary path is through Q307 to the Flex Converter U303 connector PFC1 pin 4. (1) OUTPUT from IZ02 Main Picture: This output is routed from. The path is through Q406 and into the Rainforest IC I401 pin 8. IZ01 outputs the PinP (Sub) picture and IZ02 outputs the Main picture. through Q403 and into the Rainforest IC pin 3. PAGE 03-07 . adjust brightness. • PinP (Sub) Cb/Pb component Pin 23 through QZ02 to the connector PST2 pin 24. ◊ The secondary path is for 1080i input signals ONLY. (See Digital Convergence Interface Circuit Diagram Explanation for details). Blue pin 33 and Green pin 34. 1080i is routed directly to the Rainforest IC I401 and has no need for Flex Converter manipulation. (2) OUTPUT from IZ01 PinP (Sub) Picture: This output is routed from. Digital Convergence Information is input Red pin 35. The Main Cb/Pb component is output from the pin 42 through QX23 into the Main Video/Chroma Y Pr/ Pb Switch IZ02 pin 29. through Q402 and into the Rainforest IC pin 4. • PinP (Sub) Cr/Pr component Pin 22 through QZ03 to the connector PST2 pin 26. In this case. tint. the signal is input directly into the Rainforest IC. • Main Y component Pin 24 through QZ10 to the connector PST1 pin 7. ◊ The secondary path is for 1080i input signals ONLY. • Main Cr/Pr component Pin 22 through QZ08 to the connector PST1 pin 4. the signal is input directly into the Rainforest IC. Here the signal is split. FLEX CONVERTER OUTPUT: The Flex Converter outputs only one horizontal frequency and that is 33. So in other words. • Y is output from pin 16 of the PFC2 connector.

NTSC. DP-27 and DP-27D Chassis Video Signal Path . DP-23G. Unit R Out 43 G Out 42 To CPT PWBs Pr 2 In Pb 2 In Y 2 In Pr 1 In Pb 1 In Y 1 In DEFLECTION PWB B Out 41 See DVI Input Signal Diagram NTSC MAIN Y In S-In MAIN Y In PET 4 Video/Chroma Y Pr/Pb Switch IX02 Y/Pb/Pr Selector 2 IZ02 MAIN 5 PFC1 PST1 QZ08 4 5 7 MAIN Q307 Q306 QZ09 QZ10 Q308 5 4 3 4 3 57 DVI PR MAIN Pb-Out 2 DVI 3 INPUT 7 From 42 55 DVI PB MAIN Pr-Out 2 40 DVI INPUT PWB 5 53 DVI Y (G) 12 64 DVI Det MAIN Y-Out 2 44 V1 NTSC MAIN Y In Sub MAIN Y In 63 COMP 1 (Cr/Pr) U303 FC4 UNIT PFC2 20 18 PST2 Pr Out Pb Out 61 COMP 1 (Cb/Pb) 2 4 SUB Video/Chroma Y Pr/Pb Switch QX22 28 Cr/Pr R In QX23 29 Cb/Pb B In Main Cr/Pr Out 22 QX24 30 D-Sync 1/Y3/ G In Main Cb/Pb Out 23 6 D-Sync 2 In Main Y Out 24 IZ01 59 COMP 1 (Y) Q401 Q402 QZ03 SUB Q403 V2 QX21 46 48 50 QX19 QX20 28 Cr/Pr R In 9 COMP 2 (Cr/Pr) 7 COMP 2 (Cb/Pb) 5 SUB Pb-Out 1 SUB Y-Out 1 COMP 2 (Y) SUB Pr-Out 1 29 Cb/Pb B In Sub CrPr Out 22 Sub Cb/Pb Out 23 QZ02 30 D-Sync 1/Y3/ G In QZ01 6 D-Sync 2 In Sub Y Out 24 26 24 23 19 18 17 16 Y Out PAGE 03-08 TERMINAL PWB SIGNAL PWB .Component.DP-23. OSD SIGNAL PWB Q422 Q421 34 Analog G In Analog B In OSD R In OSD G In OSD B In POWER PWB RAINFOREST IC 35 Analog R In SIGNAL PWB PPS1 2 4 5 Q419 Q418 38 Q404 Q405 Q406 37 10 9 8 Q417 39 33 Q420 I401 RGB Processor UKDG QK06 QK07 QK08 5 OSD R 32 I001 Microprocessor OSD G 33 OSD B 34 4 2 PDG PPD1 Dig R Out 20 Dig G Out 21 Dig B Out 22 Digital Conv.

DP-24 Chassis Video Component OSD & NTSC POWER PWB Q422 Q421 34 Analog G In Analog B In OSD R In OSD G In OSD B In SIGNAL PWB RAINFOREST IC 35 Analog R In UKDG QK06 QK07 QK08 5 Q419 Q418 38 Q404 Q405 Q406 37 10 9 8 Q417 39 OSD R 32 I001 Microprocessor OSD G 33 OSD B 34 5 33 4 4 Q420 2 2 PDG PPS1 I401 RGB Processor PPD1 Dig R Out 20 Dig G Out 21 Dig B Out 22 Digital Conv. Unit R Out 43 G Out 42 To CPT PWBs Pr 2 In Pb 2 In Y 2 In Pr 1 In Pb 1 In Y 1 In DEFLECTION PWB B Out 41 NTSC MAIN Y In S-In MAIN Y In IX02 Y/Pb/Pr Selector 2 4 Video/Chroma Y Pr/Pb Switch IZ02 MAIN PFC1 PST1 QZ08 4 5 7 MAIN Q307 Q306 QZ09 QZ10 Q308 5 4 3 5 4 3 MAIN Pr-Out 2 MAIN Pb-Out 2 40 42 44 MAIN Y-Out 2 V1 NTSC MAIN Y In Sub MAIN Y In 63 COMP 1 (Cr/Pr) U303 FC4 UNIT PFC2 20 18 PST2 Pr Out Pb Out 61 COMP 1 (Cb/Pb) 2 4 SUB Video/Chroma Y Pr/Pb Switch QX22 28 Cr/Pr R In QX23 29 Cb/Pb B In Main Cr/Pr Out 22 QX24 30 D-Sync 1/Y3/ G In Main Cb/Pb Out 23 6 D-Sync 2 In Main Y Out 24 IZ01 59 COMP 1 (Y) Q401 Q402 QZ03 SUB Q403 V2 QX21 46 48 50 QX19 QX20 28 Cr/Pr R In 9 COMP 2 (Cr/Pr) 7 COMP 2 (Cb/Pb) 5 SUB Pb-Out 1 SUB Y-Out 1 COMP 2 (Y) SUB Pr-Out 1 29 Cb/Pb B In Sub CrPr Out 22 Sub Cb/Pb Out 23 QZ02 30 D-Sync 1/Y3/ G In QZ01 6 D-Sync 2 In Sub Y Out 24 26 24 23 19 18 17 16 Y Out PAGE 03-09 TERMINAL PWB SIGNAL PWB .

DP-26 Chassis Video Signal Path . OSD POWER PWB Q422 PPS1 2 34 Analog G In Analog B In OSD R In OSD G In OSD B In RAINFOREST IC 35 Analog R In UKDG QK06 QK07 QK08 5 Q419 Q418 38 Q404 Q405 Q406 37 10 9 8 Q417 39 OSD R 32 I001 Microprocessor OSD G 33 OSD B 34 5 33 4 4 Q420 2 Q421 PDG I401 RGB Processor PPD1 Dig R Out 20 Dig G Out 21 Dig B Out 22 Digital Conv. Unit R Out 43 G Out 42 To CPT PWBs Pr 2 In Pb 2 In Y 2 In Pr 1 In Pb 1 In Y 1 In DEFLECTION PWB B Out 41 See DVI Input Signal Diagram NTSC MAIN Y In S-In MAIN Y In PET 4 Video/Chroma Y Pr/Pb Switch IX02 Y/Pb/Pr Selector 2 IZ02 MAIN 5 PFC1 PST1 QZ08 4 5 7 MAIN Q307 Q306 QZ09 QZ10 Q308 5 4 3 U303 FC4 UNIT PFC2 20 18 PST2 QZ03 SUB 26 19 16 4 3 57 DVI PR MAIN Pb-Out 2 DVI 3 INPUT 7 From 42 55 DVI PB MAIN Pr-Out 2 40 DVI INPUT PWB 5 53 DVI Y (G) 12 64 DVI Det MAIN Y-Out 2 44 V1 NTSC MAIN Y In 63 COMP 1 (Cr/Pr) 61 COMP 1 (Cb/Pb) 2 Sub MAIN Y In QX22 28 Cr/Pr R In QX23 29 Cb/Pb B In Main Cr/Pr Out 22 QX24 30 D-Sync 1/Y3/ G In Main Cb/Pb Out 23 6 D-Sync 2 In Main Y Out 24 IZ01 SUB Video/Chroma Y Pr/Pb Switch 59 COMP 1 (Y) 4 QX21 46 48 50 QX19 QX20 28 Cr/Pr R In Q401 Pr Out Pb Out Y Out V2 9 COMP 2 (Cr/Pr) 7 COMP 2 (Cb/Pb) Q402 Q403 5 SUB Pb-Out 1 SUB Y-Out 1 COMP 2 (Y) SUB Pr-Out 1 FLEX CONVERTER PST1 13 15 DM Y 29 Cb/Pb B In Sub CrPr Out 22 Sub Cb/Pb Out 23 QZ02 30 D-Sync 1/Y3/ G In QZ01 6 D-Sync 2 In Sub Y Out 24 24 23 18 17 15 17 DM PB From ATSC Digital Tuner UD2002 17 19 DM PR PAGE 03-10 Signal PWB TERMINAL PWB SIGNAL PWB .NTSC. Component.

3V Black Peak H-AFC 3.8V P Mute 0. Combination of the following.DP-2X RAINFOREST IC INFORMATION (I401) SCP IN FBP IN Max 9V 3. Pin 52 = YM/P-MUTE/BLK. Pedestal level detection and Clamping signals. pin 8.2 ~ 9V Blanking 2.5V Used internal within the Rainforest IC.8V: Not Used.0V Max: This input is received from the Flex Converter and is a combination of Horizontal and Vertical blanking signals.1V: This input is received from the Microprocessor and is used to establish the Transparency effect of OSD. HALFTONE: 0. Blk) signal generated in the Deflection circuit by Q706. This also mutes the video in exact timing with On Screen Display pulses (OSD).0V ~ 9. which synchronizes the Horizontal Drive signal with the incoming Video sync signal input at pin 16.9 ~ 2.0V BLK 1. P MUTE: 2.9V ~ 2. Pin 24 = FBP.7 ~ 9V CLAMP 1.4 ~ 5. Here the Black Peak is expanded towards Black to increase the contrast ratio. such as Burst Gate Pulse. Fly back pulse: 3.4V ~ 5. Half Tone from the Microprocessor Pin 22 through Q415. CLAMP: The clamp pulse is utilized for DC restoration and blanking timing.5V ~ 3. In Through Mode. Black Peak: This input is utilized for establishing the Black Peak level used in Black Peak expansion circuit.1V Half Tone 0 ~ 0.5V YM/P-MUTE/ BLK 6.0V ~ 0. PAGE 03-12 .5V Internal Pin 17 Pin 24 Pin 52 Pin 17 = SCP. INTERNAL: 0.7 ~ 3.0V H-AFC: This input is received from the Horizontal Blanking (H. This signal is used as a sample pulse in the Horizontal AFC circuit. Fly back pulse: 1. Combination of the following. H Blk from the Flex Converter Pin 12 through Q412 V Blk from the Flex Converter Pin 11 through Q411 Used within the Rainforest is for DC restoration.

R IEEE1394 Physical IEEE1394 Link Modem Board Y/C Y/Pb/Pr Y Pr/Pb HD Video CPU SCI bus 16MB FLASH SCI IEEE1394 Board RAM Modem I/F Analog NTSC Audio Video Analog Power Supply PTV Signal Board Digital Power Supply PAGE 03-11 .R YSD-038 Graphics Graphics DAC SPD I/F 64MB SDRAM Demux MPG Decoder DAC NTSC Encoder AC-3 Decoder Down Mix Sub CPU SH4 Main CPU TS in TS out Glue Logic 2/2 CPU bus NTSC Encoder DAC DAC Peripherals 64MB SDRAM I2C TS IEEE 1394 I/F SCI L.Block Diagram of UD2002 ATSC / QAM / IEEE1394 Interface Module Front-End Board IF circuit IF AGC BCM3510 VSB/QAM Demodulator RAM for 256QAM Memory Card Board Memory Card I/F Memory Card I/F Main Board Digital Tuner IF I2C AGC TC90A55TB HL Decoder TS 64MB SDRAM Memory Card I/F ATSC CATV RF IN Optical Y/C. V Glue Logic 1/2 L.

With QH03 turned on. ACCL TRANSISTOR OPERATION The ABL voltage is routed through the PPD2 connector pin 3 to the Power Supply PWB. They receive their pull up voltage from the SW +115V B+ line for Deflection generated from the Power Supply. When the customer selects Black Side panels. ABL SWITCH QH03 New for this chassis is the ability to change the brightness level of the Side Panels when watching a NTSC 4X3 image. The ABL voltage is inversely proportionate to screen brightness. this reduces the contrast and brightness voltage which is being controlled by the I2C bus data communication from the Microprocessor arriving at pins 30 and 31 of the Rainforest IC and reduces the overall brightness. the Flyback will work harder and the current through the Flyback increases. Under normal conditions. the demand for replacement of the High Voltage being consumed is greater. Also connected to the ABL voltage line is DH16. this transistor is nearly saturated. To avoid excessive ageing at the 4X3 display area. This in turn will pull voltage away from pin 53 of the Rainforest IC. the sides do not reach the edges. the side panels IRE levels are raised. However. the overall average ABL level for the image is reduced. In this case. the Resistor RH29 connected to the collector is added to the ABL pull up circuit and the ABL level drops slightly to compensate for the side panel loss of brightness. When the Side panels are turned off. As the picture brightness becomes brighter or increases. Gray Side Bars Black Side Bars PAGE 03-13 . ABL VOLTAGE OPERATION The ABL voltage is determined by the current draw through the Flyback transformer. Through the Video Advanced features Menu the customer can now do this. Then the ABL voltage is routed through the acceleration circuit RA54 and D404 to the base of Q413. This high is routed through the PPS2 connector pin 2 on the Signal PWB to the Power Supply PWB. the Microprocessor I001 tells the Rainforest IC I401 via I2C communication to output a high from the DAC2 line pin 36. the base of Q413 will go down. the ABL voltage will rise to the point that DH16 dumps the excess voltage into the 9V line. I401. RH25 and RH32. When a 4X3 images is displayed on a 16X9 set. This zener diode acts as a clamp for the ABL voltage. If the ABL voltage tries to increase above 9V due to a dark scene which decreases the current demand on the flyback. The Difference between chassis for the ABL circuit relate to the values of Resistors RH24. which is connected to pin 53 of the Rainforest IC. preventing blooming as well as reducing the Color saturation level to prevent color smear.DP-2X ABL CIRCUIT EXPLANATION (See ABL Circuit Diagram for details) The ABL voltage is generated from the ABL pin (3) of the Flyback transformer TH01. sometimes the customer may want to turn the side gray panels off. This in turn will decrease the ABL voltage. To compensate. The ABL pull-up resistors are RH27 and RH28. then to PPS2 connector pin 3 to the Signal PWB. QH03 ABL Switch is added. I401. Then from the PPD2 connector pin 2 on the Power Supply PWB to the PPD2 connector on the Deflection PWB and finally to the base of QH03 turning it On. Internally. this will drop the emitter voltage which in turn drops the cathode voltage of D403. See diagram for details. During an ABL voltage decrease due to an excessive bright circumstance. Q413 determines the voltage being supplied to the cathode of D403.

ABL Voltage goes Down.L.B. DP27/D RH09 CH10 33K DP23 XRay Protect DH15 HZ22-2L PAGE 03-14 . Circuit Diagram R453 R452 R450 D403 R449 ABL RA54 Q413 HVcc +9V 19 ABL 53 R483 C423 R484 1080i Y In LH06 DH13 5 9 I401 Rainforest IC Micro I001 31 SDA2 28 SCL2 SDA2 31 D404 R451 C424 ABL Switch R462 R461 HVcc +9V C426 C425 Signal PWB PPD6 Deflection PWB 9 10 PPD2 QH03 47K RH30 ABL Switch RH29 RH27 27K To QH01 Collector of High Voltage Output Transistor TH01 FBT SCL2 30 36 DAC2 ABL Sw 55 8 40 Signal PWB SW +115V 10 RH23 1 Gnd To Anodes To Focus CH17 Stops H.8K RH31 RH24 As Brightness goes Up.DP-2X Chassis A. DP27/D 33K DP23 3 3 12K DP24 18K DP26. Drive PPS2 2 IH01 3 CH14 ABL OVP 2 ABL Switch ABL Pull-Up Resistors RH28 56K [ Current Path ] 7 DH14 RH26 150K DP24 180K All Others RH32 RH25 Power Supply PWB Sw +9V ABL SWITCH Active When Side Bars are Black Only DH16 RD30EB4 Clamp 6. (Inverse Proportional) CH18 30K DP24 43K DP26.

sometimes the customer may want to turn the side gray panels off. With QH03 turned on. When a 4X3 images is displayed on a 16X9 set.DP-2X ABL SWITCH FOR 4X3 DISPLAY WITH BLACK SIDE BARS MODE ONLY SW+9V PPS2 ABL Switch 2 Gray Side Bars PPD2 ABL Switch QH03 Off I401 RG58 DAC 2 36 ABL Switch 2 RC84 Black Side Bars QH03 On RAINFOREST IC SIGNAL PWB Power Supply PWB ABL SWITCH Active When Side Bars are Black Only RH29 47K R745 RH30 115V RH27 27K QH03 RH28 56K PAGE 03-15 ABL SWITCH QH03 New for this chassis is the ability to change the brightness level of the Side Panels when watching a NTSC 4X3 image. To compensate. This high is routed through the PPS2 connector pin 2 on the Signal PWB to the Power Supply PWB. To avoid excessive ageing at the 4X3 display area. ABL To PPD2 pin 3 ABL 3 From Flyback Pin 3 . the overall average ABL level for the image is reduced. When the Side panels are turned off. Then from the PPD2 connector pin 2 on the Power Supply PWB to the PPD2 connector on the Deflection PWB and finally to the base of QH03 turning it On. the Microprocessor I001 tells the Rainforest IC I401 via I2C communication to output a high from the DAC2 line pin 36. the side panels IRE levels are raised. However. the sides do not reach the edges. QH03 ABL Switch is added. the Resistor RH29 connected to the collector is added to the ABL pull up circuit and the ABL level drops slightly to compensate for the side panel loss of brightness. Through the Video Advanced features Menu the customer can now do this. When the customer selects Black Side panels.

This transistor turns On and outputs the high from it’s collector out it’s emitter to mute the Audio described later. Through R441. through PPS2 pin (4). However. See the Mute Activation circuit explained previously. See the Mute Activation circuit explained previously. PAGE 03-16 . If H. This is routed to two places. AC LOSS DETECTION: AC is monitored by the AC Loss detection circuit. MUTE ACTIVATION: When Q442 turn on. By the activity of the pulse charging C466. Auto Programming. and R439 and into the Rainforest IC pin 24 of I401. C465 is blocked by D414 and it holds the emitter of Q443 high. it’s collector goes high. This action turns on Q445 and produces a high on it’s collector. C561 discharges rapidly pulling the base of Q445 low. Another circuit attached to the Mute Activation circuit is AC Loss Detection. SPOT: SPOT is generated from the deflection PWB when either Horizontal or Vertical deflection is lost. Mute from pin 49 when changing channels. This is to prevent a horizontal or vertical line from being burnt into the CRTs. then C466 will discharge through R558. VIDEO MUTE PATH.DP-2X AUDIO VIDEO MUTE CIRCUIT EXPLANATION (See DP-2X Series Chassis Audio Video Mute Circuit Diagram for details) There are times in which the main picture and audio must be muted. H Blk Loss Det: If the Horizontal Blanking signal is loss to the Signal PWB. See Horizontal and Vertical Sweep Loss Detection circuit and explanation and circuit diagram for details. This charges up C561 and through D415 to charge C467. Q444 will detect the loss. This high is input from PPD2 pin (4). When Q441 turns on. however D415 blocks C467 from discharging and the emitter of Q445 is held high. D413 to the base of Q442. this pin goes high and mutes the output of RGB. This pin is also the same pin that FC H Blk and FC V Blk is input. This high is routed to the base of Q442. See next page for continuation of Audio Mute Circuit explanation. If AC is lost. Q444 is supplied with H. the collector pulls the base of Q441 low and turns it on. MICROPROCESSOR OUTPUT: The Microprocessor outputs V. This can be because of changing channels where the noise between stations is unacceptable. The AC input from I903 to PPS3 pin (1) on the Power Supply PWB is routed and rectified by D416. D402. etc… This high is routed to the Video Mute circuit and to the Audio Mute circuit. The High from pin 49 is routed to D412 to the base of Q442. When the deflection circuit malfunctions. Generally this input is a positive going pulse that blanks the video during the peak pulses. The following action will be labeled MUTE ACTIVATION for here forward. When AC is first applied. etc… All this is done primarily to prevent damage to the CRTs or to external amplifiers or speakers connected to the projection television. same thing for Auto Programming channels. Normally. when the DC component is forced high by the action of Q411 turning on. Blanking on it’s base. Blk is lost. The other route for the high from Q411 is through R548 to the base of Q440. See the Mute Activation circuit explained previously. It’s collector is connected to the HVcc 9V line through R551 and D411. This action turns on Q443 and supplies a high to the base of Q442. please use the below explanation when Mute Activation is mentioned. C467 charges slightly behind C561 preventing activation of Q445. the base of Q443 and it’s emitter are held high.

This turns it on and supplies a high from the emitter. the high from the Microprocessor pin 49 to I007 (in pin 3 at 3. Also. When this transistor turns on. FRONT AUDIO OUT HARD MUTE PATH: Labeled as V MUTE 2: The high from Q440 is routed to DA08. Labeled as V MUTE 2: The high from Q440 is routed to PST2 pin 9. and DX02 fire and supply the high to the bases of QX01 and QX02.3V and out pin 13 at 5V) to the anode of DA04 causes the same results. The high continues to the base of QA19. OUT TO HI-FI MUTE PATH: Labeled as V MUTE 2: The high from Q440 is routed to DA03 anode. Right audio in pin 4 of IA03. Labeled as V MUTE 1: The high from Q440 is routed to PSC pin 11. Also. This is supplied by the Front Audio Control IC and functions in three states. D853 on the Green CRT PWB. just the description. Ft Spk Off: (Front Speaker Off) Also. D8A3 on the Blue CRT PWB. Q8A3. D803 on the Red CRT PWB.3V and out pin 17 at 5V) to the same circuit. CRT MUTE PATH: Shown going to the CRT PWB. (Note: This is not the same thing as the Mute selected from the customer’s remote.3V and out pin 17 at 5V) to the same circuit. the high from the Microprocessor pin 49 to I007 (in pin 3 at 3. These in turn ground out the audio for Out to Hi-Fi audio output jacks. the high from the Microprocessor pin 72 to the anode of DA07 and on to the same circuit. and QA10. The high from the PST2 connector is then sent to the anode of DX03. This high is routed to the following circuits. When these transistor turns on. No Mute = 100%. PAGE 03-17 . the high from the Microprocessor pin 71 to I007 (in pin 7 at 3. and Q803 on the Blue. 1/2 Mute = 50% and Full Mute = 0%. they remove the base voltage fro the RGB drivers. When Q441 collector is high. This turns on and supplies a ground to the following diodes.3V and out pin 13 at 5V) to the anode of DA06 and on to the same circuit. This high goes to Q8C1 base. MONITOR MUTE PATH: Shown going to the Terminal PWB. On the terminal board is an exact same circuit as describe in the Out to Hi-Fi Mute Path above. the high from the Microprocessor pin 71 to I007 (in pin 7 at 3. Q853. When the diodes are supplied with a ground on their cathodes. Then to DX01. Left audio in pin 2 of IA03 A MUTE: Also. the base of Q440 is high. So the actual circuit is not show here. Green and Red CRT PWBs. FRONT AUDIO OUT MUTE and A MUTE PATH: Labeled as V MUTE 2 and A MUTE: The high from Q440 is routed to DA05. Then DA01. The high continues to the base of QA11. These in turn ground out the audio to the Monitor Out jacks. and DA02 fire and supply the high to the bases of QA07 and QA08. it supplies a Lo to pin 11 of IA03 and hard mutes the Audio Out. Also.DP-2X AUDIO VIDEO MUTE CIRCUIT EXPLANATION AUDIO MUTE PATH: Labeled as V MUTE 2: See the Mute Activation circuit explained previously. they in turn ground out the audio going into the Audio Output IC.

(From Deflection PWB) QA08 RA28 Q442 See Sweep Loss Detection Circuit Diagram for details Micro Processor SPK OFF V MUTE 1 DA08 F. Spk Off A MUTE V Mute 2 A Mute DA09 RA48 RA49 I001 3 7 Level Shift QA11 CA63B Ft.DP-2X Series Chassis AUDIO and VIDEO MUTE Circuit FC H Blk V MUTE 10V p/p AC Sig R441 D402 FC V Blk Q412 24 Rainforest NOTE: V MUTE 1 becomes V MUTE 2 on Signal PWB 2 & 3 Then V MUTE 1 again on CRT PWB Q411 I401 Q445 Q443 R557 R561 R560 D412 HVcc 9V See explanation PSC for details V MUTE 1 11 R563 R439 R442 PPS2 PPD2 H Blk 8 8 R555 CRT PWB R511 D416 R562 C561 D414 C466 R554 HVcc 9V CA04 CA08 Right Left DA03 DA04 R548 V MUTE 2 DA02 R551 D411 R558 C467 C465 D415 R556 Q444 R559 See explanation for details PST2 D417 V MUTE 2 9 Deflection PWB D413 Terminal PWB 4 R553 4 Spot JA01 Q441 Q440 R510 CA03 R C464 L R550 CA07 RA27 QA07 DA01 Out To Hi-Fi "SPOT" Horizontal Sweep Loss Det. Audio RA50 Mute = Lo 11 CA64 19 CA56 CA60 4 Mute Ft Spk Off 72 IA03 IA04 Right 6 Left DA07 DA05 DA06 R In R Out CA57 2 L In L Out 7 12 V MUTE 49 13 I007 17 A MUTE 71 QA10 RA45 RA44 CA59 PAGE 03-18 QA09 FRONT L & R Audio Output . Vertical Sweep Loss Det.

DP-23G.DP-23. DP-26. DP-27 and DP-27D CHASSIS DVI SIGNAL PATH (Not DP-24) All of these pins are ground B+ 1 2 2 1 IJ01 4 10 12 16 21 25 28 33 35 43 45 50 18 9 19 23 26 31 40 1 7 13 17 22 24 27 32 37 38 41 46 39 15 14 DJ05 8 DJ06 2 5 4 2 4 6 8 10 13 SiI907B DVJ DVI CONN PET DJ22 3 DJ21 3 1 B+ 1 2 2 1 2 49 48 3 RX2RX2+ QJ01 QJ02 QJ03 QJ06 11 3 5 7 12 4 DJ24 3 B+ 1 2 2 1 DJ23 3 5 6 HSync VSync IOR IOG IOB DVIDET DVIH DVIV DVIR DVIG DVIB DVIH DVIV DVIR DVIG DVIB DVIDET 7 DJ25 3 DJ26 3 8 52 51 9 B+ 1 2 DJ27 DJ28 3 3 2 1 10 11 RX1RX1+ 12 13 14 15 16 3 2 QJ08 17 18 19 RXORXO+ GND GND GND GND GND GND 20 21 22 DJ29 5 6 LJ15 IJ04 5 Reset 3 3 23 24 25 RXC+ RXC- SCDT AVcc AVcc Vcc DVcc Vcc DACVccR DACVccG DACVccB DACVcc Vcc DVcc Vcc Reset 2 IJ07 1 1 14 SW+5 26 27 NC 15 NC LJ17 IJ0A NDC7002N 1 3 28 29 RX2RX2+ GND2/4 RX4+ RX4SCL SDA VSYNC RX1RX1+ GND1/3 RX3+ RX35V GND HTPIUG RX0RX0+ GND0/5 RX5+ RX5GNDC TXC+ TXCC1 (R) C2 (G) C3 (B) C4 (H) C5 (GND) C5 (GND) IJ02 NDC7002N DJ04DJ02 30 7 PAGE 03-19 Mode 5 6 SCL 4 6 SDA DJ01 .

Sync for the Main Picture is from the PST1 connector pin 1 is to pin 13 of the Sync selector IC I402. This sync is used no matter what source. I402 Sync Selector to the Rainforest IC I401: One route for the H. Sync from IZ02 pin 15: This is routed through the transistor QZ18 then to the connector PST1 pin 2. After internal separation. this H. The other route from the PST1 connector pin 1 is to pin 13 of the Sync selector IC I402. This sync is used if the set is receiving a true 1080i signal and the Flex Converter is bypassed. Sync from IZ01 pin 17: This is routed through the transistor QZ13 then to the connector PST2 pin 28. The Flex Converter uses this signal for a timing signal as it performs it’s conversions. H.DP-2X COMPONENT SYNC CIRCUIT EXPLANATION (See DP-2X Series Chassis Main/Component Sync Separation Signal Path for details) This diagram shows the route for sync utilized when the set has selected Component inputs. Sync is output at pin 15. V. Sync is routed out pin 14 to pin 16 of the Rainforest IC I401. Then through QX19 to the Sub Video Chroma Y Pr/Pb Switch IZ01 pin 30 and pin 6. PAGE 03-20 . The Flex Converter uses this signal for a timing signal as it performs it’s conversions. V. One route is into the PFC1 pin 8 connector on the Flex Converter U303 called M H In (Main Horizontal In). The Flex Converter uses this signal for a timing signal as it performs it’s conversions. From here into the PFC1 connector pin 14 on the Flex Converter U303 called S V In (Sub Vertical In). Vertical Sync from the Flex Converter U303 to the Rainforest IC I401: The other route is for Vertical Sync from the Flex Converter U303 pin 6 of PFC2. This signal is routed to pin 12 of I402. This Vertical Sync signal is called VD Out (Vertical Digital Output. Sync from IZ01 pin 15: This is routed through the transistor QZ15 then to the connector PST2 pin 29. This Horizontal Sync signal is called HD Out (Horizontal Digital Output. IX02 Main Y Pr/Pb Selector: The Component inputs are Component 1 at pin 59 and Component 2 at pin 5. H. This signal is routed to pin 15 of the Rainforest IC I401. this H. The other route is for Horizontal Sync from the Flex Converter U303 pin 7 of PFC2. The Y component for NTSC is input at pin 53. After internal separation. From here it is split. The Flex Converter uses this signal for a timing signal as it performs it’s conversions. PinP (Sub) Y Output from IX01: The Y component from the selected source is output at pin 50. this H. meaning that the signal has gone through the Digital manipulation within the Flex Converter). Main Y Output from IX02: The Y component from the selected source is output at pin 44. Sync from IZ02 pin 17: This is routed through the transistor QZ14 then to the connector PST1 pin 1. If the control line at pin 11 is high. Then through QX22 to the Main Video Chroma Y Pr/Pb Switch IZ02 pin 30 and pin 6. This sync is used if the set is receiving a true 1080i signal and the Flex Converter is bypassed. From here it is routed into the PFC1 pin 15 connector on the Flex Converter U303 called S H In (Sub Horizontal In). Sync is routed out pin 14 to pin 16 of the Rainforest IC I401. because all vertical timing is the same. the H Sync is output at pin 17 and the V. the H Sync is output at pin 17 and the V. Sync is output at pin 15. From here into the PFC1 connector pin 7 on the Flex Converter U303 called M V In (Main Vertical In). This sync is used if the set is using a signal that has been processed by the Flex Converter. If the control line at pin 11 is high. meaning that the signal has gone through the Digital manipulation within the Flex Converter). If the control line at pin 11 is Low. Sync is routed out pin 14 to pin 16 of the Rainforest IC I401.

5 Main Y 59 Component 1 Y PFC2 PFC1 HD Out M H In 7 U303 8 VD Out FC4 M V In 7 6 Unit YOut 16 PBOut 18 PROut 20 Flex Converter 28 29 15 14 S V In See DP-2X Chassis Video Signal Path NTSC. Component. 4.DP-2X SERIES CHASSIS MAIN/COMPONENT SYNC SEPARATION SIGNAL PATH 15 VD In 16 HD In I401 14 Rainforest IC Control Hi X Lo I402 11 28 Sync SW 12 13 Main YPr/Pb Selector QZ14 HD-Out IZ02 2 PST1 1 2 QZ18 From 3 D Y/C 4 S-In 3. 4. 5 Main Y Main Y IX02 Main YPr/Pb Selector QX22 Main Component Y D Sync2 In 6 17 H Sync D Sync1 In 30 VD-Out 15 V Sync Main 44 Y Out 2 From 3 D Y/C 53 DVI Y 5 IZ01 PST2 Component 2 Y 4 From 3 D Y/C S-In 3. OSD S H In Sub 2 Sub Y YPr/Pb Selector QZ13 D Sync2 In 6 HD-Out Sub QX19 17 Sub H Sync D Sync1 In 30 50 Y Out 1 VD-Out 15 Sub V Sync QZ15 Sub Component Y PAGE 03-21 .

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AUDIO INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 4 .

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MACH3 (Pin 11) H L The Secondary route from IA04 is to the Out to Hi-Fi jacks.DP-2X AUDIO CIRCUIT EXPLANATION (See DP-2X Chassis Audio (Main-Terminal) Signal Path for details) IX01 AUDIO VIDEO SELECTOR IC: The main Audio path is delivered to the Audio/Video Selector IC IX01 to the following pins. bass. MONITOR OUTPUTS: 38 (Left) and 40 (Right): This is the Monitor Audio Outputs. This audio is associated with component input 2 which also accepts composite video on the Y jack. The integrated Tuner has an Internal Audio decoding circuit that outputs Lt (Left Total) from pin 26 and Rt (Right Total) from pin 27. composite or S-In only. 9 (Left) and 10 (Right): This is the Audio input from Auxiliary 4 input. Dependant upon BYPASS (SRS OFF) L L/H the Surround mode selected the audio is interfaced with IA02 which acts as the BBE/ SRS STEREO H L SRS IC. The audio from I005 leaves pin 15 Left and 14 Right and into the Audio Control IC IA01. The Left continues through the PST1 connector pin 25 and the Right continues to pin 26. (See the Audio Video Mute circuit for details on the Mute transistors operation and control). A low on these pins with switch to receive inputs from the main L and R and a high on these pins will place the IC into the Center mode. The Digital Tuner has an Internal Audio decoding circuit that outputs Lt (Left Total) from pin 10 and Rt (Right Total) from pin 9. composite or S-In only. Pin 12 Pin 13 IA01 AUDIO CONTROL IC: MODE LOGIC Mode1 Mode2 This IC is responsible for controlling the audio Surround formats as well as volume. These inputs are delivered through the PFT connector pins 4 and 5 respectively. 29 (Left) and 31 (Right): This is the Audio input from Auxiliary 2 input. balance. 59 (Left) and 61 (Right): This is the Audio input from Auxiliary 1 input. 16 (Left) and 18 (Right): This is the Audio input from Auxiliary 3 input. They arrive at IX01 pins 62 and 64 respectively. The Left continues through the PST1 connector pin 21 and the Right continues to pin 20. Primary route is to the Audio Output IC IA03 pins 2 (L) and 4 (R) and out pin 12 (L) and 7 (R) to the speaker plugs BBE (Pin 8) H L PL and PR. This audio is associated with component input 1 and with DVI input. PAGE 04-01 . The control pins for IA02 are listed in the table to the right. 23 (Left) and 25 (Right): This is the Audio input from the front Auxiliary 5 input. SRS MONAURAL H H The Audio is output from pin 8 (L) and 23 (R) to IA04 which buffers the audio and BBE LOGIC (NJM2155) IA04 ON OFF MODE LOGIC outputs on pin 6 (L) and 19 (R) to two different circuits. The Center audio is routed to pins 1 and 13. The control switching signal is provided by the Microprocessor I001 pin 61 through the inverter QA16 to pin 10 and 11. (DVI is not available on the DP-24 chassis). The Microprocessor outputs I2C bus control SRS LOGIC (NJM2198) IA02 lines from pin 28 (SCL) and 31 (SDA) to pin 14 and 13 respectively. 62 (Left) and 64 (Right): This is the Audio input from the Main Tuner U301. The outputs are then routed through the PST1 connector pins 10 (Left) and 9 (Right) to the Center Select IC I005 pins 2 and 12 respectively. They arrive at IX01 pins 2 and 4 respectively. composite or S-In only. treble and customer mute. 2 (DM-Left) and 4 (DM-Right): This is the Audio input from the ATSC Tuner UD2002. The Lt and Rt represent the fact that the Audio has any Dolby ® encoding still embedded. I005 is responsible for selecting the audio input from the Center Jack when the customer has set the television to operate in TV as Center Mode. LEFT and RIGHT OUTPUTS: 43 (Left) and 35 (Right): This is the Left Total and Right Total output which represent the Audio associated with the Main picture. The Digital Module (ATSC Tuner) is only available on the DP-26 chassis).

DP-2X Chassis Audio (Main-Terminal) Signal Path PST1 Center In 64 62 Left Out 43 10 9 12 13 1 Right 17 13 23 RIn 24 LIn 15 ROut 5 16 LOut QA16 BBEout R 27 BBEout L 4 Tone R In 26 Tone L In =L SCL 14 SDA 31 QA14 QA13 Left Right I A 0 2 T o SIGNAL PWB SEL OUT JA01 C SIGNAL PWB U301 Tuner Audio 27 L 30 Left 18 MODE 2 12 R 11 14 Hi TV as Center Lo Lo X1 TV Main R 20 1 2 MODE 1 IA02 BBS/ SRS Hi Y I005 10 15 Main Tuner 26 TV Main L 21 8 BBE 11 Mach3 MODE LOGIC Pin 12 Pin 13 Mode1 Mode2 UD2002 45 Right 4 Digital Out 2 Tuner Audio 9 DM R 26 ATSC Tuner 10 DP-26 ONLY DM L 25 IX01 61 28 13 SRS LOGIC (NJM2198) IA02 BYPASS (SRS OFF) SRS STEREO SRS MONAURAL L H H BBE LOGIC (NJM2155) IA04 MODE LOGIC BBE (Pin 8) MACH3 (Pin 11) ON H H OFF L L L/H L H Aux 1 Left QX30 59 61 29 31 16 18 9 11 Composite 4 S-In 4 Composite 3 S-In 3 Component 2 Composite 2 Component 1 or DVI (Not DP24) A/V Select Micro I001 V1 Mach3 57 BBE 63 6 19 IA04 24 1 Aux 1 Right QX31 Aux 2 Left V2 Aux 2 Right IA01 Audio Control 8 L Out 23 R Out QA04 QA06 QA03 HiFi Out R QA05 QA07 Aux 3 Left V3 Aux 3 Right L Aux 4 Left V4 Aux 4 Right See AV Mute Circuit Diagram + QA08 PR PFT 23 25 17 Composite 5 S-In 5 See AV Mute Circuit Diagram 4 QA09 7 Aux 5 Left FR (WO) Out 2 4 CA81 FR (TW) Out V5 4 Aux 5 Right 5 IA03 + Front Control PWB 38 MON 40 OUT 2 See AV Mute Circuit Diagram QA10 SIGNAL PWB 12 FL (WO) Out CA76 Front Audio Out TA8258H FL (TW) Out PL 2 4 Monitor Out Left MON Monitor Out Right PAGE 04-02 TERMINAL PWB .

DEFLECTION INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 5 .

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This transistor generates the 13V P/P called H Blk. horizontal drive is output from pin (26). PPD2 pin 8 to the Horizontal Driver Transistor Q709. It is compared to the reference signal coming in at pin (16) Horizontal Sync. The drive signal is routed through the connector PSS2. the Rainforest IC detects this as well and outputs the ABL Switch signal from pin (36). Parabola) is created. The Reference signal for Horizontal Sync now becomes the Y input from component. pin (8). The Dynamic Focus OUT Circuit to QF01: A Dynamic Focus waveform. also as a detection signal to activate the AFC Loop. This is a parabolic waveform that is superimposed upon the static focus voltage to compensate for beam shape abnormalities which occur on the outside edges of the screen because the beam has to travel further to those locations. NOTE: When a 1080i signal is input through component inputs. This output is routed to the driver transistors. BLK) GENERATED FROM PIN (7): The Horizontal Pulse is also routed to the Horizontal Blanking generation transistor Q706. This signal goes to the following circuits. HORIZONTAL BLANKING (H. 1. This transistor switches the primary of the Flyback transformer TH01. 2. This voltage is sent to pin (9) of the High Voltage Driver IC IH01. • Deflection H. Pulse from pin (7): This pulse is used by. A sample of the High Voltage is output from the Flyback transformer TH01 pin (12). • To the PPD2. If there are any differences between these two signals. PPD2 connector pin 8 to pin (24) of I401 as FBP In. This transistor switches the ground return for pin (8) of the Driver transformer (T702). The PinP unit uses this signal for switching purposes. • The H Blk signal is routed from here to the the Microprocessor which uses this signal for OSD positioning and for Station Detection during Auto programming within the coincidence detector. QH02.DP-2X HORIZONTAL DRIVE CIRCUIT EXPLANATION HORIZONTAL DRIVE CIRCUIT DIAGRAM DESCRIPTION: (Use the DP-2X Horizontal Drive Circuit Diagram for details) CIRCUIT DESCRIPTION When B+ arrives at the Rainforest IC I401 pin (19). Q777 TRANSISTOR PRODUCES THE FOLLOWING OUTPUT PULSES. Horizontal Deflection Yokes drive signals. positioning. Then to the High Voltage Horizontal Output Transistor QH01. As this signal collapses. (See ABL Switch Circuit Diagram for details). Here this signal is used as a comparison signal. Like the read/write clock. (Horz. • Through CN01 to the Sweep Loss Circuit (QN01) to shut off the drive to the CRTs if Horizontal deflection is lost. Deflection SW +115 is sent through pin (9) and output pin (10) to the collector of the Horizontal Output Transistor QH01. HORIZONTAL DRIVE FOR THE HIGH VOLTAGE: • The Horizontal Blanking signal H Blk from Q706 is also sent to the High Voltage Driver IC IH01 pin (3). it creates a pulse on the output pin of (T702) at pin (4) to the base of the Deflection Horizontal output transistor Q777. T701 TRANSFORMER PRODUCES THE FOLLOWING OUTPUT PULSES. This IC uses this signal as its reference signal to produce the High Voltage Drive waveform output from pin (1). SW+28 volts is supplied to pin (5) and this switching allows EMF to develop. The collector of Q777 provides the drive signal for all Horizontal Deflection Yokes. (Continued on page 2) PAGE 05-01 . This voltage is compared to the reference voltage available at pin (12). This transistor provides primary switching pulses for the Deflection Transformer T701. the output Drive signal from pin (26) is corrected. etc… • Through the PDG connector pin 14 to the Convergence circuit for correction waveform generation.

two horizontal output circuits. It’s important to notice that the High Voltage circuit can not function without the Horizontal Deflection circuit providing a drive signal. GENERAL INFORMATION: The DP-2X deflection circuit differs from analog Hitachi projection televisions. One for Deflection and one for High Voltage. an error voltage is generated and output from pin (10) and input again at pin (11) where it manipulates the PWM (Pulse With Modulation) signal producing the Horizontal Drive signal output from pin (1). This allows for better deflection stabilization and is not influenced by fluctuations of the High Voltage circuit which may cause unacceptable breathing and side pulling of the deflection.DP-2X HORIZONTAL DRIVE CIRCUIT EXPLANATION If there is a difference between the two voltages. It utilizes in a sense. PAGE 05-02 .

Circuit QN01 E r r o r 9 FB In DH05 HV Sample RH22 12 PAGE 05-03 .Blk. AFC. Yoke R Power PPD2 PPS2 24 FBP In HVCO 21 Osc. Def. X401 I401 VCC SW HVcc 19 3 HVcc 9. Yoke G H. Def. V. H Pulse 6 HD1 In Rainforest IC T702 R748 D715 5 8 6 H Out 26 H Out Signal PWB 1080i Through Mode H. for OSD.3V 9 8 Y2 In 8 8 16 T701 7 8 2 4 1 1 H.Blk. 12 11 10 CN01 To H. PPD6 IH01 3 Gen Drive SW +115V 9 9 TH01 10 High Voltage Horizontal Output RH07 DH04 QH02 1 Com1 PDG PPD3 2 DH01 RH01 RH02 CN01 QH01 10 To Convergence 14 Circuit SW +9V Ref. PPS3 Supply PWB H. SD. Sync In From Flex Converter R735 Q709 SW +28V R748 C725 SW + 115V D709 Q777 Q701 6 Q706 See Voltage and Waveform Chart on next page. Yoke B To Dynamic Focus QF01 Power Supply PWB H.DP-2X SERIES CHASSIS HORIZONTAL DRIVE CIRCUIT To Micro. Def. I910 2 Power On/Off Def. Sweep Loss Det. Side Pin Modulator H. Auto Prog.

Note that pin 14 is tied to an internal op-amp (-) leg.75Khz 4.DP-2X IH01 HIGH VOLTAGE DRIVER IC WAVEFORM AND VOLTAGES IH01 NORMAL OPERATION: Pin 1 = 6. and Vert. PAGE 05-04 . This action stops Horizontal Drive to the High Voltage circuit. This is the key. 9 10 Varies with Brightness levels. However.02V Pin 15 = 4.90V Pin 13 = 0.47V Pin 5 = 1.038V Pin 12 = 4.0V Pin 9 = 4. This high is used to shut off the CRT to prevent CRT burn.75Khz 3V P/P 33. When QN02 goes high.0V Pin 9 = 0. This action causes pin 1 to saturate and it goes High.038V Pin 11 = 0. These two pins tie back to the Horz. it drives pin 3 and 14 high which turns off the internal oscillator of IH01 via pin 3. connected to pin 1. the Collector of QN02 is also routed to these two pins through diodes DN09 to pin 14 and DN10 to pin 3. it outputs a high from QN02.0V UVP OVP Pin 8 = 0.28V Pin 2 = 11.089V Pin 6 = 0.019V Pin 10 = 0.60V Pin 6 = 10. Sweep Loss Detection Circuit.86V Pin 3 = 3.90V 8 7 Pin 10 = 0.0V Pin 8 = 0. So no Horizontal Drive is allowed to pass to the output amp.75Khz IH01 NOT RUNNING: Pin 1 = 12. Take a quick look at the voltages for pin 3 and 14.90V Pin 13 = 0. Pin 2 = 11.59V Pin 15 = 4.0V Pin 3 Pin 4 11 12 13 14 15 REF 16 Gnd + + POUT AGC 6 GEN UVLO 5 4 3 2 1 12V P/P 33.021V Pin 7 = 0.5V Pin 5 = 1. If the Sweep Loss circuit is activated.5V P/P 33.96V Pin 4 = 3.58V Pin 7 = 0.0V NOT RUNNING EXPLANATION: This situation can happen and possibly lead the Service Technician off on the wrong path.03V Pin 12 = 4.72V + Pin 3 = 0.80V with Color Bar. This cause the output to stop. (See page 05-05 for the Sweep Loss Detection Circuit Diagram).59V Pin 4 = 2.05V Pin 14 = 4.96V Pin 16 = 0.05V Pin 1 Pin 14 = 2.03V Pin 11 = 0.96V Pin 16 = 0.

DP-2X SWEEP LOSS DETECTION CIRCUIT EXPLANATION
(See DP-2X Sweep Loss Detection Circuit for details) The key component in the Sweep Loss Detection circuit is QN02. This transistor is normally biased off. When the base becomes 0.6V below the emitter, it will be turned on, causing the SW +9V to be applied to two different circuits, the Spot circuit and the High Voltage Drive circuit.

SPOT ACTIVATION CIRCUIT
When QN02 is turned on, the SW +9V will be applied to the anode of DN11, forward biasing it. This voltage will then pass through DN11. It will then be clamped by DN12, and arrive at pin 4 of PPD2, PPS2. It will then be directed to the Signal PWB where it will pass through D413 and activate the Video Mute circuitry Q442 Q441. This is done to prevent CRT burns. (See DP-2X Audio Video Mute Circuit for details) A control (enable) circuit for SPOT is routed from pin 5 of PPS2, PPD2 called “CUT OFF”. This will activate when accessing certain adjustments parameters in the service mode; i.e. turning off vertical drive for making CRT drive or cut-off adjustments. When Vertical Drive is defeated, the Vertical Sweep loss circuit would activate. Cut Off is produced from the Microprocessor I001 pin 47 and routed to QN06 to “inhibit” the Spot line from activating and shutting off the CRTs.

HIGH VOLTAGE DRIVE CIRCUIT
When QN02 is turned on, the SW +9V will also be routed through RN15 and DN09 and applied to the High Voltage Drive IC IH01 at pin 14. When this occurs, the IC will stop generating the drive signal that is used to produce High Voltage via QH02, the High Voltage Driver. Again, this is done to prevent CRT burn, especially during sweep loss. This high is also routed through RN16, DN10 to pin 3 of IH01 which also kills the internal drive.

CONCERNING QN02
There are several factors that can cause QN02 to activate; loss of vertical or horizontal blanking.

Loss of Vertical Blanking (V Blk)
The Vertical pulse at the base of QN05 switches ON05 on and off at the vertical rate. This discharges CN03 sufficiently enough to prevent the base of QN04 from going high to turn it on and activate QN02. When the 24 Vp/p positive vertical blanking pulse is missing from CN04 to the base of QN05, it will be turned off, which will cause the collector to pull up high because CN03 charges up through RN11. This in turn will cause QN04 to turn on because it’s base pulls up high, creating an increase of current flow from emitter to collector and through RN09. RN08, (which is located across the emitter base junction of QN02), to the SW +9V supply. This increase of current flow through RN08 will bias on QN02 and the events described in “Spot Activation Circuit” above will occur.

Loss of Horizontal Blanking (H Blk)
The Horizontal pulse at the base of QN01 switches ON01 on and off at the horizontal rate. This discharges CN02 sufficiently enough to prevent the base of QN03 from going high to turn it on and activate QN02. When the 11.6 Vp/p positive horizontal blanking pulse is missing from CN01 to the base of QN01, it will be turned off, which will cause the collector to go high through DN03, RN02 as the SW +9V charges CN02 . This in turn will cause QN03 to turn on because it’s base is pulled up high when DN02 fires. When QN03 turns on, an increase of current flow from emitter to collector, through RN10, and up through RN08. This increase of current flow through RN08 will bias on QN02 and the events described in “Spot Activation Circuit” above will occur.

PAGE 05-05

DP-2X SWEEP LOSS DETECTION CIRCUIT
DN13 SW+9V RN12 RN11 DN08 RN09

Vertical Blanking From Pin 11 I601
RN13 V. Blk. CN04 RN14

QN05

QN04
CN03 DN06 DN07

From Power Supply Circuit Diagram
SW+7V

DN14 24V P/P RN18 RN02 CN02 RN03 DN03 RN10 RN08

QN02
High Voltage Driver IC RN06 DN01 RN01

Horizontal Blanking From Q706 Emitter
H. Blk. CN01 RN04

DN02

QN01

IH01
14 Stops
RN15 DN09 Drive

QN03

RN05 11.6V P/P

H. Blk

PPS2 PPD2
SPOT

4

4

Prevents CRT Burn DN12

DN11 RN16

DN10

RH07

3 Osc
DN04

Stops

To Q442 Signal 3of 3 See A/V MUTE Circuit
CUT OFF

Stops High Voltage Drive Signals From being produced when Sweep Loss is detected.

RN17

5

5 When Vertical Drive is turned Off during adjustment, I 2C.

QN06
Spot Inhibit

From I001 Micro Pin 47

PAGE 05-06

DP-2X VERTICAL OUTPUT CIRCUIT EXPLANATION
(See the DP-2X Series Chassis Vertical Output Circuit for details) I601 B+: The Vertical Output IC I601 requires SW+28V to operated. This voltage is supplied from the Power Supply. The output for the SW+28V pulse is from pin 14 of T902. This power supply is protected by E902, rectified by D918, filtered by C929, L913, C950 and output from the PPD6 connector pin 1 and 2. It arrives at the Deflection PWB and is routed through the Vertical B+ Excessive Current Sensor R629, Q604 to pin 10 of I601. TRIGGER PULSE: The Trigger pulse is routed from the Rainforest IC I401 pin 27 on the Signal PWB. It is output from the PPD2 connector pin 10, through the Power Supply PWB and then through the PPS2 connector pin 10 to the Deflection PWB. It is then sent to the Trigger Input on I601 pin 3. During Trace, the internal Ramp Generator circuit using C603 connected to pin 7 as the time constant begins charging. As it charges, the Pump Up circuit is also charging from the SW+28V to C605, through pin 11 to an internal switch of I601. When the Trigger pulse arrives (Retrace Time), the internal switch toggles over to the output stage push pull pair inside I601, and the +28V charged capacitor C605 discharges. The output stage push pull pair inside I601 already have +28V input from pin 10. So the output pulse from pin 1 is now near 50V p/p. This is only needed for a short duration of time, (retrace) so the Charge Pump circuit eliminates the need for a 50V power supply. (V BLK) VERTICAL BLANKING PULSE GENERATION: When the Charge Pump discharges and produces the 50V p/p pulse for Vertical drive during retrace, this pulse from pin 11 is also routed out as the Vertical Blanking pulse. It’s amplitude is around 21V p/p and is sent to the following circuits; • Vertical Sweep Loss detection circuit • Convergence circuit for vertical correction waveform generation • To the PPS2, PPD2 connector pin 12 to be sent to various circuits on the signal PWB. The Microprocessor uses this signal to time it’s OSD. VERTICAL OUTPUT PULSE: The Vertical Output pulse is then routed to the Vertical Yokes generating a linear sawtooth current which moves the beam. (Trace = from top to bottom, Retrace = from bottom to top). This linear current is generated by the charge time constant of the vertical yokes charging C607 through the low ohm resistors R619, R620. VERTICAL YOKE CHARGE PULSE: The pulse generated on the positive side of C607 is also routed through the parabolic wave form generation circuit of R621, and C608 to the side pincushion circuit and to the dynamic focus circuit for corrections to deflection and focus. The pulse generated on the positive side of C607 is also routed back to I601 pin 8 and 9. The AC component of this signal is for vertical linearity compensation. The DC component of this signal and the DC component provided by the Vertical size pot into pin 4 are routed back to the Ramp generator circuit described above. The DC component determines the charge time associated with the ramp generator or in other words, the Vertical height. D SIZE SWITCH: When Magic Focus is activated by either the Magic Focus button or customer’s menu or during service when the sensors are initialized, Q603 receives the D Size command from the Digital Convergence Unit, UKDG pin 15 of PDS connector. When Q603 turns on, it bypasses R611 and lowers the resistance from R607 (Vertical Size Pot) to ground. This increases the Vertical size to allow positive contact of the light pattern hitting the sensors.

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R620 1. Def. HVCO V Drive 12 10 VD1 In Signal PWB 10 27 VP Out V. Yoke G PMR L601 L602 R622 C609 R628 R625 Power Supply PWB 6 Gnd Vs D603 V OUT Output Stage Vs I601 10 1 2 + C605 D604 D607 R605 + C604 - 2 1 V+ VV. Yoke B 12 V.2 ohm R618 V.DP-2X SERIES CHASSIS VERTICAL OUTPUT CIRCUIT PMB To Micro. Def.Blk.Blk. C602 5 NC R617 R606 R616 + C606 + R621 + C607 2200/25 C608 R614 R611 V OUT Hight Adj R613 Q603 R607 V Size R608 4 To Side Pin Cushion Circuit To Dynamic Focus Circuit R619 1. Def. Sync In From Flex Converter D608 I401 8 55 Q604 2 1 21 15 9 PMG V+ V- PPS3 1 28V R626 V- 2 V+ V.Blk. R631 C610 + R629 0. Circuit 7 11 9 8 R604 C603 Ramp Gen Flyback Gen Inverting Input Buffer Out To Vertical Sweep Loss Detection Circuit V.68 R630 R627 V. for OSD Positioning X Ray Protect Main Y Direct Power Supply PWB PPS2 PPD2 R632 VCC HVcc Osc.2 ohm PAGE 05-08 D Size . YokeR D606 R602 3 Trigger Input D601 D605 To Conv.

The negative leg of the op-amp is connected through pin 5 to the feedback circuit from the Side Pin Cushion output circuit for stability. The variable resistor R711 which adjust the DC level at pin 6. VERTICAL YOKE CHARGE PULSE: (See Vertical Output Circuit for details) The pulse generated on the positive side of C607 is routed through the parabolic wave form generation circuit of R621. D703 would forward bias and send a Shut Down command through the Protect line. UKDG pin 15 of PDS connector. The output of the DC offset voltage with Vertical parabolic wave form attached is then routed out pin 7 to the base of Q703. The DC offset voltage and Vertical parabolic side pin cushion compensation wave form is now super imposed on the SW +115V which is sent to the Deflection Transformer T701 and the Horizontal Linearity circuit C715. R713 and clamped by D714. R747 back to the SW +9V and R704. C702. (See Deflection Protect Power Supply Shut Down Circuit Diagram for details. the sides of the picture has a tendencies to pull in similar to an hour glass. This transistor drives the base of the Side Pin Cushion modulator transistor Q701. X-RAY PROTECT: If something should fail within the Side Pincushion circuit that could cause a CRT burn. The Side pincushion circuit is responsible for manipulating deflection to compensate. R711. R709 to pin 6 of I701.DP-2X SIDE PINCUSHION CIRCUIT EXPLANATION (See the DP-2X Side Pincushion Circuit for details) Due to the nature of deflection. This increases the Horizontal size to allow positive contact of the light pattern hitting the sensors. Q710 receives the D Size command from the Digital Convergence Unit. it bypasses R714 and lowers the resistance from the emitter of Q701 to ground. and C608 to the side pincushion circuit.) PAGE 05-09 . The collector of Q701 is connected to the Deflection SW +115V. This is the positive leg of the internal op-amp. This transistor has it’s emitter off set above ground by D713. D SIZE SWITCH: When Magic Focus is activated by either the Magic Focus button or customer’s menu or during service when the sensors are initialized. Also attached to this input circuit is the Horizontal Size circuit comprised of R710. the voltage at pin 7 of I701 is monitored by D702. If this zener fires because the voltage at it’s cathode increases above a specified level. R729 to the Horizontal Yoke returns. L703. When Q710 turns on. SIDE PIN WAVE FORM GENERATION IC: Then through R742. This is accomplished by super imposing a vertical parabolic waveform on the DC voltage utilized for Horizontal Size.

Blk Generator To H.DP-2X SIDE PINCUSHION CIRCUIT DIAGRAM SW +9V SW +115V R706 X-RAY Protect R717 R707 C701 C722 R709 C702 R742 SW+11V D702 D703 Q701 C701 V Parabolic R721 R708 R712 4.96V R710 R701 Q703 8 7 + + - 6 5 R711 I701 R747 R704 R702 H Size Adj R713 D714 R703 D713 1 Q710 D SIZE Sensor Initialize = Hi Magic Focus = Hi 2 3 4 T701 R714 R715 Deflection Horizontal Driver Q777 6 1 7 8 To Q705 H. Yoke Returns L704. Deflection Yokes To H. Linearity off H. L705 PAGE 05-10 C715 L703 R729 .14V D701 8.39V 5.17V 5.

DIGITAL CONVERGENCE INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 6 .

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CLAMP LPF Figure 1 The Block above shows the relationship of the DCU to the rest of the set. EEPROM AND SRAM SHOWN IN FIGURE 1: (8 Sensor Array). magnet influence or mechanical. • SERVICE ONLY SWITCH • MAGIC FOCUS activation by Magic Focus Switch on Front Control Panel or customer’s Menu. Copy from EEPROM. approx. 20 sec. • THE DIGITAL CONVERGENCE UNIT (DCU) • INFRARED REMOTE RECEIVER • ON SCREEN DISPLAY PATH • CONVERGENCE OUTPUT STKs • CONVERGENCE YOKES • MAGIC FOCUS SENSORS AND INTERFACE • MICROPROCESSOR • RAINFOREST IC (Video Processor). Displays CrossHatch 256 Adjusted Points Per/Color One Chip CPU 8 bit 128 Kbit SLOW EEPROM (2Kbit) Error Data Digital Cross Hatch Gen. These adjustment points are actual digital data stored in memory. then caculations will be made. Note that the light being produced by the CRTs is what is used by the sensors for Magic Focus. The DCU is the heart of the Digital convergence circuit. and associated memories for the adjustment data and Magic Focus Data. Sensors (X8) Technician's Eye Adjust through observation SCREEN M IR Light Stored during Initialize Stored Light Sensor Data Remote Control EEPROM 2K Bit Data Comparator between stored data and light sensor data RO R Timing Controller Serial-Parallel Converter A/D Sensor PWB H CRT B G R Infra-Red Decoder To Video Circuits Via O.D. The Digital convergence Interconnect Diagram depicts how the Digital Convergence Circuit is interfaced with the rest of the Projection’s circuits. THE DIGITAL CONVERGENCE UNIT (DCU) (8 Sensor array). 35 Adjustment Points 9 Adjustment Points X1 X6 X6 X6 X6 Calculation of other 139 points per/color S-RAM (256Kbit) FAST INTERPOLATION Back Up DIGITAL CONVERGENCE CIRCUIT 117 Points Per/Color D/A Conv.DP-2X DIGITAL CONVERGENCE INTERFACE CIRCUIT EXPLANATION See DP-2X Chassis Digital Convergence Interconnection Circuit Diagram for details. Many different abnormalities can be quickly corrected by running Magic Focus. The Digital Convergence circuit is responsible for maintaining proper convergence of all three colors being produced by the CRTs. by actually using the light on the screen to make judgments. Held within are all the necessary components for generating the necessary waveforms for correction. Time.S. The internal workings of the DCU can actually make 256 adjustment points per color. This (Continued on page 2) PAGE 06-01 . Static Centering AC Applied. V 2nd S/H Timing Controler 1st S/H D/A CY CLAMP Serial/Parallel Converter Gate Array 4000 gates 117 Points Per/Color Addressable by Technician Also available. The main components and/or circuits are. Each color can be adjusted in any one of 117 different locations. This allows the DCU to make adjustments regardless of circuit changes.

the screen will display an adjustment grid instead. D/A CONVERTERS SHOWN IN FIGURE 1: The internal controller. The digital convergence module produces different patterns for each CRT. When a complete Digital Convergence procedure has been performed and the adjustment information stored in memory by pressing the PIP Mode button twice (2). physically located on the middle edges of the cabinet and the centers of the top and bottom. This is done by pressing the PIP-MODE button on the remote once (1). If a convergence touchup is required in the future. The Data is converted through the D/A converter. INTERNAL CONTROLLER. This Offset voltage will move the entire raster Up or Down. This automated process duplicates the same light pattern it memorized from the initialization process. Left or Right. via a Busy line output from the DCU. the Low Pass Filter that smoothes out the parasitic harmonic pulses from the digital circuit and the output Clamp that fixes the DC offset level. the EEPROM data is read and the SRAM makes the interpolation and as long as power remains. without further adjustments. This voltage is sent to the DCU and converted to digital data and compared with the memorized sensor initialization data. An on-screen graphic display pattern will be displayed to confirm that the automatic convergence mode (Magic Focus) has begun. This process actually prevents the Microprocessor from responding to Remote commands. the Infrared Remote control signals actually manipulate the internal data when the Service Only Switch is pressed on the Deflection PWB. it is mandatory to run Sensor Initialization. INFRARED REMOTE CONTROL INPUT SHOWN IN FIGURE 1: As can be seen in Figure 1. what is happening is that the SRAM must make those additional calculations beyond the 117 made by the Servicer and this is all placed into memory. Magic Focus is activated by pressing the Magic button inside the front control panel door or by the Customer’s Menu. If the Magic Focus button is pressed. and the sensors on the side of the cabinet pick up the transmitted light and generate a DC voltage. When all cycles have been completed. This can be seen during an adjustment. the customer simply presses the Magic Focus button on the front panel or activates it from the customer’s menu and the set begins another preprogrammed production of different light patterns. As the process continues. This is a better process than using waveforms or voltages as it is adjusting using the actual light pattern as see by the customer. then pressing the PIP CH button. This begins a preprogrammed generation of different light patterns. The DC offset voltage is adjusted by several things. The physical placement of the sensors assures that they will not produce a shadow on the screen that can be seen by the customer. The EEPROM only stores the 117 different adjustment points data. If the Interpolation key is pressed on the remote control. activating the Magic Focus will allow the set to correct itself. the digital module manipulates the convergence correction waveforms that it is producing to force the convergence back into the original memorized configuration. “MAGIC FOCUS” SENSORS SHOWN ON FIGURE 1: This process is a joint effort between the digital convergence module and 8 Photo-sensors. If Sensor Initialization is not performed. interpolation no longer has to be made. the set will not allow Magic Focus to operate. Note that this process is using “Light” as it’s source. (Continued on page 3) PAGE 06-02 . the new information must be stored in memory. the set will return to the original signal and the convergence will be corrected. the SRAM interpolates to come up the additional 139 adjustment points for a total of 256 per color. When the Service Technician makes any adjustment. Distinct patterns will be generated in each primary color. So. re-aligns the set to the memorized convergence condition. takes the stored data and converts it to a complicated Convergence correction waveform for each color. EEPROM. The EEPROM data is slow in relationship to the actual deflection raster change.DP-2X DIGITAL CONVERGENCE INTERFACE CIRCUIT EXPLANATION data represents a specific correction signal for that specific location. • Raster Centering. The SRAM is a very fast memory. In most cases. 1st and 2nd sample and hold. just behind the screen. The Raster Centering adjustment actually moves the DC offset voltage for Horizontal and Vertical direction. Magic Focus memory memorizes the characteristics of the light pattern produced by the digital convergence module. during the first application of AC power.

Each amp is routed through the PDS1 connector and arrives at the PDS connector on the DCU where the DCU converts this DC voltage to Digital signals. called solar batteries in the service manual. Now the DCU receives theses commands and interprets them accordingly. QK07 Dig Green and QK08 Dig Blue) to the PPD1. Volume Graphic Bar. 21 and 20 to the Rainforest IC I401 pins 33. about 5 V p/p and about 3uS in length dependant upon there actual horizontal time for display. MAGIC FOCUS SENSORS AND INTERFACE: (8 Sensor Array). These are routed through their buffers (QK06 Dig Red. NOTE: The DP-24 only has one IR Receiver. Adjust the location either up or down for Red. GV is Green Vertical Convergence correction. BH is Blue Horizontal Convergence correction. Adjust the location either left or right for Red. Then it arrives at the Rainforest IC I401 at pins (35 Dig Red. Each of the eight photo cells. 38 and 39. Now the On Screen Display path is from the DCU pins 22. have their own amps which develop the DC potential produced by the photo cells. The Microprocessor is notified at pin 42 when the DCU begins its operation by the BUSY line. 4 Dig Green and 5 Dig Blue). 33 and 32 to the Rainforest IC I401 pins 37. The Convergence Yoke assembly manipulates the Beam in accordance with the correction waveforms produced by the DCU. Adjust the location either left or right for Red. RH is Red Horizontal Convergence correction. the Main Microprocessor knows the DCU is Busy as described before. 34 Dig Green and 33 Dig Blue). Green or Blue or the complementary color Red and Green which creates Yellow. This allows operations of remote from any angle. the Main Microprocessor must ignore remote control commands. When the Service Only switch is pressed. Any combination for these inputs generates either the primary color Red. Service Menu. Adjust the location either up or down for Red. 21 Dig Green and 22 Dig Blue). Main Menu. the internal color amp is saturated and the output is generated to the CRTs. NOTE: All chassis but the DP-24 has two IR Receivers. As long as the BUSY line is active. when the Service Only Switch is pressed. The output for the DCU OSD characters is output through the PPG connector pins (20 Dig Red. When a character pulse arrives at any of these pins. However. Q421 Dig Green and Q420 Dig Blue). OUTPUT STKs: These are output amplifiers that take the correction waveforms generated by the DCU and amplify them to be used by the Convergence Yoke assemblies for each color. DCU (Digital Convergence Unit P/N CS00591) SOURCE FOR OSD: The DCU has to produce graphics as well. CONVERGENCE YOKES: Each CRT has a Deflection Yoke and a Convergence Yoke assembly. These digital signals are used only when the Magic Focus Button is pressed and Magic Focus runs or during Initialization of the sensors. (Continued on page 4) PAGE 06-03 . Adjust the location either left or right for Red. BV is Blue Vertical Convergence correction. PPS1 connector pins (2 Dig Red. 34 and 35. GH is Green Horizontal Convergence correction.DP-2X DIGITAL CONVERGENCE INTERFACE CIRCUIT EXPLANATION EXPLANATION OF THE DIGITAL CONVERGENCE INTERCONNECT DIAGRAM: INFRARED RECEIVER: During normal operations. The Deflection manipulates the beam in accordance to the waveforms produced within the Horizontal Deflection circuit or the Vertical Deflection circuit. the Main Microprocessor ignores the IR signal. ON SCREEN DISPLAY PATH: MICROPROCESSOR SOURCE FOR OSD: The On Screen Display signal path is shown with the normal OSD information such as Channel Numbers. Red and Blue which creates Magenta or Green and Blue which creates Cyan. Adjust the location either up or down for Red. etc… sent from the Main Microprocessor pins 34. (Q422 Dig Red. These are positive going pulses. Then through their buffers. RV is Red Vertical Convergence correction. the IR receiver directs it signal to the Main Microprocessor where it interprets the incoming signal and performs a predefined set of operations.

select Manual. When selected by the customer. the Digital Convergence RAM is cleared.DP-2X DIGITAL CONVERGENCE INTERFACE CIRCUIT EXPLANATION MICROPROCESSOR: The Microprocessor is only involved in the Digital Convergence circuit related to disabling IR (Infrared Remote Control Signals). if after adjusting using this process. When Magic Focus is activated by the customer pressing this switch. To prevent this. They have access to the 117 adjustment points for Red and Blue. • Also the Magic Focus can be started from the Customer’s Menu. PPD1 connector pin 6 to the DCU connector PDS pin 1. If the button is pressed and held down with the TV OFF and the power button is pressed. Under the Magic Focus menu. then the PPS1 connector pin 1 to the Microprocessor I001 notifying that the DCU is busy. The BUSY signal is routed from the DCU out the PDG connector pin 19. CONVERGENCE MUTE: IK02 is the convergence mute IC. the DCU enters the Digital Convergence Adjustment Mode. the customer can no longer use Magic Focus as it will return the set to it’s original condiMagic Focus tion. When this button is pressed with the TV ON. (See below). (9 adjustment points) mode. This low is routed through the PPS1. the same communication is performed to I007 (Level Shift) and a low is sent out pin 1 to the DCU to start Magic Focus. IK02 monitors the +28V line. • When the Customer presses the Magic Focus Switch. This is accessed from the Video Menu and selecting Magic Focus. Green. and Blue colors to correct for Magnet Influences. If it falls too low. the low is sent to the Microprocessor I001 pin 45. The Microprocessor then communicates with I007 pin 8 (Level Shift) and it outputs a low on pin 12 (Magic Sw). pin 3 will output a Mute signal to pin 21 of connector PDS on the Digital Convergence Unit. When the +28V line collapses when power is turned off. (Green is fixed as reference). DIGICON ADJUST: This year. SERVICE ONLY SWITCH: The Service Only Switch is located just in front of the DCU on the Deflection PWB. I401 is only involved with the Digital Convergence circuit related to OSD and Velocity Modulation inhibit during Digital convergence OSD operation in which it inhibits the Luminance from the main video. the Microprocessor ignores IR pulses. it’s possible that the output STKs could be damaged. If the front speaker grills are removed and the front access panel is opened. Video However. the Digital convergence can be adjusted by the customer. the switch will be on the far left hand side. the DCU enters the “MAGIC FOCUS” adjustment mode described earlier. MAGIC FOCUS SWITCH: • Located on the Front Control panel is the Magic Focus switch. This turns off any influence from the DCU related to beam deflection. RAINFOREST IC (Video Processor). to the PDD1 connector pin 1. This is accomplished by the BUSY signal from the DCU. Magnetic centering is performed in the mode as well as the ability to enter the 3X3. Aligns the Red. Adjustment Mode Auto Manual If you want to adjust now Move Sel Select START PAGE 06-04 . The Rainforest IC. When the DCU is put into the Digital Convergence Adjustment Mode (DCAM) or Magic Focus. This starts the Magic Focus function.

DP-23, 23G, 26, 27 & 27D CHASSIS "DIGITAL CONVERGENCE" INTERCONNECTION CIRCUIT DIAGRAM

MAG SW In OSD B 34 OSD G 33 OSD R Dig OSD B Dig OSD G Dig OSD R 35 Dig OSD R 49 YS3 RGB BUSY 5 ~ 11 Not Used OSD G OSD B

I001
Rainforest
Q417 Q418 Q419 Q420 Q421 Q422
43 34 Dig OSD G 33 Dig OSD B 42 39 OSD R 38 OSD G 41 37 OSD B

45 Magic Sw In

I401
B G R Q438
9

Q428 Q433

PSC
5

11

I007
Adj Digicon Busy In IR Signal PWB
BUSY

9

56 Digicon

B To CRTs
7

12

3.3V-5V

8

OSD R 32 44 Magic Sw Out

G R

BUSY

42

Magic Focus

SM09
1 2 3 4 5 22 14 15 16 2 4 1 3 +5V 1 2 From IK01 3 4 5 6 7 8 9 10 11 12 12 6 7 7 6 MAG SW 5 Dig B Dig B 21 4 Dig G Dig G 3 IR-In IR-In 17 17 2 Dig R Dig R 20 "DCAM" Digital Convergence Adjustment Mode GH 11 N/C 10 12 22 1

Ft. Control PWB QK07 QK08

MAG SW Out

IR In

80

Main Up

PDS
+28P 13 BV

PPS2
1 Sw Adj Dig Adj BUSY 13 19 14 BH 18 1

PPD2
SK01 Service Only

1, 3 & 12 Gnd

10 5 15 BV + -

18 16

CYV+ CYV-

PCB
1 3

PDG

IK05
BH 14 6 + -

To Blue Convergence Yokes

1 BUSY

PPS1
QK06

PPD1

UKDG CS00591

11 13 GH + 9 7 17 8 12 4

CYH+ CYH-

6 4

5

8

PCG
CYH+ CYH-28P 6 4

7

PFI V Blk Power Supply PWB From QK01 From IK01 -5V +5V

PFS
H Blk D Size

MAG SW

1

2

3

EFI QM07

Stby +5V

Digital Convergence Unit "DCU"

Deflection PWB

3 17 8 12 4 CYV-

QM06

To Green Convergence Yokes

Signal PWB

1

2

"Mounted on Deflection PWB"
16

GV GV 15

18 + CYV+ 16

1

IR Out HMO2

IR Receiver GND S7 S6 S5 S4 S3 S2 S1 S0 S0

3

PDS1
+5V Digital
MAG SW Gnd S7 S6 S5 S4 S3 S2 S1 S0

Sensor PWB

PDS
1 10 2 3 4 5 6 7 8 9 21 Mute 20 RH 19 RV 14

IK04
RV + -

11 13 RH 6 9 + 10 5 7

CYV+ CYVCYH+

PCR
1 3 4 CYH6

PFR

1

2

3

EFR

To Red Convergence Yokes

1

2

IR Out HMO3

3

IR Receiver

LED S0 ~S7 8 Total Sensors

Normal "Lo"
3

IK02
RK22 DK53
2

1

+28V

PAGE 06-05

RK24

RK23

DP-24 CHASSIS "DIGITAL CONVERGENCE" INTERCONNECTION CIRCUIT DIAGRAM I001
Rainforest
Q417 Q418 Q419
Dig OSD B Dig OSD G Dig OSD R 35 Dig OSD R 49 YS3 RGB BUSY 5 ~ 11 Not Used 38 OSD G OSD R Dig OSD B Dig OSD G 43 42 39 41 37 OSD B

MAG SW In OSD B 34 OSD G 33 OSD R OSD G OSD B

45 Magic Sw In

I401
B G R Q438
9

Q428 Q433

PSC
5

11

I007
Adj Q420 Q421 Q422
34 33

9

56 Digicon

B To CRTs
7

12

3.3V-5V Digicon Busy In IR Signal PWB
BUSY

8

OSD R 32 44 Magic Sw Out

G R

BUSY

42

Magic Focus

SM09
1 2 3 4 5 22 14 15 16 2 4 1 3 +5V 1 2 From IK01 3 4 5 6 7 8 9 10 11 12 12 6 7 7 6 MAG SW 5 Dig B Dig B 21 4 Dig G Dig G 3 IR-In IR-In 17 17 2 Dig R Dig R 20 GH 1

Ft. Control PWB QK07 QK08
11 N/C 10 12 22

MAG SW Out

IR In

80

Main Up

PDS
+28P 13 BV

PPS2
1 Sw Adj Dig Adj BUSY 13 19 14 BH 18 1

PPD2
SK01 Service Only

1, 3 & 12 Gnd

10 5 15 BV + -

18 16

CYV+ CYV-

PCB
1 3

PDG

IK05
BH 14 6 + -

To Blue Convergence Yokes

9 BUSY

PPS1
QK06
"DCAM" Digital Convergence Adjustment Mode

PPD1

UKDG CS00591

11 13 GH + 9 7 17 8 12 4

CYH+ CYH-

6 4

5

2

PCG
CYH+ CYH-28P 6 4

3

QM05

PFS
H Blk D Size V Blk Power Supply PWB From QK01 From IK01 -5V +5V

MAG SW

Digital Convergence Unit "DCU"

QM01

Stby +5V

Deflection PWB

3 17 8 12 4 CYV-

To Green Convergence Yokes

Signal PWB

1

2

"Mounted on Deflection PWB"
16

GV GV 15

18 + CYV+ 16

1

IR Out HMO1

IR Receiver GND S7 S6 S5 S4 S3 S2 S1 S0 S0

3

PDS1
+5V Digital
MAG SW Gnd S7 S6 S5 S4 S3 S2 S1 S0

Sensor PWB

PDS
1 10 2 3 4 5 6 7 8 9 21 Mute 20 RH 19 RV 14

IK04
RV + -

11 13 RH 6 9 + 10 5 7

CYV+ CYVCYH+

PCR
1 3 4 CYH6

To Red Convergence Yokes

LED S0 ~S7 8 Total Sensors

Normal "Lo"
3

IK02
DK53
2

1

+28V

PAGE 06-06

RK23 RK24

DP-23, DP-23G & DP-24 REMOTE CONTROL CLU-4321UG (p/n HL01831)

POWER ROM READ (Read Old ROM Data) TV CBL/SAT DVD/VCR ROM WRITE PIP VIDEO SWAP PIP MODE PIP CH FREEZE RASTER POSITION MENU REMOVE COLOR

ADJUSTMENT

SELECT

INITIALIZE

MUTE

EXIT

LAST CH

CURSOR UP

VOL

CH

CROSSHATCH / VIDEO (5 Times)

CURSOR DOWN CURSOR LEFT

1 4 7

2 5 8 0
VID2 VID5 VID3

3 6 9
INFO

CURSOR RIGHT

BLUE Select 13X9 Mode (5 Times)

ANT

GREEN Select 3X3 Mode (5 Times) RED Select 7X5 Mode (5 Times)

VID1

VID4

REC

ASPECT VIRTUAL HD

PHASE

HITACHI
CLU-4321UG

CALCULATION *VCR MODE ONLY

PAGE 06-07

DP-26 REMOTE CONTROL CLU-5721 TSI (P/N HL01821) POWER TV VCR CBL SAT SOURCE WIZARD CURSOR UP DVD AV1 AV2 AV3 CURSOR DOWN 1 2 5 8 0 A/V NET GUIDE 3 6 9 INFO CURSOR LEFT 4 7 CURSOR RIGHT RED (7 X 5) GREEN (3 X 3) CROSSHATCH VIDEO CORRECTION BUTTONS RASTER PHASE SLEEP ANT ASPECT BLUE (13X9) REMOVE COLOR C.S. U MEN EXIT VOL SELECT CH SV CS VID 1 VID 2 MUT E LAS T CH HD SC VID 5 VID VID 3 4 CALCULATE INITIALIZE PIP MODE + PIP CH WRITE TO ROM PRESS (2X) PIP PIP CH FREEZE PIP-MODE PIP ACCESS SWAP VIDEO CENTERING RASTER POSITION READ OLD ROM DATA PRESS (2X) REC HITACHI CLU-5721TSI PAGE 06-08 .

C. A/V NET 3 6 9 INFO CURSOR LEFT 4 7 CURSOR RIGHT RED (7 X 5) GREEN (3 X 3) CROSSHATCH VIDEO CORRECTION BUTTONS RASTER PHASE SLEEP ANT BLUE (13X9) REMOVE COLOR ASPECT V IRT UAL H D U MEN EXIT VOL SELECT CH SV CS VID 1 MUT E VC RP LU S+ VID 2 LAS T CH /T IDE V HD SC VID 5 GU VID VID 3 4 CALCULATE INITIALIZE PIP MODE + PIP CH WRITE TO ROM PRESS (2X) PIP PIP CH FREEZE PIP-MODE PIP ACCESS SWAP VIDEO CENTERING RASTER POSITION READ OLD ROM DATA PRESS (2X) REC HITACHI CLU-5722TSI PAGE 06-09 .DP-27 & DP-27D REMOTE CONTROL CLU-5722 TSI (P/N HL01822) POWER TV VCR CBL SAT SOURCE WIZARD CURSOR UP DVD CD TAPE AMP CURSOR DOWN 1 2 5 8 0 C.

7 V.7 34.5 76.1 69.NOTE: Aspect may not be correct but dimensions are correct.1 34.5 H.5 76.5 25.5 76.1 69.5 76.1 69.5 76.5 76. SIZE 76.1 69.1 69.5 17 PART NUMBER H312271 RED OFFSET = 25mm BLUE OFFSET = 30mm VERTICAL SIZE = 460mm HORIZONTAL SIZE = 870mm 43FWX20B DP-24 Chassis PAGE 06-10 . SIZE Centering Offset R B 535 76.5 76.5 76.5 69. DIGITAL CONVERGENCE OVERLAY DIMENSIONS 43 inch OVERLAY DIMENSIONS NORMAL MODE 952 17 25.

0 74.8 81.2 PART NUMBER H312275 RED OFFSET = 25mm BLUE OFFSET = 35mm VERTICAL SIZE = 505mm HORIZONTAL SIZE = 930mm 46F500 DP-23K Chassis PAGE 06-11 .8 25.8 81.NOTE: Aspect may not be correct but dimensions are correct.0 74.7 37.8 81.0 74.8 81.0 74.0 74.8 81.0 74. SIZE Centering Offset R B 573 81. SIZE 81.5 V. DIGITAL CONVERGENCE OVERLAY DIMENSIONS 46 inch OVERLAY DIMENSIONS NORMAL MODE 1018 18.8 81.8 81.8 18.0 37.8 H.2 81.0 27.

THESE HAVE BEEN CHANGED.5 V.0 82.8 90.8 90.0 82.0 41.8 90.5 41. 51XWX20B OVERLAY DIMENSIONS NORMAL MODE 1129 19.0 82. SIZE 90.0 82. SIZE Centering Offset R B 635 90.0 82.NOTE: Aspect may not be correct but dimensions are correct. 51GWX20B.8 30. 51SWX20B DP-27 Chassis 51XWX20B DP-26 Chassis PAGE 06-12 .7 PART NUMBER H312272 RED OFFSET = 20mm BLUE OFFSET = 35mm VERTICAL SIZE = 560mm HORIZONTAL SIZE = 1020mm DP-26 & 27/27 HORIZONTAL SIZE = 1040mm 51UWX20B DP-23 Chassis 51GWX20B DP-23G Chassis NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26 & 27.8 90.8 90.7 90. VALUE SHOWN IS CORRECT.8 90.8 90. 51UWX20B.8 19.0 30.8 H. DIGITAL CONVERGENCE OVERLAY DIMENSIONS 51SWX20B.0 82.

DIGITAL CONVERGENCE OVERLAY DIMENSIONS 57SWX20B.7 91.5 101.8 34. 57GWX20B.7 91. 27 & 27D.5 101.0 101. THESE HAVE BEEN CHANGED.0 PART NUMBER H312273 RED OFFSET = 20mm BLUE OFFSET = 35mm VERTICAL SIZE = 625mm HORIZONTAL SIZE = 1140mm DP-26 & 27/27/27D HORIZONTAL SIZE = 1160mm 57UWX02B DP-23 Chassis 57GWX20B DP-23G Chassis NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26.5 34.7 91.5 101.8 91.5 101.5 22. 57SWX20B DP-27 Chassis 57TWX20B DP-27D Chassis 57XWX20B DP-26 Chassis PAGE 06-13 .7 91.7 91. 57XWX20B OVERLAY DIMENSIONS NORMAL MODE 1262 22. VALUE SHOWN IS CORRECT. SIZE 101. 57UWX02B.1 45. 57TWX20B.5 101. SIZE Centering Offset R B 710 H.7 45.5 101.NOTE: Aspect may not be correct but dimensions are correct.5 101.1 V.5 101.

6 52.1 38. VALUE SHOWN IS CORRECT.3 115.7 115.7 38. 65SWX20B.NOTE: Aspect may not be correct but dimensions are correct.6 104.6 104. THESE HAVE BEEN CHANGED.6 52.7 115.7 115. SIZE 115.7 115. 27 & 27D. 65TWX20B.6 104.7 115.6 104.1 104.6 104.6 V. 65XWX20B OVERLAY DIMENSIONS NORMAL MODE 1439 25. SIZE Centering Offset R B 809 H.7 115. 65SWX20B DP-27 Chassis 65TWX20B DP-27D Chassis 65XWX20B DP-26 Chassis PAGE 06-14 .7 115.7 115.7 PART NUMBER H312274 RED OFFSET = 20mm BLUE OFFSET = 35mm VERTICAL SIZE = 710mm HORIZONTAL SIZE = 1325mm NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26.7 19.

ADJUSTMENT INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 7 .

THIS PAGE LEFT BLANK .

6. Power should be Off 2. Position Adjust (Fine) Screen Format Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Normal Mode Signal NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC NTSC DCU Data N/A N/A N/A N/A CLEAR CLEAR CLEAR CLEAR CLEAR N/A N/A N/A N/A N/A CLEAR N/A N/A N/A N/A N/A N/A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Note: To enter the Service I2C Menu. Press the “POWER ON” button while still holding the “INPUT “ button. DP-2X SERVICE ADJUSTMENT ORDER “PREHEAT BEFORE BEGINNING” Order Adjustment Item Pre HEAT (30 Minutes) Cut Off DCU Phase Data Setting Horz.DP-2X CHASSIS ADJUSTMENT ORDER It is necessary to follow an order when doing adjustments in the DP-2X chassis. Use the Cursor Up/Down to navigate. Size Adjust Beam Form Lens Focus Adjust Static Focus Adjust DCU Character Set Up DCU Sensor Position Convergence Alignment Sensor Initialize Blue Defocus White Balance Adjustment Sub Brightness Adjustment Sub Picture Adjustment Horz. 1. Use the Cursor Right/Left button to manipulate the Data Values within the Adjustment. release both buttons. 3. Position Adj. 5. PAGE 07-01 . When the power on LED lights. (Coarse) Raster Tilt Beam Alignment Raster Position Vertical Size Adjust Horz. Press and Hole the “INPUT” button on the front control panel. 4.

The Service Menu is displayed. Focus VR on focus pack. Before Pre Heat Run. Pre Set fully counter clockwise. FOCUS VR SCREEN VR Screen VR R G Focus VR B R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-02 . ADJUSTMENT VR TO CONDITION AS SHOWN: 1.DP-2X CHASSIS PRE-HEAT RUN ADJUSTMENTS 3.) 2. position. Allow set to operate at Pre-set the Green DRV and Red DRV to 3F. Enter I2C Service Menu. This least 30 Minutes before is considered “Center” beginning adjustments. SCREEN VR ON FOCUS PACK. (With power Off. PRESET EACH Pre Set fully clockwise. press the INPUT button on front panel and then press the POWER ON button then release.

on remote. (With power Off. 9) Exit SERVICE by press3) Set G DRV (COOL) to ing the cursor on remote to center data value (3F). Mode. Mode. Screen VR should be INPUT button on front turned clockwise gradually panel and then press the until that particular color POWER ON button then is barely visible. • Room Light should be minimal. and B CUTOFF 10)Exit SERVICE MENU by (COOL) data settings to pressing the MENU key [80]. Screen VR R G Focus VR B R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-03 . the left [◄ ]. 6) Choose SERVICE item [1] of I2C ADJ. The Service Menu is displayed. press the 7) Adjust any Screen VR. Select ADJUSTMENT CURSOR RIGHT [ ] and PROCEDURE: the Vertical will collapses. center data value (3F). • Be sure Screen Color Temperature setting is in the COOL mode on Customer’s Menu. 1) Go to I2C ADJ. 5) Adjust Screen VRs on Focus Pack fully counter clock wise. release.) ADJUSTMENT PREPARATION: • Pre Heat Run should be finished. G.DP-2X CHASSIS CUT-OFF (SCREENS) ADJUSTMENT 8) Repeat for the other two 2) Set R DRV (COOL) to colors. 4) Set R.

• PTSG connector on GREEN CRT PWB. FOCUS ADJUSTMENT: 1) Short the 2pin subminiature connector on the CRT PWB (PTS). • PTSB connector on BLUE CRT PWB. (The adjustment order of R. Screen VR R G Focus VR B R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-04 . to remove any color not being adjusted and adjust one color at a time.) 2) Adjust the Focus VR for Red until Focus is achieved.) 3) Repeat for Blue and Green. G and B is just an example. NOTE: • PTSR connector on RED CRT PWB.DP-2X CHASSIS PRE-FOCUS ADJUSTMENT ADJUSTMENT PREPARATION: A) Pre Heat Run should be finished. (A Fine Adjustment will be made later.

Adjustment Preparation: • Cut Off adjustment should 6) Adjust data value using the keys indicated in the be finished. 9) When Green dots are displayed. Contrast Max. (This is the Phase *DCA stands for (Digital Convergence Adjustment) PHASE MODE ADJUST USING 4 and 6 keys on Remote 2 and 5 keys on Remote Cursor Left and Right on Remote Cursor Up and Down on Remote Display Format NORMAL Address PH-H PH-V CR-H CR-V Data Value CD 04 35 0A PAGE 07-05 . 5) Then press the EXIT key. Adjustment Procedure: Exiting Adjustment Mode: NORMAL MODE 1) Receive any NTSC signal. 7) Press AV NET key on remote control. Cross hatch appears. chart.DP-2X CHASSIS DCU CROSSHATCH PHASE ADJUSTMENT adjustment mode). 2) Screen Format is Normal 3) Press the SERVICE 8) Press PIP MODE key ONLY switch on the DeTWICE to store the flection/Power PWB to information. until the data • Video Control: Brightness matches the values indi90%. cated in the chart. press the 4) Press the A/V NET key MUTE key twice to reon the Remote. Green turn to DCAM grid. enter DCAM.

NORMAL MODE: 6) Enter the I2C Service 1) Receive any NTSC crossMenu and select Item H hair signal. 4) Mark the center of the Adjustment Preparation: Digital Convergence • Video Control: Brightness Crosshatch Pattern with 90%. POSI and adjust the data so that the center of 2) Screen Format is NORVideo matches the locaMAL. I2C adjustment menu will appear. vergence PWB and display the Digital Conver. with Power Off. then press the POWER button and release. • Contrast Max. PAGE 07-06 . finger.DP-2X CHASSIS HORIZONTAL PHASE (COARSE) ADJUSTMENT NOTE: To enter the I2C Bus alignment menu. tion of the Digital Cross3) Press the SERVICE hatch pattern noted in step ONLY switch on the con{4}. 5) Press the SERVICE ONLY switch to return to Adjustment Procedure normal mode. press the INPUT button and hold it down.7) Exit from the I2C Menu. gence Crosshatch pattern.

After Completion: 8) Tighten DY Yoke Screws to 12+/-2 kg-cm. 5) [+/. 4) Remove cover or PTS short from RED CRT and 10)Turn the power off. 3) [+/. • Receive the Cross-Hatch Signal • VIDEO CONTROLS: Factory Preset. align RED with GREEN. press and hold the SERVICE ONLY switch on the Convergence PWB. Align BLUE with GREEN.1mm tolerance when compared to Green] Adjustment Procedure : GREEN: 1) Apply covers to the RED and BLUE lenses or short the 2P Sub Mini connector [PTS] on R&B CRT PWB to produce only GREEN. 2) Turn the Green deflection yoke and adjust the TILT until the green is level. See diagram. 9) REMOVE ALL COVERS or SHORTS on the PTS RED: connectors.DP-2X CHASSIS TILT (RASTER INCLINATION) ADJUSTMENT Adjustment Preparation: • The set can face any direction. BLUE: 6) Remove cover or PTS short from BLUE and cover the RED CRT. • SCREEN FORMAT: should be NORMAL mode. (Turn power off. 7) [+/. • The Digital Convergence RAM should be cleared. • The lens focus should have been coarse adjusted. then press the POWER button).1mm tolerance when compared to Green] l =< 2mm l Vertical Center axis of Cross-Hair signal PAGE 07-07 . • The electrical focus should have been coarse adjusted.2mm tolerance].

8) Conduct beam alignment for ADJUSTMENT BEAM SHAPE & TABS ALIGNMENT MAGNET 4-POLE BEAM SHAPE CORRECTION MAGNET ZERO FIELD SPACER (NO ADJUSTMENT) PICTURE TUBE SIDE The figure shows that the long and short knobs of the 2P magnet are aligned. don’t move. (If available). • Receive cross hatch signals. • Brightness: 90% • Contrast Max. 3) Turn the Green (G) static focus 11) Upon completion of adjustment. This is just shown for reference. H. Adjustment procedure: 1) Green (G) tube beam alignment adjustment: Short-circuit 2P subminiature connector plug pins of Red (R) and Blue (B) on the CRT boards and project only Green (G). Figure 1 Red and Blue in the same way. 5) Turn two Beam alignment magnet in any desired direction and move cross hatch center to position found in step (3).DP-2X CHASSIS BEAM ALIGNMENT ADJUSTMENT Preparation for adjustment: • Pre Heat. 2-POLE BEAM ALIGNMENT MAGNET PAGE 07-08 . Figure 2 NOTE: This is the Centering Magnet not the Beam Alignment Magnets. 2) Put Green (G) tube beam alignment magnet to the cancel state 9) Red (R) focus on focus pack. to assure they of cross hatch center on screen. repeat steps [2] through [6]. 6) If image position does not shift when Green static focus VR is turned. (See Figure 2 below). but the principle remains the same. DCU Phase Data. 10) Blue (B) focus on focus pack. adjustment complete. place a small amount of VR counterclockwise all the white paint on the beam alignway and make sure of position ment magnets. Pre-optical focus. as shown in Figure 1. 4) Turn Green (G) static focus VR clockwise all the way. POSI Course and Raster Tilt adjustment should be completed. • SCREEN FORMAT should • be NORMAL mode. or dot pattern • RASTER TILT adjustment should be finished. this is the cancel state. 7) If image position does move.

Also see Overlay Dimensions for further details. Remember Green is Centered. • Video Control should be set at Factory Preset condition. Red is to the left of Green and Blue is to the right of Green as indicated below. DCU Grid will appear without convergence correction. While holding the Service Only Switch down. press the Service Only switch on the Convergence PWB.DP-2X CHASSIS RED AND BLUE RASTER OFF SET ADJUSTMENT INFORMATION: Raster Off set is necessary to conserve Memory allocation. Offset Value Table DP-2X 43 inch 46 inch 51 inch 57 inch 65 inch L1 25mm 25mm 20mm 20mm 20mm L2 30mm 35mm 35mm 35mm 35mm Red Geometric Vertical Center L1 Green Blue L2 Geometric Horizontal PAGE 07-09 . • Parameters are +/. press the Power On button and Release. • All Vertical positions are geometric center of screen. with each press of the Service Only Switch. NOTE: After entering DCAM. Turn the centering magnets of Red.2mm. the picture will toggle between Video mode and DCU Grid. (DCU data is cleared). It is very important to remember that the Red is off-set Left of Center and Blue is off-set Right of center. • Static Focus adjustment should be finished. Adjustment Procedure 1. Please use the following information to accurately offset Red and Blue from center. Preparation for adjustment: • With Power Off. Green and Blue and adjust so that the center point of the cross-hatch pattern satisfies the diagram and Offset Value Table below.

with Alternate Method: each press of the Service Adjust Vertical Size until the Only Switch. Distance is important. l 5th LINE FROM CENTER Vertical Hash Mark DP-2X 43 inch 46 inch 51 inch 57 inch 65 inch L= 460 mm 505 mm 560 mm 625 mm 710 mm PAGE 07-10 .quency is shared between Switch down. NOTE: After entering DCAM. (See Figure Below) Power On button and Remodes. not ton to remove Red and 2) With Power Off. lease. press the Normal and 16X9 HD lay. DCU Grid will appear without convergence correction. press the centering. and press the MENU but. the picture size matches the chart below. Service Only switch on the Convergence PWB.DP-2X VERTICAL SIZE ADJUSTMENT NOTE: Centering magnet 3) Select GREEN (A/CH) VERTICAL SIZE: 1) Receive an NTSC signal. Blue. While 4) Adjust using R607 (Vertical Size Adj.may be moved to facilitate. will toggle between Video mode and DCU Grid. VERTICAL SIZE Vertical Hash Mark Between the horizontal line at the top and the bottom. VR) to NOTE: The Vertical Freholding the Service Only match marks on the Over.

(Digital Convergence Adjustment Mode. • Project only the Green raster by selecting Green Adjustment mode and pressing the MENU button on remote. With Power Off. Adjust using R711 (Horz. The Horizontal Size adjustment has been increased by 20mm on the 51” and 57” and 25mm on the 61”.) NOTE: On the DP-26.DP-2X HORIZONTAL SIZE ADJUSTMENT HORIZONTAL SIZE: (Display Mode NORMAL) • Install the correct Overlay. DP-27/27D L= — — 1040 mm 1160 mm 1325 mm PAGE 07-11 . 25 L= 870 mm 930 mm 1020 mm 1140 mm 1300 mm DP-26. with each press of the Service Only Switch. 27 and 27D Overlay Hash Mark DCAM. press the Power On button and Release. 2) Press “Power Off” to exit HORIZONTAL SIZE DO NOT USE HASH MARKS ON: DP-26. Size Adj. DP27 and DP-27D DO NOT USE THE MARKS ON THE OVERLAY. 6th Line From Center l Between Outside Lines 6th Line From Center DP-2X 43 inch 46 inch 51 inch 57 inch 65 inch DP-23/G. the picture will toggle between Video mode and DCU Grid. • Digital Convergence RAM should be cleared. 27 and 27D Overlay Hash Mark DO NOT USE HASH MARKS ON: DP-26. NOTE: After entering DCAM. press the Service Only switch on the Convergence PWB. 24/K. While holding the Service Only Switch down. DCU Grid will appear without convergence correction. VR) Adjust Horizontal Size until the size matches the chart below. • Input an NTSC Signal. ADJUSTMENT 1.

H. Raster Position. Cut-Off. Beam Alignment. • Brightness: 90%. 3) Turn the green static focus VR fully clockwise. Raster Tilt. pleted. Vertical and Horizontal Size adjustment should be completed. DCU Phase Data. • Input a NTSC DOT signal. 5) Also adjust the Red and Blue CRT beam shapes according to Adjustments procedure: the steps (1) to (4). Pre-optical focus. PICTURE TUBE SIDE ADJUSTMENT TABS b 4-POLE BEAM SHAPE CORRECTION MAGNET ZERO FIELD SPACER (NO ADJUSTMENT) a Figure 1 Figure 2 2-POLE BEAM ALIGNMENT MAGNET PAGE 07-12 . 1) Green CRT beam shape adjust6) After the adjustment is comment. Contrast: Max. • Pre Heat. G and B static 2) Short-circuit 2P sub-mini conVRs to the Best Focus point. 4) Make the dot at the screen center a true circle. nectors on Red and Blue CRT PWB to project only the Green beam.DP-2X BEAM FORM ADJUSTMENT BEAM SHAPE (FORM) Preparation for adjustment • IMPORTANT: Screen format should be “NORMAL“. Pos Course. return R. using the 4-Pole magnet shown in Figure 2 below.

tighten the fixing fixing screw on the lens screws for each lens.W.DP-2X LENS FOCUS ADJUSTMENT Preparation for adjustment 2) (See Figure 1) Loosen the 4) After completing optical focus.) Lenses. 6) Repeat Electrical Focus if 3) Rotate the cylinder back • Brightness = 50% necessary. TS. G and B is just to the focus rings on the an example. assembly so that the lens • Receive the Cross-hatch cylinder can be turned. Remove a time. while observing the Cross-Hatch. (Be 5) When adjusting the Green pattern signal. (The adjustment the panels to allow access order of R. as this ment should have been dominant of the color guns may cause movement of completed. Adjustment procedure (Observe the center of the screen). tightening. and any error will be easthe lens cylinder when • Deflection Yoke tilt should ily seen. Optical focus.B. Green is the most screw too much.) have been adjusted. FIXING SCREW Or FIXING WING NUT LENS ASSEMBLY R. 1) Short the 2 pin subminiature connector on the CRT P. to pro• Hint: Located just below duce only the color being the screen are the two adjusted and adjust one at wooden panels. B. be very careful not to loosen the • The electrical focus adjustcareful. and forth to obtain the best • Contrast = 60% to 70% focus point. G. Le Figure 1 PAGE 07-13 ns C yl in d er .

miniature connector on the 3) Repeat for Blue and CRT PWB (PTS).DP-2X STATIC FOCUS ADJUSTMENT ADJUSTMENT PREPARATION: • Pre Heat Run should be finished. (The adjustment order of R. to Green.) Screen VR Screen VRs R G Focus VR B Focus VRs R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-14 . G and B is just an example. 2) Adjust the Focus VR for FOCUS ADJUSTMENT: Red until maximum Focus 1) Short the 2pin subis achieved. remove any color not being adjusted and adjust one color at a time.

Receive NTSC RF or Video Signal. START V. BLK-RV H. When picture appears. LEVEL ADJ. PARAMETER table. 7.PARAMETER —–> ADJ. DISP Data as follows. NOISE PHASE MOT H. Press the Service Only Switch to exit from DCAM. Confirm Data values in accordance with TABLE 1 to the right.WAIT : 2f INT. 2. PARAMETER mode is displayed as following. To make data value changes. (DCU grid is displayed without convergence correction data. the ADJ.DISP DEMO WAIT INT. SQUEEZE INT STEP 1 INT STEP 2 INT BAR INT DELAY MGF STEP 1 MGF STEP 2 MGF BAR MGF DELAY SEL. 2. Press the MUTE button 3 times exit back to DCAM. With Power Off. applied when a new DCU is being replaced. then press the Power On/Off and release. DISPLAY ADJ. BLK-H PON DELAY IR-CODE INITIAL 50 MGF 50 CENTER 50 STAT 50 DYNA 50 ADJ. SQUEEZE :00 NOTE: Press the Cursor Left and Right Button to change the ADJ. Green dots appear after completion of operation. Use the Cursor Up and Down keys to scroll through the ADJ. LINE WID ADD LINE SENSOR CK PORT 0 PORT 1 PORT 2 PORT 3 PORT 4 PORT 5 PORT 6 PORT 7 AD LEVEL CENT. DISP. • First press. Press the PIP MODE key 2 time to write the changed data into EEPROM. DISP. ADJ PARAMETER ROM WRITE ? Is displayed for alarm. BLK-BV H. 6. (One additional line appears near the top and bottom. TIMS ADJ. Press the FREEZE key on R/ C. BAL E. BLK-GV H. PAGE 07-15 . Press and HOLD the SERVICE ONLY button on the Convergence/ Focus PWB. START. STAT. Adjustment Procedure: 1. • 77 for HITACHI DATA VALUES CONFIRMATION: 3. TABLE 1 DP23 DP23G DP23K Not 46” DP27 / G DP26 Normal 77 2F 03 F0 02 06 28 01 00 06 1B 01 00 1F 09 00 07 06 05 04 03 02 01 00 03 00 00 60 05 0A 60 00 01 00 00 0C 00 9E 96 FE FE 9F DP-23K 46” Only DP24 Normal 77 2F 03 F0 02 06 25 01 00 06 1B 01 00 1F 09 00 07 06 05 04 03 02 01 00 03 01 00 60 05 0A 60 00 01 00 00 0C 00 9E 96 FE FE 9F Parameter ADJ. : 77 DEMO.DP-2X CHASSIS MAGIC FOCUS “CHARACTER SET UP” NOTE: This instruction should be 4. 5. Press the Cursor Left and Right keys. : 03 V. ADJ. Press the PIP CH key. • 2nd press writes data into EEPROM. Adjustment Preparation: 1. release Service Only switch. Power set off.

and Down buttons to change the Pattern Position Data in Vertical Direction. Set the Data Values as shown in the Table below. each press on the 6 Key. Power set off. 6. Correction data. Use the following Keys to switch color of patterns. ADJ PARAMERH : 0A TER ? ROM WRITE ? Is disRV : FF 7 3 played for alarm. • First press. Each model has a specific set up pattern position. NORMAL MODE: DP-23. Press the Service Only button to bring up Internal Crosshatch. Press the Service Only Switch Arrow rotates clockwise with to exit DCAM. A/V NET key (all but DP-24) VID2 in (CBL/SAT) (DP-24) The PATTERN mode is displayed as following. (One additional line appears near the top and bottom. Use the 6 Key to rotate Arrow. • 2nd press writes data into EEPROM. DP-23K Not 46”. DP-23G. until picture appears. Adjustment Procedure: 1. Press the FREEZE key on R/ C. then release both. 6 5 4 8. 7. Press and HOLD the SERVICE ONLY button on the Convergence/ Focus PWB. 4. Press the MUTE button 3 times exit Pattern Mode. (Picture is displayed without conv. Press the PIP MODE key 2 times to write the changed data 0 1 2 into EEPROM. then press the Power On/Off at the same time. Adjustment Preparation: • Receive NTSC RF or Video Signal.) 2. • With Power Off. DP-26. NOTE: This instruction shows how to set up the pattern position for Intellisense. Press the Cursor Up Press the. 9.DP-2X CHASSIS MAGIC FOCUS “PATTERN SET UP” NOTE: This instruction should be applied when a new DCU is being replaced. • • • 3. 10. DP-27 and DP-27G 0 RH RV GH GV BH BV 04 03 04 04 06 06 1 02 00 00 00 FE 00 2 FC 07 FE 06 FC 04 3 FE 01 00 01 00 01 4 FC FB FE FC FE FE 5 02 01 00 01 FE 01 6 02 FE 02 FE 04 FB 7 02 01 02 01 02 01 NORMAL MODE: DP-24 and (DP-23K 46”) DP-23 value in ( ) 0 RH RV GH GV BH BV 04 03 04 04 04 06 1 02 01 00 01 FC 01 2 FE 06 FE 05 FE 04 3 00 01 00 01 02 01 4 FE FC FE FD 00 FF 5 02 01 00 01 FE 01 6 04 FF 02 (04) FD 04 FD 7 02 01 02 01 02 01 PAGE 07-16 . INFO : GREEN 0 : RED ANT : BLUE Press the Cursor Left and Right buttons to change the Pattern Position Data in horizontal Direction. Green dots appear after completion of operation. • • • 5.

5 76.8 81.8 81.8 81. SIZE Centering Offset R B 573 81. 952 17 25.5 69.1 69.1 69.0 74.0 74.5 76. SIZE 81.8 25.5 17 PART NUMBER H312271 RED OFFSET = 25mm BLUE OFFSET = 30mm VERTICAL SIZE = 460mm HORIZONTAL SIZE = 870mm 46F500 DP-23K Only OVERLAY DIMENSIONS NORMAL MODE NOTE: Aspect may not be correct but dimensions are correct. SIZE Centering Offset R B 535 76.0 74.1 34.8 H.1 69.5 25.5 76.0 74.0 74. SIZE 76.5 76.2 81.8 81.5 H.8 81.7 V.7 34.2 PART NUMBER H312275 RED OFFSET = 25mm BLUE OFFSET = 35mm VERTICAL SIZE = 505mm HORIZONTAL SIZE = 930mm PAGE 07-17 .8 81.7 37.5 76.5 76.1 69.0 74.5 76.5 V.5 76. 1018 18.0 37.0 27.8 18.8 81.1 69.DP-2X DIGITAL CONVERGENCE OVERLAY DIMENSIONS 43FWX20B DP-23 Only OVERLAY DIMENSIONS NORMAL MODE NOTE: Aspect may not be correct but dimensions are correct.

DIGITAL CONVERGENCE OVERLAY DIMENSIONS 51SWX20B. 51UWX20B.0 41.8 19.8 90.0 82.0 82. 51XWX20B OVERLAY DIMENSIONS NORMAL MODE 1129 19.0 30.0 82.8 H.8 30.8 90.8 90. 51GWX20B.7 90.8 90.NOTE: Aspect may not be correct but dimensions are correct. VALUE SHOWN IS CORRECT.0 82.5 V. SIZE 90.0 82.5 41.8 90. 51SWX20B DP-27 Chassis 51XWX20B DP-26 Chassis PAGE 07-18 .8 90.7 PART NUMBER H312272 RED OFFSET = 20mm BLUE OFFSET = 35mm VERTICAL SIZE = 560mm HORIZONTAL SIZE = 1020mm DP-26 & 27/27 HORIZONTAL SIZE = 1040mm 51UWX20B DP-23 Chassis 51GWX20B DP-23G Chassis NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26 & 27.8 90. SIZE Centering Offset R B 635 90. THESE HAVE BEEN CHANGED.0 82.

NOTE: Aspect may not be correct but dimensions are correct.5 101.5 101.8 91.7 45.1 45. 57UWX02B.5 101. 57XWX20B OVERLAY DIMENSIONS NORMAL MODE 1262 22.5 101. DIGITAL CONVERGENCE OVERLAY DIMENSIONS 57SWX20B. 27 & 27D.5 101.5 101. 57GWX20B. 57TWX20B. SIZE Centering Offset R B 710 H.5 101.5 22.7 91.7 91.1 V. THESE HAVE BEEN CHANGED. SIZE 101.0 PART NUMBER H312273 RED OFFSET = 20mm BLUE OFFSET = 35mm VERTICAL SIZE = 625mm HORIZONTAL SIZE = 1140mm DP-26 & 27/27/27D HORIZONTAL SIZE = 1160mm 57UWX02B DP-23 Chassis 57GWX20B DP-23G Chassis NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26.7 91.5 34.8 34. VALUE SHOWN IS CORRECT.7 91.0 101.7 91.5 101. 57SWX20B DP-27 Chassis 57TWX20B DP-27D Chassis 57XWX20B DP-26 Chassis PAGE 07-19 .

NOTE: Aspect may not be correct but dimensions are correct. 65SWX20B, 65TWX20B, 65XWX20B OVERLAY DIMENSIONS NORMAL MODE

1439 25.3 115.7 115.7 115.7 115.7 115.7 38.6 52.1 104.6 104.6 104.6 104.6 104.6 104.6 52.1 38.6 V. SIZE Centering Offset R B 809 H. SIZE 115.7 115.7 115.7 115.7 115.7 19.7

PART NUMBER H312274

RED OFFSET = 20mm BLUE OFFSET = 35mm

VERTICAL SIZE = 710mm HORIZONTAL SIZE = 1325mm

NOTE: DO NOT USE THE HORIZONTAL SIZE MARKERS ON THE OVERLAY FOR DP-26, 27 & 27D. THESE HAVE BEEN CHANGED. VALUE SHOWN IS CORRECT. 65SWX20B DP-27 Chassis 65TWX20B DP-27D Chassis 65XWX20B DP-26 Chassis

PAGE 07-20

DP-23, DP-23G & DP-24 REMOTE CONTROL CLU-4321UG (p/n HL01831) 43FDX20B, 51UWX20B, 57UWX20B, 51GWX20B, 57GWX20B

POWER ROM READ (Read Old ROM Data) TV CBL/SAT DVD/VCR ROM WRITE PIP VIDEO SWAP PIP MODE PIP CH FREEZE RASTER POSITION MENU REMOVE COLOR

ADJUSTMENT

SELECT

INITIALIZE

MUTE

EXIT

LAST CH

CURSOR UP

VOL

CH

CROSSHATCH / VIDEO (5 Times)

CURSOR DOWN CURSOR LEFT

1 4 7

2 5 8 0
VID2 VID5 VID3

3 6 9
INFO

CURSOR RIGHT

BLUE Select 13X9 Mode (5 Times)

ANT

GREEN Select 3X3 Mode (5 Times) RED Select 7X5 Mode (5 Times)

VID1

VID4

REC

ASPECT VIRTUAL HD

PHASE

HITACHI
CLU-4321UG

CALCULATION *VCR MODE ONLY

PAGE 07-21

DP-26 REMOTE CONTROL CLU-5721 TSI (P/N HL01821) 51XWX20B, 57XWX20B, 65XWX20B
POWER

TV

VCR

CBL

SAT

SOURCE WIZARD

CURSOR UP

DVD

AV1

AV2

AV3

CURSOR DOWN
1 2 5 8 0
A/V NET
GUIDE

3 6 9
INFO

CURSOR LEFT

4 7

CURSOR RIGHT RED (7 X 5) GREEN (3 X 3) CROSSHATCH VIDEO CORRECTION BUTTONS

RASTER PHASE
SLEEP
ANT

ASPECT

BLUE (13X9) REMOVE COLOR

C.S.

U MEN

EXIT

VOL

SELECT

CH

SV CS VID 1 VID 2

MUT E

LAS

T CH

HD SC VID 5

VID
VID 3

4

CALCULATE INITIALIZE PIP MODE + PIP CH WRITE TO ROM PRESS (2X)

PIP

PIP CH

FREEZE

PIP-MODE

PIP ACCESS SWAP VIDEO

CENTERING RASTER POSITION READ OLD ROM DATA PRESS (2X)

REC

HITACHI
CLU-5721TSI

PAGE 07-22

A/V NET 3 6 9 INFO CURSOR LEFT 4 7 CURSOR RIGHT RED (7 X 5) GREEN (3 X 3) CROSSHATCH VIDEO CORRECTION BUTTONS RASTER PHASE SLEEP ANT BLUE (13X9) REMOVE COLOR ASPECT V IRT UAL H D U MEN EXIT VOL SELECT CH SV CS VID 1 MUT E VC RP LU S+ VID 2 LAS T CH /T IDE V HD SC VID 5 GU VID VID 3 4 CALCULATE INITIALIZE PIP MODE + PIP CH WRITE TO ROM PRESS (2X) PIP PIP CH FREEZE PIP-MODE PIP ACCESS SWAP VIDEO CENTERING RASTER POSITION READ OLD ROM DATA PRESS (2X) REC HITACHI CLU-5722TSI PAGE 07-23 . 57TWX20B. 65SWX20B.C. 65TWX20B POWER TV VCR CBL SAT SOURCE WIZARD CURSOR UP DVD CD TAPE AMP CURSOR DOWN 1 2 5 8 0 C.DP-27 & DP-27D REMOTE CONTROL CLU-5722 TSI (P/N HL01822) 51SWX20B. 57SWX20B.

DP-2X CHASSIS READ FROM ROM NOTES BEFORE MAKING ANY DIGITAL CONVERGENCE ADJUSTMENTS Heat Run the set for at least 20 minutes. then reappears with green dots. 2) Be sure that it really does before beginning. MAKE A DETERMINATION: 1) There are many situations where the digital convergence looks as thought it may need a convergence adjustment. Be sure to check the Service Manual for specifics related to values. POSI Adjustment PAGE 07-24 . an error code will appear. • Press the Service Only switch on the Deflection PWB. • First press: (Read from ROM?) will appear on screen. Error 4. EXAMPLE: Sometimes the Magic Focus will not run correctly and will return an error code. etc… When this happens. Do not run Magic Focus before the 20 minutes have passed. the Old ROM data can be re-read to place the unit into the last saved condition. • • • • Vertical Size Adjustment Horizontal Size Adjustment Red and Blue Offset Adjustment DCU Character Adjustment and data confirmation check • DCU Sensor Position Adjustment. 5) Enter the DCAM. • Second press: Screen goes black. Sometimes after Magic Focus is run but the convergence appears off after completion. when initializing the Magic Focus sensors. OTHER IMPORTANT INFO: Many times after a complete adjustment. 1) To Read the Old ROM Data. All of the above adjustment can vary dependant upon the Chassis used. This could be beneficial before an attempt to make a rather lengthily adjustment. The below adjustments are very critical to the complete alignment process and CAN NOT be overlooked. 3) READ FROM OLD ROM DATA: 4) In any Hitachi Digital convergence set. most of the time it is because some critical adjustments were overlooked or skipped. • Press the MUTE button to return to Digital convergence grid. • In I2C Bus adjustment: H. press the SWAP button twice. overflow.

R.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES Complete Digital Convergence Alignment Center the Overlay Jig geometrically on the screen Receive any NTSC signal (Crosshair if possible) Set SCREEN FORMAT TO NORMAL mode Clear RAM data (DCU RAM) Service only switch is on the Deflection PWB. Release the SERVICE ONLY SWITCH again. DCU Grid appars. Press and hold the SERVICE ONLY SWITCH. Internal Digital "Cross Hatch Signal" is projected No DCU Correction added results in severe pincushion distortion Center Magnet Adjustments Select the External Center Cross Signal by pressing the EXIT button 5 times. picture appears. then press the POWER Button and release.B individual center crosses to their respective marks on the Overlay using the Yoke Center Magnets Red = Left Green = Center Blue = Right External Selected Center Cross with no DCU center data R G B Front View R B G A See Offset Chart for exact distances Page 06-09 PAGE 07-25 . Use the Centering Magnets closest to the Yoke Align the G.

DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES A Static Centering Alignments (Moves Entire Raster) Press EXIT 5 times to return to DCU Grid. (extra lines will disappear) B PAGE 07-26 . Internal Cross Hatch Signal selected Press the Remote FREEZE button (extra lines will appear at top and bottom ) Extra Lines appear indicating Raster Mode Remote Press the Remote Cursor buttons to match the selected Crosshatch (red and blue) to the green. Adjust Color Up Adjust Color Left select Adjust Color Right Adjust Color Down TO SELECT COLORS Info : Selects GREEN 0 : Selects RED ANT : Selects BLUE Align Red and Blue static centers Green should already be centered Press the Remote FREEZE button to exit Raster Position.

5. 6 number buttons to move the Adjustment Point location (intersection of blinking cursor) and the Cursor Buttons to adjust the lines so that the green cross hatch align with the Overlay (Jig) Selects GREEN 3X3 Mode = 9 Adjustment Points Remote Cursor blinks at intervals of 3 to indicate the 3X3 Adjustment Mode SELECT Before Adjustment Adjusted by cursor keys After Adjustment Remote 2 4 5 6 Moves location of Adjustment Point (Intersection of blinking cursor) Lines symmetrically aligned at Adjustment Points C Continue on next page PAGE 07-27 . (The 3X3 Mode can only be entered when the DCU RAM data is cleared) Green Only Press the Remote MENU button to project the green tube only Remote INFO Use the Remote 2.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES B Convergence 3x3 Point Adjustment Mode (Green Coarse Alignment) Press the Remote INFO button to enter the Green Adjustment Mode Press the Remote INFO button 5 times to enter the 3X3 Adjustment Mode INFO Button is used for selecting the 3X3 Adjustment Mode (when pressed 5 times). 4.

6 buttons to move the adjustment point. press the Remote0 button to select the Red Convergence Adjustment Mode Cursor blinks RED Remote Green always projected 4 7 5 8 0 6 9 0 Selects RED Crosshatch is yellow when the red and green crosshatches align Press the Remote 2. Calculation averages the error between the points to prevent "S" Distortion Convergence 3x3 Mode (9 Point) Adjustment (Red / Blue Coarse Alignment) After interpolation.4. and the Cursor buttons to converge the selected color onto green Cursor Blinks Blue Iinterpolate as often as necessary Remote Has the Blue 3x3 Convergence Mode been aligned? Selects Blue ANT No Crosshatch is cyan when the blue and green crosshatches align White internal crosshatch should be projected Yes Press Menu Button Press the Remote ANT button to Select the Blue Convergence Adjustment Mode D PAGE 07-28 .DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES C Before Calculation Press the Remote VID 3 button to Calculate points in between the adjustment points.5.

6 buttons to perform convergence point adjustment at every other intersection of the crosshatch 35 convergence adjustment points in 7X5 mode Remote Adjust Color Up Adjust Color Left SELECT Adjust Color Right Adjust Color Down Press the Remote VID 3 button to Calculate points in between the adjustment points. Note: Vid 3 on CLU4321UG must be in VCR Mode.4.5.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES D Convergence 7x5 Point Adjustment (Green Only Alignment) Remote Press the Remote 0 button five times to enter the 7X5 mode If selected Color isn't already Red. it will take 6 presses of 0 button 4 7 5 8 0 6 9 Selects the 7X5 mode Remote Press the Remote INFO button to project the green only INFO Selects GREEN Use the Remote Cursor and 2. E PAGE 07-29 .

DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES E Convergence 7x5 Point Adjustment (Red/Blue Alignment) Remote 4 7 5 8 0 6 9 Press the Remote 0 button to project the Red/Green Crosshatch Perform adjustment at every other intersection Press the Remote Cursor and 2. Has the Blue 7X5 Convergence Mode been aligned? White Internal Crosshatch should be projected No Remote Selects Blue Yes Press Menu Button ANT Selects Blue for adjustment F PAGE 07-30 . Press the Remote ANT button to select the Blue Convergence Adjustment Mode Note: Vid 3 on CLU4321UG must be in VCR Mode.4.5.6 buttons to perform convergence point adjustment at every other intersection of the crosshatch SELECT Cursor Blinks Blue Cursor blinks red at intervals of 2 to indicate the 7x5 mode Press the Remote VID 3 button to Calculate points in between the adjustment points.

Press the Remote VID 3 button to Calculate points in between the adjustment points.5.6 buttons to perform convergence point adjustment at every other intersection of the crosshatch 117 convergence adjustment points in 13X9 mode Adjust Color Left Remote Adjust Color Up SELECT Adjust Color Right Adjust Color Down Note: Vid 3 on CLU4321UG must be in VCR Mode.4.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES F Convergence 13X9 Point Adjustment (Green Only Alignment) Press the Remote ANT button five times to enter the 13X9 mode Remote If selected Color isn't already Blue. Selects the 13X9 mode ANT Remote INFO Press the Remote A/CH button to project the green only SELECT Selects GREEN 4 2 5 6 Use the Remote Cursor and 2. it will take 6 presses of Source button Remote Pressed 5 times. G PAGE 07-31 .

Note: Vid 3 on CLU4321UG must be in VCR Mode.5.6 buttons to perform convergence point adjustment at every intersection of the crosshatch Cursor Blinks Blue Cursor blinks red indicating the 13X9 mode Remote Adjust Color Up Adjust Color Left Press the Remote VID 3 button to Calculate points in between the adjustment points. Adjust Color Right Press the Remote ANT button to select the Blue Convergence Adjustment Mode Remote SELECT Adjust Color Down White Internal Crosshatch should be projected Has the Blue 13X9 Convergence Mode been aligned? No ANT Selects Blue for adjustment Yes Press the Menu Button to Display all colors H PAGE 07-32 .4.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES G Convergence 13X9 (117 Point) Adjustment (Red/Blue Alignment) Remote 4 7 5 8 0 6 9 Press the Remote " 0 " button to enter RED Adjustment Mode and to project the Red/Green Crosshatch Perform adjustment at every intersection Press the Remote Cursor and 2.

This screen appears with a series of green dots indicating a successful Write to ROM or Store. Adjustment Mode and Initialize the Sensors. Note: If Red dots appear.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES H Store New Convergence Data in ROM Press the Remote PIP MODE button twice to save the data to ROM mode = STORE ROM WRITE? 1 2 This screen is projected at the first press of PIP MODE button 3 Screen goes blank for several seconds at the second push of the PIP MODE button !!!! WARNING !!!! Sensor Initialization must be done after a Write to ROM. If this is not done. a single Cross Hire will be displayed. Press the Remote MUTE button to return to the Digital Convergence Adjustment mode I PAGE 07-33 . Return to the Digital Conv. (STORE) in order for MAGIC FOCUS to operate. replace the Digital Convergence module. when HD FOCUS is run. retry the process. If Red dots appear the second time.

DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES I Magic Focus Sensor Initialization Press the Remote PIP MODE button once ROM WRITE? 1 PIP PIP CH FREEZE PIP MODE SWAP VIDEO Again the screen projects ROM WRITE at the first press of PIP MODE button Press the Remote PIP CH button to begin the Initialization Mode This screen appears with a series of green dots indicating successful sensor Data Initialization 2 INITIAL:N 3 Screen projects different light patterns during the Initialization Mode Press the MUTE Button to return to Crosshatch. Finished with Digital Convergence Setup for NORMAL mode. Press the Service Only Switch to Exit to Normal Mode CONVERGENCE ADJUSTMENT OPERATION COMPLETE PAGE 07-34 .

6 buttons to move Adjustment Point Press Cursor Up / Down / Left / Right to Adjust Convergence When adjustment is complete. then Read the Old ROM data. initialize the sensors by pressing the PIP MODE button ONCE and then press the PIP CH button. Press "0" five times to select the 7X5 Mode Press "ANT" five times to select the 13X9 Mode Note: 3X3 mode can not be entered without clearing RAM data. Press the Service Only switch again to display the DCU Grid. NTSC (Normal). Press the Service Only Switch to Exit DCAM mode. then press the Power button. Clear RAM data by pressing and holding the Service Only button. STORE the New DATA by pressing the PIP MODE button twice. (SWAP pressed twice) Press the MENU button to Remove colors not being adjusted. PAGE 07-35 . After Storing.DP-2X DIGITAL CONVERGENCE ALIGNMENT PROCEDURES Convergence Touchup Overlays NOT required! Convergence Point Adjustment. Press the MUTE button to return to DCAM grid. See "Complete Digital Convergence Alignment procedure" for more details. 5. Cleared RAM data mode can be entered if necessary. Enter the Service Mode by pressing the Service Only Switch on Power/Deflection PWB. Press the MUTE button to return to DCAM grid. 4. Press 2.

centering). 5) If there is no error. 4) Error code will be displayed in bottom right corner of screen. Gain check*1 (check resistor values only) X X X — X X X X X X X X X X 6 5 7 9 10 Convergence Operation Connect 2 Noise Same as Error Code 4 Same as Error Code 4 Same as Error Code 2 Input strong field. Replace DCU. Check the wiring of connector between sensor and DCU Input strong field. Sensor Connector check. Conv. 4. Check the wiring of connector between sensor and DCU 11 Sync *1 = RK 42. and INITIAL OK will appear on screen. 2. ERROR!! Error Code X No. ERROR!!. Adjustment check (H/V size. 54. Strong signal. Replace Sensor PWB. 58. 3. Check the placement Adjustment check (H/V size. follow this confirmation and repair method. 46. X X X — SENSOR POSITION 0 7 1 2 3 5 4 3*2 4 A/D Level Over Flow Same as Error Code 2 1. 9. 5. 2. centering). Darken Outside Light Placing of Sensor Is pattern hitting sensor? Check connection and solder bridge of sensor Replace Sensor. 62 check these resistors. 1 3 CONNECT 1! Error Message Sensor Position 6) Follow repair table for errors. Amp. *2 = Sensor Position PAGE 07-36 . 8. 2) Press the Service Only Switch on the Convergence Output PWB. Strong signal. 6. Application Error Code Error Display Code Countermeasure Initialize Magic Focus 1 2 *2 VF Error Connect 1 Replace DCU 1.MAGIC FOCUS ERROR CODES FOR THE DP-2X CHASSIS CONVERGENCE ERRORS: If an error message or code appears while performing MAGIC FOCUS or initialize (PIP MODE and PIP CH in Digital Convergence Adjustment Mode. 1) Turn on Power and receive any signal. 3. 7. 50. 3) Press SWAP and then the PIP CH buttons on the remote control.

Blue Defocus “Sticking Out” Center of Blue crosshatch line Screen VRs R Screen VR G Focus VR B Focus VRs R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-37 . See figure Below. 3) Adjust BLUE defocus according to the following specifications. 1mm on each side equaling 2mm total. 90%. • SCREEN FORMAT should 2) Turn the B FOCUS VR fully clockwise. be PROGRESSIVE mode.DP-2X BLUE DE-FOCUS ADJUSTMENT Adjustment Preparation: • Video Adjustment Procedure Control: Brightness 1) Receive any NTSC crosshatch signal. Contrast Max.

(red. 6) Enter the Service Menu again. Screen VR Adjustment procedure Sub Brightness: 1) Go to I2C ADJ. Remember: When adjusting the Screen controls. within I2C Service Menu . and B Cutoff should be 11) Press the MENU key on set to (7F). 4) Input a gray scale signal into any Video input and select R G Focus VR B Focus VRs R G B FOCUS PACK Projection Front View RED CRT GREEN CRT BLUE CRT PAGE 07-38 . Mode. After the Cut Off adjustment has been completed. reMenu to their Data Centers peat steps 6 through 9. Green is reference. G. 3) Exit Service Menu by pressing MENU button. X=0.280. G and B Cutoff adjustments.DP-2X WHITE BALANCE and SUB BRIGHTNESS ADJUSTMENT that input using the VID butAdjustment Conditions: • Cut Off and Blue Defocus tons on the remote or front control panel. B/W would be best). on. With power Off. then release. (10800K). 2) Adjust the Sub Brightness Number [2] SUBBRT using I2C Bus alignment procedure so only the slightest white portions of the raster can be seen. This lengthens tube life. • Turn the brightness and black 9) Adjust the low brightness areas to black and white. (3F). If not OK. • R. never adjust the controls clockwise.278 Preparation for adjustment • Start adjustment 20 minutes or Y=0. must be complete. • Set Color Temperature to COOL on Customer’s Menu. (10800 channel. Always adjust counter clockwise. blue) on the Fo• Receive a tuner signal. press INPUT and POWER buttons at the same time. more after the power is turned 8) Set the Brightness and Contrast to minimum. • High brightness white balance 5) Turn the Brightness and • Low brightness white balance Contrast OSD all the way up. Screen adjustment VRs on Fo7) Make the whites as white as cus Block possible using the Red DRV Drive adjustment performed us2 (Cool) and Green DRV ing I C Bus Alignment within (Cool) Drive adjustment Service Menu. do not adjust. Screen VRs remote to Exit Service Menu. Service Menu is displayed. green. Also. (any cus Block assembly. uslevel OSD to minimum by reing screen adjustment VRs mote control. do not use the Focus Block adjustments. use I2C R. K) • Set the Green and Blue drive adjustment within I2C Service 10) Check the high brightness whites again.

CHECK Lo LIGHT W/B Hi LIGHT W/B If NOT OK If OK FINISH PAGE 07-39 .DP-2X WHITE BALANCE ADJUSTMENT FLOW CHART START CUT OFF ADJUSTMENT BLUE DEFOCUS ADJUSTMENT SUB BRIGHT ADJUSTMENT ADJUST Hi LIGHT W/B ADJUST Lo LIGHT W/B SUB BRIGHT ADJUSTMENT Repeat two or three times until no adjustment is necessary.

ADJUST MODE TA1270-M SUB CONT (TV-S) OSD POSITION AFC/CLOCK TEST MEMORY INIT I2COPEN IR BLASTER ** Press PIP button and PIP Mode button. PAGE 07-40 . [e] Receive ANT A NTSC white signal. TA1270-M changes to TA1270-S. Shown below. Enter I2C adjustment Menu. 3) Go to SUB CONT (TV-S) 4) Press PIP and PIP Mode on remote control. for the Main Picture and the SubPicture. Press Menu and scroll through pages until TA1270-M appears. 6) Exit Service Menu. [f] Connect Probe on the P852 (CRT PWB — Green) to check subpicture amplitude. SPLIT MAIN ANT A SUB ANT A 1H Main Picture White Sub Picture White Should Match Main Adjust SUB CONT (TV-S) until peak white of PinP matches peak white of the main picture. 5) Observe P852 on the CRT PWB and change the TA1270-S “SUB CNT” I2C data so that the amplitude of the Sub Picture is the same level as that of the main picture. 1) Go to I2C adjustment Mode. until TA1270M appears at the top of the page. [c] Condition should be set as follows: [d] Contrast = MAX [e] Brightness = Center [d] PIP mode should be in SPLIT mode. 2) Press “MENU” on remote to scroll through adjustment pages.DP-2X SUB PICTURE AMPLITUDE ADJUSTMENT Preparation for Adjustment Adjustment Procedure [a] Sub Brightness adjustment should be finished. [b] Start adjustment 20 minutes after the power is turned on.

with Power 1080i 16X9 Standard Mode Off. 16X9 NORMAL MODE: Balance left and right side display position. 2) Screen Format is NOR8) Enter the I2C Bus alignMAL. I2C adjustment menu Adjustment Procedure signal. 7) Power the Set Off. • Contrast Max. press the INPUT button and hold it down. 11)Turn the Power Off. same size.DP-2X HORIZONTAL POSITIONS (FINE) ADJUSTMENT NOTE: To enter the I2C Bus alignment menu.14H) lease. 4) Exit from the I2C Menu. ment menu and select Item 3) Enter the I2C Bus align[9] H POSITION ment menu and select Item 9) Adjust the data so that the left and right sides are the [9] H POSITION and adsame size. crosshair signal. will appear. then press Adjustment: the POWER button and re5) Receive any 1080i (2. PAGE 07-41 . 16X9 Standard Mode: 6) Change Screen Format 1) Receive a 16X9 Standard 16X9 Standard mode.. Adjustment Preparation: • Video Control: Brightness 90%. 1080i STANDARD MODE: Balance left and right side display position. just the data so that the left and right sides are the 10)Exit from the I2C Menu.

GREEN & BLUE FOCUS CONTROLS Also: SCREEN CONTROLS for RED. GREEN & BLUE PAGE 07-42 .DP-2X MAGNET AND YOKE LOCATION DP-2X MAGNETS Adjustment Points FRONT 1 2 3 RED CRT GREEN CRT BLUE CRT 4 4 5 6 5 4 5 (1) Centering magnet RED (2) Centering magnet GREEN (3) Centering magnet BLUE (4) Beam Form Magnets (5) Beam Alignment magnets (6) Focus Block Assembly RED.

MISCELLANEOUS INFORMATION DP-2X CHASSIS DIAGRAMS SECTION 8 .

THIS PAGE LEFT BLANK .

57GWX20B DP-23G CHASSIS ANT A DVI-HDTV Pr INPUT 1 Pb Y To Converter R (MONO/L) AUDIO Pr INPUT 2 Pb Y/VIDEO ANT B R (MONO/L) AUDIO R INPUT 3 AUDIO TO HI-FI CENTER IN R INPUT 4 (MONO/L) VIDEO S-VIDEO (MONO/L) VIDEO S-VIDEO R L MONITOR OUT AUDIO R L VIDEO S-VIDEO PAGE 08-01 .DP-23 / 23G REAR PANEL 51UWX20B. 57UWX20B DP-23 CHASSIS 51GWX20B.

DP-24 REAR PANEL 43FWX20B DP-24 CHASSIS ANT A Pr INPUT 1 Pb Y To Converter R (MONO/L) AUDIO Pr INPUT 2 Pb Y/VIDEO ANT B R (MONO/L) AUDIO R INPUT 3 AUDIO TO HI-FI CENTER IN R INPUT 4 (MONO/L) VIDEO S-VIDEO (MONO/L) VIDEO S-VIDEO R L MONITOR OUT AUDIO R L VIDEO S-VIDEO PAGE 08-02 .

57XWX20B and 51XWX20B 1 ANT A 2 9 7 10 11 DVI-HDTV Pr INPUT 1 Pb Y OPTICAL OUT Digital Audio To Converter R (MONO/L) AUDIO IEEE 1394 Pr Pb Y/VIDEO ANT B INPUT 2 Multi Media Card R (MONO/L) AUDIO R (MONO/L) VIDEO S-VIDEO INPUT 3 AUDIO TO HI-FI CENTER IN IR Blaster L R INPUT 4 R (MONO/L) VIDEO S-VIDEO ANT C (ATSC IN) R L VIDEO S-VIDEO MONITOR OUT AUDIO 8 4 5 3 6 1 12 PAGE 08-03 .DP-26 REAR PANEL 65XWX20B.

DP-27 / 27D REAR PANEL 51SWX20B. 65SWX20B DP-27 CHASSIS 57TWX20B. 57SWX20B. 65TWX20B DP-27D CHASSIS ANT A DVI-HDTV Pr INPUT 1 Pb Y To Converter R (MONO/L) AUDIO Pr INPUT 2 Pb Y/VIDEO ANT B R (MONO/L) AUDIO R INPUT 3 AUDIO TO HI-FI CENTER IN IR BLASTER L MONITOR OUT R INPUT 4 (MONO/L) VIDEO S-VIDEO (MONO/L) VIDEO S-VIDEO R L VIDEO S-VIDEO AUDIO R PAGE 08-04 .

DP-2X SIGNAL PWB PJIG EH7P PRST PH2P PFH1 PH10P PFH2 EH2P I401 I001 IA03 TERMINAL PWB FLEX CONTROL PIP U303 DVI PWB DP-23/G DP-26 DP-27/D U301 U302 DIGITAL MODULE DP-26 Only MAIN TUNER PinP TUNER REAR VIEW PAGE 08-05 .

PCG GREEN TH01 FLYBACK IK05 IH01 M62501P CH16 QH01 PCB BLUE PAGE 08-06 .DP-2X DEFLECTION PWB V Size Adj H Size Adj CONVERGENCE SERVICE SWITCH SK01 1 R711 R607 QK01 1 1 1 PPD3 7 1 PPD6 10 QF01 PDF1 PADJ IK01 6 1 PPD1 7 1 PPD2 I601 12 11 DIGITAL CONVERGENCE UNIT 6 UKDG MB MG MR 1 PDS1 T701 PCR RED D708 Q777 IK04 T702 RH17 HV ADJ DO NOT ADJ.

DP-2X POWER SUPPLY PWB = GREEN or RED LED PAGE 08-07 D928 B+ PPS1 PPS2 PPS3 D964 +6V SW SW +9V AUDIO SW DM SW PPS4 PPS5 S902 S905 +35 SW E904 +7V E903 -7V E901 -28V E902 +28V E907 B+ PDC1 S906 D965 AUDIO +29V 12WX2 +39V 20WX2 PPS7 E905 +220V E912 DM+10V E911 E909 +10V PRO I905 T901 Switching Transformer I904 FB I903 ACK F903 FUSE T902 Switching Transformer I902 I906 FB D915 DEF POWER D902 I901 F902 FUSE PPS6 D901 DEF SW F901 FUSE 1 2 PPD6 S901 BACK COVER SIDE PPD3 E906 REG PPD2 S903 D940 +28V PPD1 .

DP-2X CRT PWBs P802 (Cathode) RED 1 GND 3 FOCUS PACK (UFPK) P852 (Cathode) GREEN P851 1 B FOCUS ADJ. VR P801 FOCUS PACK PAGE 08-08 . VR B G R G R E801 E851 GND 3 P8A2 (Cathode) BLUE P8A1 1 E8A1 GND 3 SCREEN ADJ.

VOL+ CH- CH+ INPUT/ MENU EXIT SELECT DP-X ALL BUT DP-24 FRONT CONTROL PWB REMOTE CONTROL IR RECEIVER PFR PF1 PFT EFR POWER POWER LED DIMMER CONTROL LIGHT RECEIVER PFS PAGE 08-09 .EF1 S V L R MAGIC FOCUS VOL.

CH+ S V L R MAGIC FOCUS PAGE 08-10 .DP-24 FRONT CONTROL PWB REMOTE CONTROL RECEIVER DIMMER CONTROL LIGHT RECEIVER POWER LED POWER INPUT/ EXIT MENU SELECT VOL.VOL+ CH.