REF: BB_SRM_xM

BeagleBoard-xM System Reference Manual

Revision A2

BeagleBoard-xM Rev A2 System Reference Manual
Revision 0.1 July 7, 2010

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BeagleBoard-xM System Reference Manual THIS DOCUMENT

Revision A2

This work is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported License. To view a copy of this license, visit http://creativecommons.org/licenses/bysa/3.0/ or send a letter to Creative Commons, 171 Second Street, Suite 300, San Francisco, California, 94105, USA. All derivative works are to be attributed to Gerald Coley of BeagleBoard.org. For more information, see http://creativecommons.org/license/results-one? license_code=by-sa For any questions, concerns, or issues submit them to gerald@BeagleBoard.org BEAGLEBOARD DESIGN These design materials referred to in this document are *NOT SUPPORTED* and DO NOT constitute a reference design. Only “community” support is allowed via resources at BeagleBoard.org/discuss. THERE IS NO WARRANTY FOR THE DESIGN MATERIALS, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE DESIGN MATERIALS “AS IS” WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU. SHOULD THE DESIGN MATERIALS PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. We mean it; these design materials may be totally unsuitable for any purposes.

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BeagleBoard-xM System Reference Manual

Revision A2

BeagleBoard.org provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by BeagleBoard.org to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies BeagleBoard.org from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. BeagleBoard.org currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. BeagleBoard.org assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on BeagleBoard.org environmental and/or safety programs, please contact visit BeagleBoard.org.

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TX 75081 WARRANTY: The BeagleBoard is warranted against defects in materials and workmanship for a period of 90 days from purchase. or accidents.org covering or relating to any machine. the customer will pay all shipping costs. please visit BeagleBoard. Mailing Address: BeagleBoard.org products or services might be or are used. abuse.org/support Please refer to sections 12 and 13 of this document for the board checkout procedures and troubleshooting guides. This warranty does not cover any problems occurring as a result of improper use. To return a defective board. All boards will be returned via standard mail if an issue is found. excessive voltages. If no issue is found or express return is needed. exposure to water. or combination in which such BeagleBoard.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 No license is granted under any patent right or other intellectual property right of BeagleBoard. modifications.org/support/rma . please request an RMA at http://beagleboard. process.org 675 North Glenville #195 Richardson. Page 4 of 171 . Before returning the board.

..............................2 REVISION C4 VS..21 MMC3 EXPANSION HEADER....0 CHANGE HISTORY....0 OTG PORT................................18 5.........................................17 5.................8 STEREO AUDIO IN CONNECTOR.....................22 5...............................................................................................................................................................15 INDICATORS..............................................................................1 Hardware Changes...........................................23 5..28 7..................................................20 5.....................................................................................28 7.....................................19 5.0 INTRODUCTION...15 4..........................15 5........................7 STEREO AUDIO OUTPUT CONNECTOR.......................13 2.........................1 CHANGE HISTORY.....................................................20 5.............................................................................................................5 CONNECTING SERIAL CABLE............................................................................................................................................REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Table of Contents 1..................................................12 MICROSD CONNECTOR.............................................................................4 CONNECTING JTAG.........................16 POWER CONNECTOR...9 S-VIDEO CONNECTOR.............................................................................................24 6.......................6 HS USB 2.........26 6............2........18 5........................................................................................................................................................0 HOST PORT..........................................14 3........................... –XM REVISION A2...............................................................................................................................................................................................................................2 CONNECTING USB HOST......................................................1 CONNECTING USB OTG..........................................................................................................................................................................................................1 BEAGLEBOARD IN THE BOX................................................................................0 BEAGLEBOARD SPECIFICATION .........32 Page 5 of 171 ..................................................................................20 CAMERA CONNECTOR..........................................................................................................................................................................................22 5.....21 5....................1 DEFINITIONS.....................................................................................................1 BEAGLEBOARD VERSIONS................22 5..................................30 7..14 USER BUTTON................................................................................................................3 MEMORY.................................................................................................................................................21 5....................21 5...20 5............................................13 2.....15 3..31 7...............................13 RESET BUTTON..................................................................................3 CONNECTING DC POWER.................................22 5.............................27 6....................................................................18 RS232 DB9 CONNECTOR....................................................................................................................13 2.......17 JTAG CONNECTOR................23 5.....................................2 Software Changes....................................22 MCBSP EXPANSION HEADER.........0 BEAGLEBOARD HOOKUP..........................................................................................................2 PROCESSOR .................................................................................................................................................................................................5 HS USB 2....10 DVI-D CONNECTOR..........................................................................................................................................................................................................................................................................................................................18 5.......................................................................................11 2...........................................................................................................................................21 5.....15 4...........................................21 5.............................................................................27 7..................29 7........................................................................................................................................0 BEAGLEBOARD OVERVIEW................13 2.................................................................................................22 5.......................................11 LCD HEADER .......................................................................................24 ELECTRICAL SPECIFICATIONS...................................................1 BEAGLEBOARD FEATURES..............................................................................20 5..........................................................................................................................4 POWER MANAGEMENT...........................0 DEFINITIONS AND REFERENCES..................3 REPAIRS..........................................19 5...................................................................................19 MAIN EXPANSION HEADER................................................0 PRODUCT CONTENTS.............................................................................................2 SOFTWARE ON THE BEAGLEBOARD......26 6..............................................................23 BEAGLEBOARD MECHANICAL SPECIFICATIONS......................2.....................17 5.........20 5..............................................................................................................................................

.....................................................7 CAM_2V8.................................55 8...................................................8..............................................................................................................................................2 OVER VOLTAGE PROTECTION....65 Page 6 of 171 ....................................7 VDD2..............................................................3 Power Sequencing..9 CONNECTING STEREO IN CABLE.............................................................................................................6 McBSP1............................................................................................................................................................2 RTC Backup Battery.............2 SDRAM Bus.....6 VBAT POWER CONDITIONING.............................10..37 7...1 Boot Configuration....10.............45 8.......................................................................................................9......................................................5 PROCESSOR CURRENT MEASUREMENT..............................................................................................................................................................5 McBSP2...........................................1 Main Core Voltages..13 LCD CONNECTION................................................................................................8............3 Shutdown....................................................3.............47 8..............................................................................8............39 7..............................................................................................................................9..................................................1 Detection............................58 8....................................................................33 7..........................................................55 8...............58 8.........10............................................10.................................................8 CONNECTING STEREO OUT CABLE.......................34 7....................8.......................................................................59 8.....................................................................57 8...................................................................................6 VOCORE_1V3...........................................63 8........................................58 8............................6 CONNECTING S-VIDEO........58 8...........4 DSS Bus......................2..............9 OTHER SIGNALS.................................................................................................................................3..................51 8.......................................12 MICROSD CONNECTION..................................7 TPS65950 RESET AND POWER MANAGEMENT................58 8.........5 Main Core Voltages Smart Reflex.........................................................................................................................................................................................................8.............................................8..............................................................................................................................10 INDICATOR LOCATIONS............................................................8.........................40 7........................................................................................................................44 8............................................................................................7..7...........................35 7................................................................................................7............................................................................................................................8 CAM_1V8............................................41 8................................1 SYSTEM BLOCK DIAGRAM..............45 8.................................58 8.....................................................................................7.....................................................52 8.............65 8........................................4 VIO_1V8................................................................................................36 7.............9.......8....45 8...................................8 PERIPHERAL VOLTAGES.......2 Indication..2.............60 8.....................................................56 8..........10...................................................................................................................7........3..........................48 8...................................9...................................................3 Processor I2C Control.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 7..............................63 8................................6 VDD_VMMC1.......................................................1 USB DC Source.........56 8..................................................................................................3 DC Source Control......46 8..........................4 METER CURRENT MEASUREMENT...............................57 8..........2 VDD_PLL1...........8.........55 8.....................52 8..................................52 8....................49 8................2 Wall Supply Source.........................................65 8................4 VDD_SIM......................59 8.............................................................................................10 EXP_VDD..................................................64 8.....................................................................................................................................................................................................................3 POWER CONDITIONING.59 8...........................................................................................53 8.........3.....................................................................................47 8..................62 8.........................3 VDAC_1V8.............................................................................................................................10....................................................................................................................7 CONNECTING DVI-D CABLE.......3 GPMC Bus...........................2 Main DC Input.........................52 8..............................2................................................................................................5 mSecure Signal..9.................................................................................................................................................................................................................................................................................................................0 BEAGLEBOARD SYSTEM ARCHITECTURE AND DESIGN...............................10 PROCESSOR.................................4 Reset Signals...............................1 VDD_PLL2......47 8......................................42 8............................................................................................4 AUX 3...........................................64 8..7..49 8..........9 USB_1V8.....................61 8................................................8........................................................................11 BUTTON LOCATIONS..........................................................42 8...............................................................................................................................................5 VMMC2......59 8........3V Supply......7...........................................................1 Overview.............................................

...............101 8........................3 RS232 Transceiver..............................................................................................91 8.......101 8.........13.....................................................17...................................................................................14.............................................................22........................................................8 Pin Muxing......4 Camera Modules...........................................85 8..........................................82 8...................................................................................................................3 Processor Camera Port Interface..........16......11 POP MEMORY DEVICE................................................................................................................12...................................................87 8.............................................................................................................................69 8..................13.17.............................................................................................14..................5 Ethernet.................................................................................1 Power Indicator.....................................15.......................................................................................................................17......................................................................................................................................68 8.........10 Interrupt Mapping......68 8..............................................................20...........84 8.................................................................103 8......................................................2 TPS65950 Audio Interface.........................................17 DVI-D INTERFACE.................81 8...........................21...........1 32KHz Clock..................................................................102 8...................................................................................84 8..............................99 8..........................96 8...............................................................................102 8.......................3 McBSP_CLKS..............................103 8....94 8....................................................................................................96 8..6 OTG USB Protection.....................10................................................71 8.............15................................16.....................................................................................................................................82 8.......102 8.................22..................................................................................................................................................................................................................................................95 8...................................................2 PMU Status Indicator........................................................2 Camera I2C Port.....................................................................................................2 USB OTG Design..............................................75 8...............................................66 8.....................................................14..............................................................................................................................88 8....................................................................85 8............13....................................2 26MHz Clock.......................70 8..............13.........................76 8............66 8......................21.....................10...............20....................................................................1 USB OTG Overview......................................22.....................................................................................4 TFP410 Framer.........16....88 8...............................................................REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8...................................15 MICROSD..................69 8...........................5 OTG USB Connector..............5 TFP410 Control Pins.........................21.....................................................................................................89 8.................13....................................................21 RS232 PORT..........14..................3 OTG ULPI Interface............4 OTG Charge Pump.............................71 8..........86 8.........................................................................................................................................70 8...................................1 Camera Power........83 8.....................4 Audio Input Jack...............................................14..............13 USB OTG PORT..................101 8..............................................................................4 Booting From SD/MMC Cards.................................................................15.........................................................................................................................................................................................................4 Connector................................................................................................................................74 8.................................................4 USB Port Connectors.....................................................................1 Processor Interface.............17....83 8................80 8..13.............20......................................................................96 8............................................................78 8............................22 INDICATORS..........1 Processor LCD Interface..........12 SYSTEM CLOCKS.....................................................2 Processor Interface........................................................................................................................................................................................................................................................1 Processor Audio Interface....................................................................2 LCD Power.......................................................................................104 Page 7 of 171 ...74 8...................................................................17.......................................................................................................................15............1 microSD Power..........3 Card Detect........3 Audio Output Jack..............................10.....................................................................................................................18 LCD EXPANSION HEADERS....16...............16 AUDIO INTERFACE.......................88 8....3 TFP410 Power.......................................................7 McBSP3.2 HS USB PHY.19 S-VIDEO...........................................................................................................9 GPIO Mapping................................................................................................................................14 ONBOARD USB HUB......................74 8...20....1 Power...................72 8..........82 8.....................................12...........................................2 Level Translator........3 User Indicators...........................................3 USB HUB.........................................12..........................................................72 8....................................73 8...........................6 DVI-D Connector.........85 8...............17...............................................20 CAMERA PORT..............92 8............10.......21..................71 8...............

.................................1 Battery.........................................................................9 BATTERY INSTALLATION .................................................133 9................145 11.................138 10.........1 DC POWER SUPPLY...............................................................................................................................117 8..........................127 9...................................................................................1 Processor Interface...........................4 Auxiliary Access Header...........................138 9...............................125 9.................................................2......................................................................130 9......................26............................120 9........................................24........................................................................................5...........................147 11.........138 9................................140 10.......................................................................4 DVI-D...................................................104 8.....26...........................131 9............3 DVI-D MONITORS...............9..........................................................................119 9................................3 Audio McBSP2 Port................................................0 MECHANICAL INFORMATION........................................................................2 USB OTG..............................................141 10.............118 8......................................................6 HDQ 1-Wire ........................................................................................................................................................................................................6 Mounting Scenarios.....................................................................................................................................................................................................5 Alternate Clock..........................................................................................26.23..........................................105 8.....104 8......................148 Page 8 of 171 .....................................................................25 LCD EXPANSION HEADER......................................2 MMC3 Signals..........................................................112 8...............................................................................................................................147 11..........................106 8..................................................................................4 MICROSD CARDS.......5.............................................9 DMAREQ.................................134 9................................................3 S-VIDEO...............................26.....................8 GPIO Signals...............................................125 9.......2 DVI CABLES..........................................................................................24.........................5 LCD and Expansion Measurements..........................................................4 HSUSB1 Signals..................................2 Battery Installation..............120 9................................................................7 AUDIO OUT..26 AUXILIARY EXPANSION HEADER.....................................105 8.......................................................................9...................................................................................................................................................................................3 Power...............1 Connector Pinout...........................................................................................................................113 8.....143 10...................26.....................................5 LCD..................................................8 JTAG...............................................................................................................................................0 CONNECTOR PINOUTS AND CABLES................................135 9........................................................................................................112 8.........122 9..........6 USB TO BLUETOOTH.......................22...................................22.........................................2 Camera.......................................................................................................121 9....................................................5......................................106 8.............1 MCBSP5 Signals..................................................................................24.................110 8............2 BEAGLEBOARD EXPANSION CARD DESIGN INFORMATION ...113 8...........26.........5..............................0 BEAGLEBOARD ACCESSORIES....................................................................26...........................117 8..............................................................5 Overvoltage Indicators........................................106 8...............24................................................2 JTAG Connector............................................................26...................................4 Reset.....143 10.........136 9................................5.........................................................5 USB TO WIFI.........................144 10............................................................1 Mounting Method.....................1 BEAGLEBOARD DIMENSIONS ................................2 Expansion Signals.....................................................................................................................................................................................................................................................23 JTAG......................110 8..117 8.................118 8...........................144 10.....108 8.....................................................................................................................................................................4 HUB Power Indicator.........................................................................................................1 Processor Interface........................................................................3 ETK Signals.........................7 ADC...........................................................................................5 Power Control....................................................................148 11..........................5.............................118 8......................129 9.....24 MAIN EXPANSION HEADER.....................................24........................................27 AUDIO EXPANSION HEADER..........110 8...........................................6 AUDIO CONNECTIONS...........................................................................26..........................................................................................REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.............................................................................................................................1 POWER CONNECTOR...................................123 9.............................................................23.................................................................................................................................................110 8..................

.....................................2 TROUBLESHOOTING GUIDE.....................................................158 16...............................................151 12............................................................................................................................................................................................................................................................................................................0 PCB COMPONENT LOCATIONS......................REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 11..0 PCB INFORMATION...0 KNOWN ISSUES.......150 12.0 BOARD VERIFICATION TEST POINTS............153 12.............................2 Expansion EEPROM........................154 13..................................0 BILLS OF MATERIAL........................................................................155 14...........1 Signal Access Points......................................2.........................................................156 15...........1...................................................................................................................................................................170 17..................................................................................0 SCHEMATICS.....................171 Figures Tables NOTES Page 9 of 171 ......

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Page 10 of 171 .

which has yet to be announced by Texas Instruments. but does provide an idea of the types Page 11 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 1. It is expected that the user will refer to the appropriate documents for these devices to access detailed information. Section 4. The only documentation that is available is the AM3715. The processor used on the BeagleBoard-xM is compatible with several Cortex A8 processors manufactured by Texas Instruments.0– Hookup Covered here is how to connect the various cables to the BeagleBoard.0– Definitions and References This section provides definitions for commonly used terms and acronyms. This is not an exhaustive list.0– System Architecture and Design This section provides information on the overall architecture and design of the BeagleBoard. is that the DSP is not included on the AM3715. It is not intended to provide detailed documentation of the processor or any other component used on the board. The key difference between the AM3715 and the DM3730.0-Product Contents Describes what the BeagleBoard package looks like and what is included in the box. Section 8.0– Overview This is a high level overview of the BeagleBoard. Section 7.0– BeagleBoard Accessories Covered in this section are a few of the accessories that may be used with BeagleBoard. This will allow the user to create cables. Section 10.0– Specification Provided here are the features and electrical specifications of the BeagleBoard. This is a very detailed section that goes into the design of each circuit on the board. Section 9.0– Change History Provides tracking for the changes made to the System Reference Manual. The key sections in this document are: Section 2.0– Connector Pinouts and Cables The section describes each connector and cable used in the system.0 Introduction This document is the System Reference Manual for the BeagleBoard-xM. For the remainder of this document. Section 3. the processor is a DM3730 processor. purchase cables. Section 5. This document provides detailed information on the overall design and usage of the BeagleBoard from the system level perspective. Section 6. it will only be referred to as the processor.org. or to perform debugging as needed. Currently. a low cost ARM Cortex A8 board supported through BeagleBoard.

Section 12.Known Issues This section describes the known issues with the current revision of the BeagleBoard and any workarounds that may be possible.. Section 11.0.0 – Troubleshooting Here is where you can find tips on troubleshooting the setup of the BeagleBoard.BeagleBoard Schematics These are the schematics for the BeagleBoard and information on where to get the PDF and OrCAD files. Page 12 of 171 .BeagleBoard Components This section provides information on the top and bottom side silkscreen of the BeagleBoard showing the location of the components. It also provides a definition of what they need to be.0. It does not guarantee that these devices will work on all OS implementations.0.0. Section 16.0 – Mechanical Information is provided here on the dimensions of the BeagleBoard.0. Section 15.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 of cables and accessories that can be supported and how to find them. Section 17. Section 14.BeagleBoard PCB Information This section describes where to get the PCB file information for the BeagleBoard. Section 13.Bill Of Material This section describes where to get the latest Bill of Material for the BeagleBoard.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 2.1 Hardware Changes AREA Processor ARM Frequency DSP Frequency SGX Frequency DDR DDR Speed NAND SD Connector USB Host Ports Host Port Speed Serial Connector Camera Header Ships with 4G SD Overvoltage Protection Power LED turnoff Serial Port Power Turnoff MMC3 Expansion Header McBSP2 Expansion Header -xM DM3730 1GHZ 800Mhz 200Mhz 512MB 166MHz 0 uSD 4 FS/LS/HS DB9 Yes Yes Yes Yes Yes Yes Yes C4 OMAP3530 720MHz 520MHz 110MHz 256MB 166MHz 256MB MMC/SD 1 HS Header No No No No No No No Comments Direct connect to USB to Serial Cable Leopard Imaging Camera module Contains bootable desktop There will be two different assembly versions of the –xM. Rev A A1 A2 Change History Changes Initial release. The long-term plan is to only ship one eventually.2 Revision C4 vs. -00 Micron LPDDR 512MB -01 Numonyx LPDDR 512MB Page 13 of 171 . Updated to new power OVP scheme Updated with camera and Memory information Date 6/4/2010 6/21/2020 7/23/2010 By GC GC GC 2. 2. Table 1. These two versions will be shipping at the same time.1 Change History Change History Table 1 tracks the changes made for each revision of this document.2.0 2. –xM Revision A2 There are several key differences between the BeagleBoard Revision C4 versus the -xM Rev A2 version.

2. o A demo version of the Angstrom desktop distribution. We just cannot afford to scrap all those boards due to poor yields. However.2 Software Changes Following are the changes to the SW. o Use of a universal Beagle XLoader and UBoot. and we have steady supply. the dates are continuing to ship so we do not know when we will receive those parts. All features and capabilities are the same between the two assemblies with the exception that in theory the Micron parts should run at 200MHz. There are no issues with the -00 assemblies that use the Micron parts. These will work on any Beagle made. we are starting production with the Numonyx parts and will continue to build using those parts until such time as the Micron parts are proved to be working. have acceptable yields. We are hoping that the next batch of production versions will work. We are having yield issues with the current batch of Micron parts. 2. So. Page 14 of 171 . They include support for the 512MB DDR and the removal of the NAND from the –xM board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Here is a brief explanation for the reason behind this.

Synchronous Dualrate Random Access Memory . 4. All of the design information is freely available and can be used as the basis for a product. Please refer to the Rev C4 The Figure 1 provides an example of a few of the various usage scenarios for the BeagleBoard. Page 15 of 171 . BeagleBoards will not be sold for use in any product as this hampers the ability to get the boards to as many community members as possible and to grow the community.0 BeagleBoard Overview The BeagleBoard is designed specifically to address the Open Source Community. the Rev C4 and the –xM.1 Definitions and References Definitions SD.0 3.Mobile Dual Data Rate SDRAM.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 3. the BeagleBoard is highly extensible to add many features and interfaces.1 BeagleBoard Versions There are two different versions of the beagle in production. Figure 1 is a picture of each of these versions.Secure Digital microSD. By utilizing standard interfaces. This manual covers the –xm Version only. It has been equipped with a minimum set of features to allow the user to experience the power of the processor and is not intended as a full development platform as many of the features and interfaces supplied by the processor are not accessible from the BeagleBoard.Smal version of the standard SD card MDDR. It is not intended for use in end products. 4.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 1. BeagleBoards C4 and -xM Page 16 of 171 .

Power Error USB Power PMU Mini AB USB connector TPS65950 I/F SMSC LAN9514 Ethernet HUB Up to 500ma per Port if adequate 4 FS/LS/HS power is supplied 10/100 From USB HUB 3.0” (78.3V.74 x 76. 1. Table 2.1 BeagleBoard Features Table 2 provides a list of the BeagleBoard’s features.0 BeagleBoard Specification This section covers the specifications of the BeagleBoard and provides a high level description of the major components and interfaces that make up the BeagleBoard.ADC.0 OTG Port USB Host Ports Ethernet Audio Connectors SD/MMC Connector User Interface Video Camera Power Connector Overvoltage Protection Main Expansion Connector 2 LCD Connectors Auxiliary Audio Auxiliary Expansion Feature Texas Instruments Cortex A8 1GHz processor Micron 4Gb MDDR SDRAM (512MB) 200MHz Power Regulators Audio CODEC Reset USB OTG PHY GPIO Pins 14-pin JTAG UART 3 LEDs 6 layers 3.5mm L+R out L+R Stereo In MicroSD 1-User defined button Reset Button S-Video Supports Leopard Imaging Module DC Power Shutdown @ Over voltage UART Power (5V & 1.5mm 3.2mm) 2-User Controllable Power.GPIO. 5V.1” x 3. 5.HDQ Page 17 of 171 .8V McBSP2 MMC3.8V) McSPI McBSP DVI-D Connector USB Power I2C MMC2 Access to all of the LCD control signals plus I2C 4 pin connector MMC3 GPIO PWM 3.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 5. Processor POP Memory PMIC TPS65950 BeagleBoard-xM Features Debug Support PCB Indicators HS USB 2.

For this reason. POP (Package on Package) is a technique where the memory is mounted on top of the processor.4 Power Management The TPS65950 is used on the BeagleBoard to provide power with the exception of a 3.4mm pitch POP package. 5. that additional non volatile memory storage can be added to BeagleBoard by: o Accessing the memory on the uSD card o Use the USB OTG port and a powered USB hub to drive a USB Thumb drive or hard drive.3 Memory There are two possible memory devices used on the –xM. but instead see the part number for the memory. In addition to the power the TPS65950 also provides: o o o o o Stereo Audio Out Stereo Audio in Power on reset USB OTG PHY Status LED Page 18 of 171 . 5. o Install a thumbdrive into one of the USB ports o Add a USB to Hard Disk adapter to one of the USB ports Support for these devices is dependent upon driver support in the OS. The -00 assembly uses the Micron POP memory and the -01 uses the Numonyx POP memory. It is possible however.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The following sections provide more detail on each feature and sections of the BeagleBoard. The key function of the POP memory is to provide: o 4Gb MDDR SDRAM x32 (512MB @ 166MHz) No other memory devices are on the BeagleBoard. 5. when looking at the BeagleBoard.3V regulator which is used to provide power to the DVI-D encoder and RS232 driver and an additional 3.3V regulator to power the USB Hub. you will not find an actual part labeled DM3730CBP.2 Processor The BeagleBoard-xM processor is the DM3730CBP 1GHz version and comes in a .

5. It is possible to take the current supplied by the USB ports to 1A by using a Y cable.0 Host Port On the board are four USB Type A connectors with full LS/FS/HS support. Figure 2. Each port can provide power on/off control and up to 500mA of current at 5V as long as the input DC is at least 3A.5 HS USB 2. A single PC USB port is not sufficient to power the BeagleBoard if the USB Host is enabled. USB Y-Cable The BeagleBoard requires a Y-Cable minAB to USB A cable or as mentioned a single cable can be used if the USB Hub is powered down. It is configured by the default in the software supplied.6 HS USB 2. The increase in power is due to the addition of the USB HUB on BeagleBoard. There is an option to provide external power to the BeagleBoard using a 5V DC supply and is discussed later in this section. Page 19 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 5. The client port is limited in most cases to 500mA by the PC. Figure 2 shows and example of the Y-Cable for the USB.0 OTG Port The USB OTG port can be used as the primary power source and communication link for the BeagleBoard and derives power from the PC over the USB cable.

5. This is a separate output from the processor and can contain different video output data from what is found on the DVI-D output if the software is configured to do it. Page 20 of 171 . 5.5mm standard stereo audio input jack is provided to access the stereo output of the onboard audio CODEC. 5.27mm pitch 2x10 headers are provided to gain access to the LCD signals. 5. A standard HDMI cable can be used when connecting to a monitor with an HDMI connector. PLUG IN THE CABLE TO THE DISPLAY AND THEN POWER ON THE BEAGLEBOARD.REF: BB_SRM_xM 5. DO NOT PLUG IN THE DVI-D CONNECTOR TO A DISPLAY WITH THE BEAGLEBAORD POWERED ON. DDC2B (Display Data Channel) or EDID (Enhanced Display ID) support over I2C is provided in order to allow for the identification of the LCD monitor type and the required settings. The BeagleBoard is equipped with a DVI-D interface that uses an HDMI connector that was selected for its small size. It will support NTSC or PAL format output to a standard TV.9 S-Video Connector A 4 pin DIN connector is provided to access the S-Video output of the BeagleBoard. The default is NTSC.11 LCD Header A pair of 1. but can be changed via the Software.5mm standard stereo output audio jack is provided to access the stereo output of the onboard audio CODEC.10 DVI-D Connector The BeagleBoard can drive a LCD panel equipped with a DVI-D digital input. The Audio CODEC is provided by the TPS65950. It does not support the full HDMI interface and is used to provide the DVI-D interface portion only.7 BeagleBoard-xM System Reference Manual Revision A2 Stereo Audio Output Connector A 3. This cable or adapter is not provided with the BeagleBoard. The user must use a HDMI to DVI-D cable or adapter to connect to a LCD monitor.8 Stereo Audio In Connector A 3. This is the standard LCD panel interface of the processor and will support 24b color output. This allows for the creation of LCD boards that will allow adapters to be made to provide the level translation to support different LCD panels.

o One on the TPS65950 that is programmed via the I2C interface o Two on the processor controlled via GPIO pins o One Power LED that indicates that power is applied and can be turned off via SW. 5. When the wall supply is plugged in. Page 21 of 171 . When using the USB OTG port in the host mode. o One to indicate that power is applied to the onboard USB HUB and can be controlled via the SW. The power supply is not provided with the BeagleBoard.13 Reset Button When pressed and released. this button is no longer needed to force an SD card boot. If this LED ever turns on. As there is no NAND boot option on the board. the DC supply must be connected as the USB port will be used to provide limited power to the hub at a maximum of 100mA. please remove the power connector and look for the correct power supply. 5. There is also on RED on the BeagleBoard that provides an indication that the connected to the board exceeds the voltage range of the board.12 microSD Connector BeagleBoard-xM System Reference Manual Revision A2 A single microSD connector is provided as a means for the main non-volatile memory storage on the board. such as when a board is added to the expansion connectors.REF: BB_SRM_xM 5. causes a power on reset of the BeagleBoard. a larger wall supply 5V can be plugged into the optional power jack. 5. This replaces the 6 in 2 SD/MMC connector found on the C4. 5.15 Indicators There are five green LEDs on the BeagleBoard that can be controlled by the user.16 Power Connector Power will be supplied via the USB OTG connector and if a need arises for additional power. it will remove the power path from the USB connector and will be the power source for the whole board. It is can be used by the UBoot SW to switch between user scripts to allow different boot configurations to be selected as long as that feature is included in the UBoot used..14 User Button A button is provided on the BeagleBoard to be used as an application button that can be used by SW as needed.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 so a hub must be powered. This header is populated on each board. Make sure the DC supply is regulated and a clean supply. DO NOT expose the JTAG header to 3.21 MMC3 Expansion Header New to the BeagleBoard-xM is a 20 pin connector provided to allow access to additional signals including GPIO and the MMC3 port.17 JTAG Connector A 14 pin JTAG header is provided on the BeagleBoard to facilitate the SW development and debugging of the board by using various JTAG emulators. 2MP. No null modem cable is required.8V on all signals. The supported resolutions include VGA. 5. The camera module does not come with the board but can be obtained from Leopard Imaging. a RED LED will turn on. 3MP.8V Levels are supported. This will prevent the power form actually making it to the circuitry on the board and will stay on as long as the power exceeds the voltage specification. 5.19 Main Expansion Header A single 28 pin header is provided on the board to allow for the connection of various expansion cards that could be developed by the users or other sources. A standard male to female straight DB9 cable may also be used. the correct SW drivers are required. The 100mA is a function of the OTG port itself. The 100mA is not impacted by having a higher amperage supply plugged into the DC power jack. The interface is at 1. This connector is populated on the board. 5. different signals can be provided on each pin.3V. Only 1. A USB to Serial cable can be plugged directly into the Beagle.18 RS232 DB9 Connector Support for RS232 via UART3 is provided by DB9 connector on the BeagleBoard for access to an onboard RS232 transceiver.20 Camera Connector A single connector has been added to the BeagleBoard–xM board for the purpose of supporting a camera module. 5. Page 22 of 171 . Due to multiplexing. This connector is populated on the board and is ready for the camer module to ne installed. If the power is over the voltage specification. For proper operation of the cameras. and 5MP camera modules. 5.

.45” Max height: TBM Layers: 6 PCB thickness: . This connector is populated on the board. 5. In order to use these signals.23 BeagleBoard Mechanical Specifications Size: 3.22 McBSP Expansion Header A 4 pin connector is provided to allow access to the McBSP2 signals for audio applications. the audio interface on the TPS65950 must be disabled by the SW.062” RoHS Compliant: Yes Weight: TBW Page 23 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 5.35” x 3.

75 4. BeagleBoard Electrical Specification -xM Rev A Specification Power Input Voltage USB Current USB Input Voltage DC Current DC Max Voltage without damage Expansion Voltage (5V) Curent (Dépends on source current avalable) Expansion Voltage (1. Table 3.8 4.5 1.4 7 30 30 30 30 Kohms MHz MHz MHz MHz V V mA MHz MHz 1.24 Electrical Specifications BeagleBoard-xM System Reference Manual Revision A2 Table 3 is the electrical specification of the external interfaces to the BeagleBoard-xM Rev A.5 1.5 Mb/S Mb/S Mb/S Mb/S Mb/S Mb/S 5 -5 +/-35 250 -2.8 480 12.71 2.85 30 5.7 1.4 -5.8V) Current USB Host (Same as the DC supplied by the power plug or USB 5V) Current (Depends on what the DC source can supply over what the board requires) USB OTG High Speed Mode Full Speed Mode Low Speed Mode USB Host High Speed Mode Full Speed Mode Low Speed Mode RS232 Transmit High Level Output Voltage Low Level output voltage Output impedance Maximum data rate Receive High level Input Voltage Lo Level Input Voltage Input resistance JTAG Realview ICE Tool XDS560 XDS510 Lauterbach(tm) microSD Voltage Mode 1.0V Current Clock DVI-D Pixel Clock Frequency 5 350 5 750 5 1 1.REF: BB_SRM_xM 5.2 12 5.8 5 Varies 5.2 5.0 1.7 3 -3.8V Voltage Mode 3.2 5 5.8 3.5 +/-60 V V mA Kbit/S V .2 V mA V mA V V A V mA V Min Typ Max Unit 4.2 1.89 220 48 25 65 Page 24 of 171 .5 480 12.8 1.

56 -80 -90 1.53 Vrms differential output voltage and load impedance = 16 Ohms) Peak-to-Peak output voltage Total Harmonic Distortion @ 0 dBFs Idle channel noise (20Hz to 20KHz) .3 400 S-Video Revision A2 V mVp-p 600 1024 x 768 . Gain = 0 dB Audio Out Load Impedance @100 pF Maximum Output Power (At 0.7 67.5 1.88 50 75 1 82.5 -75 -85 Vpp dB dB Page 25 of 171 . A-weighted audio.5 -75 -78 Full scale output voltage (75ohm load) Offset voltage Output Impedance Audio In Peak-to-peak single-ended input voltage (0 dBFs) Total harmonic distortion (sine wave @ 1.02 kHz @ -1 dBFs) Total harmonic distortion (sine wave @ 1.02 kHz) 2 0 Hz to 20 kHz.5 V mV Ohms Vpp dB dB ohms mW -80 -85 14 16 17.REF: BB_SRM_xM High level output voltage Swing output voltage Maximum resolution BeagleBoard-xM System Reference Manual 3.

REF: BB_SRM_xM

BeagleBoard-xM System Reference Manual

Revision A2

6.0

Product Contents

Under this section is a description of what comes in the box when the BeagleBoard is purchased. 6.1 BeagleBoard In the Box

The final packaged -xM Rev A product will contain the following: o o o o 1 Box 1 BeagleBoard in an ESD Bag 1 uSD card 1 uSD Card to MMC Adapter NO CABLES ARE PROVIDED WITH THE BEAGLEBOARD.

Figure 3.

The -xM Rev A2 Box

Page 26 of 171

REF: BB_SRM_xM

BeagleBoard-xM System Reference Manual

Revision A2

Figure 4.

-xM Rev A2 Box Contents

6.2

Software on the BeagleBoard

There is no NAND on the board so no SW is preinstalled on the board as it is on the Rev C4. The –xM does come with a 4GB SD card that the board boots from. It contains all of the code required for the board to boot to an Angstrom desktop. It can also be used to boot to UBoot by hitting a key during the booting process before it reads the UImage. 6.3 Repairs

If you feel the board is in need of repair, follow the RMA Request process found at http://beagleboard.org/support/rma Do not send the board in for repair until a RMA authorization has been provided. Do not return the board t the distributor.

Page 27 of 171

REF: BB_SRM_xM

BeagleBoard-xM System Reference Manual

Revision A2

7.0

BeagleBoard Hookup

This section provides an overview of all of the connectors on the BeagleBoard. 7.1 Connecting USB OTG

The USB OTG port connects to the PC host and uses a miniAB cable through which power can be provided to the BeagleBoard. Figure 5 shows where the cable is connected to the BeagleBoard. If the OTG Port is to be used as a Host, the ID pin must be grounded. This means that you must have a 5 pin cable connected to the OTG port on the BeagleBoard and you must use a USB powered HUB. There is also an option to ground the ID on the board and is discussed later. You can power the board form this port, but there may not be enough power supplied by the PC to power all features, such as the USB Host ports and the Ethernet Port. If you use the double ended USB cable, you should be able to power the board with minimal issues as long as you do not load down the USB Host ports with heavy current devices.

Figure 5.

USB OTG Connection

Page 28 of 171

Figure 6 shows the location of the USB Host connectors. USB Host Connection Page 29 of 171 .REF: BB_SRM_xM 7. Figure 6.2 Connecting USB Host BeagleBoard-xM System Reference Manual Revision A2 The Beagle is equipped with 4 USB Host connectors.

Page 30 of 171 . It is highly recommended that on the -XM Rev A version of the board that an external power supply or double USB cable be used if the USB Host is to be used. The power supply is not provided with the BeagleBoard.5mm O. Figure 7. If you are using the USB OTG port in the OTG or host mode. DC Power Connection The power supply must have a 2.D. Figure 7 shows where to insert the power supply into the power jack.3 Connecting DC Power BeagleBoard-xM System Reference Manual Revision A2 A DC supply can be used to power the BeagleBoard by plugging it into the power jack.5mm and can be either straight or right angle. x 9. you must have an external DC supply powering the BeagleBoard. The board will not function until the correct power supply is used. but can be obtained from various sources. Connecting anything other than 5V will activate the over voltage circuitry. You need to make sure the supply is a regulated 5V supply. turning on a red LED.REF: BB_SRM_xM 7. Most USB supplies will not be able to supply the required current over a single USB port.D x 5.1mm I.

It supports 1.8V only.4 Connecting JTAG BeagleBoard-xM System Reference Manual Revision A2 A JTAG emulator can be used for advanced debugging by connecting it to the JTAG header on the BeagleBoard. Figure 8 shows the connection of the JTAG cable to the BeagleBoard. Only the 14pin version of the JTAG is supported and if a 20pin version is needed. you will to contact your emulator supplier for the appropriate adapter. Figure 8. Page 31 of 171 .REF: BB_SRM_xM 7.3V. BeagleBoard JTAG Connection DO NOT expose the JTAG header to 3.

Page 32 of 171 . Figure 9 shows where the serial cable is to be installed. a straight through male to female cable is required. The cable used on the Rev C4 will not work on the –xM board. BeagleBoard Serial Cable Connection If you are using a standard serial port on the PC. The configuration of the DB9 is such that a USB to serial adapter can be plugged direct into the Beagle connector.5 Connecting Serial Cable BeagleBoard-xM System Reference Manual Revision A2 In order to access the serial port of the BeagleBoard a serial cable is required. Figure 9.REF: BB_SRM_xM 7. No null modem cable is required. New to the –xM version is the removal of the 10 pin header and the addition of a female DB9 connector.

6 Connecting S-Video BeagleBoard-xM System Reference Manual Revision A2 An S-Video cable can be connected to the BeagleBoard and from there it can be connected to a TV or monitor that supports an S-Video input. This cable is not supplied with the BeagleBoard. Figure 10 shows the connector for the S-Video cable. BeagleBoard S-Video Connection Page 33 of 171 .REF: BB_SRM_xM 7. Figure 10.

7 Connecting DVI-D Cable BeagleBoard-xM System Reference Manual Revision A2 In order to connect the DVI-D output to a monitor. Page 34 of 171 . Figure 11 shows the proper connection point for the cable. Figure 11. BeagleBoard DVI-D Connection DO NOT PLUG IN THE DVI-D CONNECTOR TO A DISPLAY WITH THE BEAGLEBAORD POWERED ON. PLUG IN THE CABLE TO THE DISPLAY AND THEN POWER ON THE BEAGLEBOARD. This cable is not supplied with BeagleBoard but can be obtained through numerous sources.REF: BB_SRM_xM 7. a HDMI to DVI-D cable is required.

The audio cables are not provided with BeagleBoard.8 BeagleBoard-xM System Reference Manual Revision A2 Connecting Stereo Out Cable An external Audio output device. such as external stereo powered speakers. Figure 12 shows where the cable connected to the stereo out jack. can be connected to the BeagleBoard via a 3. BeagleBoard Audio Out Cable Connection Page 35 of 171 .5mm jack. Figure 12. but can be obtained from just about anywhere.REF: BB_SRM_xM 7.

such as a powered microphone or the audio output of a PC or MP3 player.9 BeagleBoard-xM System Reference Manual Revision A2 Connecting Stereo In Cable External Audio input devices. but can be obtained from several sources. Figure 13 shows where the cable is connected to the stereo input jack. can be connected to the Beagle via a 3. BeagleBoard Audio In Cable Connection Page 36 of 171 . Figure 13. The audio cables are not provided with BeagleBoard.REF: BB_SRM_xM 7.5mm jack.

VOLT will turn on when the DC voltage exceeds specification HUB turns on when power is applied to the USB HUB.10 Indicator Locations BeagleBoard-xM System Reference Manual Revision A2 There are five green and one RED indicator on the BeagleBoard.REF: BB_SRM_xM 7. BeagleBoard Indicator Locations POWER indicates that power is applied to the board. Each indicator will be described in more detail later in this document. Figure 14. Figure 14 shows the location of each indicator. Page 37 of 171 . USR0/1 can be used by the SW as needed PMU is controlled from the power management chip and can be connected to a PWM.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Page 38 of 171 .

BeagleBoard Button Location The User button does no affect the boot source of the board as is the case on the rev C4 version. the RESET button when pressed will force a board reset and the USER button which can be used by the SW for user interaction. Figure 15.REF: BB_SRM_xM 7. Figure 15 shows the location of the buttons.11 Button Locations BeagleBoard-xM System Reference Manual Revision A2 There are two buttons on the BeagleBoard. Page 39 of 171 .

It uses a push-push connector for the insertion and removal of the microSD card. Figure 16. The white silkscreen area on top of the board works as a guide to align the card for insertion. Figure 16 shows the location of the microSD connector. Page 40 of 171 . The connector is mounted on the bottom side of the board.REF: BB_SRM_xM 7. BeagleBoard microSD Card Location The microSD card should be inserted with the writing on the card facing up.12 microSD Connection BeagleBoard-xM System Reference Manual Revision A2 The microSD is the primary boot source for the board.

BeagleBoard LCD Header Location Adapter boards are becoming available for such things as LCD panels and VGA adapters.27mm) pitch.REF: BB_SRM_xM 7. Figure 17 shows the location of the LCD headers on the Beagle. How these connectors are used is determined by the design of the adapter board that is connected to them.05 (1. These headers are 2x10 headers with a spacing of . Figure 17. Page 41 of 171 .13 LCD Connection BeagleBoard-xM System Reference Manual Revision A2 There are two headers provided to allow access to the LCD signals on the BeagleBoard.

8.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. Page 42 of 171 . BeagleBoard-xM High Level Block Diagram Figure 19 shows the location of the key components on the board. Figure 18.0 BeagleBoard System Architecture and Design This section provides a high level description of the design of the BeagleBoard-xM and its overall architecture.1 System Block Diagram Figure 18 is the high level block diagram of the BeagleBoard-xM.

o The schematic has been created for each section showing only the pertinent components and their connections. the names have been truncated to only show the specific functions of that pin as used in the design. For ease of reading.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 19. Page 43 of 171 . You will notice certain things in this section. o The pin names differ from the actual schematic. BeagleBoard Major Components This remainder of this section describes in detail the architecture and design of the BeagleBoard.

5 R M M 1 4 3 2 . 2 5 V R 1 3 8 C U F V O R 3 D 2 1 C I N N 1 2 1 0 6 3 3 V O u F 1 L U . C E R . 4 K .2 Over Voltage Protection A new feature found on the –xM board is the overvoltage protection circuit. C L E R .C 0 C R 2 2 . 1 2 0 6 . 0 6 0 3 D N I . C C 2 2 1 C / O VF OF U / C 1 R 2 5V DC_POWER 3 36 2 1 E R . 2 5 4 V D C _ I N D C _ 5 V 2 3 1 O N N _ P W R 1 _ 2 . 0 D C 5 V C 1 8 8 u F R 1 3 . The primary function of this circuit it to prevent voltage levels in excess of the specification from reaching other circuitry on the board and causing damage to the board. 1 % 4 5 R 1 _ U 3 2 T T 2 1 R 2 _ U 3 2 3 3 0 R 1 5 2 1 0 u F . Figure 21 is the diagram of the circuitry design. 4R K 1 . 2 5 5 V _ V U S B 1 0 V R O K L T 0 E R 3 2 R . 6 K 1 3 . D C 1 5 GRN VO LTER R _R _ I N K T D C _ I N D C _ I N R 1 3 0 1 0 K L D S E N V 1 9 D S 3 N R S SE E T D S N 3 8 C 0 1 3 G 1 5 6 O L T E R L T D S 1 3 T . Page 44 of 171 . 1 2 0 6 . _1 U% 4 5 3 2 T 2 T 1 R 2 _ U 3R 1 1 4 4 3 3 0 / O V F OF U 1 R 2 1 5 36 1 1 / C 1 Figure 20. 1 0 V 6 K 2 R 1 3 4 10k 0 . . Overvoltage Protection The circuit is comprised of the following key functions: o Overvoltage detection o Overvoltage indication o Overvoltage shutdown Each of these functions is discussed in the following sections. 1 D 2 0 C _ 6 . 0 6 N 3 10k 47k 5 Q R 2 B N 1 9 0 7 C U F V O R 2 3 D 1 2 I N N 1 P 2 4 1 0 C 6 3 V u 3 O F 1 U . 1 1 % R 1 3 3 6 0 _ 4 D C 3 L V U V S G V O L T _ E R R R 1 2 1 R _ L E D 5 1 0 . 0 6 0 D N I . . 1 % . 0 T P 1 . 1 5 V5 _ 3 2 0 3 V O L T D 2E T Q R 2 N A 1 9 0 7 47k 8 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.

The LED will remain on until the overvoltage condition has been removed. will turn on.2. U34. Page 45 of 171 . The voltage divider made of R168 and R169 is set to where if the voltage coming in is over 5. RESET is asserted in the case where the VDD drops below the 1.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. U35. but the resistors are not populated and the TPS3803G15 device is used in the design. the RESET is released which results in an error condition. In this design we use the device in reverse. will turn on the two load switches connecting the power.2 Indication When the error condition occurs. removes the power from the DC_5V_USB rail which provides the power to the USB devices. This is driven by ½ of Q3. R160.4V is presented to the TPS3803G15. 8. The design does allow for this. removes the power form the main board regulator that provides power to the board. This helps prevent damage to any USB device that may be plugged in at the time of power up.3 Shutdown The error condition also results in ½ of Q3 being activated which takes the VOLTERR signal low. If there is no overvoltage condition or if the previous one has been removed. the board will not power up. This will prevent the two FDC6330L load switches from turning on. the TPS3803−01 has an adjustable SENSE input that can be configured by two external resistors. will result in the signal going high via the pullup R158.4V set by an internal voltage divider. preventing anything from receiving power.3V a level in excess of the 1. Until the overvoltage condition has been resolved. Until the overvoltage condition has been resolved. There is a another version of this devices. If detected. One load switch.2. the pullup. If the voltage exceeds 1. 8.4V level. which is open drain. a red LED. Each of these switches can handle in excess of 2A in normal operation.2. the board will not power up. D16. This indicates to the user that the voltage is too high and that another power supply should be used. The other load switch. a release of the RESET signal.1 Detection The detection is handled by a TPS3803G15 voltage detector which has a fixed-sense threshold voltage of 1.4 volts.

However. 5 M 5 M T P S S W 2 1 _ E S S W W _ _ I N S I N S S G N D PPAD W N S W W P D N D W W _ O O A O D 8 1 L 0 1 D U T G 5 N 1 _ O 9 J 8 _ P G T T N D C _ 5 V 1 3 _ O 1 U2 _ O U P _ 1 4 L D 1 P G 7 15 4 1 P 5V DC_POWER C U F 4 5 2 1 3 D V 4 1 2 C 0 u 6 F 3 3 V O . both of the BeagleBoards must be powered by the DC supply. C 1 U U 2 L 3 2 1 E R . C E R . The USB supply is sufficient to power the BeagleBoard in some cases if the SW does not activate the USB HUB. 1 6 2 0 6 . 4 K . additional power most likely will be required even in this scenario.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. 2 5 V I N N T 2 T 1 R 1 5 2 3 3 0 C 1 0 u F . U O S B T G _ C L I E m Ni n iT P O R T P 1 7 G 2 1 2 3 4 5 V B D D + I D G 1 G 3 6 U /S B . It should also be noted that if an OTG configuration is used. for example tying two BeagleBoards together via a UBS OTG cable.3 Power Conditioning There are two possible sources of the 5V required by the BeagleBoard. then a minimum of two PC USB ports are required t supply the power. It can come from the USB OTG port connected to a PC or a 5V DC supply. If the USB HUB is needed. 1 R % 1 _ O U 6 3 2 R / O VF OF 1 R 1 / C Figure 21. depending on the load needed by the expansion port on BeagleBoard and the usage of the USB Host ports. 2 5 V R 1 5 3 3 2 . 1 2 0 6 . If the OTG port is used as a Host port. then the DC supply must also be used. This is where the DC supply comes in to play. Input Power Section Page 46 of 171 . Figure 21 is the design of the power input section.A B G 4 _ P 9 U 4 L D 2 O _ L I ND L 6 L D O _ E L 3 2 P 2 2 3 1 C O N N _ P W R 1 _ 2 .

When the output voltage from the switch reaches about 93% of the input voltage. the switch for the USB is enabled. additional current is required. Both the switch and LDO limit inrush current by controlling the turn on slew rate. assuming that the USB ports and expansion headers are likely to be used. The TPS2141 is a USB 2.3. 8. This insures that the 5V from the USB is not connected by disabling the internal FET. The TPS65950 will be responsible for handling the supply of the VBUS_5V0 rail Page 47 of 171 .REF: BB_SRM_xM 8. The 5V DC from the USB is routed through the TPS2141 switch to insure that this requirement is met as uncharged capacitors on the BeagleBoard can exhibit a large current drain during start up that could exceed this requirement. If you are using the USB HUB or Ethernet interface. allowing the power to be supplied to the board from the OTG port through the integrated switch inside the TPS2141.1mm plug with a center hot configuration. in the case of the DC voltage. The dual-current-limiting feature of the switch allows USB peripherals to utilize high-value capacitance at the output of the switch. When the DC supply is plugged in. The maximum current should not exceed 3A. 8. A regulated 5V DC supply of at least 1A is required and a rating of 3A is preferred. there is no 5V available to be routed so the removal of the pullup in pin 5 has no affect.3. As long as the DC supply is not connected. the switch is disabled because the ground is removed from pin 5 of the TPS2141.3 DC Source Control Unlike when powering from the USB OTG port. at which point higher current loads can be turned on. In the case where there is no USB plugged in. while keeping the inrush current low. the current limiting is not required.2 Wall Supply Source A wall supply can be used to provide power to the board. the USB OTG can be used in the Host or Client modes. In the event that a higher DC load is required due to the addition of a Daughtercard or if all the USB host ports need to supply the full 500mA per port.1 USB DC Source BeagleBoard-xM System Reference Manual Revision A2 The USB specification requires that the current consumed prior to enumeration be limited to 100mA @ 5V (500mW). the switch limits the current delivered to the capacitive load to less than 100 mA. the TPS2141 is enabled. the switch current limit increases to 800mA (minimum).3. It needs to have a 2. a higher current supply can be used. The higher current limit provides short circuit protection while allowing the peripheral to draw maximum current from the USB bus. During turn on.0 Specification-compatible IC containing a dual-current limiting power switch and an adjustable low dropout regulator (LDO). When in the DC mode of operation. When in the USB powered mode and no DC supply is connected.

3V Supply The TPS2141 has an integrated 3. then that indicates that there is no DC power connected and there is no USB OTG port connected. the DC dummy jack must be installed and there is a method to verify that condition. You will also see that the 3. You should be careful in doing this.3. If during a low power mode. It is always possible that at any point a USBOTG cable could be installed. is recommended however. For this reason.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 in the OTG or Host modes. a powered hub must be used to support peripherals on the OTG port. this GPIO pin can be used to turn off the power LED. This insures that the power to the LDO can be supplied by either the USB or the DC wall supply and that the current measurement includes the 3. you will need to place an unconnected connector into the DC power jack to insure that the DC from the OTG port is not shorted to the 5V supplied via the expansion connector. it is plugged in. There is a signal called nUSB_POWER which if Hi (5V) indicates that there is 5V supplied by the USB OTG port. and the DC dummy jack is installed. Page 48 of 171 . The input to the LDO is supplied by the main DC_5V.3V Supply design. 8.3V rail controls the serial port power. It is possible to provide 5V via the expansion connectors as would be the case from a daughter card to prevent you from having to have two DC supplies. As this is limited to 100mA. Figure 22 is the AUX 3. By default the voltage is on. The 3.3V as required on the BeagleBoard for the DVI-D interface and the UART. so this will be powered down as well.3V supply can be turned off by activating GPIO1 on the TPS65950 to a 1. If you plan to use the USB OTG port. that the 3. This means that in order to power the board from the expansion headers. that a large pullup be provided on the daughtercard to make the signal HI (5V) to detect the true state of the DC jack.4 AUX 3. It should also be noted. D5. If this signal is low.3V supply.3V LDO which is being used to supply the 3. This condition could be used on the daughtercard to know that it is OK to supply power onto the expansion bus to power the board.3V supply powers the power LED. the user chooses to turn of the power LED.

Figure 24 is the schematic of the measurement circuitry. 0 6 0 3 P O W E R 4 L V 0 6 D C K R 3 2 . The maximum value that can be input to the ADC inputs is based on the setting of the VINTANA2. is a .1 ohm resistor across which the voltage is measured. These values along with resistance of R13 are used to calculate the current consumption of the board. or the Expansion headers. 1 0 V R 8 U 4 L D 2 O _ L I ND L D 6 L D O _ E L N D W W W N S W W P O O A O _ _ _ P D 1 0 _ P L D 1 1 _ O U 9 J 8 _ P 1 3 O 1 U2 O U 1 4 L D G G 2 0 0 T T N K 3 T V N 6 2 0 K . 8. 6 D 5 L T S T . 1 u 2 F 0 4 . that this current reading does not include any current consumed by the USB HUB.4 Meter Current Measurement Jumper J2 is a header that allows for the voltage drop across the resistor to be measured using a meter. 7 u F . R13. There are two pairs of resistors provided on the TPS65950 that measure the voltage on either side of R13.5 Processor Current Measurement The resistor across J2 can also be used to measure the current of the board by reading the voltage drop across R13 from software. 1 % 3 _ A D J R 1 0 R 9 C 2 0 7 GRN . Please keep in mind. providing a way to measure the current consumption of the BeagleBoard from the main voltage rails. either USB or DC.3 Power Section 8. This is done via the I2C control bus to the TPS65950 from the processor. The reading you get is . 3 V . USB ports. 1 % . 0 R 1 2 6 0 3 3 3 0 S S W W _ I N S _ I N S S S S W _ E U 7 AT P G P S I O 6 5 . T M S R 5 4 1 0 K Figure 22. AUX 3.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual V B A T Revision A2 V I O _ 1 V 8 A U X _ 3 V 3 C 0 . You will need to make sure you have a sensitive meter to make your measurements. The resistor.1mV per mA of current. 0 6 5 1 U S N 7 1 8 A 2 C 2 G . 1 9 5 0 / C D N 1 2 2 / J T A G .OUT voltage rail which defaults 7 15 T P 2 1 4 1 G N D PPAD 5 1 _ P P Page 49 of 171 .C 0 3 1 9 0 G K T 1 6 0 K PW R LED _R 4 .

1 % % H 1 C 7 0 . Page 50 of 171 . 0 8 V 0 5 . C E R F . 2 K R 1 5 2 2 . D C _ 5 V U 2 1 3 I N S G H N T L 1 3 O G D A D 9 U N D 4 T 6 D 5 J 6 3 A V B A T R _ F 4B 1 5 6 . For every 100 mA of current a voltage of . 1 1 0 K u F . 1 u F . 0 8 0C 5 5 1 0 u V B A T R .1 ohms. the voltage read would be 2. 1 % L AK D/ A C D I C I3 N 5 N D C I N 3 . 1 x . Processor Current Measurement This results in a value that is 46% of the actual value. In order to determine the actual power. 1 C0 R 5 V8 3 4 0 . In order to prevent the voltage levels from exceeding this value a pair of resistors of 12K and 10K is used to scale the voltage down. So.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 to 2. 1 % Figure 23. 1 % C U 7 R AT P T S C S O 6 5 / C T S 9 5 0 8 3 0 .01V will be detected. the input voltage and the voltage drop must be measured. 1 % . 1 .2V V B A T _ M A I N J 1 + D 3 2 2 R 2 _ .415V which keeps it below the 2. 1 u F R 4 9 1 2 K . 1 . 1 0 .25V. 1 0 V L K I / B N 1 A1 D 6 4 K / B P E 1 R1 C E R D A T A / A R 5 2 C I N 5 1 0 K .5V point.5V. 3 V R 4 8 1 2 K . The voltage drop across R13 will be small as the value of the resistor is 0. 6 . for a maximum value of 5. 6 K . 1 4.

6 .REF: BB_SRM_xM 8. 2 K R 1 5 2 2 . 3 V V B A T 4. 1 . By adjusting the values of R14 and R15.7V. 6 K .6 BeagleBoard-xM System Reference Manual Revision A2 VBAT Power Conditioning This circuitry regulates the DC input to a nominal 4. 0 8 0C 5 5 1 0 u F . C C 7 0 . 1 . to 4. 0 8 0 5 . D C _ 5 V U 2 1 3 I N S G H N T L 1 3 O G D A D 9 U N D 4 T 6 D 5 J 6 3 A V B A V B A T _ M A I N J 1 + D 3 R 2 2 2 _ . 1 E R u F .2V. 1 % % H T R _ F 4B 1 5 6 .2V R . This is required in order to meet the maximum DC voltage level as specified by the TPS65950 Power Management device which is 4. although this is far and above the requirements of the board. 1 0 V Figure 24.2V rating of the TPS65950. Figure 25 is the power conditioning section of the BeagleBoard.7V on its VBAT input and a nominal of 4. Using 4. the actual voltage can be adjusted if needed.2VDC level. is used to convert the DC_5V.2V gives us some margin and meets the nominal 4.2V to meet this requirement. VBAT Power Conditioning The TPS65950 provides the main power rails to the board and has a maximum limit of 4. The TL1963A is a linear low-dropout (LDO) voltage regulator and is thermal shutdown and current limit protected. which can come from a DC wall supply or the USB. It has the ability to deliver 1A of current. the TL1963A. 1 1 . 1 x . Page 51 of 171 . U3.

REF: BB_SRM_xM 8.7

BeagleBoard-xM System Reference Manual

Revision A2

TPS65950 Reset and Power Management

The TPS65950 supplies several key functions on the BeagleBoard. This section covers a portion of those functions centered on the power and reset functions. Included in this section are: o o o o o Main Core Voltages Peripheral Voltages Power Sequencing Reset Current measurement via SW

The other functions are covered in other sections in this document and are grouped by their overall board functions. The explanation of the various regulators found on the TPS65950 is based upon how they are used in the board design and are not intended to reflect the overall capability of the TPS65950 device. Please refer to the TPS65950 documents for a full explanation of the device operation.
8.7.1 Main Core Voltages

The TPS65950 supplies the three main voltage rails for the processor and the board: o VOCORE_1V3 (1.2V, adjustable)
o o VDD2 VIO_1V8 (1.3V) (1.8V)

The VOCORE_1V3 defaults to 1.2V at power up, but can be adjusted by software to the 1.3V level. Figure 26 is the interfacing of the TPS65950 to the system as it provides the three main rails.
8.7.2 Main DC Input

The main supply to the TPS65950 for the main rails is the VBAT rail which is a nominal 4.2V. Each rail has a filter cap of 10uF connected to each of the three inputs. A .1uF cap is also provided for high frequency noise filtering.
8.7.3 Processor I2C Control

The various components in the TPS65950 are controlled from the processor via the I2C interface. I2C_0 is used to control the TPS65950 device.

Page 52 of 171

REF: BB_SRM_xM
8.7.4 VIO_1V8

BeagleBoard-xM System Reference Manual

Revision A2

The VIO_1V8 rail is generated by the TPS65950 VIO regulator. The VIO output is a stepdown converter with a choice of two output voltage settings: 1.8 V or 1.85 V. The voltage is set by configuring the VSEL bit (VIO_VSEL[0]). When the VSEL bit is set to 0, the output voltage is 1.8 V, and when it is set to 1, the output voltage is 1.85 V. When the TPS65950 resets, the default value of this LDO is 1.80 V; the processor must write 1 to the VSEL field to change the output to 1.85 V. The default for the BeagleBoard is 1.8V. This regulator output is used to supply power to the system memories and I/O ports. It is one of the first power supplies to be switched on in the power-up sequence. VIO does not support the SmartReflex voltage control schemes. VIO can be put into sleep or off mode by configuring the SLEEP_STATE and OFF_STATE fields of the VIO_REMAP register.

Page 53 of 171

REF: BB_SRM_xM

BeagleBoard-xM System Reference Manual
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Main Power Rails

Page 54 of 171

The processor computes the required voltage and informs the TPS65950 using the SmartReflex I2C interface. which in the case of the BeagleBoard is 1.7. 8. The VDD1 regulator is a 1. the VDD1 output voltage can also be controlled by the AM3730 through the SmartReflex I2C interface between the AM3730 and the TPS65950. The SmartReflex controller in the processor interfaces with the TPS65950 counterpart through the use of a dedicated I2C bus. The MODE field of the VDD1_SR_CONTROL register can be set to 0 to put VDD1 in an ACTIVE state. This regulator is used to power the AM3730 core. the TPS65950 provides the VDD1_SR_CONTROL register. The VDD2 regulator is a stepdown converter with a configurable output voltage of between Page 55 of 171 . The VOCORE_1V3 rail should be set to 1. When the DCDC_SLP bit is 1. The output voltage of the VDD1 regulator can be scaled by software or hardware by setting the ENABLE_VMODE bit (VDD1_VMODE_CFG[0]). In each of these modes.6 VOCORE_1V3 The VOCORE_1V3 rail is supplied by the VDD1 regulator of the TPS65950. The AM3730 can request the TPS65950 to scale the VDD1 output voltage to reduce power consumption. The default output voltage at power-up depends on the boot mode settings. To perform VDD1 voltage control through the SmartReflex interface. depending on the value of the STEP_REG field of the VDD1_STEP[4:0] register. the output voltage ramp can be single-step or multiple-step.7 VDD2 The VDD2 voltage rail is generated by the TPS65950 using the VDD2 regulator.6 V and 1. VDD1 output voltage can be programmed by setting the VSEL field of the VDD1_SR_ CONTROL register. The VDD1 output voltage is given by VSEL*12. 8. The default voltage scaling method selected at reset is a software-controlled mode.1A stepdown power converter with configurable output voltage between 0.5 Main Core Voltages Smart Reflex VDD1 and VDD2 regulators on the TPS65950 provide SmartReflex-compliant voltage management.5 mV.45 V in steps of 12. Regardless of the mode used.5 mV + 600 mV. VDD1 can be configured to the same output voltage in sleep mode as in active mode by programming the DCDC_SLP bit of the VDD1_VMODE_CFG[2] register to 0.7.2V.7. the sleep mode output voltage of VDD1 equals the floor voltage that corresponds to the VFLOOR field (VDD1_VFLOOR[6:0]).REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. SmartReflex control of the VDD1 and VDD2 regulators can be enabled by setting the SMARTREFLEX_ENABLE bit (DCDC_GLOBAL_CFG[3]) to 1.3V after boot up. Apart from these modes. setting the field to 1 moves VDD1 to a SLEEP state.

The VPLL2 LDO can be configured through the I2C interface to provide output voltage levels of 1. VDD2_STEP.5 mV + 600 mV.8. The VDD2_SR_CONTROL register is provided for controlling the VDD2 output voltage in SmartReflex mode. The VDD2 provides different voltage regulation schemes.3 V. Page 56 of 171 .8 Peripheral Voltages There are 10 additional voltages used by the system that are generated by the TPS65950. DSS_DATA(10:15) and DSS_DATA(22:23). the VSEL (VDD2_ DEDICATED[4:0]) field can be programmed to provide output voltages of between 0.45 V.8V for proper operation of the DVI-D interface. The use of the VMODE2 signal and the VDD2_VMODE_CFG. The output voltage for a given value of the VSEL field is given by VSEL*12. These are: o o o o o o o o o o VDD_PLL2 VDD_PLL1 VDAC_1V8 VDD_SIM VMMC2 VDD_VMMC1 CAM_2V8 CAM_1V8 USB_1V8 EXP_VDD Figure 27 shows the peripheral voltages supplied by the TPS65950. VDD2 shares the same SmartReflex I2C bus to provide voltage regulation. When VDD2 is controlled by the VMODE2 signal or with the SmartReflex interface. On the board this rail is used to power DVI output for pins DSS_DATA(0:5).1 VDD_PLL2 This programmable LDO is used to power the processor PLL circuitry.2 V. 1.45 V. The VPLL2 must be set to 1.5 V. VDD2 differs from VDD1 in its current load capabilities with an output current rating of 600 mA in active mode.45 V and is used to power the processor core.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 0. If the VSEL field is programmed so that the output voltage computes to more than 1.6 V to 1. VDD2_FLOOR.8 V. or 1. the TPS65950 sets the VDD2 output voltage to 1.45 V. based on the value of the VSEL field (VPLLI_DEDICATED[3:0]). 8. the range of output voltage is 0. 1.6 V and 1. 8. When the VDD2 is used in software-control mode.0 V.6 V and 1. and VDD2_ROOF registers is similar to the use of the corresponding signals and registers for VDD1.

or 1. 0 8 0 5 . Peripheral Voltages 8.1 I N C 1 . 1 1 0 u V F .8. 1 u F N 4 P C H GN A 6 C P C H G PU 5 S B V C C P S4 V B A T S5 R V B A T B B a c k u p I O C I A B . The VDAC LDO can be configured to provide 1. 1I U X H1 21 L L AK 31 V I N T C 1 1 3 1 u F . It is controllable with registers via I2C and can be powered down if needed. 1 1 0 u V F .2 VDD_PLL1 The VPLL1 programmable LDO regulator is low-noise.3 V. The VDD_PLL1 rail is initialized to 1. 1 0 V I O _ 1 P 8 V V B B C 1 u 1 F 0 8 . 1 10 uV F .8V for the BeagleBoard. Page 57 of 171 . 1. C E R . LD A T . O 3 4 G. 1 0 V C 1 u 1 F 0 9 . O 5 U 4 T U U T T U6 U U U T T T T V V V V V V C C U E C 1 2 2 C 1 2 0 C 1 2 1 1 u F .8 V in on power mode. 1 0 V V V V M M D V V V M M U U U U A P P S C C X X X X C L L V V V V A A A A J 1 L 21 H L 1 L 2 . U S B N S5 R5 K 1 A C L . O 1 3 M. based on the value of the VSEL field (VDAC_DEDICATED[3:0]).2V. 1 N U M A C P 1 T O 1 T 8 8 4 C V V V B B A A D T . R D T . The VDAC_1V8 rail should be set to 1. 1 1 0 u V F . R D A T . 3 V Figure 26. 1 1 0 u V F . 1 C 2 1 3 C 0 1Vu F . O2 1B . 9I N 4 T . I N B 2 X R .3 VDAC_1V8 The VDAC programmable LDO regulator is a high-PSRR. 1 u I O _ 1 P F 8 . 0 6 0 3 L e v e l 00 7. L 1 1 I G 2H T 1 I G H T 9 E 1 F0 T E F T B 1 K B A T . 1 0 1 V u F . 0 2 Vu F D D _ P L L 2 D D _ P L L 1 D A C _ 1 V 8 D D _ S I M M M C 2 D D _ M M C 1 A M _ 2 V 8 A M _ 1 V 8 S B _ 1 V 8 X P _(1. 1 0 V b a t t e r y B K I O R V I O _ 1 V 8 6 5 0 B T 1 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. 1 C 1 1 4 C 1 1 5 C 1 1 6 0 1 V u F . U 7 BT P S 6 5 9 5 0 V I C I C I C I C V P A T L T L T L T L R C N 5 B C I N 7 AP C2 1 A C 2 P 6 U PS 1B U S B E N C 2 H 1 2 T 2 _ V P R E V C B H A T C 1 0 4 0 . 16 u. 3 F V . linear regulator that powers the AM3730 dual-video DAC. O 2 1 . linear regulator used for the processor PLL supply.8V. 6 . 1 0 1 1 V 2 0 u 8 F .85V-3V) V D D C 1 2 3 C 1 2 4 C 1 2 5 C 1 2 6 C 1 2 7 . 1 0 V V B A T B A T _ L I _ R T C V V V V V V V M M B A D A P M M A U A 3 C C 2 .8.K O 2 I M 4 A 2 C . low-noise. 21 . O 3 2 M. 1 1 0 u V F .

8V.8V and can deliver up to 200mA of power. low dropout.0 V. or 3.8.8V and can deliver up to 100mA of power. The default output voltage of this LDO as directed by the TPS65950 boot pins is 1. VAUX4 is adjustable from . VAUX4 is adjustable form 1.8 CAM_1V8 This rail powers the optional camera module and uses the VAUX3.6 VDD_VMMC1 The VMMC1 LDO regulator is a programmable linear voltage converter that powers the MMC1 slot and includes a discharge resistor and overcurrent protection (short-circuit). The VMMC1 rail defaults to 3.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.8.5 VMMC2 The VMMC2 rail uses the VMMC2.8 V.8 V. 8.0V in the event 3V cards are being used.8.7 to 2. the Auxiliary Access Header.OUT rail form the TPS65950. This railed should be set to 1.4 VDD_SIM This voltage regulator is a programmable. VMMC2 is adjustable from 1. The VMMC1 LDO is powered from the main VBAT rail. The proper setting of this rail is determined by the application and the HW supplied that connects to P17.0 V and can deliver up to 50mA.8V for proper operation of the camera module.9 USB_1V8 Page 58 of 171 . VMMC2 is provided as an auxiliary voltage rail on P17.8.7 CAM_2V8 This rail powers the optional camera module and uses the VAUX4. 1. 8.15V and can deliver up to 100mA of current. 8. linear voltage regulator supplying the bottom 4 bits of the 8 bit SD/MMC card slot.8.8V for proper operation of the camera module. 2.8.85 to 3. See the camera module section for more information. The VSEL field (VSIM_DEDICATED[3:0]) can be programmed to provide output voltage of 1. This railed should be set to 1. 8.5 to 2. This LDO regulator can also be turned off automatically when the MMC card extraction is detected. 8. It can be set to 3. 1.0V as directed by the TPS65950 boot pins and will deliver up to 220mA. 1.3 V.2 V.OUT rail from the TPS65950. See the camera module section for more information.OUT rail from the TP65950.

0V and can deliver up to 200mA of current. 8.8V I/O rail of the USB PHY and includes a discharge resistor and overcurrent protection (short-circuit). 8. Page 59 of 171 .9. The proper setting of this rail is determined by the application and the HW supplied that connects to P13.OUT rail from the TP65950.9. The voltage rail is labeled VDD_EHCI on the schematic. For the AM3730 support. the boot pin configuration is fixed at: o BOOT0 tied to VBAT o BOOT1 tied to Ground.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The VAUX2 LDO regulator is a programmable linear voltage converter that powers the 1. The VAUX2 LDO is powered from the main VBAT rail.1 Boot Configuration The boot configuration pins on the TPS65950 determine the power sequence of the device.8. When the battery is not installed.5 to 3.0V as directed by the TPS65950 boot pins and will deliver up to 220mA. You must make sure that prior to installing the battery that R66 is removed.9 Other Signals This section describes other signals in the design that have not been categorized. EXP_VDD is provided as an auxiliary voltage rail on P13. 8. The battery can be purchased from DigiKey or other component suppliers. the LCD Expansion Header. 8.10 EXP_VDD The EXP_VDD rail uses the VAUX1. The board does not come equipped with the battery.2 RTC Backup Battery An optional battery to backup for the Real Time Clock that is in the TPS65950 is provided for in the design. The VMMC1 rail defaults to 3. EXP_VDD is adjustable from 2. R66 must be installed.11 for information on the battery selection and installation. Refer to section 9.

Figure 27 is the sequence in which the power rails.3 Power Sequencing BeagleBoard-xM System Reference Manual Revision A2 Based on the boot configuration pins. The voltages are ramped in a sequence that is compatible with the processor. in this case the processor.9. the TPS65950 knows the type of OMAP processor that it needs to support. Power Sequencing Page 60 of 171 .REF: BB_SRM_xM 8. and reset signal come up. clocks. Figure 27.

1uF U5A 1 6 R42 10K VIO_1V8 AH25 AF24 VBAT IO_1P8 AM3730 U4B P9 SYS_nRESPWRON SYS_nRESWARM/GPIO_30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 1 3 5 7 9 11 13 15 17 19 21 23 25 27 VIO_1V8 PROCESSOR nRESET S2 4 3 2 1 B3F-1000 SN74LVC2G07DCKR Page 61 of 171 .9. nRESWARM goes low and resets all the peripherals and the TPS65950. 8.2 Cold Reset On power up as shown in Figure 27. power on reset.7K R59 VIO_1V8 C12 R53 DNI 0. the signal becomes open drain. 8. There is no way for the user to generate a warm reset on the BeagleBoard. which requires a pullup on the signal.4 Reset Signals BeagleBoard-xM System Reference Manual Revision A2 The BeagleBoard uses three distinct reset circuits: o Warm Reset o Cold Reset o User Reset Figure 28 shows the connections for the Reset interfaces.REF: BB_SRM_xM 8.1 Warm Reset Reset Circuitry The warm reset is generated by the processor on power up.4. an external pullup resistor is required. By running the signal through a buffer.9. The TPS65950 can be configured to perform a warm reset of the device to bring it into a known defined state by detecting a request for a warm reset on the NRESWARM pin. The nRESWARM output is open-drain. the TPS65950 generates nRESPWRON. U7A 5 Figure 28. The signal from the TPS65950 is an output only and is not an open drain signal.9. This will allow the nRESPWRON signal to be 2 T P S 6 5 9 5 0 R61 4.4.7K VBAT nRESPWRON nRESWARM PWRON A13 B13 A11 nRESPWRON nRESWARM PWRON 4. When an internal reset occurs. SN74LVC2G07. consequently. The nRESWARM signal is a bidirectional reset. The minimum duration of the pulse on the nRESWARM pin should be two 32-kHz clock cycles.

Page 62 of 171 . an interrupt is generated into the processor. By pushing the Reset button.4.9.9. After initialization. by pressing the reset switch S2.4 PWRON You will notice another signal on the TPS65950 called PWRON. 8.9. 8. It also allows for the reset signal to be pulled low or held low for an extended time by circuitry on the expansion card if needed. The software that is run as a result of this can then do whatever housekeeping is required and then send the processor into a reset mode. this pin becomes an input to the processor. This signal is referenced in the TPS65950 documentation. For more information on the operation on the signal. please refer to the processor Technical Reference Manual. to force a reset to the AM3730 processor and to any device on the expansion card that require a reset.5 mSecure Signal This signal provides for protection of the RTC registers in the TPS65950 be disabling that function via a control signal from the processor.3 User Reset The USER RESET button can be used to request a Warm Reset from the processor. In the BeagleBoard design it is not used but it is pulled high to insure the desired operation is maintained.4.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 pulled low. 8.

and graphics processing sufficient to various applications. multimedia application device and is integrated on TI's advanced 45-nm process technology. such as: o Windows CE o Linux Page 63 of 171 . image.The architecture is designed to provide best-in-class video.1 Overview The DM3730 high-performance.10 Processor The heart of BeagleBoard is the DM3730 processor. Some features are not available in the lower-tier devices.10. AM37x Block Diagram 8.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. The processor architecture is configured with different sets of features in different tier devices. Figure 29 is a high level block diagram of the processor. For more information. Figure 29. refer to the Technical Reference Manual (TRM). The processor supports high-level operating systems (OSs).

10. you will notice on page 3 there are a lot of signals labeled NA0…65. The address of the memory space is programmable. 8. Page 64 of 171 . These pins are located on the bottom of the processor.3 GPMC Bus The GPMC bus is not accessible on the BeagleBoard.2 SDRAM Bus The SDRAM bus is not accessible on the BeagleBoard. If you look at the –xM schematic. The DM3730 supports the following functions and interfaces on the BeagleBoard: o Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8™ microprocessor o POP Memory interface o 4Gb MDDR (512Mbytes) o 24 Bit RGB Display interface (DSS) o SD/MMC interface o USB OTG interface o NTSC/PAL/S-Video output o Power management o Serial interface o I2C interface o I2S Audio interface (McBSP2) o Expansion McBSP1 o JTAG debugging interface 8.10. these pins provided access to the SDRAM bus. in the case of the processor on the –xM. Its connectivity is limited to the POP memory access on the top of the processor and therefore is only accessible by the SDRAM memory. The base address for the DDR SDRAM in the POP device is 0x8000 0000. Its connectivity is limited to the POP memory access on the top of the processor and therefore is only accessible by the NAND memory. The memory on the GPMC bus is NAND and therefore will support the classical NAND interface. these there are no signals on these pins. In the Rev C4 processor.REF: BB_SRM_xM o QNX o Symbian o Others BeagleBoard-xM System Reference Manual Revision A2 This processor device includes state-of-the-art power-management techniques required for high-performance low power products. However.

The DSS is configured to a maximum of 24 bits. Only four signals are supported on the McBSP2 port. There are 6 signals supported on McBSP1.8V so it will require buffering of the signals to drive most LCD panels.6 McBSP1 McBSP2 Interface McBSP1 provides a full-duplex direct serial interface between the processor and the expansion interface. The logic levels of the LCD expansion connectors are 1.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.10. Page 65 of 171 . unlike the 4 signals on the other ports.4 DSS Bus The display subsystem provides the logic to display a video frame from the memory frame buffer in SDRAM onto a liquid-crystal display (LCD) display via the DVI-D interface or to a standalone LCD panel via the LCD interface connectors. Processo r Figure 30. Figure 31 is a diagram of McBSP1. 8. 8.10. Figure 30 is a depiction of McBSP2. but can be used in lower bit modes if needed.10.5 McBSP2 The multi-channel buffered serial port (McBSP) McBSP2 provides a full-duplex direct serial interface between the processor and the audio CODEC in the TPS65950 using the I2S format.

the default signal is the correct signal.10. Figure 32 is a diagram of McBSP3. the pins used must be set to the correct signal. In some cases. Each pin can have a maximum of 8 options on the pin. the majority of pins have multiple configurations that the pin can be set to. McBSP1 Interface 8. Processo r Figure 32.7 McBSP3 McBSP3 provides a full-duplex direct serial interface between the processor and the expansion interface. This is called the pin mode and is indicated by a three Page 66 of 171 . the pin can become different signals depending on how they are set in the software. In essence. In order for the BeagleBoard to operate. McBSP3 Interface 8.10.8 Pin Muxing On the processor.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Processo r Figure 31.

please refer to the Expansion Header section. A FIXED indicates that there is only one function for that signal and that it cannot be changed. the settings required for those pins depends on how they are to be used. Table 4. The USER notation under mode indicates that this is an expansion signal and can be set at the discretion of the user. In the case of the signals going to the expansion connector. Table 4 is a list of all of the signals used on the processor for the BeagleBoard and the required mode setting for each pin.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 bit value (0:3). Where the default setting is needed. Processor Pin Muxing Settings Signal DSS MMC1 MMC2 UART3 GPMC UART1 I2C1 I2C2 I2C3 I2C4 JTAG TV_OUT SYS_nRESPWRON SYS_nRESWARM SYS_nIRQ SYS_OFF SYS_CLKOUT SYS_CLKOUT2 SYS_CLKREQ SYS_XTALIN GPIO_149 GPIO_150 McBSP1 McBSP2 McBSP3 GPIO_171 GPIO_172 Mode Default Default User Default Default Default Default Default Default Default FIXED Default Default Default Default Default Default Default Default FIXED 4 4 Default User Default 4 4 Page 67 of 171 . it will be indicated. Each pin can be set to a different mode independent of the other pins on the connector. For an explanation of the options.

10.10 Interrupt Mapping There are a small number of pins on the processor that act as interrupts. may also be set as a GPIO pin. TPS65950 Pin Processor PIN AF26 AH8 INT/GPIO SYS_nIRQ GPIO_29 GPIO0 Processor Interrupt Pins USAGE Interrupt from the TPS65950 SD Write protect lead. Table 6 lists the interrupts. If it is an interrupt. OMA P PIN AA9 W8 AG9 J25 AE21 INT/GPIO GPIO_149 GPIO_150 GPIO_23 GPIO_170 GPIO_7 I/O O O I O I Signal LED_GPIO149 LED_GPIO149 MMC1_WP DVI_PUP SYSBOOT_5 Processor GPIO Pins USAGE Controls User LED0 Controls User LED1 SD/MMC card slot Write protect Controls the DVI-D interface. refer to the Expansion Connector section. such as those that connect to the expansion connector. MMC1 card detect input. the table only covers the GPIO pin mode. Goes to the processor over the SYS_nIRQ pin. Can be polled or set to an interrupt. While GPIO pins can be used as interrupts. Some of these interrupts are connected to the TPS65950 and their status is reflected through the main TPS65950 interrupt. Used to put the device in the boot mode or as a user button input Other signals. Table 5.10. P12 Page 68 of 171 . 8. For information on those. then it is covered in the interrupt section. Table 6.9 GPIO Mapping BeagleBoard-xM System Reference Manual Revision A2 There are a number of GPIO pins from the processor that are used on the BeagleBoard design. A Hi = DVI-D enabled.REF: BB_SRM_xM 8. Table 5 shows which of these GPIO pins are used in the design and whether they are inputs or outputs.

Figure 33 shows the POP Memory concept. such as USB HUB.REF: BB_SRM_xM 8. The configuration used on the board is a 200MHz 4Gb MDDR SDRAM device from Micron. 32KHz.11 POP Memory Device BeagleBoard-xM System Reference Manual Revision A2 The processor uses what is called POP (Package-on-Package) memory. 8. 26MHz and McBSP_CLKS. V O S C Y 1 2 O N C S _R E 5 N 5 1 C O C M _ + V / OC C UA 4 C E H Z _ 2 E 6 M A E H ZR 5 6 3 3 H F R 4 7 L K _ 2 6 M H z A 1 4 3 3 H F C L K O R U 1 2TH F C H F C O S C _ C E 6N D 7 C L K G 1 0C L K C L K 2 5 D 6 1 3CS L K F R 5 1 3 3 C L K P T F2 _ X O U T P 1 5 P 1 63 2 K 3 2 K Y 3 3 2 K 1 C 1 02 32 P F H z C r y s N t a l 1 0 3 2 K C L L K K I N O U T 4 . POP Memory The Memory device mounts on top of the processor. 1 0 V U 7 AT P S 6 5 9 5 0 3 TS 2 6 M E N E N 2 R E Q 2 5 6 F X O U X I N C L K T O S C 1 02 2 2 2 U T T 2 _ X I N A A A F E Processor3 7 3 U0 _4 EB S O M A P 2 5 S Y S _ C L K R E Q 1 S 7 Y S _ X T A 3 2 K P _ C L I N L K S S _ B S 1 . There are additional clocks needed elsewhere in the system. Figure 34 shows the components that make up the System Clocks. The memory is a MCP (Multi Chip Package) that contains a dual Mobile DDR SDRAM stack. 1 u F . but those are discussed in separate sections.12 System Clocks There are three main clocks needed for the operation of the board. System Clocks Page 69 of 171 . 7 K I O _ 1 V 8 C 8 5 0 . 0 / G P I O _ 1 E 2 5 T 2 1S Y M c Figure 34. Figure 33.

The 32. The clock signal enters via ball AE17 on the PROCESSOR. On the BeagleBoard.1 32KHz Clock BeagleBoard-xM System Reference Manual Revision A2 The 32KHz clock is needed for the TPS65950 and the processoe and is provided by the TPS65950 via the external 32KHz crystal. The RTC is not enabled by default.12.2 26MHz Clock This section describes the 26MHz clock section of the BeagleBoard.12. 8. The three DCDC switching supplies (VIO. The TPS65950 has a separate output from the crystal to drive the processor that buffers the resulting 32-kHz signal and provides it as 32KCLKOUT.2.12. HFCLK_FREQ must be set by the processor during the initial power-up sequence. and in that condition. HFCLK_FREQ has a default of being not programmed.2.768-kHz clock drives the RTC embedded in the TPS65950.5-M byte.2.12. The TPS65950 receives the external HFCLKIN signal on ball A14 and uses it to synchronize or generate the clocks required to operate the TPS65950 subsystems. and VDD2) operate from their free-running 3-MHz (RC) oscillators. The default mode of the 32KCLKOUT signal is active. 8. the Processor must immediately indicate the HFCLKIN frequency (26 MHz) by setting the HFCLK_FREQ bit field (bits [1:0]) in the CFG_BOOT register of the TPS65950. The TPS65950 must have this clock in order to function to the point where it can power up the BeagleBoard.2 TPS65950 Setup When the TPS65950 enters an active state.12.1 26MHz Source The BeagleBoard is designed to support two suppliers of the 26MHz oscillator. 8. but it can be disabled if desired under SW control. Y1. The 26MHz clock is provided by an onboard oscillator. a 33 ohm resistor is providing to minimize any reflections on the clock line.3 Processor 26MHz The 26MHz clock for the processor is provided by the TPS65950 on ball R12 through R38. this is done by the internal boot ROM on startup. the USB subsection does not work. Page 70 of 171 . VDD1. This is the reason the 26MHz clock is routed through the TPS65950. and the PWR registers are accessed at a default 1. the host processor must set the correct date and time to enable the RTC. Y2. 8.REF: BB_SRM_xM 8. which is provided to the processor on ball AE25.

The USB peripherals cannot initiate data transfers. As the Rev B does not have a Host USB port. The USB OTG compatible devices are able to initiate the session. 8.0 specification. The primary mode of operation however.REF: BB_SRM_xM 8. but it describes role swapping only in the case of a one-to-one connection where two OTG devices are directly connected. the BeagleBoard must be powered from the DC supply. is not really needed. the supplement notes that using it will lead to losing USB OTG role-swap capabilities making one device as the Default-Host and the other as the Default-Peripheral until the hub is disconnected. If a standard hub is used. It can be used as an OTG port. With the addition of the USB Host ports. The main use is as a client port.1 USB OTG Overview USB OTG is a supplement to the USB 2. Only the USB host can schedule the configuration and data transfers over the link.12. This clock is provided to the PROCESSOR in order to insure synchronization of the I2S interface between the processor and the TPS65950.13. NOTE: In order to use the OTG in the Host mode. The standard USB uses a master/slave architecture. or Host port. they only respond to instructions given by a host. the need to use three OTG port as a Host.3 McBSP_CLKS BeagleBoard-xM System Reference Manual Revision A2 An additional clock is also provided by the TPS65950 called McBSP_CLKS. 8. control the connection and exchange Host/Peripheral roles between each other. as that is the mode that will supply the power needed to power the BeagleBoard. is intended to be a client mode in order to pull power from the USB host which is typically a PC. this port will be used as a Host port in many applications. An example might be connecting a USB keyboard or printer to BeagleBoard or a USB printer that knows how to grab documents from certain peripherals and print them. a USB host acting as a master and a USB peripheral acting as a slave.13 USB OTG Port The BeagleBoard has a USB OTG (On-the-Go) port. Page 71 of 171 . The combination of the processor and the TPS65950 allows the BeagleBoard to work as an OTG device if desired. Client port. USB OTG works differently in that gadgets don't need to be pure peripherals because they can sometimes act as hosts. The USB OTG supplement does not prevent the use of a hub.

13. The ULPI used on the BeagleBoard keeps this down to only 12 signals because it combines just three control signals. Page 72 of 171 .0 systems. 7 Figure 35. 0 F R 8 6 0 3V . plus clock. This bus is also used for the USB packet transmission and for accessing register data in the ULPI PHY. 6 .13. 8.2 USB OTG Design Figure 34 is the design of the USB OTG port on the BeagleBoard. This leads to a corresponding increase in complexity and pin count. which utilize serial interfaces. 1 u F . Unlike full.A B 3 M R R C 86 5 70 u .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.3. high-speed requires a parallel interface between the controller and PHY in order to run the bus at 480Mbps. G 2 4 4 4 4 4 4 4 4 U U U U U U U U S S S S S S S S B B B B B B B B 0 0 0 0 0 0 0 0 H H H H H H H H V S S S S S S S S B _ _ _ _ _ _ _ _ U D D D D D D D D S A A A A A A A A _ T T T T T T T T K 0 K 1 J 2 J 3 G 4 G 5 F 6 F 7 5 V 1 1 1 1 1 1 1 1 0 4 3D 4D 3D 4D 3D 4D 3D D A A A A A A A A T T T T T T T T A A A A A A A A 0 1 2 3 4 5 6 7 D D I D T 1 1 N T 1 0 P R 1 1 J 2 J P G B 0 0 1 + 1 1 M 0 6 P 0 3 D P M 1 G R D B 0 2 0 1 0 C 3 D 3 D 4 B 30 M0 0 1 2 3 4 5 G 4 9 0 . 1 6 0 3 PM G R B 0 V 0 0 1 P 0 G6 1R 0 6 0 8 G 5 V B D D + I D G 1 G 3 4 U 4 U 4 U 4 U S B 0 H S B 0 H S B 0 H S B 0 H S _ C S _ S S _ D S _ N L 1 L K L 1 T P L 1 I R M 1 X T U 7 AT P S 5 4U C L K 3S T P 3D I R N X T 6 5 9 5 0 V B U S _ 5 V 0 U O S B T G _ C L I Em Ni n iT P O R T P 1 7 6 U /S B .13. ULPI stands for UTMI+ low pin interface and is designed specifically to reduce the pin count of discrete high-speed USB PHYs. It provides all of the required signals to drive the interface. 0 S 6 0 3 4 .1 Processor Interface The controller for the ULPI interface is the Processor. Table 7 describes the signals from the processor that are used for the USB OTG interface. It defines an interface between USB link controller (processor) and the TPS65950 that drives the actual bus. . 3 V B U . 8. with an 8-bit bi-directional data bus. Pin count reductions minimize the cost and footprint of the PHY chip on the PCB and reduce the number of pins dedicated to USB for the link controller.3 OTG ULPI Interface USB OTG Design ULPI is an interface standard for high-speed USB 2.and low-speed USB systems.

Page 73 of 171 . the BeagleBoard will need to be powered from the DC supply.8 V/100 mA to the VBUS pin. Table 8 is a list of the signals used on the TPS65950 for the ULPI interface. Table 8.4 OTG Charge Pump When the TPS65950 acts as an A-device.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Table 7. the USB charge pump is used to provide 4. Processor ULPI Interface Revision A2 Signal hsusb0_clk hsusb0_stp hsusb0_dir hsusb0_nxt hsusb0_data0 hsusb0_data1 hsusb0_data2 hsusb0_data3 hsusb0_data4 hsusb0_data5 hsusb0_data6 hsusb0_data7 Description Dedicated for external transceiver 60-MHz clock input from PHY Dedicated for external transceiver Stop signal Dedicated for external transceiver Data direction control from PHY Dedicated for external transceiver Next signal from PHY Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Transceiver Bidirectional data bus Type I O I I I/O I/O I/O I/O I/O I/O I/O I/O Ball T28 T25 R28 T26 T27 U28 U27 U26 U25 V28 V27 V26 8. there will not be a voltage source on the USB OTG port to drive the BeagleBoard. When the TPS65950 acts as a B-device. Table 9 describes the charge pump pins. If used in the OTG mode as an A-device. If acting as a B-device.13.3.2 TPS65950 Interface The TPS65950 USB interfaces to the Processor over the ULPI interface. the USB charge pump is in high impedance. TPS65950 ULPI Interface Signal UCLK STP DIR NXT DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 Description High speed USB clock High speed USB stop High speed USB dir High speed USB direction High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 High speed USB Data bit 0 Type I/O I O O I/O I/O I/O I/O I/O I/O I/O I/O Ball L15 L14 L13 M1 K14 K13 J14 J13 G14 G13 F14 F13 8.13.

The charge pump integrates a short-circuit current limitation at 450 mA. The charge pump flying capacitor plus. pin 4 of the connector must be grounded. This allows for the support of LS and FS USB devices without the need for an external USB HUB.7 V to 4. the need to convert the OTG port to a host mode is greatly diminished. If you want to use the OTG port as a USB Host. The -xM Rev A version of Beagle provides jumper pad.8-V (nominal) power supply voltage to the VBUS pin. The charge pump generates a 4.CAPM CP. Connected to VBAT. J6 that allows for a small piece of solder to be placed on the pads to perform this function.2V VBAT is within this range. It should be noted that with the USB Host port on the -xM Rev A Beagle. The charge pump flying capacitor minus. In order for the interface to meet the USB 2.13. USB OTG Charge Pump Pins Signal CP.IN CP. 8. these protection devices must be low capacitance.5 OTG USB Connector The OTG USB interface is accessed through the miniAB USB connector.6 OTG USB Protection Each lead on the USB port has ESD protection. 8.CAPP CP. The input voltage range is 2. Type Power O O GND Ball R7 L14 T6 R6 The charge pump is powered by the VBAT voltage rail.13.GND Description The charge pump input voltage. The charge pump ground. Page 74 of 171 .5 V so the 4. Figure 36 is a high level block diagram of the system design of the integrated HUB. 8.0 Specification Eye Diagram. The charge pump operating frequency is 1 MHz. This section describes the design of the HUB and the interface to the processor.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Table 9.14 Onboard USB HUB A new feature of the –xM board is the inclusion of an onboard USB 4 port hub with an integrated 10/100 Ethernet.

The LDO is set to provide 3. The TPS65950 provides the USB_1V8 rail which is used by the USB PHY. Page 75 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 36. a TL1963A LDO. The HUB_3V3 rail. is provided by U16.14. USB HUB Block Diagram The following section covers each of the key function in the overall design. o o o o o Power HS USB PHY HUB USB Port Power Ethernet 8. Power for the LDO is provided by the DC_5V_USB rail from the overvoltage protection circuit. the LDO is turned off. the main supply rail for the HUB.3V and is set by R111 and R113. The processor can turn on or off this rail by communicating with the TPS65950 via the I2C bus. This rail can be turned on or off from the processor by using the I2C bus to communicate to the TPS65950. Figure 37 is the design of the HUB power circuitry.1 Power The power for the HUB is provided by two sources. By default.

S C L D A / V F 1 5 I B R A . 0 6 0 3 3 U SBLED _R .7 K A M 3 7 x I 2 C I 2 C U 4 B x _ E S J 2 1 1 _ K 2 1A S D 1 _ S C L 4 . 1 R 1 1 3 3 2 . 7 u F . C . 4 K . 1 % u F . 3C V 2 . A PHY is required between the processor ULPI interface and the USB HUB. 7 .C 1 9 0 G K T GRN 2 0 4 0 K . Page 76 of 171 . 8. 6 . 1 % % 4 . P D V B A T C _ 5 V _ U S B H U N D 4 T 6 D 5 J 3 A U 1 6 _ RF B1 1 1 5 6 .2 HS USB PHY The configuration of the HS USB PHY is basically the same as on the Rev C4 design.7 K U 1 . indicates that power is applied to the HUB circuitry.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 V I O _ 1 V 8 R 159 R 157 4 . 1 0 1 6 0 U S B R 3 3 1 3 0 6 A C T I V E Figure 37. Figure 39 shows the processor and PHY interface. 0 D D 4 5 I 2 I 2 7 AT P S V N N L E 6 5 9 5 0 T U S B _ 1 V 8 C C . D14. C M 3 A U X 2 . 2 K . HUB Power Circuitry A green LED. S D A T L . O U T L . 6 .14. 0 6 0 3 U B C _ 1 3 7 V 7 3 U 2 1 3 I N S G H 1 6 O G D D A N T L R 1 2 0 1 9 6 D 1 4 L T S T . 3 V .

6 . 1 0 0 3 R . C E H U B _ 3 V 3 C 0 . 0 6 K _ U B S _ B 3 1 V 4 3 _ V D L D 1 2 U H 3 . 1 0 4V . 3 V .7 u F .2 3 A 5 V D D 3I O 0 A V 6 D D 1 2. 0 C LKO U T 0 3 H U B _ 3 V 3 U 2 9 S 3 T1 PS D 2I R D N 1 X TN C 3 0 D 4 1 D 5 2 D 6 3 D 7 4 D 9 5 1 0 D 6 1 3 D 7 1 6 D 1 5 S 2 7 S 2 6 R L K2 5 R XU R 1 0 1 0 K 3 1 4 T P I R X T L K A T A T A T A T A T A T A T A T P K P K E S E F O S B 2 2 B U 1 S9 D M 1 8 D P 2 3 O U T I D 2 4 A 0 R B I A8 S A R 1 E F S 1E 1 A R 2 E F S 1E 4 A R 3 E F S 2E 0 A 4 V D D 3 . 7 u . 1 0 V 1 0 u F . 7 u F . The signals used on this interface are contained in Table 10. 1 u F . 8 7 _ R C P E 2N 1 _ L V B A 1T2 E T B N C 3 3 C L G N D K V 3 3 2 0 ( Q U U U L 0 L 1 L 2 3 _ 1 _ 0 U C 0 F N ) S 2 . 1 1 6 u F 8 C 1 6 9 F .6 . 8 8 A V 7 D D 1 1. 6 . D N I U U 1 % _ 0 S S 6 B B 0 3 D D M P 0 0 H H H S S S H H H H H H H H U U U S S S S S S S S G H S S S S U U U U U U U U B B B A 2 _ AT 2 _ AT 2 _ T S S S S S S S S I O S B B B B B B B B B A A A V Y Y Y A 2 2 2 2 2 2 2 2 F 7 L G L7 _ HL L 7 _ L L _ G 8 H_ D 8 B _ 2D 3_ D 2_ D 3_ D 4_ D A _ 3D _ D IR D 1 RR B1 0 0 0 0I A 2 S8 . 0 6 0 3 4 . 1 u F . Table 10. 0 6 0 . 3 S B 2 Z C _ 1 5 _ 1 V C 8 C 166 0C 6 1 6 8 F 1 3 0 M C 2 0 5 1 6 5 0 m A 60 7. 0 6 O M A P 3 7 3 U0 _4 EB S 1 .3 V . Signal Hsusb2_clk Hsusb2_stp Hsusb2_dir Hsusb2_nxt Hsusb2_data0 Hsusb2_data1 Hsusb2_data2 Hsusb2_data3 Hsusb2_data4 Hsusb2_data5 Hsusb2_data6 Hsusb2_data7 Gpio_147 USB Host Port OMAP Signals Input/Output O O I I I/O I/O I/O I/O I/O I/O I/O I/O O Description External transceiver 60-MHz clock output to PHY External transceiver Stop signal Transceiver data direction control from PHY Next signal from PHY Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Bidirectional data bus signal for 12-pin ULPI operation Enable/reset line to the USB PHY. 6 .0 6 0 3 0 V 5 . 3 V P U R 8 A_ 5E 6 7 2 _ C u F . 3 V . 0 8 4 . 1 S S S B B B 3 3 3 3 _ 3 _ 3 _ VR B 9 U9 1S 0 K .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 U S B _ 1 V 8 R 9 8 0 . Page 77 of 171 . 1 0 V Figure 38. USB PHY Design The interface to the processor is the HSUSB2 interface.

but was added as a “just in case” option if the CLKOUT signal was a source of noise in the PHY.5kΩ pull-up resistors. This is done by tying the CLKOUT signal on the USB PHY to VIO_1V8. All of the signals and their functions align with the descriptions found in the processor interface section. These resistors require no tuning or trimming. The 3. The USB3322 transceiver fully integrates all of the USB termination resistors on both DP and DM. 8.3V rail for the device is generated internally and requires a filter and bypass cap to be connected externally. The clock for the PHY is derived from the 60MHz signal generated by the processor. Figure 40 is the HUB design. The USB3320 is a highly integrated Hi-Speed USB2. The SMSC PHY device supports this mode and is used on the Beagle. The USB_1V8 rail is derived from the VAUX2 rail supplied by the TPS65950 PMIC. only the host mode of operation is being supported as it is used to connect to the HUB on the board. a zero ohm series resistor was added. This includes 1. The USB3322 device requires two voltages. reference resistor connected from RBIAS to ground.14. we ground the ID pin to force it into a Host mode at all times.0 Transceiver (PHY) that meets all of the electrical requirements to be used as a Hi-Speed USB Host. 1% tolerance. Page 78 of 171 . In this design. This block requires an external 8. the USB_1V8 rail to power the I/O rails and the HUB_3V3 to power the rest of the device.3 USB HUB The key component in the HUB design is a SMSC LAN9514 USB HUB plus Ethernet device. As we are not using this device to support the OTG protocol but instead as a host device. In order to interface to the processor. 15kΩ pull-down resistors and the 45Ω high speed termination resistors.06KΩ. The RBIAS block in the PHY consists of an internal bandgap reference circuit used for generating the driver current and the biasing of the analog circuits. the device must be used in the 60MHz clock mode. The PHY used in the design is a USB3320 series device from SMSC. On -XM Rev A. The nominal voltage at RBIAS is 0.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The husb2_clk signal is an output only and is used to support a HS USB PHY that supports an input clock mode. This is not required.8V and therefore the resistor will dissipate approximately 80μW of power. It was proven not to be the case.

1 0 V C 176 C 191 C 192 C 193 . 1 u 1 2 .1 1 x L A N 9 5 1 4 2 7 . 1 % U B T O _ 6 E E D I E E P R O ME E C 2 S4 2 3 E E C L E E D 2 O 5 K E t h e r n e t R 1 1 1 0 K H U B _ 3 V 3 8 K B _ 5E 0 X R E S .0 hub. 1V % F D o w n s t r e a m U 1 B D 2 M 2 U B D 1 P4 2 T C T L 2 3 B D 4 M 3 B D 1 P6 3 T C T L 3 U U S S S S B B B B D D D D M P M P 2 2 _ _ 2 2 U U P U U P R R S S S S P U U R S S 6 B D 7 M 4 B D 1 P7 4 T C T L 4 U U U U S S S S B B B B D D D D M P M P 4 _ _ 4 _ 5 _ 5 3 3 4 4 8 U S B D 9 M 5 U S B D 1 P8 5 P R T C T L 5 2 H U B _ 3 V 3 R 6 3 1 2 .0 hub with a 10/100 Ethernet controller.1 u F . 0 _ 3 V 1 0 A m 3 H U B _ 3 V 3 A C 4 . 1 0 V L 1 1 1 . 0 5 T H P L L S B PV LS L S 6 5 L A G ) U H C C 1 1 U B R _ R 3 1V 0 3 1 1 0 9 U 1 u 1 0 H KU 0 S F R B .0 1 V u F . 21 . 01 . 1 0 1B 1_ V B U V B U U S B S S _ B D p s t r e a m E I A S T U U S S B B D D 5 5 9 P 8 M 0 0 U U S S B B D D P M 0 0 9 7 I A 6 S3 V R 9 06 .s m s c C 1 7 8 3 3 p F Figure 39.1 u F .1 0 V 6 D C K R X I X O H R 1 1 2 1 M U R R R 6 0 .1 u F . 01 . 7 u F 1 8 .2 1 2 0 M Y H 4 6 x z 1 0 7 4 9 1 .0 1 V u 1 8 5 1 8 1 8 1 8 1 8 0 .0 1 V u F C 1 8 2 C 0 . 3 .1 0 V 0 .1 0 V 0 .1 u F . Page 79 of 171 0 . 6 4 C 1 8 0 C 1 8 1 .1 u F .1 0 V 2 p / 0 V V D D DC D DR 1 8 1 8 C 195 V D D 1 18 5C O 3 8 V D V D E T4 H P L 8 U 6S 2 B V P D L V D . 0 6 0 3E X R E M 3 1 3 4 4 n C 174 H U B _ R E S E T 1 3 4 T E 0 T E 7 T E T E 2 n _ S S S S R T T T T E D 4 I 1X _ E A U N T O S R R D I X _ E N 5 X P5 X N 2 3 5 6 R R X P X N M 5 T X P5 T X N T X P T X N 3 V G 1 2 3 4 S P IO n 2 0 n F D X _ L E D2 1 / G P I O 0 L N K A _ L E 2 D2 / G P I O 1 n S P D _ L E D / G P I O 2 G G G G G P P P P P I I I I I 3 O3 O3 O4 O4 O 5 3 6 4 7 5 2 6 3 7 + M is c .1 u F . 4 A H R 1 0 5 U H U . 0F 6 .h c R m B _ 3 V 1 2 1 2 1 0 9 8 8 3 1 0 H K 1 0 H K 1 0 H K 1 0 H K U U U U B B B B _ 2n 8T _ 2T 9M _ 3T 0D 3 1 _ 3T 2C 6 6 1 0 X I X O n T T T T R S T ST R S IM S D I KD O C K T C lo c k s C C L L K K 2 2 4 4 4 4 _ E 4 5 _ O U N C L K 2 4 _ E N 6 T R 1 0 1 0 K J T A G x 2 5 t a l 2 . a 10/100 Ethernet Controller. 0 6 0 3 0 . 10 03 1 V u F .8V core voltage is derived form an internal LDO and requires external filtering. 1V u . 1 3 H U B _ R E U S N 7 S 1 4 L 3 E T 8 B V C 2 G 0 4 0 0 K E T 0 . 0 0 q f n 6 C 1 7 9 3 3 p F 4 . an integrated upstream USB 2. a 10/100 Ethernet PHY. 3 V . Filtering is required on all input pins.1 0 V 0 . 1 0 1 2 3 3 4 9 7 3 9 6 2 p / 0 . The LAN9514/LAN9514i contains an integrated USB 2.0 PHY. 6 0. four integrated downstream USB 2.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 H U B L 1 2 . 1 u F .0 PHYs. 01 .0 0 V A m F C 175 C 194 0 .1 u F . 1K 0 . USB HUB Design The LAN9514/LAN9514i is a high performance Hi-Speed USB 2. 7 u H U B _ 3 V 3 F 1 9 0 C 1 8 6 C 1 8 7 . 0 5 D C R V U 1 5 P o w V V V V V D D D D D R D D D D D D D L DL D E 3 3 3 3 3 3 3 3 3 3 I I I I I C C E U O O O O O O O R R E E ( F V V V V V V V D D D D D D D D D D D D D D e r 5 31 34 35 35 35 36 3 30 39 31 34 37 34 3 A A A A A A A C 4 . The main power supply for the LAN9514 is the HUB_3V3 supplied by the dedicated power regulator.1 0 V . A 1.1 u F .1 0 V 0 . 1 u F C 1 8 3 .

. D C _ 5 V 2 6 3 4 7 8 _ U U I N I N E E E E N N N N S B 1 3 1O O 2O O 1O 2O 3O 4O U U U U C C C C 1 T1 T1 T1 T1 11 12 93 4 5 14 21 30 46 3 2 V V V V B B B B U U U U S S S S 1 2 3 4 C 171 C 172 C 173 0 . The AUTOMIDX feature is enabled which allows for auto polarity detection.1 0 V 0 . In an over current condition the signal is immediately turned off without waiting for the processor to turn off the power. The LAN9514 detects the overcurrent condition and keeps the over current condition turned off. Each port can be turned on or off from the LAN9514 over the USB interface. You will notice that there are no external ESD devices on the connector. is a four port FET with over current detection.1 u F .14. and Ground. 1 2 3 4 0 .1 0 V D C + 1 0 1 0 6 0C + U 1 F0 1 0 6 1C + U 1 F0 1 6 0 2C + 1 6 U 3 0 . The ESD protection is integrated into the USB HUB. 8.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The LAN9514 requires an external 25MHZ crystal to generate the required internal clocks. DP.A SSA H I S H H H E I E I E I E C ML o H n n . 1 2 3 4 M L DH M L DH M L DH A S S B S B n n .1 u F .1 0 V 1 5 T P S 2 0 5 4 B D L A N 9 U5 11 45 1 U S B D 2 M 2 U S B D 1 P4 2 P R T C T L 2 3 U S B D 4 M 3 U S B D 1 P6 3 P R T C T L 3 V U U V U U B U S B S B B U S B S B S D D S D D 1 M P M P 2 A _ 1A _ 1 A A B _ 2B _ 2 B B 6 U S B D 7 M 4 U S B D 1 P7 4 P R T C T L 4 8 U S B D 9 M 5 U S B D 1 P8 5 P R T C T L 5 V U U V U U B U S B S B B U S B S B S D D S D D 3 M P M P 4 A _ 3A _ 3 A A B _ 4B _ 4 B B P U 1V 2D 3D 4G 1V 2D 3D 4G B A A N B B B N 1 S U + D U + D 6 B .A SSA H I S H H H E I E I E I E C ML D o H M L DH M L DH M L DH A S S B S B Page 80 of 171 E S D _ R IN G P U 1V 2D 3D 4G 1V 2D 3D 4G B A A N B B B N 1 S U + D U + D 4 B . VBUS. The optional 24MHz clock output is not used on the board and is disabled.4 USB Port Connectors There a two dual port type A USB connectors used on the –xM board each one provides connections for four signals. a TPS2045.1 u F .1 0 V G N D G N D U 1 F0 0 F C 170 .1 u F . Figure 41 is the design of the power control for each USB host port. DM. This enables the port to automatically switch the TX and RX leads if needed. U13. The overcurrent detect output is tied to the enable pin from the LAN9514.

3u 100BASE-TX compliant. The Ethernet features auto polarity correction and Auto-MIDX.1 % 4 9 . A connector. H U B _ 3 V 3 R 114 R 115 4 9 . A 100uf capacitor is connected to each USB power port for added surge current capabilities.9 .14. The LAN9514 device while performing the function of the HUB also contains the Ethernet controller.N R C G T N 1 2 Y Y 0 G 5 G 6 G 7 G 8 Y Y E S L HC E S L HA R N R N R N R N E L E L + E T H 4 D 5 1 D 2 1 3 D 1 14 D 2 9 2 X _ L E D2 n L N K A _ L E 2 n S P D _ L E D n F D 0 1 / G n LP NI O K 0 A D 2 / n G S P P R I DO 1 01 4 / G P IR O 5 2 0 C A + - R 0 E R 1 .1 % Page 81 of 171 .5 Ethernet Figure 41 is the circuitry that applies to the Ethernet interface on the board.1 % R 116 R 110 L A N 9 5 U1 41 5 P 3 1 2 7 8 6 R K A R 1 1 1 1 1 1 1 1 5 R R 5 X P5 X N 2 3 5 6 R R X P X N H U B _ 5 T X P5 T X N T X P T X N 3 V 3 n S P D n L N T C T T D + T D R D + R D G .1uf capacitor 8.9 .9 . 1 0 . P15.9 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Figure 40. USB Based Ethernet Design The 10/100 Ethernet controller provides an integrated Ethernet MAC and PHY which are fully IEEE 802. 1 0 V Figure 41. A . 1 1 9 2 1 0 3 3 3 0 3 0 H U B _ 3 V T C R 117 T _ R C T 3 A C 0 . with integrated magnetics is used to provide the physical interface off the board. USB Port Power Design Revision A2 Each USB Host port has its own dedicated FET and power control.1 % 4 9 .3 10BASE-T and 802. 0 1 9 8 2 2 u F .1 % 4 9 .

The maximum current this rail can provide is 220mA as determined by the TPS65950 regulator. V D D _ M M C 1 R 74 C 1 0 u 1 F 4 . The processor provides all of the required interfaces for the microSD interface. Maximum current can be limited by the overall current available from the USB interface of the PC. Unlike the Rev C4.15.N26. 1 0 V . 8.P28. C 4 E C R 1 4 5 0 .. 1 u F . can be set to 1. SD/MMC OMAP Signals Signal Name MMC1_CLK MMC1_CMD MMC1_DAT(0.2 Processor Interface There are no external buffers required for the microSD operation. 6 .1 microSD Power microSD Interface The microSD connector is supplied power from the TPS65950 using the VMMC1 rail.8V cards.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. Figure 42 is the microSD interface design on the BeagleBoard. 8. The default setting on this rail is 3.80V for use with 1.0V as set by the Boot ROM and under SW control. SD/MMC Command pin SD/MMC Data pins I/O O I/O I/O Pin N28 M27 N27. D 1 10K 10K 10K 10K 10K U M M M M M M P 4 M M M M M M R A C C C C C C O C 10K 9 5 0 2 O 2U T 1 R 73 V I O _ 1 V 8 R 1 3 1 0 K P D C C V C V D D S C 7 A T 2 G N D / D A T 3 C M D G N D D G N L O C K T B S S T B A T 0 T B A T m1 i c r o H A 2 B 0 3 5 N 2 5 1 _ PD 2 A 8 T 2 1 _ MD 2 A 7 T 3 1 _ C M D 1 1 1 _ N C 2 L 8 K R 1 6 3 3 N 2 7 _ ND 2 A 6 T 0 _ D A T 1 E S S O R 1 2 3 4 5 6 7 8 9 D1 D 1 D1 D1 D 1 D 1 D 0 S 0 14 25 3 0 1 32 43 D Figure 42. Table 11.7) Description SD/MMC Clock output.P27. Its primary use is for providing the boot source for SW. Page 82 of 171 . Table 11 provides a description of the signals on the MMC card. it cannot be used for the typical SDIO or MMC functions. 0 8 0 5 .N25.15. 3 V R 75 R 76 R 77 R 72 U V 7 AT P M M C S C 6 5 C 1P .15 microSD The board provides a single microSD interface.

2 from the MMCA Technical Committee and the Secure Digital I/O Card Specification v2. 3-V I/O voltage on port 1 o Initial 1-bit MMC mode. The ROM code reads out a booting file from the card file system and boots from it. is sent to the processor via the interrupt pin. 8. An interrupt. The MMC/SD specification defines two operating voltages for standard or high-speed cards. This is detected on pin P12 of the TPS65950. Page 83 of 171 .3 Card Detect When a card is inserted into the connector.0 from the SD Association. the Card Detect pin is grounded. if enabled.4 Booting From SD/MMC Cards The ROM code supports booting from the microSD cards with some limitations: o Support for SD cards compliant with the Multimedia Card System Specification v4. o Clock frequency: – Identification mode: 400 kHz – Data transfer mode: 20 MHz o Only one card connected to the bus o FAT12/16/32 support. The SW can be written such that the system comes out of sleep or a reduced frequency mode when the card is detected. A limited range of commands is implemented in the ROM code.15.R27. The ROM code only supports standard operating voltage range (3-V).R25 8. with or without master boot sector (MBR). Including high-capacity (size >2GB) cards: HC-SD and HC MMC. 4-bit SD mode.15. The high-speed microSD host controllers handle the physical layer while the ROM code handles the simplified logical protocol layer (read-only protocol). o 3-V power supply.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 P26.

M I C .M P I C . Figure 43 is the Audio circuitry design on the BeagleBoard. Used to synchronize with the TPS65950 PG B0010603M R I/O I I/O I/O I/O I Pin R21 M21 N21 P21 T21 Page 84 of 171 . C E R O O 3L 3 C 3R 3 C C 4 8 O O 9 N N N N _ _ H H S S O O L R A U D I O _ O U T H H S S M M E I FC I C H 3 3. I 0 C . M 7 p CF 4 7 9 p 0 D F 8 D 9 PG B0010603M R . 0 G 2 B . M E 2 AF I 2 N A I N M I C . S U D I G . 1 . M . M C 9 2 1 0 0 p M M M M I C I C I C I C . M I CC 1 9 7 C 9 6 1 0 0 P F1 0 0 P A U A U F 1 XGL 1 X R A A U U PG B0010603M R F X L C X R C 9 8 9 0 90 . 8. C M . M C 9 4 1 0 0 P C 9 5 F1 0 0 P F F C 9 3 1 0 0 p F 1 3 2 P 5 H S O L C R 8 84 8 74 I N 7 u I N 7 u T E R R _ 5H 8 S F . direct serial interface between CODEC inside the TPS65950. C E R T E R R _ 6H 0 S F . P . Table 12.16. S U . M A A I N I N . P H . 1 u u F F . McBSP2 provides a full-duplex. 1 / B .1 Processor Audio Interface Audio Circuitry There are five McBSP modules called McBSP1 through McBSP5 on the AM3730.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. U 7 AT P S 6 5 9 5 0 H H S S O O B B L R 4 5 H S O C S S M M I C I C . M . 1 C 0 . Processor Audio Signals Signal Name mcbsp2_dr mcbsp2_dx mcbsp2_clkx mcbsp2_fsx Mcbsp_clks Description Received serial data Transmitted serial data Combined serial clock Combined frame synchronization External clock input. IM G I . 1 C C 4 1 7 0 p 1 F 4 VO O 0 F 0 D N N 1 0 N N _ A _ D A 1 U U 1 X L 1 3 A U D I O _ I N P 6 0 CV 1 7 p X R 2 PG B0010603M R Figure 43. P H D 2 I G D . In Table 12 are the signals used on the processor to interface to the CODEC.16 Audio Interface The BeagleBoard supports stereo in and out through the TPS65950 which provides the audio CODEC. M / D I G . It supports the I2S format to the TPS65950. P . M .

3 Audio Output Jack A single 3.16.DIN I2S.5mm jack is provided on BeagleBoard to support external stereo audio output devices such as headphones and powered speakers. If it is the slave. If a microphone is o be used. This interface is not amplified and may require the use of amplified speakers in certain instances. If the TPS65950 is the master. DOUT CLK256FS Description Clock signal (audio port) Synchronization signal (audio port) Data receive (audio port) Data transmit (audio port) Synchronization frame sync to the AM3730 I/O I/O IO I O O Pin L3 K6 K4 K3 D13 A new feature on the –xM is the ability to access the audio signals for use on an external add on board.4 Audio Input Jack A single 3. In Table 13 are all the signals used to interface to the processor. 8.SYNC I2S.16.2 TPS65950 Audio Interface BeagleBoard-xM System Reference Manual Revision A2 The TPS65950 acts as a master or a slave for the I2S interface. The TPS65950 supports the I2S left-justified and right-justified data formats. it must provide the frame synchronization (I2S_SYNC) and bit clock (I2S_CLK) to the processor. you must disable via SW this interface on the TPS65950. but doesn’t support the TDM slave mode. it may require additional amplification of the signal for proper use. 8. Table 13.16. the TPS65950 receives frame synchronization and bit clock.5mm jack is supplied to support external audio inputs including stereo or mono. If this feature is to be used.CLK I2S. Processor Audio Signals Signal Name I2S. Page 85 of 171 .REF: BB_SRM_xM 8.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. C _ I 2 C 3 _ S C _ I 2 C 3 _ S C D L A 8 C 1 5 0 8. 7 K 1 K 1 0 K R R R E E E S S S V _ 0 4 _ 0 4 _ 0 4 E L I _ D 3 D V I _ U P 3 U S 4 5 N B 7 4 L V C 2 G 0 7 D B V R V C I O _ 1 . 1 u F I 2 C CI 2L C D A 3 3 _ S _ S 4 4 I 2 I 2 C C 3 3 _ S _ S 3 C 5 L V D 4 A A A 6 O D D C 17 65 2 3 2 1 4 6 D D D S S S S S S 6 2 0 6 8 4 T F P 4 1 0 T T T D D D G G G G G G D S S D 2 _ P E C 2 _ A C D B2 _ H SD Y2 _ V S Y 8 L7 K I6 A S 7N C N C 1 5 S 1 E 4 LB S E L / S C D S E L / S D 0 D 2 K. 1 . D 2 7 N D I K 3 0 D 2 K. 1 . The SW will take care of this automatically. D 1 8 N D I K 2 D K 1 N N N N N N D D D D D D I2 C In t e r f a c e Figure 44. In this case. A U X _ L 7 L 8 L 9 1 1 1 V I O 3 V 3 2 2 2 F F F E E E 8 R R R R R R I T I T I T E E E . but you may want to do this if your design were to need to work in the legacy mode. 1 u F D V I_ V R E F P r o c e Us s4 oA r A AD AD AD AD AD ED FD FD GD AD D A D A D A D A D A D G D H D H D H D E JD D A D A D G H G H G H 2 2 2 2 D D1 B1 B1 A1 A1 1 2 1 2 1 2 1 2 21 2 2 2 C C2 2 2 0 2 1 2 2 2 3 2 4 2 56 68 77 8 6 9 2 02 21 22 23 24 55 76 67 58 89 60 12 22 3 2 2 3 3 4 4 R R R R R R R R R R R R R R R R R R R R R R R R P P P P P P 61 51 41 31 21 11 P P P P P P P P P P P P P P P P P P R R R R R R P P P P P P F E D C B A 32 42 52 62 72 82 13 23 33 43 53 63 73 83 14 24 34 44 C D E F G H A B C D E F G H A B C D 87 7 67 57 47 37 1 1 1 1 1 1 11 21 31 41 51 61 1 1 1 1 1 9 1 1 1 1 1 1 1 9 1 1 1 1 0 0 0 0 0 0 41 31 21 11 01 1 61 51 41 31 21 11 01 1 61 51 41 31 9 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 01 11 21 31 41 A R d ju s t e d 8 5 8 . The resistor packs in the RED boxes are installed and the BLUE boxes are not installed on the –xM to support the 720p resolution. you would need to install the BLUE boxes and leave out the RED boxes. . 1 u F 1 50 7 . These are the loading options to enable the new mode used by the –xM or the legacy mode used by the Rev C4. 1 0 1 3.D i s 1 0 K o w e r e d d o w n t p o w e r u p . The processor requires that different pins be used if 720p resolutions are required. M M M M M M D V I Z 1 T V Z 1 Z D _ P CV D1 5 0 D 6 0 8 R 3 D D C 1 50 6 0 8 R 3 C 1 50 1 6 0 8 R 3 V I _ DC V1 5D0 C C 2. The basic change requires that the DSS_D0-D5 need to be moved to the pins that normally carry the DSS_D18-D23 leads. the signals for DSS_D18-D23 need to be moved to other pins. Figure 44 is the DVI-D interface design. Page 86 of 171 . 4 r 5 . .17 DVI-D Interface The LCD interface on the processor is accessible from the DVI-D interface connector on the board. 1 0 1 5 . These pins are different than those that are currently used on the Rev C4. 1 0 V In D p a s u r e s t h a t t Rh 4 e 3 V I.D 1 u A u A u A u F F F F . 1 50 9 . 1 0 1 4. 1 . Reflected in Figure 44 are four resistor packs inside either Red or Blue boxes. For legacy operation. 1 . 1 0 V 0 V 0 V 0 V 0 V 0 V P T C _ R D C _ 5 V 0 _ 1 V 1 50 6 .K _ 1 % _ R T 1 X E F 0 1 9 _V 1 % 0 6 0 U 1 1 D D D D D D D D D D D D D D D D D D D D D D D D C C 0 1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1 1 2 2 2 2 3 _ 0 6 0 3 t T X D T X D 3 0 32 12 + T X T X D D 2 2 + 1 0 0 M a P 3 1 2 1 1 D D D 5 6 S S 6 4 5 D D D 1 2 A A A C D A A A T T T M L A M 2 2 + 2 _ S T G M 1 T G G G G G 1 2 3 4 N D D D D D D D D D D D D D D D D D D D D D D D D D S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 8 7 8 7 8 7 7 8 H G F E D C 0 0 0 0 0 0 R R P P 84 H 9 1 0 R P 64 F 4 G 7 R P 54 E A U X _ 3 V R R R R R D V V D 0 1 V I _ I _ D D D D D D D D D D D D D D D D D D D D D D D D C D I _ P V V V V V V V V V V V V V V V V V V V V V V V V L E U K I I I I I I I I I I I I I I I I I I I I I I I I N _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ + D D D D D D D D D D D D D D D D D D D D D D D D D D A A A A A A A A A A A A A A A A A A A A A A A A D D D D D D S S S S S S S S S S S S _ _ _ _ _ _ A D A D A D A D A D A D H G1 F1 F2 E2 F2 2 2 82 19 10 1 2 22 3 6 6 8 9 1 1 R R R R R R P P P P P P 15 25 35 45 55 65 A B C D E F 1 1 1 1 1 1 61 51 41 31 21 11 0 0 0 0 0 0 D 1 11 0 1 01 0 1 21 0 3 9 9 9 5 9 6 9 7 R R 3 4 9 9 P I S B V V P P P P P P P P P 0P 1P 2P 3P 4P 5P 6P 7P 8P 9P 0P 1P 2P 3P P I D I D 2 I _ V 5S D Y I _ H 4 S VY H 3 V 1 0 1 3 T T T T T T T T T T T T T T T T T T T T T T T T A6 A6 A6 A6 A5 A5 A5 A5 A5 A5 A5 A5 A4 A4 A4 A4 A4 A4 A4 A4 A3 A3 A3 A3 5 5 03 12 21 30 49 58 65 74 83 92 11 10 17 16 15 14 13 12 11 10 29 28 27 26 7 6 D D D T T P V V V V V V D D D D D D D D D D D D 1 3 1 2 2 1 3 2 9 3 8 T X D T X D 0 1 2 3 4 5 6 7 8 9 0 1 2 3 K K 2 7 21 81 + T T X D X D A U 1 1 + X _ 3 V 3 D V I _ + M T T G 2 T 1 T 1 + M T T M1 _ S 3 T G M T T G 4 / C E C + _ S 3 4 H T P T X D T X D 9 L2 G4 20 50 + H T P RL G8 6 1 0 K T T X D X D 0 0 + 51 v 8 1 7 + 5 V M 1 9 D D C H P L G 9 D A T 0 7 D A T 0 8 D A T 0 1 1 1 1 0 C 2 C C C L K L K L K O N 2 2 T X C 2+ 1 T X C + C C 1 9 T T F A D3 5J E DT K E 3 N 4 R S V D 92 4 N C M S PG N D TP E 1 1 N F A D D J K 4 1 M T V D D T X C + T X C A U X _ 3 R 8 9 R 8 8 R 8 7 V I O 5 1 10 K 4 . 1 . 1 u F . 0 6 K R 8 4 8f o. DVI-D Interface One of the main changes in the DSS area on the –xM is the change of the DSS pin usage. 1 V 0 V C 1 2 E T X U 1 2 7I n t e r n a C V AC C 8 B B 1 1 B 2 2 G N D S 0 1 0 2 D C U l 1 0 K D D P D D u ll u p s . 7 K V 3 1 C S E C1 _ +N C N _ H D M I E N C SN Y C N S Y N R E F L / R _ 1 V 8 1 0 K 1 0 K D _ 0 _ 0 _ 0 E S L P D I S E E S L A E N 0 _ N S E N C R 9 2 4 . D 3 6 N I 0 D 2 K.

and GPIO_170. I2C3_SDA.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. Used to communicate with the monitor to determine setting information. I2C3 data line. I2C3 clock line. There are three other signals used to control the DVI-D that originate at the processor. The AM3730 provides 24 bits of data to the DVI-D framer chip. Processor LCD Signals Signal dss_pclk dss_hsync dss_vsync dss_acbias dss_data0 dss_data1 dss_data2 dss_data3 dss_data4 dss_data5 dss_data6 dss_data7 dss_data8 dss_data9 dss_data10 dss_data11 dss_data12 dss_data13 dss_data14 dss_data15 dss_data16 dss_data17 dss_data18 dss_data19 dss_data20 dss_data21 dss_data22 dss_data23 GPIO_170 I2C3_SCL I2C3_SDA Description LCD Pixel Clock LCD Horizontal Synchronization LCD Vertical Synchronization Pixel data enable (TFT) output LCD Pixel Data bit 0 LCD Pixel Data bit 1 LCD Pixel Data bit 2 LCD Pixel Data bit 3 LCD Pixel Data bit 4 LCD Pixel Data bit 5 LCD Pixel Data bit 6 LCD Pixel Data bit 7 LCD Pixel Data bit 8 LCD Pixel Data bit 9 LCD Pixel Data bit 10 LCD Pixel Data bit 11 LCD Pixel Data bit 12 LCD Pixel Data bit 13 LCD Pixel Data bit 14 LCD Pixel Data bit 15 LCD Pixel Data bit 16 LCD Pixel Data bit 17 LCD Pixel Data bit 18 LCD Pixel Data bit 19 LCD Pixel Data bit 20 LCD Pixel Data bit 21 LCD Pixel Data bit 22 LCD Pixel Data bit 23 Powers down the TFP410 when Lo. Table 14. Used to communicate with the monitor to determine setting information. These are I2C3_SCL. TFP410. All of the signals used are described in Table 14. Type O O O O O O O O O O O O O O O O O O O O O O O O O O O O O I/O I/O Ball (Legacy) D28 D26 D27 E27 AG22 AH22 AG23 AH23 AG24 AH24 E26 F28 F27 G26 AD28 AD27 AB28 AB2 AA28 AA27 G25 H27 H26 H25 E28 J26 AC27 AC28 J25 AF14 AG14 Ball (720p) D28 D26 D27 E27 H26 H25 E28 J26 AC27 AC28 E26 F28 F27 G26 AD28 AD27 AB28 AB2 AA28 AA27 G25 H27 AH26 AG26 AF18 AF19 AE21 AF21 AF14 AG14 BLUE0 BLUE1 BLUE2 BLUE3 BLUE4 BLUE5 BLUE6 BLUE7 GREEN0 GREEN1 GREEN2 GREEN3 GREEN4 GREEN5 GREEN6 GREEN7 RED0 RED1 RED2 RED3 RED4 RED5 RED6 RED7 Page 87 of 171 .17.1 Processor LCD Interface The main driver for the DVI-D interface originates at the processor via the DSS pins. TFP410 is active when Hi.

Both of these rails are controlled by the TPS65950 and must be set to 1.17. Table 15 is a description of all of the interface and control pins on the TFP410 and how they are used on BeagleBoard. two voltage rails must be active.1-V to 1. high-speed bus that connects seamlessly with the 1.3V rail into the TFP410. VIO_1V8 and VDD_PLL2. In order to insure a noise free signal. The adjustable 1. During the blanking interval (DE = low). there are three inductors.8-V digital interface provides a low-EMI. This will be fixed on the next letter revision of the board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 10ohm series resistors are provide in the signal path to minimize reflections in the high frequency signals from the processor to the TFP410. L4.2 LCD Power In order for the DSS outputs to operate correctly out of the processor. the transmitter encodes pixel data.4 TFP410 Framer The TFP410 provides a universal interface to allow a glue-less connection to provide the DVI-D digital interface to drive external LCD panels. By default. TFP410 Interface Signals Signal Name DATA[23:12] DATA[11:0] IDCK+ IDCKDE HSYNC VSYNC DK3 DK2 Description The upper 12 bits of the 24-bit pixel bus. The DVI interface on the BeagleBoard supports flat panel display resolutions up to XGA at 65 MHz in 24-bit true color pixel format. Single ended clock input. VDD_PLL2 is not turned and must be activated by SW.8V. the TPS2141. 8.5653 57 56 2 4 5 6 7 Page 88 of 171 . Table 15. Data enable. It should be noted that on the Rev A2 version. and L6 that are used to filter the 3. the ability to shut off the DVI-D display is not supported. 8.3V regulator in U1. used to adjust the setup and hold times of the pixel data inputs Type I I I I I I I I I Ball 36–47 50–55.3 TFP410 Power Power to the TFP410 is supplied from the 3. Tied to ground to support the single ended mode.17. The maximum clock frequency of these signals is 65MHz. the transmitter encodes HSYNC and VSYNC. DATA[23:0]. During active video (DE = high).17.8V and 24-bit interface output by the processor. The bottom 12 bits of the 24-bit pixel bus. Horizontal sync input Vertical sync input These three inputs are the de-skew inputs DK[3:1]. Otherwise some of the bits will not have power supplied to them. L5. These resistors are in the form of resistor packs on the BeagleBoard. 8.

A HI selects normal operation and a LO selects the powerdown mode.17.2 BSEL The BSEL pin is pulled HI to select the 24 bit mode for the Pixel Data interface from the processor. This pin controls the amplitude of the DVI output voltage swing.3V. VREF) and state pins (PD. A low level indicates a powered on receiver is detected at the differential outputs. 8. 8.3 DSEL The DSEL pin is pulled low to select the single ended clock mode from the AM3730.REF: BB_SRM_xM DK1 MSEN ISEL BSEL DSEL EDGE DKEN VREF PD TGADJ BeagleBoard-xM System Reference Manual Revision A2 I O I I I I I I I I 8 11 13 13 14 9 35 3 10 19 DATA[23:0]. 8.17.17. 8. Selects the 24bit and single-edge clock mode.5. Configuration is specified by the configuration pins (BSEL. A high level selects the primary latch to occur on the rising edge of the input clock IDCK A HI level enables the de-skew controlled by DK[1:3] Sets the level of the input signals from the AM3730.17. 8.1 ISEL The ISEL pin is pulled LO via R99 to place the TFP410 in the control pin mode with the I2C feature disabled.5. This allows the other modes for the TFP410 to be set by the other control pins.5 TFP410 Control Pins There are twelve control pins that set up the TFP410 to operate with the processor.5. A high level indicates a powered on receiver is not detected.17. Most of these pins are set by HW and do not require any intervention by the processor to set them.5.5 DKEN Page 89 of 171 . relative to the clock input IDCK±.17. determined by the value of the pullup resistor RTFADJ connected to 3. DKEN). This pin disables the I2C mode on chip.5. DSEL. 8. Lo to select the single ended clock mode.4 EDGE The EDGE signal is pulled HI through R82 to select the rising edge on the IDCK+ lead which is the pixel clock from the AM3730. EDGE.

When GPIO_170 is taken low. When the processor powers on.17.5.3V referenced. pin J25 comes in the safe mode. The DK1-DK3 pins adjust the timing of the clock as it relates to the data signals. 8. it is not expected that any of the resistors will need to be installed. this signal must be converted to 3. SN74LVC2G07. 8. However. the TFP410 is disabled by R109.17.11 NC This unused pin is pulled HI as directed by the TFP410 data manual.17. On power up. causing the signal to be pulled HI by R98. the level is set to .5. As the AM3730 is 1. Because the PD signal on the TFP410 is 3. meaning it is not being driven.3V.7 VREF The VREF signal sets the voltage level of the DATA. VSYNC.8V to match the processor.8V. Even though U4 is running at 1. placing the TFP410 in the power down mode. when low.5. putting the TFP410 in the power down mode. determined by the value of R95. indicates that there is a powered monitor plugged into the DVI-D connector. If the GPIO_170 pin is HI. a 10K resistor.9V by R64 and R65. This is the default mode of operation. 8. 8. the output will support being pulled up to 3. the output of U4 will also go LO.5. HSYNC. DK1-DK3.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The DKEN signal is pulled HI to enable the de-skew pins. If desired. DE.8 PD The PD signal originates from the processor on the GPIO_170 pin. then the open drain signal is inactive. Page 90 of 171 . The de-skew pins. 8.17. are pulled low by the internal pulldown resistors in the TFP410.5. the resistors can be installed to pull the signals high.5.10 RSVD2 This unused pin is terminated to ground as directed by the TFP410 data manual.17. This signal is not connected to the AM3730 and is provided as a test point only.17.9 TFADJ The TFADJ signal controls the amplitude of the DVI output voltage swing.6 MSEN The MSEN signal. 8. R109 insures that the signal is pulled LO.3V. and IDCK+ leads from the processor. a non-inverting open drain buffer. This is done by U4.

This interface in the LCD panel is powered by the +5V pin on the connector through RT1.6. Inside of TXS0102 is a pullup on each signal. is based on the I²C bus. The Cable is not supplied with the BeagleBoard but is available from numerous cable suppliers and is required to connect a display to the BeagleBoard. 8.transmits the differential clock from the TFP410.17.5 TXC+/TXC- The differential signal pair TXC+/TXC. a resetable fuse. 8.6 DVI-D Connector BeagleBoard-xM System Reference Manual Revision A2 In order to minimize board size.3 DAT1+/DAT1- The differential signal pair DAT1+/DAT1. a HDMI connector was selected for the DVI-D connection.6.17.transmits the 8-bit blue pixel data during active video and HSYNC and VSYNC during the blanking interval. It provides for a split rail to allow the signals to interface on both sides of the circuit.6. The standard was created by the Video Electronics Standards Association (VESA).transmits the 8-bit green pixel data during active video.2 DAT0+/DAT0- The differential signal pair DAT0+/DAT0.17. the I2C bus is level translated by U11.17.4 DAT2+/DAT2- The differential signal pair DAT2+/DAT2. As the processor is 1.1 Shield Wire Each signal has a shield wire that is used in the cable to provide signal protection for each differential pair. 8. The monitor contains a read-only memory (ROM) chip programmed by the manufacturer with information about the graphics modes that the monitor can display.6. This signal is tied directly to ground.8V I/O. 8. The BeagleBoard does not support HDMI but only the DVI-D component of HDMI. The current version of DDC. called DDC2B. Page 91 of 171 .17.transmits the 8-bit red pixel data during active. 8.6 DDC Channel The Display Data Channel or DDC (sometimes referred to as EDID Enhanced Display ID) is a digital connection between a computer display and the processor that allows the display specifications to be read by the processor. removing the need for an external resistor. 8.6.17.17. a TXS0102.6.REF: BB_SRM_xM 8.

You will notice that the signals are not in a logical order or grouping. 8. Whether or not the Beagle will support those monitors is dependent on the timings that are used on the BeagleBoard and those that are accepted by the monitor. 8.6. P11 LCD Signals Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Signal DC_5V DC_5V DVI_DATA1 DVI_DATA0 DVI_DATA3 DVI_DATA2 DVI_DATA5 DVI_DATA4 DVI_DATA12 DVI_DATA10 DVI_DATA23 DVI_DATA14 DVI_DATA19 DVI_DATA22 I2C3_SDA DVI_DATA11 I/O PWR PWR O O O O O O O O O O O O I/O O Description DC rail from the Main DC supply DC rail from the Main DC supply LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit I2C3 Data Line LCD Pixel Data bit Page 92 of 171 . Buying a DVI to VGA adapter connector will not work on a VGA display.8 DVI to VGA The analog portion of DVI.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. This is due to the routing on the PCB where we allowed the routing to take precedence to get it to route with no addition of layers to the design. A standard HDMI cable may be used to connect to the HDMI input of monitors or televisions. The audio and encryption features of HDMI are not supported by the BeagleBoard.17. which provides RGB analog signals. Table 16. You will need an active DVI-D to VGA adapter.18 LCD Expansion Headers Access is provided on the -XM Rev A to allow access to the LCD signals.17.6. Another option for these signals is to buy a board that connects to the J4 and J5 expansion connectors and generates the RGB signals for the VGA display. is not supported by the BeagleBoard. This may require a change in the software running on the Beagle.7 HDMI Support The digital portion of the DVI-D interface is compatible with HDMI and is electrically the same. Table 16 shows the signals that are on the P11 connector.

8V rail is for level translation only and should not be used to power circuitry on the board. Keep in mind that some of that power is needed by the USB Host power rail and if more power is needed for the expansion board. If the TFP410 is disabled on the Beagle. but the power should be taken into consideration when making this decision. Table 17 shows the signals that are on connector P13. Page 93 of 171 . Table 17. LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit No connect LCD Pixel Data bit I2C3 Clock Line LCD Pixel Data bit DVI Clock Data Enable Horizontal Sync Ground bus Ground bus I/O O O O O PWR PWR The 1. When Hi. P13 LCD Signals I/O PWR PWR O O O O O O O O O Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal 3. It is suggested that the 5V rail be used to generate the required voltages for an adapter card.3V signal. All signals are 1. then 80mA is freed up for use on an adapter card connected to the LCD signals connectors.3V VIO_1V8 DVI_DATA20 DVI_DATA21 DVI_DATA17 DVI_DATA18 DVI_DATA15 DVI_DATA16 DVI_DATA7 DVI_DATA13 DVI_DATA8 NC DVI_DATA9 I2C3_SCL DVI_DATA6 DVI_CLK+ DVI_DEN DVI_HSYNC GND GND Description 3.8V except the DVI_PUP which is a 3. Ground bus Ground bus The current available on the DC_5V rail is limited to the available current that remains from the DC supply that is connected to the DC power jack on the board.3V reference rail 1.REF: BB_SRM_xM 17 18 19 20 DVI_VSYNC DVI_PUP GND GND O O BeagleBoard-xM System Reference Manual Revision A2 PWR PWR LCD Vertical Sync Signal Control signal for the DVI controller. DVI is enabled. the main DC power supply current capability may need to be increased.8V buffer reference rail. The 3. It is not required that the TFP410 be disabled when running an adapter card. Can be used to activate circuitry on adapter board if desired.3V rail also has limited capacity on the power as well.

A 47pf CAP and 3. Page 94 of 171 . Figure 45 is the design of the SVideo interface.19 S-Video A single S-Video port is provided on the BeagleBoard. C C 1 1 0 1 4 7 4 7 p p 1 1 L 2 F F L 3 2 3 . Table 18. 1 % % W Y Y W W 8 2 8T T 2 7 2 T7 2 T6 T 2 U T U T F B F B R E 1 2 C 9 0 . 1 . S-Video Interface Table 18 is the list of the signals on the S-Video interface and their definitions. 1 u F .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. 3 u 2 H H 3 . 6 5 K 1 . including the input VBAT rail. D N I . 6 5 K 0 . 3 u P P P P P 5 6 7 C O N 4 1 1 2 2 3 3 4 4 M M M N H H H _ S 1 2 3 V i d e o P r o V V V V V c _ _ _ _ _ e O O V V V s s oU r 4 2 1 F B R R R 3 3 3 2 3 4 1 . 1 0 V Figure 45. Figure 37 reflects the filtering that is used on these rails.3uh inductor are across the feedback resistors to improve the quality of the S-Video signal. S-Video Interface Signals Signal tv_out1 tv_out2 tv_vref tv_vfb1 tv_vfb2 I/O O O I O O Description TV analog output composite TV analog output S-VIDEO Reference output voltage from internal bandgap Amplifier feedback node Amplifier feedback node Power to the internal DAC is supplied by the TPS65950 via the VDAC_1V8 rail.

O U T L .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. but this interface has many HW assisted features and can support camera modules from VGA to 5MP resolutions. Camera Port Interface Page 95 of 171 . S L C E L F 1 D A 5 0 V 4 . O M A P 3 7 U3 04 _B E A 2 _ A S 2 _ S M _ M M M _ S 1 .M S G 6 2 4 6 8 1 1 1 1 1 2 2 2 2 2 3 3 3 R 1 5 1 0 K C C A A M M _ _ A D N I G AR R 1 5 4 5 1 L D 0 N I . R 1 1 3 2 . 4 1 1 2 K . C .X X . The connector configuration is designed to be compatible with the camera modules from Leopard Imaging. 7 u 7 F .C F 3 5 8 BT P I 2 I 2 C C . 0 I 2 C I 2 C C C A C C C A M A A A E 1 5 D F 1A 5 C L C C C C C C C C C C C C C C A A A A A A A A A A A A M M M M M M M M M M M M _ _ _ _ _ _ _ _ _ _ _ _ A A D D D D D D D D D D D D M M 11 13 95 87 79 16 15 14 13 12 21 20 2 2 2 3 3 6 7 1 _ _ 1 0 P C F L K A C A M _ W E N V I 2 I 2 0 2 4 6 8 0 2 4 6 8 0 2 4 . 0D C _ 5 V 1 I T A F U . 1 % 3 K . 0 6 0 3 Figure 46. 1 1 C C C C M A 2 2 O M _ _ _ S S S R_ I O D C O8 A L 3E 0 . 3 V .20 Camera Port A new addition to the –xM is the camera port. 6 . O 1 U6 T V L A. C N N B 3 V A U X 4 G. 0 6 0 3 I O _ 1 V 5 8 C 2 5 X BC 2 L 3 K A WC 2E 3 N _ F L D C 2 6 _ BD 2 1 5 1 _ LD 2 1 7 0 _ K D 2 97 _ L D 2 88 _ K D 2 78 _ A D 2 65 _D D 2 54 _C D 2 44 _ B D 2 34 _A D H 2 1 7 _A D G 1 1 7 _ D 0 L D 1 0 C C C C C C C C C C A A A A A A A A A A M M M M M M M M M M C 2 7 C A M _ PA C2 L K 4 C A M _ A H 2 S3 C A M _ V S I 2 C I 2 C J 2 1 1 _ K 2D 1 A S 1 _ S C L V I O _ 1 V 8 D R 20 R 19 D 4 5 1 3 5 7 9 1 3 5 7 9 1 3 8 .7 K D C _ 5 V _ U 2 1 3 SU I N S G B1 6 O H N T L 1 G D D A U N D 9 6 4 T 6 D 5 J 3 A U 1 6 _ F R B 1 5 6 .7 K 4 .D 5 9 5 0 5 0 T T C 1 2 8 C 2 1 3 1 u F . S U D X A3 . USB cameras may also be used if desired. 1 10 uV F . 1 % H U B _ 3 V 3 C 4 1 7 . This camera port is the native camera interface of the processor. Figure 46 is the Camera interface design.

The 5V is on whenever a power source is applied o the board. 8. Page 96 of 171 . This is used for the internal logic in the camera module.20.8V rail that is supplied by the TPS65950.2 Camera I2C Port The processor uses the I2C2 port to communicate to the camera module to set the registers in the device. The power is controlled via the I2C1 interface from the processor by setting the VAUX4 regulator to 1. This will set the level of all of the interface signals to the processor.3 CAM_IO Power The I/O power is a 1. 8.8V rail that is supplied by the TPS65950. 8. If an add-on board is not used.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The design of the camera interface is described in more detail in the remainder of this section. The default is set at 3. It is selected by installing either R151 or R154. the SW will need to enable the internal pullups on the I2C2 signals in order for the interface to work. 8.20.3V and is controlled by turning on and off the USB HUB power rail at U16.20. Each of these are described in the following sections.1.3V. The I/O status of each pin is defined from the perspective of the processor.3 Processor Camera Port Interface Table 19 shows the signals that are the interface between the processor and the camera modules. The power is controlled by setting the LEDA signal on the TPS65950.1. Access to this register is via the I2C2 interface on the processor. 8. There are no pullups on the board for the I2C to prevent conflict with add on boards that do have the pullups.8V. The power is controlled via the I2C1 interface from the processor by setting the VAUX3 regulator to 1. 8.8V.1 CAM_ANA Power The DC input can be either 5V or 3.20.20.1.1 Camera Power There are three main power sources required by the camera module.20.2 CAM_DIGITAL Power The digital power is a 1.

Table 19. Page 97 of 171 . All of the current camera modules do not use this signal and this signal has no affect on the operation of the camera modules. the pin should be set up as a GPIO pin. When used as a reset.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The cam_wen signal is labeled as CMOS_OE on the schematic. It is provided for future use. Camera Interface Signals Signal cam_hs cam_vs cam_xclka cam_d0 cam_d1 cam_d2 cam_d3 cam_d4 cam_d5 cam_d6 cam_d7 cam_d8 cam_d9 cam_d10 cam_d11 cam_fld cam_pclk cam_wen Function HS VS Clock Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data Camera Data RESET Pixel Clock Description Camera Horizontal Synchronization Camera Vertical Synchronization Camera Clock Output Camera image data bit 0 Camera image data bit 1 Camera image data bit 2 Camera image data bit 3 Camera image data bit 4 Camera image data bit 5 Camera image data bit 6 Camera image data bit 7 Camera image data bit 8 Camera image data bit 9 Camera image data bit 10 Camera image data bit 11 Camera field identification Camera pixel clock Camera Write Enable I/O I/O I/O O I I I I I I I I I I I I I/O I I Processor A24 C25 AG17 AH17 B24 C24 D24 A25 K28 L28 K27 L27 B25 C26 C23 C27 B23 The cam_fld signal is used as a RESET signal to the camera board.

these signals need to be tied low by enabling the internal pulldown resistors. Resolution Camera Module Part Number Data Width---> PI I/O/ N NAME V 1 D11 I 2 MCLK O 3 D10 I 4 GND PWR 5 D9 I 6 SDATA I/O 7 D8 I 8 SCLK I/O 9 D7 I 10 RESET O 11 D6 I 12 OE O 13 D5 I 14 GND PWR 15 D4 I 16 CAM_IO PWR 17 18 19 20 21 22 23 24 25 26 27 28 29 30 D3 CAM_IO D2 GND D1 GND D0 CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG I PWR I PWR I PWR I PWR PWR PWR I PWR I PWR Camera Pin Signal Mapping 1. Table 20. you must take into account the order of the bits. These are signals that are not used by the camera module. In order to work with the different modules.3MP LILBCM1M1 10 D9 MCLK D8 GND D7 SDATA D6 SCLK D5 RESET D4 OE D3 GND D2 CAM_IO D1 CAM_IO D0 GND PULLDOWN GND PULLDOWN CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG 2MP LILBCM2M1 10 D9 MCLK D8 GND D7 SDATA D6 SCLK D5 RESET D4 OE D3 GND D2 CAM_IO D1 CAM_IO D0 GND PULLDOWN GND PULLDOWN CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG 3MP LIBCM3M1 8 D7 MCLK D6 GND D5 SDATA D4 SCLK D3 RESET D2 OE D1 GND D0 CAM_IO PULLDOWN CAM_IO PULLDOWN GND PULLDOWN GND PULLDOWN CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG 5MP LILBCM5M1 12 D11 MCLK D10 GND D9 SDATA D8 SCLK D7 RESET D6 OE D5 GND D4 CAM_IO D3 CAM_IO D2 GND D1 GND D0 CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG VGA LILBCMVGA 10 D9 MCLK D8 GND D7 SDATA D6 SCLK D5 RESET D4 OE D3 GND D2 CAM_IO D1 CAM_IO D0 GND PULLDOWN GND PULLDOWN CAM_ANA CAM_ANA CAM_ANA PCLK GND HS CAM_DIG Page 98 of 171 . In order for the data to be correct. You will notice some of the lettering in red. The table covers the currently available camera modules that are compatible with the Beagle –xM.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Table 20 shows the mapping of the pins on the camera sensors to the pins on the processor.

REF: BB_SRM_xM 31 32 33 34 VS CAM_DIG GND GND I PWR PWR PWR BeagleBoard-xM System Reference Manual VS CAM_DIG GND GND VS CAM_DIG GND GND VS CAM_DIG GND GND Revision A2 VS CAM_DIG GND GND VS CAM_DIG GND GND 8.20. It uses the same modules as the LeopardBoard DM355 version. The part numbers can be found in Table 20.4 Camera Modules The camera module can be purchased from Leopard Imaging or one of their distributors. Figure 47. The figure below shows the different modules that can be used. Camera Modules Page 99 of 171 .

Other boards will be added as the SW drivers are completed. Page 100 of 171 . The 3MP module is next on the list. only the VGA camera board has been confirmed to work on the –xM board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 At this time. It is expected that all of the listed modules will work and no complications are expected as they are all compatible at the hardware level.

are provided by the processor. When the output-enable (OE) input is low. This allows for low-voltage bidirectional translation between the two voltage nodes. 1 0 V 3 1 40 6.8V and the B port tracks VCCB. In this design. all outputs are placed in the high-impedance state.3V.21.1 Processor Interface RS232 Interface Design Two lines. 1 2 0 _4 V C 2 3 2 1 5 0 _5 C 1 1 2 + C 2 + C C 2 2 I N O U N G N D O R C 3 2 T I N E F OO N R P W D R V VC C 2 3 2 1 4 8 _2 C C 1 + 1 + 15 U 9 C 1 4 3 0 .2 Level Translator All of the I/O levels from the processor are 1. D 0 .21 RS232 Port BeagleBoard-xM System Reference Manual Revision A2 A single RS232 port is provided on the BeagleBoard and provides access to the TX and RX lines of UART3 on the processor. A V C 1 4 70 . 1 u 3 3 U U A A R R T 3 _ T X T 3 _ R X R 8 1 1 2 3 0 K 2 O V A A O C 1 2 E U U A A R R T 3 _ T 3 _ T X _ 3 V R X _ 3 V T X S X _ 3 V 3 A U C 0 C 0 .REF: BB_SRM_xM 8. This requires that the voltage levels be translated. 8. 1 u F C 1 4 9 0 . the OE is tied high via a 10K ohm resistor to insure that it is always on.8V while the transceiver used runs at 3. 1 u F .21. D 0 P N N2 I 1 3I 2 _ P I N 2 2 1 2 3 2 _ P I N 32 3 3 4 4 5 5 6 6 7 7 8 8 9 9 D S U B 8 V V + 3 2 _ V . 1 u F2 3. UART3_Tx and UART3_Rx. 1 0 2 3 V 2 _ V + C 1 5 1 0 . 1 0 V . 1. 1 u F 7 3 2 . The A port tracks VCCA. 3. 1 0 V 3 5 4 6E U 1 0 7 C V AC C 8 B B 1 1 B 2 2 G N D 0 1 0 2 D C U I O _ 1 V 8 C U X _ 3 V F . Page 101 of 171 . Figure 48 shows the design of the RS232 port. The UART3 function contains a programmable baud generator and a set of fixed dividers that divide the 48-MHz clock input down to the expected baud rate and also supports auto bauding. 1 2 0 _6 V C 1 1 D 9 R 1 1 2 S N E F O 1 3 U8 T I N A C E 1 0 L I D 1 6 O R R S S 2 3 2 3 R 7 8 2 _ R T 7X 91 2 _R R 8 X0 1 R 8 2 S H 1 0 L 1 F F S H 1 1 L 2 14 6 5 C 2 1 E _ F E M A L E _ S H O R T Figure 48.3V. 8. 1 0 V 0 0 . 1 u F2 3. This is accomplished by the TXS0102 which is a two-bit noninverting translator that uses two separate configurable powersupply rails. 1 u F .

There is also a single RED LED on the board. P9. Turning on this LED is not something that a person should try to do as it indicates that the user is not paying attention and has plugged in a potentially damaging power supply into the power jack.21. your results may vary based on cabling. A standard male to female straight DB9 cable can be used or a USB to DB9 adapter can be plugged direct into the board. 8. one line receiver. distance. This allows the port to be used for UART based peripheral booting over the port.21.5-V supply. and the loads and drive capability on the other end of the RS232 port.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. These devices provide the electrical interface between an asynchronous communication controller and the serial-port connector.3V rail and is active at power up. The transceiver is powered from the 3. Figure 49 shows the connection of all of these indicators. The SN65C3221 operates at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/ms to 150 V/ms. The charge pump and four small external capacitors allow operation from a single 3-V to 5. Page 102 of 171 .22 Indicators There are five green indicators on the BeagleBoard: o o o o o Power PMU_STAT USER0 USER1 HUB Power All of the green LEDs are programmable under software control.3 RS232 Transceiver The RS232 transceiver used is the SN65C322 which consists of one line driver.4 Connector Access to the RS232 port is through a 9 pin DB9 connector. including GND). 8. This is new on the –xM version and replaces the 10 pin header. While the processor can easily drive a 1Mbit/S rate. and a dual charge-pump circuit with ±15-kV IEC ESD protection pin to pin (serial-port connection pins.

7 7 u V 7 F .B output.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual 5 V _ 2 1 3 U S U I N S G H N T L 1 B 1 6 O G D D A 9 U N D 6 4 T 6 D 5 J 3 A U 1 6 _ RF B 1 1 1 5 6 . 3 V .C G R N 1 D9 0 1 G2 K T R 6 4 3 3 0G F F N 1 5 1 5L L U 7 E E AT P D D B A S 6 / V / V 5 I B I B D 9 5 R R 0 A A .2 PMU Status Indicator This output is driven from the TPS65950 using the LED. 4 K . 1 %D % 1 4 H U B C 4 _ 3 1 .C 1 9 0 G V K B T A T 1 U V B A 1 T 9 0 G 1 8 V I O _ 1 V 8 4 1 0 K 6 U L D 2 O _ L I ND L D N L D W W W N S W W P O O A O _ _ _ P _ D _ _ P _ 1 L 0 D A U N T X _ 3 V 3 G R N R 6 3 Q R 1 N 9 A 1 9 R 0 7 4 0 3 3 D0 3 3 0 D U 4 PB G G P P r o c I O I O e o r A A 92 _W 1 4 9 8 _ 1 5 0 s s U 6 1 1 O U 9 J 8 P G T T S E R 0 G R N 6 A S 2 N 7 4 L V C 2 G D 5 L T S 5 T .C 5 T P 0 C E 1 P GRN 10k 47k Page 103 of 171 .B.C 1 9 0 G K T GRN L D 0 6 D O C K _ E R 1 3 R N 1 9 0 7 S S K W 2 1 T _ 4 G N D PPAD VO LTER R _R 1 5 4 D C _ I N 5 6 1 Q R R 0 2 N A 1 2 1 U 4 5 2 V S G D E 1 9 D N R S SE E D S 3 N 8 C 0 3 1 3 G 1 5 T V R 1 3 0 1 0 K V O L T _ E R R 1 9 0 7 O L T D 2E T N T P Figure 49.22. LED. The TPS65950 provides LED driver circuitry to power two LED circuits that can provide user indicators.1 Power Indicator 1 Indicator Design This indicator. 50 mA. It indicates that the entire power path is supplying the power to the board.22. M . P R 3 3 1 1 6 1 2L E D G N G P I O .C K T 3 2 S S W W _ _ I N S I N S S 1 3 O1 U 2 O U 1 4 L D 1 P G D C _ I N D 1 3 L T S T . 2 K R 1 1 3 3 2 . By default this is always disabled on power up.C 1 9 0 G K T GRN V L B A T S T T . Indicator D5 does not indicate which power source is being used to supply the main power to the board but only that it is active. 0 6 0 3 3 Revision A2 D C _ U S B L T S 6 V R 8 B 3 0 A C T I V E T . Software does have the ability to turn off this regulator and thereby turning off the LED. 1 A T L T S T . duty cycle based on a nominal 4-Hz cycle which is 7 15 10k 47k P O W E R R 3 3 N 1 0 2 U 10k 47k 5 Q 1 B S E L 7 RT S 1 T . D5. 8. The PWM is programmable. The PWM inside the TPS65950 can be used to alter the brightness of the LED if desired or it can be turned on or off by the processor using the I2C bus. Each LED circuit is independently controllable for basic power (on/off) control and illumination level (using PWM). is used to drive an LED that is connected to the VBAT rail through a resistor. connects from the 3. The first circuit can provide up to 160 mA and the second. register-controlled.3V rail supply and ground. 6 . 8. The second driver. 1 .

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 derived from an internal 32-kHz clock. 8.3 User Indicators There are two user LEDs.A output. turns on the LED. The processor can control the LED by communicating via the I2C to the TPS65950. Page 104 of 171 . A logic level of 1 will turn the LED on. TPS3803. This output is driven from the TPS65950 using the LED.22. It is possible to set the LED to flash automatically without software control if desired.4 HUB Power Indicator The HUB power LED. is turned on whenever the USB HUB power is active. The output level of the processor is 1. turns on whenever the DC voltage exceeds 5. D14. 8. These can be used for any purpose by the software. that can be driven directly from a GPIO pin on the processor. A transistor pair. 8. RN1907 is used to drive the LEDs from the VBAT rail.8V and the current sink capability is not enough to drive an LED with any level of brightness. The detection circuit.5 Overvoltage Indicators The Over Voltage LED. D6 and D7.22.22. D13.3V.

Figure 50 shows the interconnection to the processor. JTAG Signals Signal JTAG_TMS JTAG_TDI JTAG_TDO JTAG_RTCK JTAG_TCK JTAG_nTRST JTAG_EMU0 JTAG_EMU1 Description Test mode select Test data input Test Data Output ARM Clock Emulation Test Clock Test reset Test emulation 0 Test emulation 1 I/O I/O I O O I I I/O I/O Page 105 of 171 . 1 u 2 4 8 1 1 1 P 2 4 0 8 2 1 4 1 1 H 0 2 1 4 1 D 1 3 5 7 9 3 1 3 5 7 9 1 1 1 3 2 J J J J J J x 7 J J R 3 1 1 0 K T A G _ n T R T A S T G T T T T T A T A A A A A G G G G G G _ _ _ _ _ _ 1 3 T D O R T C T C K E M U R _ E 1 1 1 1 1 K 0 M U 1 A A A A A A A A A A A A A A A A 1 1 0 0 0 0 0 0 0 0 0 0 0 0 T M T D S I K K K K K K K R R R R R R R F .23. Table 21. V V I O _ 1 V 8 I O _ 1 V 8 C 8 0 . 8.23 JTAG A JTAG header is provided to allow for advanced debugging on the BeagleBoard by using a JTAG based debugger. Table 21 describes the signals on the JTAG connector. 1 0 V 2 2 2 2 2 2 3 4 5 6 7 8 9 0 P r o 1 9 1 J7 T 1 J8 T 2 J0 T 1 J3 T 1 J2 T 1 J1 T 1 J0 T J T c A A A A A A A A e G G G G G G G G s U s 4o B r _ _ _ _ _ _ _ _ T n T T T R E E D O T R S T M S D I C K T C K M U 0 M U 1 Figure 50.1 Processor Interface JTAG Interface The JTAG interface connects directly to the OMAP processor.8V level.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. All signals are a 1.

Each pin can be set individually for a different mux mode.8V. 8. Following is the legend for Table 22. Table 22 shows all of the signals that are on the expansion header.24 Main Expansion Header The expansion header is provided to allow a limited number of functions to be added to the BeagleBoard via the addition of a daughtercard.23. Main Expansion Header Processor Connections CAUTION: The voltage levels on the expansion header are 1.24.2 JTAG Connector BeagleBoard-xM System Reference Manual Revision A2 The JTAG interface uses a 14 pin connector. 8. Page 106 of 171 .REF: BB_SRM_xM 8. All JTAG emulator modules should be able to support this interface. As the processor has a multiplexing feature. multiple signals can be connected to certain pins to add additional options as it pertains to the signal available. Contact your emulator supplier for further information or if an adapter is needed. Exposure of these signals to a higher voltage will result in damage to the board and a voiding of the warranty. Figure 51 is the design of the expansion connector and the interfaces to the processor.1 Processor Interface The main purpose of the expansion connector is to route additional signals from the processor. DC_5V Processor U3B McBSP3_DX McBSP3_CLKX McBSP3_FSX McBSP3_DR McBSP1_DX McBSP1_CLKX McBSP1_FSX McBSP1_DR McBSP1_CLKR McBSP1_FSR I2C2_SCL I2C2_SDA AB26 AA25 AE5 AE6 V21 W21 K26 U21 Y21 AA21 AF15 AE15 UART2_CTS MCBSP3_CLKX MCBSP3_FSX MCBSP3_DR MCBSP1_DX MCBSP1_CLKX MCBSP1_FSX MCBSP1_DR MCBSP1_CLKR MCBSP1_FSR I2C2_SCL nRESET 2 4 6 8 10 12 14 16 18 20 22 24 26 28 J3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 VIO_1V8 U3A MMC2_DAT7 MMC2_DAT6 MMC2_DAT5 MMC2_DAT4 MMC2_DAT3 MMC2_DAT2 MMC2_DAT1 MMC2_DAT0 MMC2_CMD MMC2_CLKO I2C2_SDA nUSB_DC_EN AE3 AF3 AH3 AE4 AF4 AG4 AH4 AH5 AG5 AE2 Processor MMC2_DAT7 MMC2_DAT6 MMC2_DAT5 MMC2_DAT4 MMC2_DAT3 MMC2_DAT2 MMC2_DAT1 MMC2_DAT0 MMC2_CMD MMC2_CLK To the Reset circuitry HEADER 14X2 To the power circuitry Figure 51. This allows any of the listed mux modes to be set on a pin by pin basis by writing to the pin mux register in software.

By setting this value in the control register. Table 22. The columns labeled 0-7 represent each of the pin mux modes for that pin.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 X= there is no signal connected when this mode is selected Z= this is the safe mode meaning neither input to output. but it has no useful purpose without other pins being available. and the applicable signal will be routed to the pin on the expansion connector. this signal will be routed to the corresponding pin of the expansion connector. These setting are on a pin by pin basis. The second column is the pin number of the processor. Access to these other pins is not provided on the expansion connector. The first column is the pin number of the expansion connector. EXP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Processor 0 Expansion Connector Signals 1 2 VIO_1V8 DC_5V * GPT9_PWMEVT * GPT11_PWMEVT * X X GPT10_PWMEVT X McBSP3_DX X McBSP3_CLKX X McBSP3_FSX X McBSP3_DR X X X * X X REGEN Nreset GND GND 3 4 5 6 7 AE3 AB26 AF3 AA25 AH3 AE5 AE4 AB25 AF4 V21 AG4 W21 AH4 K26 AH5 U21 AG5 Y21 AE2 AA21 AE15 AF15 25 26 27 28 MMC2_DAT7 UART2_CTS MMC2_DAT6 UART2_TX MMC2_DAT5 McBSP3_FSX MMC2_DAT4 UART2_RTS MMC2_DAT3 McBSP1_DX MMC2_DAT2 McBSP1_CLK X MMC2_DAT1 McBSP1_FSX MMC2_DAT0 McBSP1_DR MMC2_CMD McBSP1_CLK R MMC2_CLKO McBSP1_FSR I2C2_SDA I2C2_SCL * McBSP3_DX * McBSP3_CLKX * UART2_RX * McBSP3_DR McSPI3_CS0 McSPI4_SIMO McSPI3_CS1 X X McSPI4_CS0 McSPI3_SOMI McSPI4_SOMI McSPI3_SIMO McSPI4_CLK McSPI3_CLK X X X * X * X * X * X X X X X X x X X X X X Z X X GPIO_139 GPIO_144 GPIO_138 GPIO_146 GPIO_137 GPIO_143 GPIO_136 GPIO_145 GPIO_135 GPIO_158 GPIO_134 GPIO_162 GPIO_133 GPIO_161 GPIO_132 GPIO_159 GPIO_131 GPIO_156 GPIO_130 GPIO_157 GPIO_183 GPIO_168 * X * X * * X X X X X X X X X X X X X X X X * X X X X X X X X X X X X X X X X X X X X X Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Page 107 of 171 . *= this indicates that there is a signal connected when this mode is selected. This is the default mode on power up. Any pin can be set with the mux register setting.

They are grouped by functions in Table 23 along with a description of each signal and the MUX setting to activate the pin. depends on the muxing function on a per-pin basis. Table 23. data pin 4. Page 108 of 171 .1 4 8. data pin 3. data pin 0.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. GP Input/Output pin. data pin 1. Signal MMC2_DAT7 MMC2_DAT6 MMC2_DAT5 MMC2_DAT4 MMC2_DAT3 MMC2_DAT2 MMC2_DAT1 MMC2_DAT0 MMC2_CMD MMC_CLKO McBSP1_DR McBSP1_CLK S McBSP1_FSR McBSP1_DX McBSP1_CLK X McBSP1_FSX McBSP1_CLK R I2C2_SDA I2C2_SCL McBSP3_DR McBSP3_DX McBSP3_CLK X McBSP3_FSX GPIO_130 GPIO_131 GPIO_132 SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC SD/MMC Expansion Connector Signal Groups Description SD/MMC Port 2 data pin 7. clock signal. data pin 5. data pin 6. Whether or not the signals you need are all available. Can be used as an interrupt pin. I2C clock line McBSP Port 3 Multi channel buffered serial port receive Multi channel buffered serial port transmit Multi channel buffered serial port receive clock Multi channel buffered serial port frame sync transmit General Purpose I/O Pins GP Input/Output pin. If you use these signals in their respective groups and that is the only function you use. McBSP Port 1 I/ O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I N/ A I/O I/O I/O I/O I/O IO D IO D I I/O I/O I/O I/O I/O I/O EX P 3 5 7 9 11 13 15 17 19 21 18 N/A 22 12 14 16 20 23 24 10.1 2 6.1 6 21 19 17 OM AP AE3 AF3 AH3 AE4 AF4 AG4 AH4 AH5 AG5 AE2 M ux 1 1 1 1 1 1 1 1 1 1 Multi channel buffered serial port receive ------------------------------------------------------------------------Multi channel buffered serial port transmit frame sync RCV Multi channel buffered serial port transmit Multi channel buffered serial port transmit clock Multi channel buffered serial port transmit frame sync XMT Multi channel buffered serial port receive clock I2C Port 2 I2C data line.24. command signal.2 Expansion Signals This section provides more detail on each of the signals available on the expansion connector. GP Input/Output pin. Can be used as an interrupt pin. 18 4. all of the signals are available. Can be used as an interrupt pin. data pin 2. Only one signal per pin is available at any one time.

GP Input/Output pin. GP Input/Output pin. GP Input/Output pin. GP Input/Output pin. Can be used as an interrupt pin. GP Input/Output pin. GP Input/Output pin. GP Input/Output pin. GP Input/Output pin. Can be used as an interrupt pin. Can be used as an interrupt pin. McSPI Port 3 Multi channel SPI chip select 0 Multi channel SPI chip select 1 Multi channel SPI slave in master out Multi channel SPI slave out master in Multi channel SPI clock McSPI Port 4 Multi channel SPI slave in master out Multi channel SPI slave out master in Multi channel SPI chip select 0 Multi channel SPI clock UART Port 2 UART clear to send. GP Input/Output pin. UART request to send UART receive UART transmit GPT PWM PWM or event for GP timer 9 PWM or event for GP timer 11 PWM or event for GP timer 10 Page 109 of 171 . Can be used as an interrupt pin. GP Input/Output pin.REF: BB_SRM_xM GPIO_133 GPIO_134 GPIO_135 GPIO_136 GPIO_137 GPIO_138 GPIO_139 GPIO_143 GPIO_144 GPIO_145 GPIO_146 GPIO_156 GPIO_158 GPIO_159 GPIO_161 GPIO_162 GPIO_168 GPIO_183 McSPI3_CS0 McSPI3_CS1 McSPI3_SIM O McSPI3_SOM I McSPI3_CLK McSPI4_SIM O McSPI4_SOM I McSPI4_CS0 McSPI4_CLK UART2_CTS UART2_RTS UART2_RX UART2_TX GPT9_PWME VT GPT11_PWM EVT GPT10_PWM EVT BeagleBoard-xM System Reference Manual I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O I/O I/O I/O I/O I/) O I/O I/O O I O O O O 15 13 11 9 7 5 3 8 4 10 6 20 12 18 16 14 24 23 11 13 19 17 21 12 18 16 20 4 10 8 6 4 10 8 Revision A2 GP Input/Output pin. Can be used as an interrupt pin. Can be used as an interrupt pin. GP Input/Output pin. Can be used as an interrupt pin. Can be used as an interrupt pin. Can be used as an interrupt pin. Can be used as an interrupt pin. GP Input/Output pin. Can be used as an interrupt pin. GP Input/Output pin. GP Input/Output pin. GP Input/Output pin. Can be used as an interrupt pin. Can be used as an interrupt pin. GP Input/Output pin. GP Input/Output pin. Can be used as an interrupt pin. Can be used as an interrupt pin. Can be used as an interrupt pin. Can be used as an interrupt pin. Can be used as an interrupt pin.

24. Depending on what circuitry is provided on the expansion board. 8.4 Reset The nRESET signal is the main board reset signal.8V.25 LCD Expansion Header If you choose not to use the LCD headers for access to the LCD signals or for the DVI-D interface. an additional delay may be needed to be added before the circuitry is activated. Table 24. they can also be used for other functions on the board based on the pin mux setting of each pin. Table 24 shows the options for P11 and Table 25 shows the options for P135. The purpose of this signal is to provide a means to control power circuitry on the expansion card to turn on and off the voltages. This insures that the power on the expansion board is turned on at the appropriate time.3 Power BeagleBoard-xM System Reference Manual Revision A2 The expansion connector provides two power rails. 8. The same restriction exits on this rail as mentioned in the USB section.5 Power Control There is an additional open-drain signal on the connector called REGEN. This signal is a 1. this signal will act as an input to reset circuitry on the expansion board.REF: BB_SRM_xM 8. a system reset can be generated by the expansion board by taking this signal low. It is not intended to power a lot of circuitry on the expansion board. After power up. The MUX: column indicates which MUX mode must be set for each pin to make the respective signals accessible on the pins of the processor. 8.8V level signal.24. P11 GPIO Signals MUX:0 DATA1 DATA0 DATA3 DATA2 Pin# 3 4 5 6 Signal DVI_DATA1 DVI_DATA0 DVI_DATA3 DVI_DATA2 MUX:2 UART1_RTS UART1_CTS - MUX:4 GPIO71 GPIO70 GPIO73 GPIO72 Page 110 of 171 . The other rail is the DC_5V. This rail is limited in the current it can supply from the TPS65950 and what remains from the current consumed by the BeagleBoard and is intended to be used to provide a rail for voltage level conversion only. The first is the VIO_1. When the board powers up. The amount of available power to an expansion board depends on the available power from the DC supply or the USB supply from the PC.24. All signals from the BeagleBoard are at 1. Refer to the processor and TPS65950 documentation for more information.8V rail which is supplied by the TPS65950.

REF: BB_SRM_xM 7 8 9 10 11 12 13 14 15 16 17 18 BeagleBoard-xM System Reference Manual DVI_DATA5 DVI_DATA4 DVI_DATA12 DVI_DATA10 DVI_DATA23 DVI_DATA14 DVI_DATA19 DVI_DATA22 I2C3_SDA DVI_DATA11 DVI_VSYNC DVI_PUP DATA5 DATA4 DATA12 DATA10 DATA23 DATA14 DATA19 DATA22 I2C3_SDA DATA11 VSYNC DVI_PUP UART3_TX UART3_RX McSPI3_SIMO McSPI3_CS1 - Revision A2 GPIO75 GPIO74 GPIO82 GPIO79 GPIO93 GPIO84 GPIO89 GPIO92 GPIO81 GPIO68 - Table 25. P13 GPIO Signals MUX:0 DATA20 DATA21 DATA17 DATA18 DATA15 DATA16 DATA7 DATA13 DATA8 DATA9 I2C3_SCL DATA6 PCLK DEN HSYNC Pin# 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Signal DVI_DATA20 DVI_DATA21 DVI_DATA17 DVI_DATA18 DVI_DATA15 DVI_DATA16 DVI_DATA7 DVI_DATA13 DVI_DATA8 NC DVI_DATA9 I2C3_SCL DVI_DATA6 DVI_CLK+ DVI_DEN DVI_HSYNC MUX:2 McSPI3_SOMI McSPI3_CS0 McSPI3_CLK UART1_RX UART1_TX - MUX:4 GPIO90 GPIO91 GPIO87 GPIO88 GPIO85 GPIO86 GPIO77 GPIO83 GPIO78 GPIO79 GPIO_76 GPIO66 GPIO69 GPIO67 Page 111 of 171 .

8. PI N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SIGNAL PRO C 0 P13 Auxiliary Expansion Signals 1 2 3 4 5 VIO_1V8 VMMC2 MMC3_DA HSUSB1_D T2 6 MMC3_DA HSUSB1_D T7 3 MMC3_DA HSUSB_D7 T3 HSUSB1_D 2 HSUSB1_D 1 MMC3_DA HSUSB1_D T1 5 MMC3_DA HSUSB1_N T5 XT MMC3_DA HSUSB1_D T4 0 MMC3_DA HSUSB1_D T0 4 MMC3_CM HSUSB1_C D LK MMC3_DA HSUSB1_D T6 IT MMC3_CL HSUSB1_S K TP GPT11_PW M AUX_ADC PWR_CNTRL GND GND MMC3_DA T2 MMC3_DA T7 MMC3_DA T3 GPIO_16 GPIO_15 MMC3_DA T1 MMC3_DA T5 MMC3_DA T4 MMC3_DA T0 MMC3_CM D MMC3_DA T6 MMC3_CL K HDQ DMAREQ3 AUX_DC PWR_CNT RL AF13 AH1 4 AE13 AH1 2 AG1 2 AH9 AG9 AF11 AE11 AE10 AF9 AF10 J25 P8 ETK_D6 ETK_D7 ETK_D3 ETK_D2 ETK_D1 ETK_D5 ETK_D9 ETK_D0 ETK_D4 ETK_CTL ETK_D8 ETK_CLK HDQ MCBSP5_DX MCSPI3_CS1 MCSPI3_CLK MCSPI3_CS0 MCBSPI3_SO MI MCBSP5_FSX SERCURE_IN D MCSPI3_SIM O MCBSP5_DR GPIO_20 GPIO_21 GPIO_17 GPIO_16 GPIO_15 GPIO_19 GPIO_23 GPIO_14 GPIO_18 GPIO_13 GPIO_22 GPIO_12 GPIO_17 0 GPIO_57 MM1_RXDP MM1_RX MM1_RXRC V MM1_TXDA T MM1_TXSE 0 MM1_TXEN _N DRM_SECUR E MCBSP5_CL KX SYS_ALTCLK DMAREQ3 The following sections provide a brief description of the functions of the pins available.26. Table 26 below is the pin out of the MMC Connector. Table 26.26 Auxiliary Expansion Header New to the –xM version is the addition of expansion header called the Auxiliary Expansion Header. For a more complete description.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.1 MCBSP5 Signals Page 112 of 171 . the pin muxing register will need to be set as needed on a per pin basis. As is the case with many of the signals on the various connectors. Not all of these signals can be used at the same time. these pins have multiple functions mapped per pin. In order to access other signals on these pins. Only one signal can be used per pin at one time based on the setting of the pin mux registers in the processor. please refer to the datasheet or Technical Reference Manuals. Make sure that you set the correct mux mode when using these signals for their various configurations.

8V.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Access to McBSP5 is provided as an option on the connector. Bidirectional data pin. please refer to the processor Technical reference Manual. Bidirectional data pin.2 MMC3 Signals These signals can be used to provide an additional SD/MMC interface on an expansion board. Table 29 has the signals for the ETK interface that are provided. Table 27 below shows the pins that the McBSP5 interface appears on. Table 28 is a description of these signals. Table 27. they must be in Mux mode 2. Clock This interface could also be used to communicate to an FPGA or a WLAN device that uses the SDIO style interface. Bidirectional data pin. In order to se these signals. Page 113 of 171 . For more information on the use of these signals. the mux mode for each pin must be set to 1. Bidirectional data pin. In order to access these signals. PIN 3 8 11 14 SIGNAL MCBSP5_DX MCBSP5_FSX MCBSP5_DR MCBSP5_CLKX P13 McBSP5 Expansion Signals I/O O O I O DESCRIPTION Transmitted Data Frame Sync Received Data Serial Clock PROC PINS AF13 AH9 AE11 AF10- 8.26. Bidirectional data pin. PIN 3 4 5 8 9 10 11 12 13 14 SIGNAL MMC3_DAT2 MMC3_DAT7 MMC3_DAT3 MMC3_DAT1 MMC3_DAT5 MMC3_DAT4 MMC3_DAT0 MMC3_CMD MMC3_DAT6 MMC3_CLK P13 MMC3 Expansion Signals I/O I/O I/O I/O I/O I/O I/O I/O O I/O O PROC AF13 AH14 AE13 AH9 AG9 AF11 AE11 AE10 AF9 AF10DESCRIPTION Bidirectional data pin. Table 28. then a level shifter will be required. All of these signals are 1.26. 8. Bidirectional data pin. Command indicator signal Bidirectional data pin. so if you plan to use the signals as an SD/MMC interface.3 ETK Signals The ETK signals can be used to provide additional debugging information.

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Table 29. P13 Auxiliary ETK Signals

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PIN 3 4 5 6 7 8 9 10 11 12 13 14 SIGNAL ETK_D6 ETK_D7 ETK_D3 ETK_D2 ETK_D1 ETK_D5 ETK_D9 ETK_D0 ETK_D4 ETK_CTL ETK_D8 ETK_CLK I/O O O O O O O O O O O O O

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PROC AF13 AH14 AE13 AH12 AG12 AH9 AG9 AF11 AE11 AE10 AF9 AF10-

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DESCRIPTION Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace data pin. Trace control signal. Trace data pin. Trace clock.

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or as a clock for the NTSC/PAL S-Video output.5 Alternate Clock The SYS_ALTCLK signal can be used to provide an alternate system clock into the processor. Table 30 gives the signals that are used for this interface. Table 30. Page 117 of 171 .26. It is the same interface that is used to communicate to the UBS PHY on the board. 8.6 HDQ 1-Wire The HDQ/1-Wire module implements the hardware protocol of the master functions of the Benchmarq HDQ and the Dallas Semiconductor 1-Wire® protocols.26.26. USB. In order for these pins to be used. PIN 3 4 5 6 7 8 9 10 11 12 13 14 P13 High Speed USB Expansion Signals I/0 I/O I/O I/O I/O I/O I/O I I/O I/O O I O PROC AF13 AH14 AE13 AH12 AG12 AH9 AG9 AF11 AE11 AE10 AF9 AF10DESCRIPTION Bidirectional Data Bidirectional Data Bidirectional Data Bidirectional Data Bidirectional Data Bidirectional Data Next signal Bidirectional Data Bidirectional Data 60MHZ Clock output Data direction signal Stop signal SIGNAL HSUSB1_D6 HSUSB1_D3 HSUSB_D7 HSUSB1_D2 HSUSB1_D1 HSUSB1_D5 HSUSB1_NXT HSUSB1_D0 HSUSB1_D4 HSUSB1_CLK HSUSB1_DIR HSUSB1_STP 8. the pin mux must be set to Mode 3.4 HSUSB1 Signals These signals are the other High Speed USB port found on the processor.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8. This can be used for things such as the GPTIMERS. but a different port. These protocols use a single wire for communication between the master (HDQ/1-Wire controller) and the slaves (HDQ/1-Wire external compliant devices).

so refer to the TPS65950 documentation before using this pin. This pin is labeled AUX_ADC and connects to the ADCIN6 pin of the TPS65950 and can be controlled and read by the processor using the I2C1 interface. 8.8 GPIO Signals Most of the signals can also be configured as either inputs or outputs from the processor. There are voltage level restrictions to this pin.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 8.26.26. Table 31.26.7 ADC There is one A to D converter pin provided on the Auxiliary Expansion Header.9 DMAREQ Page 118 of 171 . PIN 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SIGNAL GPIO_20 GPIO_21 GPIO_17 GPIO_16 GPIO_15 GPIO_19 GPIO_23 GPIO_14 GPIO_18 GPIO_13 GPIO_22 GPIO_12 GPIO_170 GPIO_57 P13 Auxiliary GPIO Signals I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O PROC AF13 AH14 AE13 AH12 AG12 AH9 AG9 AF11 AE11 AE10 AF9 AF10J25 P8 DESCRIPTION General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output General Purpose Input/Output 8. Table 31 shows the GPIO pin options that can be used on each pin of the connector.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Pin 16 of the expansion connector can also be configured for a DMAREQ pin.2 Page 119 of 171 . For further information on these signals. 8.16. Refer to the processor Technical Reference Manual for more information on how to use this signal. This is the primary audio bus for the processor.27 Audio Expansion Header Also new to the –xM is the addition of the Audio Header that provides access to the McBSP2 bus that connects to the TPS65950. refer to Section 8.

Page 120 of 171 .1 Power Connector Figure 52 is a picture of the BeagleBoard power connector with the pins identified.5mm outside diameter.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 9.0 Connector Pinouts and Cables This section provides a definition of the pinouts and cables to be used with all of the connectors and headers on the BeagleBoard. more power will be required depending on the load of the devices connected to the expansion connector. If the expansion connector is used. Power Connector The supply must be at least 1A with a maximum of 3A. Figure 52. The supply must have a 2. 9.1mm center hot connector with a 5. THERE ARE NO CABLES SUPPLIED WITH THE BEAGLEBOARD.

OTG Host Shorting Pads Page 121 of 171 . Figure 54.2 USB OTG BeagleBoard-xM System Reference Manual Revision A2 Figure 53 is a picture of the BeagleBoard USB OTG connector with the pins identified. J1. USB OTG Connector The shorting pads.REF: BB_SRM_xM 9. Figure 53. to convert the OTG port to a Host mode are found in Figure 54.

REF: BB_SRM_xM 9.3 S-Video BeagleBoard-xM System Reference Manual Revision A2 Figure 55 is the S-Video connector on the BeagleBoard. Figure 55. S-Video Connector Page 122 of 171 .

SIGNAL DATA 2DATA 2+ SHIELD DVI-D to HDMI Cable DVI-D PIN# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 DVI-D PIN# 18 19 20 21 22 23 24 HDMI PIN# 3 1 2 DDS CLOCK DDS DATA DATA 1DATA 1+ SHIELD 15 16 6 4 5 5V GROUND (5V) DATA 0SIGNAL DATA 0+ SHIELD 18 17 9 DVI-D PIN# 7 5 CLOCK+ CLOCK- 10 12 Page 123 of 171 .4 DVI-D BeagleBoard-xM System Reference Manual Revision A2 Figure 56 is the pinout of the DVI-D connector on BeagleBoard. Table 32. DVI-D Connector Table 32 is the pin numbering of the two ends of the cable as it relates to the signals used in the DVI-D interface itself.REF: BB_SRM_xM 9. Figure 56.

Page 124 of 171 . It should also be noted that no audio will be provided over this interface. DVI-D Cable A standard HDMI cable may be used as well as long as it is used with an adapter if you are connecting to a monitor via the DVI-D port. the BeagleBoard may not work if the display timing is not accepted by the display. Figure 58 shows this configuration.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 DO NOT PLUG IN THE DVI-D CONNECTOR TO A DISPLAY WITH THE BEAGLEBAORD POWERED ON. the HDMI to HDMI connector could be used to connect direct to a monitor equipped with a HDMI port. Figure 57. Figure 57 is one of the cables that can be used to connect to an LCD monitor. DVI-D Cable In some cases. It some cases. Figure 58. PLUG IN THE CABLE TO THE DISPLAY AND THEN POWER ON THE BEAGLEBOARD.

Can be used to activate circuitry on adapter board if desired. 9. This provides the ability to create adapters for such things as different LCD panels. All signal levels are 1.1 Connector Pinout The Table 33 and 34 define the pinout of the LCD connectors. P11 LCD Signals I/O PWR PWR O O O O O O O O O O O O I/O O O O PWR PWR Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal DC_5V DC_5V DVI_DATA1 DVI_DATA0 DVI_DATA3 DVI_DATA2 DVI_DATA5 DVI_DATA4 DVI_DATA12 DVI_DATA10 DVI_DATA23 DVI_DATA14 DVI_DATA19 DVI_DATA22 I2C3_SDA DVI_DATA11 DVI_VSYNC DVI_PUP GND GND Description DC rail from the Main DC supply DC rail from the Main DC supply LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit I2C3 Data Line LCD Pixel Data bit LCD Vertical Sync Signal Control signal for the DVI controller. Ground bus Ground bus Page 125 of 171 . When Hi. Table 33.REF: BB_SRM_xM 9.5 LCD BeagleBoard-xM System Reference Manual Revision A2 This section covers the pair of headers that provide access to the raw 1. LVDS interfaces. etc.3V.5.8V with the exception of DVI_PUP signal which is 3.8V DSS signals from the processor. DVI is enabled.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Table 34. P13 LCD Signals I/O PWR PWR O O O O O O O O O Revision A2 Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal 3. The top side pins make for convenient test points if needed. front and back sides shown. LCD Expansion Connector Pins Page 126 of 171 .3V VIO_1V8 DVI_DATA20 DVI_DATA21 DVI_DATA17 DVI_DATA18 DVI_DATA15 DVI_DATA16 DVI_DATA7 DVI_DATA13 DVI_DATA8 NC DVI_DATA9 I2C3_SCL DVI_DATA6 DVI_CLK+ DVI_DEN DVI_HSYNC GND GND Description 3. Figure 59.3V reference rail 1.8V buffer reference rail. LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit LCD Pixel Data bit No connect LCD Pixel Data bit I2C3 Clock Line LCD Pixel Data bit DVI Clock Data Enable Horizontal Sync Ground bus Ground bus I/O O O O O PWR PWR Figure 59 shows where pins 1 and 2 are located on each connector.

Figure 60 shows the pin number and location of the camera connector.8V IO rail Ground Ground Page 127 of 171 .5. P10 Camera Signals I/O I O I PWR I I I/O I I I I I PWR I PWR I PWR I PWR I PWR I PWR PWR PWR I PWR I PWR I PWR PWR PWR Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Signal CAM_D11 CAM_CLKA CAM_D10 GND CAM_D9 I2C_SCL CAM_D8 I2C_SCL CAM_D7 CAM_FLD CAM_D6 CAM_WEN CAM_D5 GND CAM_D4 CAM_2V8 CAM_D3 CAM_2V8 CAM_D2 GND CAM_D1 GND CAM_D0 DC_5V DC_5V DC_5V CAM_PCLK GND CAM_HS CAM_1V8 CAM_VS CAM_1V8 GND GND Description Camera Data 11 Camera main clock Camera Data 10 Ground Camera Data 9 Camera control data Camera Data 8 Camera control clock Camera Data 7 Camera Reset Camera Data 6 Camera Output enable Camera Data 5 Ground Camera Data 4 Camera 2.2 Camera BeagleBoard-xM System Reference Manual Revision A2 Table 35 is the pinout of the camera connector on the board.8V core voltage Camera Data 3 Camera 2.8V core voltage Camera Data 2 Ground Camera Data 1 Ground Camera Data 0 5V supply 5V supply 5V supply Camera Pixel Clock Ground Camera Horizontal Sync 1. Table 35.REF: BB_SRM_xM 9.8V IO rail Camera vertical Sync 1.

The camera module is not supplied with the BeagleBoard. Camera Module Page 128 of 171 . Figure 61.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 60. The camera should face to the edge of the board (Left) when installed. Camera Connector Figure 61 is the front of the camera module.

3 Audio McBSP2 Port BeagleBoard-xM System Reference Manual Revision A2 New to the –xM version is the addition of a four pin connector that provides access to the McBSP2 audio serial interface. Table 36. Table 36 is the pin out of the connector.5. McBSP is the most desirable due its large buffers.REF: BB_SRM_xM 9. McBSP Audio Connector Page 129 of 171 . While other McBSP ports can be used for audio. Figure 62. P10 McBSP2 Signals I/O O O I O Pin# 1 2 3 4 Signal McBSP2_DX McBSP2_FSX McBSP2_DR McBSP2_CLKX Description Transmit Out Frame Sync Receive In Clock Figure 62 is the pin number location of P10.

8V IO Rail 1. MMC interface data pin.85V to 3. P17 Auxiliary Access Signals I/O PWR PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O O I/O O I/O I/O I I PWR PWR Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal VIO_1V8 VMMC2 MMC3_DAT2 MMC_DAT7 MMC3_DAT3 GPIO_16 GPIO_15 MMC3_DAT MMC_DAT5 MMC3_DAT4 MMC_DAT0 MMC3_CMD MMC_DAT6 MMC3_CLK HDQ DMAREQ3 AUX_ADC PWR_CNTRL GND GND Description 1. MMC interface data pin.15V Rail. MMC interface data pin.REF: BB_SRM_xM 9. General purpose I/O pin General purpose I/O pin MMC interface data pin. Table 37. Configurable via SW. Auxiliary Access Connector Page 130 of 171 . MMC interface data pin. Figure 63. MMC clock pin I-wire interface pin DMA request input pin ADC on TPS65950 Control pin for on/off button to the TPS65950 Figure 63 shows the location of P17. MMC CMD signal pin MMC interface data pin.4 Auxiliary Access Header BeagleBoard-xM System Reference Manual Revision A2 Table 37 gives the signal names of the pins on the Auxiliary Access Connector. MMC interface data pin.5. MMC interface data pin.

5 BeagleBoard-xM System Reference Manual Revision A2 LCD and Expansion Measurements Figure 64 provides some of the dimensions that can assist in the location of the LCD headers. Table 38 provides the values for each lettered dimension. It is strongly recommended that the CAD data be used in order to determine their location exact.REF: BB_SRM_xM 9.085 27.118 2.190 4.296 7. Figure 64. Connector Dimensions Dimension A B C D Inches Millimeters 1. Top Mount LCD Adapter Table 38.56 0.83 Page 131 of 171 .52 0.99 0.5.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Page 132 of 171 .

It will require that they be buffered in order to drive other voltage levels. It should be noted that the voltage level of these signals are 1.5.REF: BB_SRM_xM 9.8V.6 Mounting Scenarios BeagleBoard-xM System Reference Manual Revision A2 This section provides a few possible mounting scenarios for the LCD connectors. Bottom Mount LCD Adapter Page 133 of 171 . Figure 65 shows the board being mounted under the BeagleBoard. BeagleBoard Buffer Logic LCD Connector Adapter Figure 65.

6 Audio Connections BeagleBoard-xM System Reference Manual Revision A2 Figure 66 is the audio input jack required to connect to the BeagleBoard.REF: BB_SRM_xM 9. Figure 67. Audio In Connector Page 134 of 171 . Figure 66. Audio In Plug Figure 67 is the actual connector used on the BeagleBoard.

Figure 68. Audio Out Plug Figure 69 is the actual connector used on the BeagleBoard. Audio Out Connector Page 135 of 171 .7 Audio Out BeagleBoard-xM System Reference Manual Revision A2 Figure 68 is the audio out jack required to connect to the BeagleBoard.REF: BB_SRM_xM 9. Figure 69.

Page 136 of 171 . The JTAG emulator must support 1. JTAG Connector Pinout Table 39 gives a definition of each of the signals on the JTAG header.8V only.8V signals for use on the BeagleBoard. Figure 70.8. Table 39.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 9. JTAG Signals Pin 1 3 7 9 11 2 13 14 5 4.10.12.8 JTAG Figure 70 is the JTAG connector pin out showing the pin numbering.14 Signal JTAG_TMS JTAG_TDI JTAG_TDO JTAG_RTCK JTAG_TCK JTAG_nTRST JTAG_EMU0 JTAG_EMU1 VIO GND Description Test mode select Test data input Test Data Output ARM Clock Emulation Test Clock Test reset Test emulation 0 Test emulation 1 Voltage pin Ground I/O I/O I O O I I I/O I/O PWR PWR All of the signals are 1.

C4 Figure 72. then a 20 pin to 14 pin adapter must be used. Figure 71 shows an example of a 14 pin to 20 pin adapter. JTAG 14 to 20 Pin Adapter Figure 72 shows how the JTAG cable is to be routed when connected to the BeagleBoard. You may also use emulators that are either equipped with a 14 pin connector or are universal in nature. Figure 71. JTAG Connector Pinout Page 137 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 If a 20 pin connector is provided on the JTAG emulator.

Figure 73.9 9. INSTALLATION OF THE BATTERY BY THE USER IS AT THEIR OWN RISK. Figure 73 is a picture of the battery.1 Battery Installation Battery The board was designed to use the MS412FE-FL26E battery from Seiko Instruments. It is also possible that the user may choose to install a higher capacity Lithium battery.9.9.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 9. This is a Lithium Rechargeable Battery with a 1mAH capacity. FAILURE TO FOLLOW THE INSTRUCTIONS CAN RESULT IN DAMAGE TO THE BOARD.2 Battery Installation Optional Battery THE FOLLOWING STRUCTIONS ASSUME THE USER HAS PREVIOUS EXPERIENCE WITH BATTERIES. 9. BATTERY INSTALLATION IS THE SOLE RESPONSABILTY OF THE USER. Page 138 of 171 . THIS DAMAGE IS NOT COVERED UNDER THE WARRANTY.

Resistor R65 Following are the steps required to install the battery. Remove R65 from the board as shown on Figure 73. Insert the (+) lead into the hole that is marked (+) on Figure 74. Using Figure 66. locate the positive (+) lead of the battery. 1) 2) 3) 4) Remove all cables from the board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 74. Page 139 of 171 . Optional Battery Location Figure 75.

org. Covered in this section are the following accessories: o o o o o o o DC Power Supplies Serial Ribbon cable USB Hubs USB Thumb Drives DVI-D Cables DVI-D Monitors SD/MMC Cards Page 140 of 171 . All pricing information provided is subject to change an din most cases is likely to be lower depending on the products purchased and from where they are purchased. The concept behind BeagleBoard is that different features and functions can be added to BeagleBoard by bringing your own peripherals. Obviously things can change very quickly as it relates to devices that may be available. Inclusion of any product in this section is not an endorsement of the product by Beagleboard.0 BeagleBoard Accessories Throughout this manual various items are mentioned as not being provided with the standard BeagleBoard package or as options to extend the features of the BeagleBoard.org for an up to date listing of these peripherals. This section covers these accessories and add-ons and provides information on where they may be obtained. but is provided as a convenience only to the users of the BeagleBoard-xM board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 10. This has several key advantages: o User can choose which peripherals to add. o User can choose the brand of peripherals based on driver availability and ability to acquire the particular peripheral o User can add these peripherals at a lower cost than if they were integrated into the BeagleBoard. Please check BeagleBoard. Information provided here is intended to expose the capabilities of what can be done with the BeagleBoard and how it can be expanded. Inclusion of any products in this section does not guarantee that they will operate with all SW releases. It is up to the user to find the appropriate drivers for each of these products.

REF: BB_SRM_xM o o o o USB to Ethernet USB to WiFi USB Bluetooth Expansion Cards BeagleBoard-xM System Reference Manual Revision A2 NO CABLES OR POWER SUPPLIES ARE PROVIDED WITH THE BEAGLEBOARD. Table 40 provides the specifications for the BeagleBoard DC supply..1mm x 5. DC Power Supply Specifications Specification Voltage Current Connector Requirement 5.1 DC Power Supply Tabletop or wall plug supplies can be used to power BeagleBoard.0 1.5 (minimum) 2. The amount specified is equal to that supplied by a USB port. more power will be required.5A be used if higher current peripherals are expected to be used or if expansion boards are added.5mm Center hot Unit V A It is recommended that a supply higher than 1. Supplies that provide additional current than what is specified can be used if additional current is needed for add on accessories. Table 41. 10. Table 41 lists some power supplies that will work with the BeagleBoard. Table 40. Page 141 of 171 . DC Power Supplies Part # EPS050100-P6P DPS050200UPS-P5P-SZ Manufacturer CUI CUI Supplier Digi-Key Digi-Key Price $7 $16 Figure 76 is a picture of the type of power supply that will be used on the BeagleBoard. The onboard USB hub and Ethernet do consume additional power and if you plan to load the USB Host ports.

DC Power Supply Revision A2 Page 142 of 171 .REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Figure 76.

HDMI to DVI-D Cable 10. With the integrated EDID feature. Table 42. Please check on BeagleBoard. The digital portion of the DVI-D interface is compatible with HDMI and is electrically the same.org for an up to date listing of the DVI-D monitors as well as information on the availability of drivers. The audio and encryption features of HDMI are not supported by the Beagle. PLUG IN THE CABLE TO THE DISPLAY AND THEN POWER ON THE BEAGLEBOARD. a HDMI to DVI-D cable is required. timing data is collected from the monitor to enable the SW to adjust its timings. A standard HDMI cable may be used to connect to the HDMI input of monitors. Page 143 of 171 . Figure 77. Whether or not the Beagle will support those monitors is dependent on the timings that are used on the Beagle and those that are accepted by the monitor. Figure 77 is a picture of a HDMI to DVI-D cable.3 DVI-D Monitors There are many monitors that can be used with the BeagleBoard.2 DVI Cables BeagleBoard-xM System Reference Manual Revision A2 In order to connect the DVI-D interface to a LCD monitor. DVI-D Monitors Tested Manufacturer Dell Insignia Dell LG Part Number 2407WFPb NS-LCD15 1708FP FLATRON W2243T Status Tested Tested Tested Tested DO NOT PLUG IN THE DVI-D CONNECTOR TO A DISPLAY WITH THE BEAGLEBAORD POWERED ON.REF: BB_SRM_xM 10. This may require a change in the software running on the Beagle. Table 42 shows a short list of the monitors that have been tested to date on the BeagleBoard at the 1024x768 resolution.

but is provided as examples only. Buying a DVI to VGA adapter connector will not work on a VGA display. Check BeagleBoard. You will need an active DVI-D to VGA adapter.5 USB to WiFi There are several USB to WiFi adapters on the market and Figure 78 shows a few of these devices. These devices can easily add WiFi connectivity to BeagleBoard by using the USB OTG port in the host mode. Please check BeagleBoard. 10. Inclusion of these items in the table does not guarantee that they will work.4 microSD Cards Table 43 is a list of SD/MMC cards that have been tested on BeagleBoard. This will require a special cable to convert the miniAB connector to a Type A or a hub can also be used. These are provided as examples only. Please check BeagleBoard.org for information on devices that have drivers available for them.org for an up to date listing of the SD/MMC cards that have been tested as well as information on the availability of drivers if required.org for an up to date listing of the USB to WiFi devices as well as information on the availability of drivers. Figure 78. Table 43. Page 144 of 171 . SD/MMC Cards Tested Manufacturer Patriot Type 4GB Part Number Status Tested 10.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 The analog portion of DVI which provides RGB analog type signals is not supported by the Beagle. USB to WiFi Table 44 provides a list of USB to WiFi adapters that could be used with the BeagleBoard.

6 USB to Bluetooth There are several USB to Bluetooth adapters on the market and Figure 79 shows a few of these devices. USB to Bluetooth Table 45 provides a list of USB to Bluetooth adapters that could be used with the BeagleBoard. please verify the availability of drivers for that device. Before purchasing a particular device. This will require a special cable to convert the miniAB connector to a Type A or a hub can also be used. Check BeagleBoard. Figure 79. These devices can easily add Bluetooth connectivity to BeagleBoard by using the USB OTG port in the host mode.org for information on devices that have drivers available for them and their test status. Please check BeagleBoard. but is provided as examples only. Page 145 of 171 . These are provided as examples only.org for an up to date listing of the USB to Bluetooth devices as well as information on the availability of drivers.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Table 44. USB to WiFi Adapters Product 4410-00-00AF HWUG1 TEW-429Uf Manufacturer Zoom Hawkins Trendnet Status Not Tested Not Tested Not Tested It should be noted that the availability of Linux drivers for various WiFi devices is limited. 10. Inclusion of these items in the table does not guarantee that they will work.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual USB to Bluetooth Adapters Revision A2 Table 45. Product TBW-105UB ABT-200 F8T012-1 Manufacturer Trendnet Airlink Belkin Status Not Tested Not Tested Not Tested Page 146 of 171 .

Figure 80 is the dimensions of the BeagleBoard. BeagleBoard Dimension Drawing Page 147 of 171 . Figure 80. the mounting holes and the replacement of the main expansion and LCD headers are the same as is found on the rev C4 board.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 11.1 BeagleBoard Dimensions This section provides information on the mechanical aspect of the BeagleBoard.0 Mechanical Information 11. Despite the change in the overall dimensions of the board.

Figure 81. but in order to be supported by the Software they must conform to these standards if such support is desired. Users are free to create their own cards for private or commercial use. BeagleBoard Bottom Stacked Daughter Card All BeagleBoard-xM produced will have the connectors pre mounted onto the bottom of the BeagleBoard as described above.REF: BB_SRM_xM 11. Page 148 of 171 . The –xM has additional connectors on the back of the board. Figure 82 shows their location. 11.2 BeagleBoard-xM System Reference Manual Revision A2 BeagleBoard Expansion Card Design Information This section provides information on what is required from a mechanical and electrical aspect to create expansion cards for the BeagleBoard that are designed to connect to the Expansion header on the BeagleBoard.2.1 Mounting Method The standard method to provide a daughtercard for the BeagleBoard is for it to be mounted UNDER the Beagle Board as described in Figure 81.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 82. BeagleBoard-xM Expansion Headers Page 149 of 171 .

0 4 0 2 2 Figure 83. o o o o o o TSSOP 8 PDIP 8 UDFN 8 SOIC 8 SOT23 5 dBGA2 8 The contents of the EEPROM are not specified in this document.0 4 0 2 2 R 19 4 . The EEPROM is to be connected to I2C2 as found on the main expansion connector. V I O _ 1 V 8 4 . This is to allow for the identification of the card by the Software in order to set the pin muxing on the expansion connector to be compatible with the expansion card.7 K . 7 K1 . BeagleBoard Expansion Board EEPROM Schematic The EEPROM must be write protected.2. all of which can be used. The EEPROM that is designated is the AT24C01 or ATC24C01B. C E R 4 0 4 .0 4 0 2 1 2 R 20 S S 7 . It is suggested that a testpoint be used to allow for the WP to be disabled during test to allow the required data to be written to the EEPROM. 1 2 R 21 Page 150 of 171 .REF: BB_SRM_xM 11.5 % . 5 % . The AT24C01 is designated as “Not Recommended for New Design” but can still be used. The schematic for the EEPROM is in Figure 83 below. 0 V U A A A 0 1 2 1 2 3 4 A A A A V 0 1 2 S 8 V 8 C7 P 6 S C L5 SS D A W C C 0 1 I O _ 1 V 8 B B B C 0 B B B 2 8 _ _ _ W I 2 I 2 P C C _ _ C D L A T 2 4 T P T P .7 K . The AT24C01B is the replacement part and is available in several different packages.5 % . 1 u f .2 Expansion EEPROM BeagleBoard-xM System Reference Manual Revision A2 All expansion cards designed for use with the BeagleBoard are required to have a EEPROM located on the board.

Others may be at different voltage levels depending on the same factor. Figure 84.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 12.0 Board Verification Test Points There are several test points that may be useful if it becomes necessary to troubleshoot the BeagleBoard-xM board. BeagleBoard Voltage Access Points Some of these voltages may not be present depending on the state of the TWL4030 as set by the processor. Figure 84 shows the top side test points. Page 151 of 171 .

78 1.78 4.78 Nom 1.0 1.78 1.8 1.81 1.81 5.9 1.81 1.8 5.2 3.3V VMMC1 (3V) VMMC1(1. Page 152 of 171 .1 1.8V) Min 1.81 Conditions From the host PC.81 1. May be lower or higher. 3.25 3.1 1.8 1.15 4.8 1.3 1.0 1.9 1. Can be set via SW.3 3.4 4.0V at power up.8 Max 1. Voltage levels may vary.78 1.32 3.2 4.28 2. Voltages Voltage VIO_1V8 VDD_SIM VBUS_5V0 VOCORE_1V3 VBAT VDAC_1V8 VDD_PLL1 VDD_PLL2 VDD2 3.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Table 46 provides the ranges of the voltages and the definition of the conditions as applicable.81 1.2 1.8 1. Table 46. Can be set to via SW.2 1.78 1.15 3.

BeagleBoard Signal Access Points Page 153 of 171 . Figure 85.1.1 Signal Access Points BeagleBoard-xM System Reference Manual Revision A2 Figure 85 shows the access points for various signals on BeagleBoard.REF: BB_SRM_xM 12.

If running on a DC supply make sure that voltage is being supplied. The expect 100mA max. USB Host Connection Issues via OTG. If it the level is below 4. OTG cables are typically not designed for higher current.35V. processor is booting. the USB power is not guaranteed to work. Make sure the card is formatted correctly and that the MLO file is the first file written to the SD card.REF: BB_SRM_xM 12. JTAG interface needs to be reset Incorrect serial cable configuration. If a 60 is displayed over the serial cable. UBoot does not start.2 Troubleshooting Guide BeagleBoard-xM System Reference Manual Revision A2 Table 47 provides a list of possible failure modes and conditions and suggestions on how to diagnose them and ultimate determine whether the HW is operational or not. Reset the BeagleBoard. the PC may have shut down the voltage due to excessive current as related to what it is capable of providing. Measure the voltage at the card to determine the voltage drop across the cable. Troubleshooting Symptoms Possible Problem Verify that the Power LED is on. Remove the USB cable and re insert. Table 47. Verify straight thru cable configuration Make sure the SD/MMC card is installed all they way into the connector. Cheap USB Cable. Issue could be the SD/MMC card. JTAG does not connect. Page 154 of 171 . Action If off and running over USB. and no activity on the RS232 monitor.

Table 48 provides a list of the know issues on the BeagleBoard.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 13. Table 48. Known Issues Affected Revision A A Issue DVI Powerdown USB Hub reset Description DVI power down signal is not operational Reset signal to hub is not operational Workaround None Hub can be powered off and on to create a reset scenario Final Fix B No Plan Page 155 of 171 .0 Known Issues This section provides information on any known issues with the BeagleBoard HW and the overall status.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 14. Figure 86. BeagleBoard Top Side Components Page 156 of 171 .0 PCB Component Locations Figures 86 and Figure 87 contain the bottom and top side component locations of the BeagleBoard.

REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 Figure 87. BeagleBoard Bottom Side Components Page 157 of 171 .

Only “community” support is allowed via resources at BeagleBoard. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU. http://beagleboard.0 Schematics The following pages contain the PDF schematics for the BeagleBoard. OrCAD source files are provided for BeagleBoard on BeagleBoard. SHOULD THE DESIGN MATERIALS PROVE DEFECTIVE. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE DESIGN MATERIALS “AS IS” WITHOUT WARRANTY OF ANY KIND.org at the following link.org for the latest schematics. BUT NOT LIMITED TO. EITHER EXPRESSED OR IMPLIED. TO THE EXTENT PERMITTED BY APPLICABLE LAW.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 15. THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. YOU ASSUME THE COST OF ALL NECESSARY SERVICING. THERE IS NO WARRANTY FOR THE DESIGN MATERIALS. Page 158 of 171 . REPAIR OR CORRECTION. This manual will be periodically updated. INCLUDING.org/hardware/design These design materials are *NOT SUPPORTED* and DO NOT constitute a reference design. but for the latest documentation be sure and check BeagleBoard. We mean it.org/discuss. these design materials may be totally unsuitable for any purposes.

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EITHER EXPRESSED OR IMPLIED. YOU ASSUME THE COST OF ALL NECESSARY SERVICING. BUT NOT LIMITED TO.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 16. these design materials may be totally unsuitable for any purposes. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE DESIGN MATERIALS “AS IS” WITHOUT WARRANTY OF ANY KIND. We mean it. THERE IS NO WARRANTY FOR THE DESIGN MATERIALS. Page 170 of 171 . SHOULD THE DESIGN MATERIALS PROVE DEFECTIVE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU.0 Bills of Material The Bill of Material for the Beagle Board is provided at BeagleBoard.org/hardware/design These design materials are *NOT SUPPORTED* and DO NOT constitute a reference design. TO THE EXTENT PERMITTED BY APPLICABLE LAW.org/discuss. REPAIR OR CORRECTION. INCLUDING. Only “community” support is allowed via resources at BeagleBoard.org at the following location: http://beagleboard. THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

We mean it. EITHER EXPRESSED OR IMPLIED.org/discuss. SHOULD THE DESIGN MATERIALS PROVE DEFECTIVE.0 PCB Information The following pages contain the PDF PCB layers for the BeagleBoard.REF: BB_SRM_xM BeagleBoard-xM System Reference Manual Revision A2 17. THERE IS NO WARRANTY FOR THE DESIGN MATERIALS.org at the following address. REPAIR OR CORRECTION. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE DESIGN MATERIALS “AS IS” WITHOUT WARRANTY OF ANY KIND. http://beagleboard. INCLUDING. TO THE EXTENT PERMITTED BY APPLICABLE LAW.org/hardware/design These design materials are *NOT SUPPORTED* and DO NOT constitute a reference design. Gerber files and Allegro source files are available on BeagleBoard. these design materials may be totally unsuitable for any purposes. BUT NOT LIMITED TO. THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Only “community” support is allowed via resources at BeagleBoard. Page 171 of 171 . THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE DESIGN MATERIALS IS WITH YOU. YOU ASSUME THE COST OF ALL NECESSARY SERVICING.

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