SECTION - I

NETWORK ANALYSIS 1. the ideal current source having infinite resistance. Real voltage sources can be represented as ideal voltage sources in series with a resistance r. the ideal voltage source having zero resistance. . Real current sources can be represented as ideal current sources in parallel with a resistance r. What is Voltage and Current Sources? Ans.

4. abbreviated "H".L * ------------change in time where L is the self-inductance of the circuit. The mutual inductance. of two circuits describes the size of the voltage in the secondary induced by changes in the current of the primary: V(secondary) = change in I (primary) . Independent Voltage Sources An ideal independent voltage source is a two-terminal circuit element where the voltage across it a) is independent of the current through it . Define bandwidth quality factor (Q)? Ans. which can induce an opposing voltage in itself.and Self-Induction ? Ans. This is usually defined by the frequency where the amplitude ratio falls to 0. The size of that opposing voltage is V(opposing) = change in I . Define Mutual. Q is equal to the ratio of the center frequency to the bandwidth. A circuit can create changing magnetic flux through itself. The BANDWIDTH of an accelerometer refers to it's useful range of operating frequencies. which is roughly equal to resonant frequency divided by the driving frequency. M.M * ---------------------change in time The units of mutual inductance are henry. describes the sharpness of the system's response. A system's QUALITY FACTOR.2. Brief explanation about Independent & Dependent Voltage & current Sources? Ans. The changing magnetic field created by one circuit (the primary) can induce a changing voltage and/or current in a second circuit (the secondary). Q is also used to describe the amplitude of the resonant response.5. the 3 dB point. again measured in henries 3. Q.

box" with a set of distinctive properties. weneed a voltage-dependent voltage source. They are used to model active circuits: those containing electronic elements. Once this is done.Parameters for two-port network? Ans. The relationship between the load impedance and the internal impedance of the energy source will give the power in the load. g. the impedance of the load will vary from an open-circuit state to a short-circuit state resulting in the power being absorbed by the load becoming dependent on the impedance of the actual power source. and ABCD parameters. the standard circuit-theoretical model for a transistor contains a current-dependent current source. 6. A two-port network makes possible the isolation of either a complete circuit or part of it and replacing it by its characteristic parameters. A two-port network (a kind of four-terminal network or quadripole) is an electrical network or device with two pairs of terminals connected together internally by an electrical network. Independent current Sources In contrast to ideal independent voltage sources. an ideal independent current source is a twoterminal circuit element where the current passing through it a) is independent of the voltage across it b) can be specified independently of any other variable in a circuit. RL across the output terminals of the power source. However. Then for the load resistance to absorb the maximum power possible it has to be "Matched" to the impedance of the power source and this forms the basis of Maximum Power Transfer. y. Thus. Any complex circuit or network can be replaced by a single energy source in series with a single internal source resistance. There are a number of alternative sets of parameters that can be used to describe a linear twoport network. 5. Dependent sources do not serve as inputs to a circuit like independent sources. The RLC circuits we have been considering so far are known as passive circuits. when we connect a load resistance. enabling us to abstract away its specific physical buildup. each . Generally. What is H . Maximum Power Transfer is another useful analysis method to ensure that the maximum amount of power will be dissipated in the load resistance when the value of the load resistance is exactly equal to the resistance of the power source. the isolated part of the circuit becomes a "black . to describe an op-amp. this source resistance or even impedance if inductors or capacitors are involved is of a fixed value in Ohm´s. Maximum Power Transfer Theorem? Ans. Any linear circuit with four terminals can be transformed into a two-port network provided that it does not contain an independent source and satisfies the port conditions. Two terminals constitute a port if they satisfy the essential requirement known as the port condition: the same current must enter and leave a port. there are four different kinds of dependent sources. RS.b) can be specified independently of any other variable in a circuit. the usual sets are respectively called z. However. h. Dependent Voltage & current source voltage or current source whose value is proportional to some other voltage or current in the circuit. thus simplifying analysis.

∞). In operational calculus. as algebraic equation is generally easier to deal with. to avoid potential confusion. defined by: The parameter s is a complex numbers: with real numbers σ and ω. is the function F(s). Still more generally. one often writes where the lower limit of 0− is short notation to mean . the integral can be understood in a weak sense. Another advantage of Laplace transform is in dealing the external force is either impulsive . the integral can be understood as a (proper) Lebesgue integral. In that case. and this is dealt with below. The meaning of the integral depends on types of functions of interest. For locally integrable functions that decay at infinity or are of exponential type. By applying the Laplace transform. (the force lasts a very shot time period such as the bat hits a baseball) or the force is on and off for some regular or irregular period of time The Laplace transform of a function f(t). However. A necessary condition for existence of the integral is that ƒ must be locally integrable on [0. defined for all real numbers t ≥ 0. What is Laplace Transform? Ans. 7. for many applications it is necessary to regard it as a conditionally convergent improper integral at ∞. even more specifically. These are all limited to linear networks since an underlying assumption of their derivation is that any given circuit condition is a linear superposition of various short-circuit and open circuit conditions.described individually below. One can define the Laplace transform of a finite Borel measure μ by the Lebesgue integral An important special case is where μ is a probability measure or. the Dirac delta function. the Laplace transform of a measure is often treated as though the measure came from a distribution function ƒ. one can change an ordinary differential equation into an algebraic equation.

Despite these advantages. This filter type was originally intended for use with telephone multiplexing and was an improvement on the existing constant k type filter. M-derived filters or m-type filters are a type of electronic filter designed using the image method. 8. all filters designed by the image method fail to give an exact match. it is not necessary to take such a limit. The m-type filter section has a further advantage in that there is a rapid transition from the cut-off frequency of the pass band to a pole of attenuation just inside the stop band. there is a drawback with m-type filters. but the m-type filter is a big improvement with suitable choice of the parameter m. They were invented by Otto Zobel in the early 1920s. What is M-derived filter? Ans. For this reason. it does appear more naturally in connection with the Laplace–Stieltjes transform. and m-types have poor stop band rejection.[2] The main problem being addressed was the need to achieve a better match of the filter into the terminating impedances.This limit emphasizes that any point mass located at 0 is entirely captured by the Laplace transform. Although with the Lebesgue integral. filters designed using m-type sections are often designed as composite filters with a mixture of k-type and m-type sections and different values of m at different points to get the optimum performance from both types. In general. at frequencies past the pole of attenuation. CONTROL SYSTEMS . the response starts to rise again.

pressure. what is Open Loop and closed loop control systems? Ans. Transfer Function of DC Servo motor? Ans. flow. The controller develops an error signal that initiates corrective action and drives the final output device to the desired value. In the DC Motor Drive illustrated above. In Open-Loop control. I have represented the DC motor and the potentiometer attached to its shaft as the transfer function G(s).1. and the amplifier with gain A. The input of G(s) is the armature voltage of the motor. We will determine what the allowable range of A is to keep the system stable. A Closed-Loop system utilizes feedback to measure the actual system operating parameter being controlled such as temperature. no feedback loop is employed and system variations which cause the output to deviate from the desired value are not detected or corrected. or speed. From the block diagram. ea. The closed loop transfer function of this system is . the tachometer provides a feedback. level. 2. This feedback signal is sent back to the controller where it is compared with the desired system setpoint. I have recreated the servo system in the first diagram on the main power servo page here: In this block diagram. and its output is the motor shaft angular position. θm.

3. When the input sine wave is switched on. In other words. What is Gain margin? Ans. Polar plots are not used exclusively because. 4. There are a number of polar graph options for studying control systems including the nyquist. 5..without powerful computing facilities. Define stability of a system? Ans. The nyquist open loop polar plot indicates the degree of stability. the gain margin is 1/g if g is the gain at the –180° phase frequency. A systems stability can be defined in terms of its response to external impulse inputs. The filter response during this ``settling'' period is called the transient response of the filter. The gain margin is the amount of gain increase required to make the loop gain unity at the frequency where the phase angle is –180°. The stability of a system relates to its response to inputs or disturbances. . the phase margin is the difference between the phase of the response and –180° when the loop gain is 1. inverse polar plot and the nichols plot. 6. Similarly. Definition A system is stable if every bounded input produces a bounded output.0 is called the unity-gain frequency or crossover frequency. The terms transient response arise naturally in the context of sine wave analysis. What is Nyquist Plots? Ans. It is generally found that gain margins of three or more combined with phase margins between 30 and 60 degrees result in reasonable trade-offs between bandwidth and stability. The frequency at which the magnitude is 1. A system which remains in a constant state unless affected by an external action and which returns to a constant state when the external action is removed can be considered to be stable. and the adjustments required and provides stability information for systems containing time delays. the filter takes a while to ``settle down'' to a perfect sinewave at the same frequency. they can be difficult to generate at a detailed level and they do not directly yield frequency values. Define Steady state response? Ans. Definition A system is stable if its impulse response approaches zero as time approaches infinity The system stability can also be defined in terms of bounded (limited) inputs.0.

z is the zero frequency and p is the pole frequency. Both lead compensators and lag compensators introduce a pole–zero pair into the open loop transfer function. What is state variables? Ans. 8. The transfer function can be written in the Laplace domain as where X is the input to the compensator. Y is the output. state variables are used to represent the states of a general system. The state variables can be used to describe the state space of the system. What is lead–lag compensator ? Ans. In Control Engineering and other areas of science and engineering. It is a fundamental building block in classical control theory. The state equations for a linear time invariant system are expressed with Coefficient matrices.7. s is the complex Laplace transform variable. . A lead–lag compensator is a component in a control system that improves an undesirable frequency response in a feedback and control system. The equations relating the current state and output of a system to its current input and past states are called the state equations.

to gives results in the form of output. What are Functional units? Ans. to process data as required by the user. In order to carry out the operations like accepting data or instructions by way of input. and to . to stores data.COMPUTER ORGANIZATION 1.

The control memory addresses are divided into two groups: a task mode and an executive (interrupt) mode. A stack is a storage device that stores information in a last-in-first-out(LIFO) fashion. this speeds up CPU operation by reducing the number of memory references for data storage and retrieval. 4. It can add or subtract decimal numbers. 2) control unit. If so. The outputs include four terminals for the sum digit and one for the output-carry. The cache is a smaller. When the processor needs to read from or write to a location in main memory. It is used as a temporary storage for data. A single-stage decimal arithmetic unit consists of nine binary input variables and five binary output variables. four inputs for the addend digit. there is a wide variety of possible circuit configurations dependent on the code used to represent the decimal digits. which is much faster than reading from or writing to main memory. Only two type of operations are possible in a stack. As long as most memory accesses are cached memory locations. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. Control memory is a random access memory (RAM) consisting of addressable storage registers. A decimal arithmetic unit is a digital function that performs decimal micro-operations. Access is performed as part of a control section sequence while the master clock oscillator is running. Each stage must have four inputs for the augend digit. What is Stack organization in CPU? Ans. usually by forming the 9's or 10'scomplement of the subtrahend. namely push and pop operations. It is primarily used in mini and mainframe computers. and 3) central processing unit. while pop removes the topmost program and in some cases the operating can be used explicitly for execution of a program. . Of course.controls all operations inside a computer. it first checks whether a copy of that data is in the cache. faster memory which stores copies of the data from the most frequently used main memory locations. The unit accepts coded decimal numbers and generates results in the same adopted binary code. What is Control memory? Ans. 5. 2. What is Cache Memory? Ans. The computer system is divided into three separate units for its operation. They are 1) arithmetic logical unit. Access to control memory data requires less time than to m a in memory. 3. the processor immediately reads from or writes to the cache. the computer allocates the task between its various functional units. What is decimal arithmetic unit ? Ans. and an input-carry. Push places data onto the top of the stack. since a minimum of four bits is required to represent each coded decimal digit. the average latency of memory accesses will be closer to the cache latency than to the latency of main memory.

What is Parallel processing? Ans. The design of this structure will depend on the exchange that must be made between Modules. The processors access data through shared memory. scanner. What are Peripheral devises? Ans. Some supercomputer parallel processing systems have hundreds of thousands of microprocessors. memory. keyboard. Storage: A storage device is a device that is used to store the input.6. scanner. I/O) that communicate with each other. mouse. speaker and the monitor are the examples of the output devices. Peripheral devices can be classified according to their functions. microphone and external modem. 8. printer and Zip drive. Output: Output devices are the devices that are used to display the results. or a number of computers connected by a network. Printer. What is Interconnection Structures? Ans. The computer resources can include a single computer with multiple processors. They can be internal such as CD-ROM or internal modem and external as the scanner. Input: Input devices are the type of the computer devices that are used to provide the control signals to the computer. A computer consists of a set of components (CPU. tape device. Keyboard and the Mouse are the examples of the input devices. Peripheral devise are the computer devices that are connected to the computer externally such as printer. . The collection of paths connecting the various modules is call the Interconnection Structures. or a combination of both. 7. Parallel processing is the simultaneous processing of the same task on two or more microprocessors in order to obtain faster results.

MICROPROCESSORS AND INTERFACING 1. Macros are defined by MACRO & ENDM directives. Macro is a group of instruction. AX ENDM . Creating macro is similar to creating new opcodes that can be used in the program • • • • • INIT MACRO MOV AX. What are Macros? Ans. data MOV DS MOV ES. The macro assembler generates the code in the program each time where the macro is called.

the program can be moved to any other block of memory and still execute correctly. those jump memory references pointing to the interior of the moved block must be changed.While the cpu is executing a program. Branch instructions are always relative to the current program counter. using programmed or minute more than a Large files could take interrupt I/O. the control is transferred back again to the main program. video controllers. 3.. The core's functional configuration is programmed by the system software so that external logic is not required to interface peripheral devices. and C • Three programming modes for Peripheral Ports: Mode 0 (Basic Input/Output). What is the Need for Direct-Memory Access (DMA)? Ans. the next instruction is obtained by adding a signed offset to current program counter: PC += (int)offset Branches are inherently relocatable. What is Interrupt & what is the purpose of interrupt? Ans. If the underlying program is moved in memory. . Features • Three 8-bit Peripheral Ports . diverts its execution to some other program called Interrupt Service Routine (ISR). That is.Programmable Peripheral Interface? Ans.2. The meaning of ‘interrupts’ is to break the sequence of operation. What is Branch Instruction? Ans. 5. network controllers. commonly called a Direct-Memory Access. Jump instructions.Ports A. 4. Mode 1 (Strobed Input/Output).After executing ISR . disk controllers. B.g. The Solution: Allow the Peripheral I/O device communicate directly with memory. etc. specify an absolute memory reference. by contrast. Computers often require rapid transfers of large amounts of data from one part of the system to another part. The Problem: to be transferred. and Mode 2 (Bidirectional) • Total of 24 programmable I/O lines • 8-bit bidirectional system data bus with standard microprocessor interface Controls. What is 8255 PPI .on ‘interrupt’ breaks the normal sequence of executionof instructions.Programmable Peripheral Interface The 8255A programmable peripheral interface (PPI) implements a general-purpose I/O interface to connect peripheral equipment to a microcomputer system bus. PPI . E. With DMA data transfer rates of 10-50 million bytes per second can be achieved. Branch instructions perform a test by evaluating a logical condition and depending on the outcome of the condition modify the program counter to take the branch or continue to the next instruction. That is.

On-chip MMU. Chip cost is low. More devises can place on chip. Every instruction is executed in a single clock after it is fetched and decoded. It is a data method which is used when the I/O device and the microprocessor match in speed. Less power consumption. Register Set of 8051-SFR? Ans. Register Set of 8051-SFR TH0-TL0 and TH1-TL1 . highly optimized set of instructions. Compilers produce more efficient codes in RISC µp & Loading and decoding of instructions in a RISC processor is simple and fast.wire.What is RISC? Ans. Very fast execution. The data transfer is completed at the end of the execution of this instruction. being simple. Processor can work at a high clock frequency and thus yields higher speed. 6. Floating point arithmetic units. To transfer a data to or from the device. RISC: Reduced Instruction Set Computer Small.Purpose of Interrupts Interrupts are particularly useful when interfacing I/O devices that provide or require data at relatively low data transfer rate. What is synchronous data transfer? Ans. can be hard. 7. the user program issues a suitable instruction addressing the device. 8. The Advantages of RISC: RISC instructions.

IP – Interrupt Priority. interrupt control flags for ext. int like INT1 and INT0 TMOD – modes of operation of timer/counter SCON – serial port mode control reg SBUF – serial data buffer for transmit and receive PCON – Power control reg – power down bit. idle bit . PSW.16 bit timer registers P0-P3 – port latches SP. IE – enable TCON – timer/counter control reg to turn on/off the timers.

MICRO CONTROLLERS AND APPLICATIONS 1. To effectively program the 8051 it is necessary to have a basic understanding of these memory types. The 8051 has three very general types of memory. . They are: On-Chip Memory. and External RAM. The memory types are illustrated in the following graphic. External Code Memory. What are 8051 microcontroller’s Internal and External memories? Ans.

@Ri ADDC A. or other) that physically exists on the microcontroller itself. TF0 . 2. @Ri ADD A. This is often in the form of standard static RAM or flash RAM. Direct ADD A. They are 1.#data ADDC A.On-Chip Memory refers to any memory (Code. This is often in the form of an external EPROM. 8051 microcontroller Arithmetic instructions? Ans. 8051 microcontroller interrupts? Ans. #data SUBB A. Arithmetic Operations: Mnemonic ADD A. On-chip memory can be of several types.Rn ADD A. Rn SUBB A. External RAM is RAM memory that resides off-chip. 2. but we'll get into that shortly. Direct ADDC A. External Code Memory is code (or program) memory that resides off-chip. @Ri SUBB A #data INC A INC Rn INC direct INC @Ri DEC A DEC Rn DEC direct DEC @Ri INC DPTR MUL AB DIV AB DA A Description Add register to accumulator Add direct byte to accumulator Add indirect RAM to accumulator Add immediate data to accumulator Add register to accumulator to carry flag Add direct byte to A with carry flag Add indirect RAM to A with carry flag Add immediate data to A with carry flag Subtract register from A with borrow Subtract direct byte from A with borrow Subtract indirect RAM from A with borrow Subtract immediate data from A with borrow Increment Accumulator Increment register Increment direct byte Increment indirect RAM Decrement accumulator Decrement register Decrement direct byte Decrement indirect RAM Increment data pointer Multiply A and B Divide A by B Decimal adjust accumulator Byte 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 1 1 2 1 1 1 1 1 Cycle 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 4 4 1 3. Rn ADDC A. RAM. Direct SUBB A. 8051 provides 5 vectored interrupts.

3. 4. TF1 5. provided the interrupt is negative edge triggered. Except for serial interrupt. set the corresponding interrupt flags. the corresponding flags have to be cleared by software by the programmer. the interrupt flags are cleared when the processor branches to the Interrupt Service Routine (ISR). RI/TI Out of these. For low level triggered external interrupt as well as for serial interrupt. when activated. The external interrupt flags are cleared on branching to Interrupt Service Routine (ISR). 4 . All these interrupt. and are external interrupts whereas Timer and Serial port interrupts are generated internally. The external interrupts could be negative edge triggered or low level triggered.