Notes on Project: Electronics 2

VOLTAGE-CONTROLLED AMPLIFIER

Refer to Page 24 of the Electronics 2 Laboratory Guide

You are required to build one project and six experiments during the semester. The project has to be prepared during your own study time. The theory and practical knowledge needed to enable you to build, adjust to requirements and explain the operation of the project within twenty minutes during assessment in the laboratory is your responsibility. The written report is due during the last theory class of Week 1 and the assessment of the built project in the laboratory will be during Week 3. This project has to be studied in detail before you attend the laboratory. Study the theory necessary to understand everything regarding this project, using sources in the library and prescribed textbook. Write down all data and information regarding component terminal connections, maximum power ratings, including voltages, currents and power values, safety procedures and a summary of what you are required to do and on what you will be assessed. Include this information in the written report you submit during the last theory class period of the first week of lecturing. The report should not be less than two pages and not more than five pages. Do not copy details of the laboratory manual in your report. No late submissions will be accepted. PREPARATION FOR THE PROJECT [READY TO BE ASSESSED DURING WEEK 3] Examine the given circuit diagram. Be sure how to connect the circuit of an operational amplifier to a split supply of +15VDC and -15VDC. Notice how the JFET gate is connected to the negative supply. Why is that? Revise the operation of a JFET and the principle of the OHMIC REGION and CONSTANT CURRENT REGION of a JFET. Revise the configurations in which an operational amplifier may be connected. Which components in the circuit diagram determine the gain of the circuit? Write down an equation for the gain of the project circuit in terms of the components in the circuit. Practice constructing the circuit on a breadboard, so that you will be able to repeat the construction from a blank breadboard and adjust the gain as required by the specifications within the first twenty minutes of the period during assessment in the laboratory, during Week 3. Compile all the information you gathered on the theory of operation and references to the sources of information you used. Now write the report you have to hand in during the first week of lecturing.

Apart from the above requirements, the following needs attention:
Make sure you understand that Q1 does not have a DC voltage across the drain and source. The only voltage across the drain and source of Q1 is the input voltage (which has to be AC, since DC is removed by C1) minus the AC voltage across R3. There will only be AC voltage across R3 if the resistance between the drain and source of Q1 is not infinite. When is the resistance between the drain and source of a JFET infinite? Explain this by revising the relationship between VGS and the conductivity of the channel between drain and source. Also, if the output of the Operational Amplifier (at Pin 6) is not in saturation (stuck to the supply voltages — either +Vcc or -Vcc) and the frequency is within the range A1 may handle, the voltage at Pin 2 should be the same as the voltage at Pin 3 (consisting of the AC component of Vin). If the resistance between the drain and source of Q1 is low, current which originates at the output of the operational amplifier (Pin 6) will flow through R3. This current

generates a voltage across R2, which results in a higher voltage at the output of the amplifier than the voltage at Pin 2. Since the voltage at Pin 2 is equal to the input voltage, this action results in VOLTAGE GAIN. Thus, by generating current though R3, the output amplitude is increased. Since the relationship between the current through the channel of the JFET and the voltage between the gate and source of the JFET (this is expressed by the transconductance of the JFET) determines the relationship of the control voltage (the slider voltage of VR1) and the voltage gain of the circuit, the circuit acts as a voltage-controlled amplifier. It is important to understand that the voltage across Q1 changes polarity since it consists of AC when an AC signal is applied to Vin. The average voltage across the drain and source of Q1 should therefore be zero, even when the amplifier has an output voltage. Also, the average voltage at Pin 2 should be zero, because the average voltage at Pin 3 is zero, and the two voltages should be the same. Likewise, the average voltage at Pin 6 should be zero. The AC voltage at Pin 6 should be determined by the size of the AC component of the input voltage and the resistance between the drain and source of Q1, the values of R2 and R3 and the formula for the gain you were supposed to specify following the instructions of the project. When the voltage across the drain and source of the JFET is such that the drain is at the same polarity as the gate, the channel resistance would be different than during the cycle of the input which results in an opposite polarity between the drain and the gate of Q1. This causes the output signal to be unsymmetrical. You would have noticed this when you practiced doing the project in the laboratory. When the input signal is small, the effect is less noticeable. An improvement in the circuit would be to use the output signal to modulate (change the amplitude in relation to) the gate-to-source voltage, in order to linearize the output. This is however not required for this project. Make sure you are able to draw the oscilloscope waveforms at any point in the circuit for any possible combinations of input voltage and control voltage. Also be prepared to predict the gain for the limits of control voltage as determined by the adjustment of VR1. Understand, for example, that if the resistance between the drain and source of Q1 is infinite, the voltage across Q1 is equal to the AC component of the input voltage (the same voltage as that at Pin 3), because there is no voltage drop across R3. Then there will also no be a voltage drop across R2, which means the voltage at the output of the operational amplifier is the same as that of Pin 2, which is the same as that of Pin 3, which results in the gain being equal to one. Learn from this project so that you can cultivate the ability to combine components to perform required functions, predict circuit behavior and diagnose and rectify fault conditions.

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