Intro To UNIX Software Development - Mak...

What is make?
Make is a utility to track dependencies in a system of files, and to automate compilations Examples of dependencies - C program Objs depend on source for that object Objs depend on headers Binary depends on objs Libs depend on objs Uses files called Makefiles as configuration Hierarchical dependencies determined by mod time - if any dependency is newer than target, remake target with command Many things described here are specific to GNU make (gmake in the locker on Athena).


Makefiles - basic
naming - GNUmakefile, makefile, Makefile in that order "Makefile" is recommended - fairly standard, appears at top of dir use GNUmakefile only for gmake-specific makefiles. explicit rules (basic)

Command lines MUST start with tabs \newline syntax for breaking up lines Phony targets i.e. clean, all No dependencies Executed every time target is goal (gmake specific) declare as phony to avoid name conflicts with special target keyword .PHONY:
.PHONY : clean clean : rm $(OBJS)

Default goal is first rule that does not start with a period Comments - `#' starts

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. \ doit To ignore errors from a command. or `=' Should avoid all but alphanumerics and underscore Setting VARNAME = VARVALUE (note: trailing spaces not truncated) make VARNAME=value inherits most environment variables except $SHELL and a few others Referencing: $(VARNAME) Standard variables for program Makefiles $(OBJS) $(SHELL) $(MAKE) $(CC) $(CFLAGS) $(INCLUDE) $(LDFLAGS) Automatic variables . `:'. Commands Each line is run in a different shell. `#'. More later Multiple targets and rules 2 of 6 28/08/10 22:19 .edu/teaching/c/makefile. in the command so that make interprets it as a single command: foo: cd foodir .bu..Mak..o Variables Naming Case sensitive Any characters except trailing whitespace. http://www. use . prefix command with "-" foo: -rm -f *~ *. if you want to cause a command to affect the next.make sets these in special cases for substitutions and other purposes.cs.Intro To UNIX Software Development .. doit or foo: cd foodir .

Implicit rules Default rules. all other rules using the target must not have commands.c $(CC) -c $(CFLAGS) $(CPPFLAGS) $< -o $@ Can be chained.c file does not exist. Pattern rules TARGET-PATTERN: DEP-PATTERN COMMANDS eg FILES = foo bar baz foo: bar doit bar baz: blah dothat $(FILES): gag # no commands allowed here will add dependency on gag to $(FILES) (ie.e.c -> . 3 of 6 28/08/10 22:19 . either internal to make or user-defined. i. Useful for adding dependencies. exception . http://www. Multiple targets equivalent to list of rules for each target foo bar baz: blah doit and foo: blah doit bar: blah doit baz: blah doit are equivalent Multiple rules for a single target are acceptable .Intro To UNIX Software Development .o: %.double-colon rules' commands are independent.. Make deletes the temp files when it's done. but make considers it for dependency purposes.y -> .make will check all files that depend on a given updated file. files will get rebuild) Multiple commands are NOT acceptable .there can be only one set of commands for a given target. which set dependencies based on classes of filename.o -> the .. .Mak.. if gag changes..

. A number of useful implicit rules are predefined e.o: %.o $(OBJS): %. .is the variable which matches the stem of the targets.: TARGET-PATTERN: DEP-PATTERNS .. Example: OBJS = foo.g.. COMMANDS . Including other Makefiles directive: include FILENAMES FILENAMES can include shell globs and make vars useful for including global rules and vars makedepend Parses .c files for other files they include. which is then substituted into the `%' in the dependency pattern to make the actual `$@' is the automatic variable which holds the name of the target... then writes them in the form of a dependency rule in a makefile.Intro To UNIX Software Development . 4 of 6 28/08/10 22:19 .Mak.cs.c $(CC) -c $(CFLAGS) $< -o $@ TARGET-PATTERN is used to construct names to place into DEP-PATTERNS Special Variables `%' . `$*' is an automatic variable which will expand to the stem (what matched the %) Different from implicit rules in that it only applies to the list of targets you specify. http://www.. `$<' is the automatic variable which holds the name of the dependency..c -> .o bar. Static pattern rules Used to take analagous dependencies and execute commands constructed from names TARGETS .o as above.bu....

h bar. bar.h.c $(SHELL) -ec '$(CC) -M \ $(CPPFLAGS) $< | \ sed '\''s/$*.h quux. export VARIABLE unexport VARIABLE Archives (libraries) A specific member of an archive can be target or dependency: ARCHIVE(MEMBERS) 5 of 6 28/08/10 22:19 ..cs.inherits path to make and command line arguments Exporting variables to sub-makes normally only happens for variables defined in the environment or the command line. http://www. $(MAKE) Always use $(MAKE) rather than passing `make' . and quux.Mak.c to the makefile old way to use: dep: makedepend $(CPPFLAGS) *. and write them to the end of the current makefile gmake way to use (as suggested by Mike Whitson): include *.c #includes foo. reruns itself with the updated makefiles. it will add a rule of the form: foo.h. For example.o/& $@/g'\'' \ > $@' (gmake considers all included makefiles as targets. if any needed to be recreated..bu.c: foo.Intro To UNIX Software Development .edu/teaching/c/makefile..c will remake all dependencies when make dep is called.c. and.. if foo.d: %.d %.) Recursion Useful if you want to have subsections of code in subdirs with their own makefiles Basic syntax: subsystem: cd subdir.

Intro To UNIX Software Development .o ar -r libfoo.a(foo. and more Look in info pages (M-x info in emacs) for more information Other options imake and xmkmf autoconf and configure Prepared by Erik Nygren (nygren@mit.cs.o): foo.bu. loops. functions..a and Mike Whitson (mwhitson@mit. eg libfoo.o Other functionality GNU gmake supports conditionals. http://www..o bar..o 6 of 6 28/08/10 22:19 bar.