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Digital Circuits I

Combinational Circuits

**Formulating Boolean Expressions
**

Intuitive approach

results in direct Boolean equations

**Using truth tables
**

results in minterm list or equations in SSOP format

University of the Philippines Electrical and Electronics Engineering Institute

Joy Reyes-Madamba@2010

2

1

He can’t go to the ticket office to buy his ticket and take his exam on the same day. However. he can only afford his ticket if he pays on September 30 to get a discount. Read the problem completely before defining and setting your variables. University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 4 2 . University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 3 Example: Intuitive Approach (1/3) Roger will go home early this semestral break if there is no exam on October 9 in EEE 8 and if he can get his ticket.11/28/2010 Reminders Always define your variables! Indicate logic levels and the associated event that triggers or asserts it. His teacher plans to hold their exam on October 2 if there are no conflicts with other subjects.

Ticket = 1 if Roger gets his ticket. else 0 University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 5 Example: Intuitive Approach (3/3) Solution: Home = (O9’)(Ticket) Ticket = O2’ Home = (O9’)(O2’) = (O9’)(Conflict’)’ = (O9’)(Conflict) University of the Philippines Electrical and Electronics Engineering Institute O2 = Conflict’ substitute substitute involution Joy Reyes-Madamba@2010 6 3 .11/28/2010 Example: Intuitive Approach (2/3) Objective: Formulate an expression that will determine if Roger goes home early. else 0. O2 = 1 if exam is on October 2. else 0. Conflict = 1 if exam is in conflict with other subjects. else 0. O9 = 1 if exam is on October 9. else 0. Variable definitions: Let Home = 1 if Roger goes home early.

and several heads of cabbage. The farmer has chores to perform in both barns. If the goat is left with the cabbage without the farmer. What is the logic behind the computer? University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 7 Example: Using Truth Tables (2/5) Define input variables Character Barn A Farmer (F) Dog (D) Goat (G) Cabbage © 1 1 1 1 Barn B 0 0 0 0 University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 8 4 . A and B. a goat. In addition. the farmer has 2 barns. the farmer asks us to build a small portable computer having 4 switches representing the 4 characters. the dog will bite the goat. if the dog and the goat are left together without the farmer. However. If a switch is connected to a battery (logic 1).11/28/2010 Example: Using Truth Tables (1/5) A farmer has a large dog. To avoid either disaster. the goat will eat the cabbage. The computer sounds an alarm if any combination results in a disaster. the character is in barn A.

12} 10 Joy Reyes-Madamba@2010 5 .6.7.11/28/2010 Example: Using Truth Tables (3/5) Define output variable Alarm = 1 if “on” or ringing.8. 0 otherwise Create truth table 1) List all possible input combinations 2) List outputs based on given input conditions Select minterms University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 9 Example: Using Truth Tables (4/5) FDGC Alarm 0000 List all possible inputs 0001 0010 0011 0100 0101 0110 University of the Philippines Electrical and Electronics Engineering Institute FDGC Alarm 1000 1001 1010 1011 1100 1101 1110 1111 1 1 0 0 1 0 0 0 0 0 0 1 0 0 1 1 List outputs based on given 0111 minterms: {3.9.

12) = F’D’GC + F’DGC’ + F’DGC + FD’G’C’ + FD’G’C + FDG’C’ University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 11 F D G C Alarm University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 12 6 .11/28/2010 Example: Using Truth Tables (5/5) Formulate Boolean expression in SSOP form from the list of minterms Alarm(F.9.C) = Σm(3.G.D.7.6.8.

2) Apply Involution 3) Apply De Morgan’s Theorem.. De Morgan’s Theorem (x • y • z • …)’ = x’ + y’ + z’ + .11/28/2010 All-NAND Implementation (1/3) To convert to NAND 1) Express the function in SOP form. = University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 13 All-NAND Implementation (2/3) NOT (x • x)’ = (x)’ = x’ AND NOT [(a • b)’]’ = a • b University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 14 7 ..

11/28/2010 All-NAND Implementation (3/3) SOP Involution De Morgan OR X Y X Z X’ Y’ Z X’ Y’ Z Z = X+Y Y University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 15 Example Implement F = (AB’ + A’C)’ using NAND gates only University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 16 8 .

.11/28/2010 All-NOR Implementation (1/3) To convert to NOR 1) Express the function in POS form... = University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 17 All-NOR Implementation (2/3) NOT (x + x)’ = (x)’ = x’ NOT OR [(a + b)’]’ = a + b University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 18 9 . 2) Apply Involution 3) Apply De Morgan’s Theorem De Morgan’s Theorem (x + y + z + .)’ = x’ • y’ • z’ • ..

11/28/2010 All-NOR Implementation (3/3) POS Involution De Morgan AND X Y X Z X’ Y’ Z X’ Y’ Z Z = XY Y University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 19 Example Implement F = (AB’ + A’C)’ using NOR gates only University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 20 10 .

F3 = A’B’C’+A’BC’+ABC’+AB’C’ 4. F2 = AB+A’C+BC 3. F5 = AB’C+B’C’D’+BCD+ACD’+A’B’C+A’BC’D 6. then re-implement using only NAND and NOR gates 1.11/28/2010 Exercises: Convert these functions to SSOP and SPOS. F6 = A’D+BD+B’C+AB’D University of the Philippines Electrical and Electronics Engineering Institute Joy Reyes-Madamba@2010 21 11 . F1 = (AB+C+D)(C’+D)(C’+D+E) 2. F4 = A’C+A’B+AB’C+BC 5.

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