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: 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
MANAGEMENT UNIT - 1 MANAGEMENT: Introduction - Meaning - nature and characteristics of Management, Scope and functional areas of Management - Management as a Science, Art or Profession Management & Administration - Roles of Management, Levels of Management, Development of Management Thought-Early Management Approaches-Modern Management Approaches. UNIT - 2 PLANNING: Nature, importance and purpose of planning process Objectives - Types of plans (Meaning only) - Decision making - Importance of planning - steps in planning & planning premises - Hierarchy of plans. UNIT - 3 ORGANISING AND STAFFING: Nature and purpose of organization Principles of organization - Types of organization - Departmentation Committees – Centralisation Vs Decentralisation of authority and responsibility - Span of control - MBO and MBE (Meaning only) Nature and importance of Staffing - Process of Selection & Recruitment (in brief). UNIT - 4 DIRECTING & CONTROLLING: Meaning and nature of directing Leadership styles, Motivation Theories, Communication - Meaning and importance – Coordination, meaning and importance and Techniques of Co ordination. Meaning and steps in controlling - Essentials of a sound control system - Methods of establishing control.
ENTREPRENEURSHIP UNIT - 5 ENTREPRENEUR: Meaning of Entrepreneur; Evolution of the Concept, Functions of an Entrepreneur, Types of Entrepreneur, Intrapreneur - an
emerging Class. Concept of Entrepreneurship - Evolution of Entrepreneurship, Development of Entrepreneurship; Stages in entrepreneurial process; Role of entrepreneurs in Economic Development; Entrepreneurship in India; Entrepreneurship – its Barriers. UNIT - 6 SMALL SCALE INDUSTRY: Definition; Characteristics; Need and rationale: Objectives; Scope; role of SSI in Economic Development. Advantages of SSI Steps to start an SSI - Government policy towards SSI; Different Policies of S.S.I.; Government Support for S.S.I. during 5 year plans, Impact of Liberalization, Privatization, Globalization on S.S.I., Effect of WTO/GATT Supporting Agencies of Government for S.S.I Meaning; Nature of Support; Objectives; Functions; Types of Help; Ancillary Industry and Tiny Industry (Definition only). UNIT - 7 INSTITUTIONAL SUPPORT: Different Schemes; TECKSOK; KIADB; KSSIDC; KSIMC; DIC Single Window Agency: SISI; NSIC; SIDBI; KSFC. UNIT - 8 PREPARATION OF PROJECT: Meaning of Project; Project Identification; Project Selection; Project Report; Need and Significance of Report; Contents; formulation; Guidelines by Planning Commission for Project report; Network Analysis; Errors of Project Report; Project Appraisal. Identification of Business Opportunities - Market Feasibility Study; Technical Feasibility Study; Financial Feasibility Study & Social Feasibility Study. TEXT BOOKS: 1. Principles of Management - P. C. Tripathi, P. N. Reddy; Tata McGraw Hill. 2. Dynamics of Entrepreneurial Development & Management Vasant Desai Himalaya Publishing House. 3. Entrepreneurship Development - Small Business Enterprises Poornima M Charantimath - Pearson Education – 2006. REFERENCE BOOKS: 1. Management Fundamentals - Concepts, Application, Skill Development Robert Lusier – Thomson. 2. Entrepreneurship Development - S S Khanka - S Chand & Co. 3. Management - Stephen Robbins - Pearson Education /PHI -17th
Edition, 2003. DIGITAL SIGNAL PROCESSING Subject Code : 10EC52 No. of Lecture Hrs/Week : 04 Total no. of Lecture Hrs. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
UNIT - 1 Discrete Fourier Transforms (DFT): Frequency domain sampling and reconstruction of discrete time signals. DFT as a linear transformation, its relationship with other transforms. UNIT - 2 Properties of DFT, multiplication of two DFTs- the circular convolution, additional DFT properties, use of DFT in linear filtering, overlap-save and overlap-add method. UNIT - 3 Fast-Fourier-Transform (FFT) algorithms: Direct computation of DFT, need for efficient computation of the DFT (FFT algorithms). UNIT - 4 Radix-2 FFT algorithm for the computation of DFT and IDFT–decimationin-time and decimation-in-frequency algorithms. Goertzel algorithm, and chirp-z transform UNIT - 5 IIR filter design: Characteristics of commonly used analog filters – Butterworth and Chebysheve filters, analog to analog frequency transformations. UNIT - 6 FIR filter design: Introduction to FIR filters, design of FIR filters using Rectangular, Hamming, Bartlet and Kaiser windows, FIR filter design using frequency sampling technique UNIT - 7 Design of IIR filters from analog filters (Butterworth and Chebyshev) impulse invariance method. Mapping of transfer functions: Approximation of derivative (backward difference and bilinear transformation) method, Matched z transforms, Verification for stability and linearity during mapping
UNIT - 8 Implementation of discrete-time systems: Structures for IIR and FIR systemsdirect form I and direct form II systems, cascade, lattice and parallel realization. TEXT BOOK: 1. Digital signal processing – Principles Algorithms & Applications, Proakis & Monalakis, Pearson education, 4th Edition, New Delhi, 2007. REFERENCE BOOKS: 1. Discrete Time Signal Processing, Oppenheim & Schaffer, PHI, 2003. 2. Digital Signal Processing, S. K. Mitra, Tata Mc-Graw Hill, 3rd Edition, 2010. 3. Digital Signal Processing, Lee Tan: Elsivier publications, 2007
ANALOG COMMUNICATION Subject Code : 10EC53 No. of Lecture Hrs/Week : 04 Total no. of Lecture Hrs. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
UNIT - 1 RANDOM PROCESS: Random variables: Several random variables. Statistical averages: Function of Random variables, moments, Mean, Correlation and Covariance function: Principles of autocorrelation function, cross – correlation functions. Central limit theorem, Properties of Gaussian process. UNIT - 2 AMPLITUDE MODULATION: Introduction, AM: Time-Domain description, Frequency – Domain description. Generation of AM wave: square law modulator, switching modulator. Detection of AM waves: square law detector, envelop detector. Double side band suppressed carrier modulation (DSBSC): Time-Domain description, Frequency-Domain
Phase discrimination method for generating an SSB modulated wave. Time-Domain description.5 ANGLE MODULATION (FM)-I: Basic definitions.4 VESTIGIAL SIDE-BAND MODULATION (VSB): Frequency – Domain description. Frequency division multiplexing.representation. Application: Radio broadcasting. wide band FM. Demodulation of SSB waves.. Canonical representation of band pass signals. generation of FM waves: indirect FM and direct FM. narrow band FM. ring modulator. Noise equivalent bandwidth. Nonlinear effects in FM systems. Receiver model. Noise in AM receivers. Nonlinear model of the phase – locked loop. Noise Figure. Narrow bandwidth. Linear model of the phase – locked loop.8 NOISE IN CONTINUOUS WAVE MODULATION SYSTEMS: Introduction. Envelop detection of VSB wave plus carrier. thermal noise.6 ANGLE MODULATION (FM)-II: Demodulation of FM waves. Noise in FM receivers. FM stereo multiplexing. white noise. Comparison of amplitude modulation techniques. Coherent detection of DSBSC modulated waves. FM threshold effect. Equivalent noise temperature. Generation of VSB modulated wave. Pre-emphasis and De-emphasis in FM.3 SINGLE SIDE-BAND MODULATION (SSB): Quadrature carrier multiplexing. properties of Hilbert transform. TEXT BOOKS: 9 . Noise in SSB receivers. Single side-band modulation. Noise in DSB-SC receivers. transmission bandwidth of FM waves. UNIT . FM. Threshold effect. UNIT . AM radio. Frequency-Domain description of SSB wave. Generation of DSBSC waves: balanced modulator. UNIT . Hilbert transform. UNIT . cascade connection of two-port networks. Phase-locked loop. Phase discrimination method for generating an SSB modulated wave. UNIT . Preenvelope. UNIT . Time-Domain description. Frequency translation. shot noise. Time .Domain description. Costas loop.7 NOISE: Introduction.
standing waves and SWR. 3rd ed 2005 Oxford University press. 2003. line impedance and line admittance. Stern Samy and A Mahmond. 2. Avalanche transit time devices: READ diode. circulators and isolators. Ed 2007. IMPATT diode. transmission lines equations and solutions. Simon Haykins. Modes of operation. P. Harold P. John Wiley. Transfer electron devices: Introduction. 2004. S matrix representation of multi port networks. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT .4 Microwave network theory and passive devices. 10 . Modern digital and analog Communication systems B. John Willey. BARITT diode. Communication Systems. Microwave coaxial connectors. reflection and transmission coefficients. GUNN effect diodes – GaAs diode. Parametric amplifiers Other diodes: PIN diodes. UNIT . directional couplers. Symmetrical Z and Y parameters. impedance matching using single stubs. Pearson Edn. Lathi. circular waveguides. MICROWAVES AND RADAR Subject Code : 10EC54 No. RWH theory. Communication Systems.2 MICROWAVE WAVEGUIDES AND COMPONENTS: Introduction. An Introduction to Analog and Digital Communication. 1996. 2. of Lecture Hrs. for reciprocal Networks.1 MICROWAVE TRANSMISSION LINES: Introduction. of Lecture Hrs/Week : 04 Total no. Smith chart. REFERENCE BOOKS: 1.3 MICROWAVE DIODES. 3rd Edition. Schottky barrier diodes. rectangular waveguides.1. UNIT . 3. microwave cavities. Communication Systems: Singh and Sapre: Analog and digital TMH 2nd . UNIT . Simon Haykins.E. microwave hybrid circuits.
2e. Attenuators. Moving target detector. Shielded strip Lines. Radar frequencies. application of Radar.Liao / Pearson Education. UNIT .5 Microwave passive devices. TMH. 2001. REFERENCE BOOK: 1. of Lecture Hrs/Week : 04 Total no. Microwave Engineering – Annapurna Das. Microwave Devices and circuits. Waveguide Tees. 3. Introduction to Radar systems-Merrill I Skolnik. The simple form of the Radar equation. 2004. Coplanar strip lines. UNIT . UNIT . Magic tees. 2. delay line Cancellers. 2nd . Microstrip lines. Radar block diagram. 3rd Ed.7 AN INTRODUCTION TO RADAR: Basic Radar. Sisir K Das TMH Publication. Phase shifters.6 STRIP LINES: Introduction. 2010.1 11 . of Lecture Hrs. pulse Doppler Radar. DIGITAL SWITCHING SYSTEMS Subject Code : 10EC55 No. digital MTI processing.8 MTI AND PULSE DOPPLER RADAR: Introduction to Doppler and MTI Radar. TEXT BOOKS: 1. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . the origins of Radar.UNIT . John Wiley. Coaxial connectors and adapters. Microwave Engineering – David M Pozar. Parallèle strip lines.
UNIT .5 TIME DIVISION SWITCHING: Introduction. Software architecture for level 1 control. Single stage networks. Traffic measurement. Congestion. Four wire circuits. UNIT . terminology. Circuit switching. FDM. Digital switching system software classification. UNIT . UNIT . Feature flow diagram. Synchronisation. Basics of crossbar systems. Mathematical model. Connect sequence. PDH and SDH. Network structure. Link Systems. Building blocks of a digital switching system. Functions of switching systems. Call models. Queuing systems. Outside plant versus inside plant. Basic central office linkages. space and time switching. Database Management. Network services. Standards. Evolution of digital switching systems. GOS of Linked systems. Digital switching system fundamentals. Feature interaction. Switching system hierarchy. Transmission performance. Message switching. Power levels. Interface of a typical digital switching system 12 . Concept of generic program. TDM. Gradings.Developments of telecommunications. Basic software architecture.2 EVOLUTION OF SWITCHING SYSTEMS: Introduction. Operating systems. UNIT . Software architecture for level 2 control. Scope. DIGITAL SWITCHING SYSTEMS: Fundamentals : Purpose of analysis. Distribution systems. Regulation. Unit of traffic. Digital switching systems. Introduction to telecommunications transmission.7 MAINTENANCE OF DIGITAL SWITCHING SYSTEM: Introduction. Stored program control switching systems. Digital transmission. Software architecture for level 3 control.3 TELECOMMUNICATIONS TRAFFIC: Introduction. Basic call processing. Software linkages during call. Scope. lost call systems. Time switching networks.6 SWITCHING SYSTEM SOFTWARE: Introduction. Electronic switching.4 SWITCHING SYSTEMS: Introduction. Software maintenance. Call features. UNIT .
Embedded patcher concept. Defect analysis. Upgrade process success rate.John C Bellamy: Wiley India 3rd Ed. Diagnostic resolution rate. Enhancement and depletion mode MOS transistors. The Complementary CMOS Inverter – DC Characteristics. Effect of firmware deployment on digital switching system.J E Flood: Pearson Education. 2000. Impact of software patches on digital switching system maintainability. Ali. Software processes improvement. Static 13 . MOS Device Design Equations. Analysis report. TEXT BOOKS: 1. of Lecture Hrs. Production of E-beam masks. CMOS fabrication. Digital Telephony . of Lecture Hrs/Week : 04 Total no. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . 2. Number of patches applied per year. Switching system maintainability metrics. TMH Ed 2002. Digital Switching Systems. Recovery strategy.central office. Firmware-software coupling. FUNDAMENTALS OF CMOS VLSI Subject Code : 10EC56 No. UNIT .8 A GENERIC DIGITAL SWITCHING SYSTEM MODEL: Introduction. Telecommunication and Switching. Metrics. Generic program upgrade. Thermal aspects of processing. Reliability analysis. A strategy improving software quality. Common characteristics of digital switching systems. nMOS fabrication. Software architecture. Program for software process improvement. BiCMOS technology. REFERENCE BOOK: 1. A methodology for proper maintenance of digital switching system. Defect analysis. Traffic and Networks . Reported critical and major faults corrected. 2002. Software processes.1 BASIC MOS TECHNOLOGY: Integrated circuit’s era. Growth of digital switching system central office. Syed R. Simple call through a digital system. MOS TRANSISTOR THEORY: Introduction. System outage and its impact on digital switching system reliability. Hardware architecture. Scope.
Process illustration. Limits due to current density and noise. Memory elements.3 CMOS LOGIC STRUCTURES: CMOS Complementary Logic. The delay unit. System delays. UNIT .8 TESTABILITY: Performance parameters. Symbolic diagrams. Test and testability. The Transmission Gate. Tutorial exercises. Memory cell arrays. Examples. Driving capacitive loads. Tristate Inverter.4 BASIC CIRCUIT CONCEPTS: Sheet resistance. Clocking Strategies UNIT . SCALING OF MOS CIRCUITS: Scaling models and factors.7 MEMORY. Clocked CMOS Logic. Capacitance calculations. Bi CMOS Logic. CMOS Domino Logic Cascaded Voltage Switch Logic (CVSL). Propagation delays. Dynamic CMOS Logic. REGISTERS AND CLOCK: Timing considerations. Pseudo-nMOS Logic. Inverter delays. Limits on scaling. Layout issues. Adders. Wiring capacitances. Multipliers. UNIT . I/O pads. Other system considerations.Load MOS Inverters. Area capacitances. UNIT . The Differential Inverter. Real estate. UNIT . Ground rules for design. UNIT . Design examples – combinational logic. Gate logic. Switch logic. 14 . Layout diagrams. UNIT . Clocked circuits.6 CMOS SUBSYSTEM DESIGN PROCESSES: General considerations. ALU subsystem. Basic Physical Design of Simple logic gates.5 CMOS SUBSYSTEM DESIGN: Architectural issues. Design rules and layout – lambda-based design and other rules. Stick diagrams.2 CIRCUIT DESIGN PROCESSES: MOS layers. Pass Transistor Logic.
Pucknell & Kamran Eshraghian. CMOS VLSI Design – A Circuits and Systems Perspective.H.cmosvlsi. Cross correlation of given sequences and verification of its properties. K. Verification of Sampling theorem. (Refer to http://www. Weste. Ltd.. New Delhi. and ??? 3rd edition. 200?.G Jackson and R. REFERENCE BOOKS: 1. M. CMOS Circuit Design.TEXT BOOKS: 1. N. 2007. DIGITAL SIGNAL PROCESSING LABORATORY Subject Code : 10ECL57 No. CMOS Digital Integrated Circuits: Analysis and Design.. (Shift to the latest edition. H. New Delhi. Addison-Wesley. Solving a given difference equation.Douglas A. Computation of N point DFT of a given sequence and to plot magnitude and phase spectrum. Weste and David Harris.A Saleh. 8. 2. Principles of CMOS VLSI Design: A Systems Perspective. 3.A Hodges.D. of Practical Hrs/Week: 03 Total no. 3rd Edition. 3rd Edition. E. 2005. Achuthan and K. 2005. Linear convolution of two sequences using DFT and IDFT. Tata McGraw-Hill Publishing Company Ltd. PHI 3rd Edition (original Edition – 1994). Jacob Baker. 4. 6. Pearson Education (Asia) Pvt. Fundamentals of Semiconductor Devices. 3rd Edition. of Practical Hrs. K. Tata McGraw-Hill Publishing Company Limited. Circular convolution of two given sequences 5. 3. 9. R. New Delhi. Neil H. 7. John Wiley. Eshragian. Impulse response of a given system Linear convolution of two given sequences. Layout and Simulation. 4. Autocorrelation of a given sequence and verification of its properties. 2007.) 3. 2007. : 42 IA Marks Exam Hours Exam Marks : 25 : 03 : 50 A LIST OF EXPERIMENTS USING MATLAB / SCILAB / OCTAVE / WAB 1. Bhat. Tata McGraw-Hill Publishing Company Limited. Analysis and Design of Digital Integrated Circuits . N. 2. Basic VLSI Design . 10. SungMo Kang & Yusuf Leblebici.com) 2. Circular convolution of two given sequences using DFT and IDFT 15 .
Point DFT of a given sequence 4.The input can be a signal from function generator / speech signal. 12.2009 CAN BE USED FOR VERIFICATION AND TESTING. 4. TMH. Audio applications such as to plot time and frequency (Spectrum) display of Microphone output plus a cosine using DSP. Realization of an FIR filter (any type) to meet given specifications . of Practical Hrs. Computation of N. Second order active LPF and HPF 2. Astable multivibrator for given frequency and duty cycle 16 . Circular convolution of two given sequences. Design and test R-2R DAC using op-amp Design and test the following circuits using IC 555 a. Linear convolution of two given sequences. B. 2000 3. Second order active BPF and BE 3. Digital signal processing using MATLAB . 5. 6. 3. Schmitt Trigger Design and test a Schmitt trigger circuit for the given values of UTP and LTP Frequency synthesis using PLL.J. B. 2001 2. LIST OF EXPERIMENTS USING DSP PROCESSOR 1. Digital Signal Processors. Interference suppression using 400 Hz tone. 7. 5. 1. Proakis & Ingale. Venkataramani and Bhaskar. MGH. : 42 IA Marks Exam Hours Exam Marks : 25 : 03 : 50 EXPERIMENTS USING DESCERTE COMPONENTS and LABVIEW . Read a wav file and match with their respective spectrograms 6. Impulse response of first order and second order system REFERENCE BOOKS: 1.11. of Practical Hrs/Week : 03 Total no. Digital signal processing using MATLAB .2002 ANALOG COMMUNICATION LAB + LIC LAB Subject Code : 10ECL58 No. Noise: Add noise above 3kHz and then remove. Design and implementation of FIR filter to meet given specifications. Design and implementation of IIR filter to meet given specifications. 2. TMH.Sanjeet Mitra. G.
Class C Single tuned amplifier 8.b. Frequency modulation using 8038/2206 12. Amplitude modulation using transistor/FET (Generation and detection) 9. PWM and PPM 11. 17 . Monostable multivibrator for given pulse width W 7. Precision rectifiers – both Full Wave and Half Wave. Pulse amplitude modulation and detection 10.
Coherent binary modulation techniques. Model of DCS. UNIT . Nyquist’s criterion for distortion less base-band binary transmission. of Lecture Hrs/Week : 04 Total no. Base-Band Shaping for Data Transmission. Waveform Coding Techniques. UNIT .2 PAM. eye pattern. robust quantization. power spectra of discrete PAM signals. adaptive equalization for data transmission. UNIT . UNIT . of Lecture Hrs. DM.8 18 . detection of signals with unknown phase in noise. Quantization noise and SNR.VI SEMESTER DIGITAL COMMUNICATION Subject Code : 10EC61 No. response of bank of correlators to noisy input. correlative coding. Discrete PAM signals.1 Basic signal processing operations in digital communication.4 ISI. base-band M-ary PAM systems. Sampling Principles: Sampling Theorem. Practical aspects of sampling and signal recovery.6 Detection and estimation. Gram-Schmidt Orthogonalization procedure. Non-coherent binary modulation techniques. TDM. matched filter receiver. PCM.5 DIGITAL MODULATION TECHNIQUES: Digital Modulation formats. applications.3 DPCM. correlation receiver. UNIT . Coherent quadrature modulation techniques. UNIT .7 Detection of known signals in noise. UNIT . Quadrature sampling of Band pass signal. geometric interpretation of signals. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT .
TEXT BOOK: 1.Spread Spectrum Modulation: Pseudo noise sequences. applications. 1996. branch type. Programming using keyboard and video display UNIT . 2. Digital communications . of Lecture Hrs. frequency hop spread spectrum. loop.2 INSTRUCTION SET OF 8086: Assembler instruction format. 8086 CPU Architecture. John Wiley. Number format conversions. Interrupt examples 19 . REFERENCE BOOKS: 1. notion of spread spectrum. Software interrupt applications. flag manipulation. Instruction execution timing. John Wiley. Machine language instructions. data transfer and arithmetic. Illustration of these instructions with example programs. K. The microprocessor-based personal computer system. logical and shift and rotate instructions. Table translation. 2003. Macros. Digital and analog communication systems & An introduction to Analog and Digital Communication. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . coherent binary PSK. of Lecture Hrs/Week : 04 Total no. Sam Shanmugam. REP Prefix. Procedures. Hardware interrupt applications. 2003 2.3 BYTE AND STRING MANIPULATION: String instructions.Simon Haykin.Bernard Sklar: Pearson education 2007 MICROPROCESSOR Subject Code : 10EC62 No. NOP & HALT.4 8086 INTERRUPTS: 8086 Interrupts and interrupt responses. The 8086 UNIT .1 8086 PROCESSORS: Historical background. Simon Haykin. Directives and operators UNIT . Digital communications. John Wiley. direct sequence spread spectrum.
2006. 2003 REFERENCE BOOKS: 1.A. processor architecture. 8088 and 8086 Microprocessors .5 8086 INTERFACING: Interfacing microprocessor to keyboard (keyboard types. Programming and Interfacing-Barry B. The Intel Microprocessor. the universal serial bus (USB) UNIT . Special 80386 registers. Microprocessor and Interfacing. keyboard interfacing with hardware).K. 2003 MICROELECTRONICS Subject Code : 10EC63 No. Ray and K.Programming & Hardware. Architecture. software keyboard interfacing. 2006. Interfacing to alphanumeric displays (interfacing LED displays to microcomputer).8 80386. Pearson Education / PHI. The 8087 numeric data processor: data types.Programming. Interfacing. A. of Lecture Hrs/Week : 04 Total no. 4e. TMH. Gibson. the parallel printer interface (LPT). Hardware & Applications .Triebel and Avtar Singh. Pearson Education. 2nd . maximum mode. instruction set and examples UNIT . Liu and G. Bhurchandi.UNIT .C. Introduction to the Pentium microprocessor. keyboard circuit connections and interfacing. Microcomputer systems-The 8086 / 8088 Family – Y. 80486 AND PENTIUM PROCESSORS: Introduction to the 80386 microprocessor.6 8086 BASED MULTIPROCESSING SYSTEMS: Coprocessor configurations. Brey. Software. Douglas hall. : 52 20 CIRCUITS IA Marks Exam Hours Exam Marks : 25 : 03 : 100 .7 SYSTEM BUS STRUCTURE: Basic 8086 configurations: minimum mode.M. TEXT BOOKS: 1. Interfacing a microcomputer to a stepper motor UNIT . Introduction to the 80486 microprocessor. 2nd . 3. 6e. 2. of Lecture Hrs. Bus Interface: peripheral component interconnect (PCI) bus. 2E PHI -2003 2. Advanced Microprocessors and Peripherals . TMH.
Stability study using Bode plots. UNIT -2 Single Stage IC Amplifier: IC Design philiosophy. SPICE examples. CS and CE amplifiers with source ( emitter) degeneration source and emitter followers. high frequency response of CG and CB amplifiers. UNIT .UNIT – 1 MOSFETS: Device Structure and Physical Operation. frequency response and slew rate of 741. UNIT – 4 Differences and Multistage Amplifiers: The MOS differential pair. Frequency compensation. Multistage amplifier. high frequency response of CS and CF amplifiers. MOSFET as an amplifier and as a switch. CMOS digital logic inverter. Cascade amplifiers. Differential amplifier with active loads. MOSFET Circuits at DC. 741 op-amp circuit. Four basic feedback topologies. CG and CB amplifiers with active loads. General Feedback structure. Series-Shunt feedback.6 Operational Amplifiers: The two stage CMOS Op-amp. folded cascade CMOS op-amp. A-D and D-A converters. DC analysis of the 741. current mirrors with improved performance. small signal operation modes. Small Signal Operation and Models. some useful transfer parings. Frequency response of CS amplifiers. the BJT differences pair. SPICE examples. Properties of negative feedback. 21 . V-I Characteristics. high frequency response. Effect of feedback an amplifier poles. Current sources. small signal operation of MOS differential pair. frequency response and differential amplifiers. other nonideal characteristics and differential pair. biasing in MOS amplifier circuits. detection type MOSFET. Determining the loop gain. Biasing in MOS amplifier Circuits. Data Converters. UNIT – 3 Single Stage IC amplifiers (continued): CS and CF amplifiers with loads. MOSFET internal capacitances and high frequency modes. CoUmparison of MOSFET and BJT. UNIT – 5 Feedback. Stability problem. Current mirrors and Current steering circuits. SPICE examples. gain. small signal analysis of 741. single stage MOS amplifiers.
long wire antenna. “Fundamentals of Microelectronics” . power patterns. patterns. phase patterns. SPICE examples. UNIT . point sources.3 ELECTRIC DIPOLES AND THIN LINEAR ANTENNAS: Introduction. Array of two isotropic point sources. 2008 ANTENNAS AND PROPAGATION Subject Code : 10EC64 No. short electric dipole. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . broad side array with non uni polar amplitude distribution. Reference Book: 1.UNIT – 7 & 8 Digital CMOS circuits. Text Book: 1. low side lobe arrays. efficiency. broad side versus end fire array. antenna apertures. radiation. bandwidth. micro strip arrays. Oxford University Press. Pass-transistor logic. of Lecture Hrs/Week : 04 Total no. John Wiley. Smith. Design and performance analysis of CMOS inverter. diversity and gain. Behzad Razavi. “Microelectronic Circuits”. examples of pattern synthesis by pattern multiplication.4 & 5 22 . radiation intensity. antenna temperature and antenna filed zones. UNIT . beam area. Overview. Adel Sedra and K. non-isotropic point sources. direction of maxima fire arrays of n isotropic point sources of equal amplitude and spacing. thin linear antenna. 2004. radiation resistance of short dipole. of Lecture Hrs. non-isotropic but similar point sources. effective height. Dynamic Logic Circuits. basic Antenna parameters.C. Logic Gate Circuits. fields of a short dipole. UNIT . filed patterns. principles of pattern multiplication.1 ANTENNA BASICS: Introduction. beam efficiency. folded dipole antennas. radiation intensity. radiation resistances of lambda/2 Antenna.2 POINT SOURCES AND ARRAYS: Introduction. power theorem. 5th Edition.
comparison of far fields of small loop and short dipole. patch antennas. John Wiley. diffraction. free space propagation. impedance of complementary and slot antennas. 2nd ED.C A Balanis.McGrawHill International edition. TEXT BOOKS: 1. PATCH AND HORN ANTENNA: Introduction. UNIT . 2010. Antennas and Wave Propagation . of Lecture Hrs. embedded antennas. plasma antenna. UNIT . electrical properties of the ionosphere. antenna for special applications – sleeve antenna. directivity.Sineon R Saunders. 3. slot antenna. 4th. Antennas and Wave Propagation. Ground wave propagation. 2003.Harish and Sachidananda: Oxford Press 2007 REFERENCE BOOKS: 1. Ionosphere propagation. ground reflection. Yagi-Uda array. antennas for satellite antennas for ground penetrating radars. John D. radiation resistance. : 52 23 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 . TROPOSPHERE WAVE PROPAGATION: Troposcopic scatter. far field patterns of circular loop.6 ANTENNA TYPES: Helical Antenna. omni directional antennas.7 & 8 RADIO WAVE PROPAGATION: Introduction. John Wiley. 2. surface wave. effects of earth’s magnetic field. Krauss. of Lecture Hrs/Week : 04 Total no. corner reflectors.LOOP. parabolic reflectors. log periodic antenna. Antennas and wave propagation . 1997 2. Balinet’s principle and complementary antennas. Antennas and Propagation for Wireless Communication Systems . ultra wide band antennas. small loop. loop antenna general case. horn antennas. rectangular horn antennas. Antenna Theory Analysis and Design . lens antenna. SLOT.G S N Raju: Pearson Education 2005 OPERATING SYSTEMS Subject Code : 10EC65 No. turnstile antenna.
Page replacement. Processes in UNIX. Structure of the supervisor. Configuring and installing of the supervisor. kernel memory allocation. Long-term scheduling. Interacting processes. Programmer view of processes. UNIT . Real time scheduling. UNIT . Files and directories. UNIX virtual memory. Memory allocation for program controlled data.2 STRUCTURE OF THE OPERATING SYSTEMS: Operation of an O.S and the computer system.S. UNIX file system. Multi programming systems.S. Resource allocation and related functions. Batch processing system. UNIT . O. distributed operating systems. Classes of operating systems. UNIT .4 MEMORY MANAGEMENT: Memory allocation to programs. 24 . Time sharing systems.5 VIRTUAL MEMORY: Virtual memory basics. Allocation of disk space. Kernel based operating systems. Memory allocation to programs.3 PROCESS MANAGEMENT: Process concept. Virtual machine operating systems. Virtual memory using paging. Page sharing. Memory allocation preliminaries. Implementing file access. Contiguous and noncontiguous allocation to programs. OS view of processes. UNIT .7 SCHEDULING: Fundamentals of scheduling. Overview of I/O organization. Medium and short term scheduling. Page replacement policies. User interface related functions. and Microkernel based operating systems. Operation of an O. Process scheduling in UNIX. Fundamental file organizations.S. Goals of an O.1 INTRODUCTION AND OVERVIEW OF OPERATING SYSTEMS: Operating system. Demand paging.UNIT . UNIT . Threads. Interface between file system and IOCS. Operating system with monolithic structure. Threads in Solaris. Real time operating systems.6 FILE SYSTEMS: File system and IOCS. layered design.
4. Dhamdhare. “Operating Systems .A Concept based Approach”. Willaim Stalling. TEXT BOOK: 1. 2nd Ed. microstrip patch antenna and Yagi antenna (printed). bending loss) and numerical aperture Analog and Digital (with TDM) communication link using optical fiber. Mailboxes. power. Silberschatz and Galvin. 1. Operating System – Internals and Design Systems. VSWR and attenuation in a microwave test bench Measurement of directivity and gain of antennas: Standard dipole (or printed dipole). REFERENCE BOOK: 1. guide wavelength. M. 9. 2. 5th Edition. Inter process communication in UNIX. .: 42 IA Marks Exam Hours Exam Marks : 25 : 03 : 50 LIST OF EXPERIMENTS USING DESCERTE COMPONENTS and LABVIEW – 2009 can be used for verification and testing. ADVANCED COMMUNICATION LAB Subject Code : 10ECL67 No. 3. 2006. 2006. 2001. TDM of two band limited signals. of Practical Hrs. Measurement of frequency. John Wiley. ASK and FSK generation and detection PSK generation and detection DPSK generation and detection QPSK generation and detection PCM generation and detection using a CODEC Chip Measurement of losses in a given optical fiber ( propagation loss. 2. Operating Systems Concepts. TMH. 4th Ed. D. 7. 25 5. 8. 6.UNIT . of Practical Hrs/Week: 03 Total no. Pearson Education. 10.8 MESSAGE PASSING: Implementing message passing.
Determination of coupling and isolation characteristics of a stripline (or microstrip) directional coupler 12. Calls and Returns 26 IA Marks Exam Hours Exam Marks : 25 : 03 : 50 . of Practical Hrs/Week: 03 Total no. factorial 3) Bit manipulation instructions like checking: i] Whether given data is positive or negative ii] Whether given data is odd or even iii] Logical 1’s and 0’s in a given data iv] 2 out 5 code v] Bit wise and nibble wise palindrome 4) Branch/Loop instructions like: i] Arrays: addition/subtraction of N nos. Finding largest and smallest nos. GCD. MICROPROCESSOR LAB Subject Code : 10ECL68 No. ii] Multiplication and Division of signed and unsigned Hexadecimal nos. Ascending and descending order ii] Near and Far Conditional and Unconditional jumps. (b) Measurement of power division and isolation characteristics of a microstrip 3 dB power divider. LCM. iii] ASCII adjustment instructions iv] Code conversions v] Arithmetic programs to find square cube. of Practical Hrs.11. ii] Block move (with and without overlap) iii] Block interchange 2) Arithmetic & logical operations like: i] Addition and Subtraction of multi precision nos.: 42 I) Programs involving 1) Data transfer instructions like: i] Byte and word data transfer in different addressing modes. (a) Measurement of resonance characteristics of a microstrip ring resonator and determination of dielectric constant of the substrate.
2-Step Flash ADC. Sample and Hold Characteristics. : 52 (Text Book 1) IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT 1 Data converter fundamentals: Analog versus Digital Discrete Time Signals. ADC Specifications. of Lecture Hrs/Week : 04 Total no. Successive Approximation ADC. DAC Specifications. R-2R Ladder Networks. Charge Scaling DACs. Cyclic DAC. Mixed-Signal Layout Issues.5) Programs on String manipulation like string transfer. Pipeline DAC. string reversing. UNIT 2 Data Converters Architectures: DAC Architectures. Buffered Keyboard input. searching for a string. Display of character/ String on console II) Experiments on interfacing 8086 with the following interfacing modules through DIO (Digital Input/Output-PCI bus compatible) card a) Matrix keyboard interfacing b) Seven segment display interface c) Logical controller interface d) Stepper motor interface III) Other Interfacing Programs a) Interfacing a printer to an X86 microcomputer b) PC to PC Communication ELECTIVE – GROUP A ANALOG AND MIXED MODE VLSI DESIGN Subject Code : 10EC661 No. Pipeline ADC. Digital Input Code. Current Steering. Converting Analog Signals to Data Signals. Flash. Resistors String. 27 . 6) Programs involving Software interrupts Programs to use DOS interrupt INT 21h Function calls for Reading a Character from keyboard. of Lecture Hrs. Integrating ADC. etc. ADC Architectures.
Delay and adder Elements. CMOS Circuit. (Text Book 2) UNIT 4: Data Converter SNR: Improving SNR Using Averaging (Excluding Jitter & Averaging onwards).Mixed Signal Circuit Design . Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency). Stimulation . REFERENCE BOOKS: 1. McGraw Hill.2002. Oxford University Press. IEEE Press and Wiley Interscience. P e Allen and D R Holberg. 2005 2.2001. 2002.UNIT 3 Non-Linear Analog Circuits: Basic CMOS Comparator Design (Excluding Characterization). Band pass and High pass Sync filters. Second Edition. Layout and Stimulation). UNIT 5 Su-Microns CMOS circuit design: Process Flow. David E Boyce. Design of Analog CMOS Integrated Circuits. First Edition. UNIT 6 OPAmp Design (Excluding Circuits Noise onwards) TEXT BOOK: 1. (Vol II of CMOS: Circuit Design. MOSFET Switch (upto Bidirectional Switches). CMOS Analog Circuit Design. Level Shifting (Excluding Input Level Shifting For Multiplier). Design. Layout.R. Jacob Baker. PHI Education. CMOS. B Razavi. Harry W Li. Analog Multipliers. Capacitors and Resistors. Interpolating Filters for DAC. Jacob Baker. Multiplying Quad (Excluding Stimulation). Decimating Filters for ADCs (Excluding Decimating without Averaging onwards).R. 28 .
out door unit. rain attenuation.SATELLITE COMMUNICATION Subject Code : 10EC662 No. look angles. transmission losses. orbital element. atmospheric loss. inclined orbits. frequency allocation. polar mix antenna. UNIT . uplink.1 OVER VIEW OF SATELLITE SYSTEMS: Introduction. pre-assigned TDMA. effects of rain. limits of visibility. system noise. combined CNR. on board signal processing satellite switched TDMA. comparison of uplink power requirements for TDMA & FDMA. other impairments. universal time. EIRP. sidereal time. demand assigned TDMA. TDMA. INTERFERENCE AND SATELLITE ACCESS: Introduction. apogee and perigee heights.4 SPACE SEGMENT: Introduction. link power budget. single access. UNIT . 29 . INTEL Sat. SPACE LINK: Introduction. Tx – Rx earth station. Geostationary orbit: Introduction.5 & 6 EARTH SEGEMENT: Introduction. antenna subsystem. station keeping. ionospheric effects. orbital plane. of Lecture Hrs/Week : 04 Total no. MATV. orbit perturbations. indoor unit. satellite access. leandiag orbits. antenna. preassigned FDMA. power supply units. altitude control. earth eclipse of satellite. SCPC (spade system). TT&C. interference between satellite circuits. receive only home TV system.2 ORBITS: Introduction. of Lecture Hrs. down link. local mean time and sun synchronous orbits. CATV. calendars. UNIT . CNR.3 PROPAGATION IMPAIRMENTS AND SPACE LINK: Introduction. thermal control. UNIT . : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . down link analysis. Kepler laws. sun transit outage. definitions. transponders.
Laplace. Uniform Exponential. 2nd Ed. Engg Example.1 INTRODUCTION TO PROBABILITY THEORY: Experiments. John Wiley & Sons. GPS. 2. orbital spacing. SATELLITE MOBILE AND SPECIALIZED SERVICES: Introduction. satellite mobile services.3 OPERATIONS ON A SINGLE R V: Expected value. Discrete Random Variables. of Lecture Hrs. L. 2003. REFERENCES BOOKS: 1. Conditional expected values. power ratio. transponder capacity. R. Events. Timothy Pratt. Dennis Roddy. RadarSat. 2nd Edition. Nelson.7 & 8 DBS. McGraw-Hill International edition. Erlang. Distributions. Raleigh. Charles Bostian and Jeremy Allnutt. Axioms. EV of Random variables. orb communication and iridium. Joint and conditional probabilities. frequency and polarization. of Lecture Hrs/Week : 04 Total no. Chi-Square. sample space. 2007.2 Random Variables. L. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Gamma. W. Density Functions: CDF. Gaussian random variable. 2006. H. RANDOM PROCESSES Subject Code : 10EC663 No.UNIT . Central Moments. Assigning probabilities. Suyderhoud. Independence. Satellite Communications. PDF.. TEXT BOOK: 1. Satellite Communications. bit rates for digital TV. 30 . UNIT . Pitchand. A. 4th Edition. EV of functions of Random variables. USAT. Rician and Cauchy types of random variables UNIT . Baye’s Theorem.. Pearson Education. Satellite Communication Systems Engineering.
UNIT . EV involving pairs of Random variables.6 MULTIPLE RANDOM VARIABLES: Joint and conditional PMF. Independent Random variables.. Probability generating functions. Properties of ACF.8 EXAMPLE PROCESSES: Markov processes. Engg Application. Engg application. joint PDF. TEXT BOOK: 1. Probability. Mathematical tools for studying Random Processes. PDF.7 RANDOM PROCESS: Definition and characterization. Random variables and Random signal principles Peyton Z Peebles: TMH 4th Edition 2007 31 . Moment generating functions. Probability and random processes: application to Signal processing and communication . Complex Random variables. UNIT . Engg application. Joint probability mass functions.EV involving multiple Random variables.A. UNIT . Engg applications. entropy and source coding. Random variables and stochastic processes . linear prediction. Gaussian Processes. UNIT . CDF. density and mass functions. Computer networks. Telephone networks.5 Pairs of Random variables. Stationary and Ergodic Random processes.4 Characteristic functions. Conditional Distribution. Joint CDF. Papoullis and S U Pillai: McGraw Hill 2002 2.UNIT . Gaussian Random variable in multiple dimension. Probability. Poisson Processes. Scalar quantization.S L Miller and D C Childers: Academic Press / Elsivier 2004 REFERENCE BOOKS: 1.
of Lecture Hrs/Week : 04 Total no. Energy recovery circuit design. Hierarchy of limits. operation reduction and substitution. Testing with elevated intrinsic leakage. designs with reversible and partially reversible logic. UNIT – 5&6 DESIGN AND TEST OF LOW-VOLTAGE CMOS CIRCUITS: Introduction. multiple supply voltages. Transistor sizing. device. Load capacitance. Gate induced Drain leakage. Low voltage design techniques using reverse Vgs. circuit and system limits. steep sub threshold swing and multiple threshold voltages. Algorithm level transforms.H Stark and Woods: PHI 2001 LOW POWER VLSI DESIGN Subject Code : 10EC664 No. Design of peripheral circuits – address decoder. of Lecture Hrs.7 LOW ENERGY COMPUTING: Energy dissipation in transistor channel. level shifter and I/O Buffer. 32 . Material. device design issues. Logic and Circuit level approaches. voltage scaling.computation. pre.Principles of low power design. minimizing short channel effect. Long channel and sub-micron MOSFET. Low power design limits . dynamic dissipation.3. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT – 1 Introduction. fundamental limits. Physics of power dissipation in MOSFET devices – MIS Structure. UNIT – 3&4 SYNTHESIS FOR LOW POWER: Behavioral. random processes and applications . Circuit activity driven architectural transformations. FSM and Combinational logic. Sources of power dissipation. Leakage current in Deep sub-micron transistors. UNIT .2 Power dissipation in CMOS – Short circuit dissipation. Probability. designing for low power. supply clock generation. Power-constrained Least squares optimization for adaptive and non-adaptive filters. energy recovery in adiabatic logic and SRAM core. Design style. UNIT .
Testing and debugging. Derived classed and inheritance.2 ARRAYS AND MATRICS: Arrays. Dynamic memory allocation classis. Applications. power estimation and optimization. UNIT .1 INTRODUCTION: Functions and parameters. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . TEXT BOOK: 1. UNIT . Derived classes and inheritance. Formula-based representation linked representation. UNIT . UNIT . Low-Power CMOS VLSI Circuit Design. Linear representation. Indirect addressing simulating pointers. Linked representation. Formula-based representation. sources of power dissipation. Linear lists.UNIT . Special matrices spare matrices. of Lecture Hrs/Week : 04 Total no. Linked Linked representation. of Lecture Hrs. UNIT . Skip list presentation. DATA STRUCTURE USING C++ Subject Code : 10EC665 No. Data Representation. 2000. Introduction.6 33 .8 SOFTWARE DESIGN FOR LOW POWER: Introduction. Kaushik Roy and Sharat C Prasad. Formulabased representation. Applications. Wiley Inter science.4 Queues: The abstract data types.5 SKIP LISTS AND HASHING: Dictionaries. Hash table representation.3 STACKS: The abstract data types. Matrices.
Other sequential programmable logic devices (PLDs). Programming in C++ . ADT and class extensions. TEXT BOOK: 1. VHDL model for a counter. Common binary tree operations.3 34 . B-trees. 2010 . 4th. McGraw Hill. Arrays. Leftist trees. Binary trees. Data structures. UNIT . 2. of Lecture Hrs. VHDL operators.2 DESIGNING WITH PROGRAMMABLE LOGIC DEVICES: Read-only memories. Algorithms. Design of a keypad scanner. Compilation and simulation of VHDL code. Properties and representation of binary trees. and applications in C++ Sartaj Sahni. Programmable logic arrays (PLAs). VHDL models for a multiplexer.BINARY AND OTHER TREES: Trees. UNIT-8 Search Trees: Binary search trees. TMH. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Binary tree traversal the ADT binary tree. Packages and libraries. Signals and constants. UNIT . Variables.Balaguruswamy. 1995. VHDL procedures.Balaguruswamy. Applications. UNIT . Object Oriented Programming in C++ .7 PRIRITY QUEUES: Linear lists. REFERENCE BOOKS: 1.2000. Heaps. VHDL functions. Modeling a sequential machine. of Lecture Hrs/Week : 04 Total no. DIGITAL SYSTEMS DESIGN USING VHDL Subject Code : 10EC666 No. Programmable array logic (PLAs). Modeling flip-flops using VHDL.1 INTRODUCTION: VHDL description of combinational networks. TMH.
UNIT . UNIT . Multi-valued logic and signal resolution. TEXT BOOK: 1. Linked state machines. Other floating-point operations. Designing with FPGAs. Files and Text IO. Derivation of SM charts. Interfacing memory to a microprocessor bus. Design of a binary divider. 2006. IEEE1164 standard logic. Synthesis examples.DESIGN OF NETWORKS FOR ARITHMETIC OPERATIONS: Design of a serial adder with accumulator. Generate statements.POINT ARITHMETIC: Representation of floating-point numbers. Floating-point multiplication.7 ADDITIONAL TOPICS IN VHDL: Attributes. Charles H. Altera FELX 10K series COLDs. Implementation of the dice game. Xlinx 4000 series FPGAs. Multiplication of signed binary numbers.8 VHDL MODELS FOR MEMORIES AND BUSES: Static RAM. Realization of SM charts. UNIT . Operator overloading.4 DIGITAL DESIGN WITH SM CHARTS: State machine charts. Transport and Inertial delays. State graphs for control networks. Synthesis of VHDL code. REFERENCE BOOKS: 35 . Roth. Digital Systems Design using VHDL. Jr:. UNIT .6 FLOATING . Generics. 9th reprint. Design of a binary multiplier. Thomson Learning. UNIT . Altera complex programmable logic devices (CPLDs). A simplified 486 bus model. Inc. Alternative realization for SM charts using microprogramming. using a one-hot state assignment.5 DESIGNING WITH PROGRAMMABLE GATE ARRAYS AND COMPLEX PROGRAMMABLE LOGIC DEVICES: Xlinx 3000 series FPGAs.
of Lecture Hrs/Week : 04 Exam Hours Total no. UNIT 3 Cluster of Instruments in System: Interfacing of external instruments to a PC – RS 232C. UNIT 5 Analysis Tools and Simple Application in VI: Fourier transform – Power spectrum – Correlation – Windowing and filtering tools – Simple temperature indicator – ON/OFF controller – PID controller – CRO emulation – Simulation of a simple second order system – Generation of HTML page. sample and hold. Concept of universal DAQ card – Use of timercounter and analog outputs on the universal DAQ card. 2009. sampling theorem..1. UNIT 2 Fundamentals of Virtual Instrumentation: Concept of Virtual Instrumentation – PC based data acquisition – Typical on board DAQ card – Resolution and sampling frequency – Multiplexing of analog inputs – Singleended and differential inputs – Different strategies for sampling of multi channel analog inputs. : 52 Exam Marks : 25 : 03 : 100 UNIT 1 Review of Digital Instrumentation: Representation of analog signals in the digital domain – Review of quantization in amplifier and time areas. 2 nd Ed. UNIT 4 Graphical Programming Environment in VI: Concepts of graphical programming – Lab-view software – Concept of VIs and sub VIs – Display types – Digital – Analog – Chart – Oscilloscope types – Loops – Case and sequence structures – Types of data – Arrays – Formulate nodes – Local and Global variables – String and file I/O. 2004 Digital Electronics and Design with VHDL . Mark Zwolinski. New Delhi. Fundamentals of Digital Logic Design with VHDL. 3. of Lecture Hrs. VIRTUAL INSTRUMENTATION Subject Code : 10EC668 IA Marks No. RS 485 and USB standards – IEEE 488 standard – ISO –OSI model for series bus – introduction to bus protocols of MOD bus and CAN bus.Volnei A Pedroni. Stephen 2. Tata McGrw-Hill. Brwon & Zvonko Vranesic. 2007 Digital System Design with VHDL. ADC and DAC. RS – 422. Elsivier Science. 2 Ed. Pearson Education.. Reference Books: 36 .
2003 Ernest O. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Flow and error control. IEEE standards. Wireless LAN IEEE 802. VII SEMESTER COMPUTER COMMUNICATION NETWORKS Subject Code : 10EC71 No. of Lecture Hrs/Week : 04 Total no. “Understanding Serial Communication”. Ethernet. Noiseless channels and noisy channels.4 Wired LAN. Telephone and cable networks for data transmission. Fast Ethernet. Doeblin and Dhanesh N Manik.5 37 . Gigabit Ethernet. 1994 Peter W Gofton . Changes in the standards. of Lecture Hrs. New Delhi. Instrument Society of America. 3. “Virtual Instrumentation. HDLC. 5.1 Layered tasks. Gupta and J P Gupta. S. DSL. Controlled access. TMH. 2009 Sanjay Gupta. Layers in OSI model. Random access.11 UNIT . UNIT . Bishop. “ Measrement Systems – Application and Design”. TMH.”PC Interfacing for Data 2. Addressing.3 MULTIPLE ACCESSES: Channelisation.2 DATA LINK CONTROL: Framing. 2000 Robert H. LABVIEW”. 4. OSI Model. Standard Ethernet.1. Cable TV for data transmission. Protocols. UNIT . Dial up modem. Telephone networks. UNIT . TCP?IP Suite. Sybes International. 2007. Acquisition and Process Control”. “Learning with Lab-View” Preticee Hall. 5th Edn.
Wayne Tomasi: Pearson education 2007 OPTICAL FIBER COMMUNICATION Subject Code : 10EC72 No. Keith W. Introduction to Data communication and Networking. Backbone and Virtual LANs. mode filed diameter. Back bone Networks. Ray theory. advantages.1 OVERVIEW OF OPTICAL FIBER COMMUNICATION: Introduction. Ipv6 addresses. optical fiber waveguides. Data Communication and Networking. Connecting devices. Ross: Pearson education.7 Delivery. Unicast Routing Protocols. and applications of optical fiber communication. of Lecture Hrs. James F. UDP. 38 . photonic crystal. Resolution TEXT BOOK: 1. Kurose. 2nd Edition.4). of Lecture Hrs/Week : 04 Total no. disadvantages. Optical Fibers: fiber materials. UNIT . Ipv4 addresses.4. Multicast Routing protocols UNIT . single mode fiber. fiber optic cables specialty fibers. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Ipv4 and Ipv6 Transition from Ipv4 to Ipv6. 2003 2.8 Transport layer Process to process Delivery.6 Network Layer. TCP. cutoff wave length. Historical development. Logical addressing. B Forouzan. Domain name system. Computer Networks. 4th Ed. Forwarding. cylindrical fiber (no derivations in article 2. general system. TMH 2006 REFERENCE BOOKS: 1.Connecting LANs. Virtual LANs UNIT .
8 Optical Amplifiers and Networks – optical amplifiers. short wave length band. Photo detector noise. eye diagrams.3 OPTICAL SOURCES AND DETECTORS: Introduction.5 OPTICAL RECEIVER: Introduction. Photo diodes.4 FIBER COUPLERS AND CONNECTORS: Introduction. LED’s. RF over fiber. transmission distance for single mode fibers. direct thin film filters. dispersion. point–to–point links. dynamic gain equalizers. LASER diodes. quantum limit. receiver sensitivity. fiber connectors and fiber couplers. semiconductor optical amplifiers. optical drop multiplexers. coherent detection. 39 . nodal noise and chirping. microwave photonics. Photo detectors. double hetero junction structure. multichannel transmission techniques. fiber alignment and joint loss. Isolators and circulators. fiber splices. SONET/SDH rings. UNIT . bending loss. operation. overview of analog links. UNIT . OPTICAL NETWORKS: Introduction. Optical Interfaces. active optical components. Optical Receiver Operation. key link parameters. scattering losses. chromatic dispersion compensators. link power budget. WDM standards.UNIT . multiplexer. single mode fiber joints. tunable light sources. Analog receivers UNIT . Intra model dispersion. UNIT . EDFA.2 TRANSMISSION CHARACTERISTICS OF OPTICAL FIBERS: Introduction.6 ANALOG AND DIGITAL LINKS: Analog links – Introduction. System considerations. Power penalties. resistive budget. tunable optical fibers. MEMS technology. Response time. basic applications and types. CNR. Inter model dispersion. UNIT . High – speed light – waveguides. variable optical attenuators. comparison of photo detectors. Attenuation. overview of WDM operation principles. Mach-Zehender interferometer. UNIT .7 WDM CONCEPTS AND COMPONENTS: WDM concepts. polarization controllers. Digital links – Introduction. absorption. burst mode receiver. Radio over fiber links. SONET / SDH.
UNIT . Duel converters. Applications of power electronics. 2007. Fiber Optic Communication .5 40 .1 Introduction. MGH. Switching limits. Base derive control. IGBT’s. John M. Power MOSFET’s. Two transistor model. Types of power electronics circuits. Gate characteristics. REFERENCE BOOK: 1.3 INTRODUCTION TO THYRISTORS: Principle of operation states anode-cathode characteristics. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Control characteristics. Gerd Keiser. POWER ELECTRONICS Subject Code : 10EC73 No.2 POWER TRANSISTOR: Power BJT’s. Gate trigger circuits. di / dt and dv / dt protection. Isolation of gate and base drives.. of Lecture Hrs/Week : 04 Total no. "Optical Fiber Communications". Thyristor firing circuits. 3rd Impression. Power semiconductor devices. Turn-on Methods. Senior. Principles of phase controlled converter operation. 1 φ semi converters (all converters with R & RL load). "Optical Fiber Communication”. Switching characteristics. 1φ fully controlled converters. Pearson Education. Dynamic Turn-on and turn-off characteristics. UNIT .Joseph C Palais: 4th Edition. UNIT . Gate drive. Switching characteristics.4 CONTROLLED RECTIFIERS: Introduction. 4th Ed. of Lecture Hrs. Pearson Education. 2008. Peripheral effects. 2. UNIT .TEXT BOOKS: 1.
natural and forced commutation.S. 2009. 2010. UNIT . Anandamurhty. auxiliary commutation. Essentials and Applications”. Wiley India Pvt. “Power Electronics. Analysis of impulse commutated Thyristor chopper (only qualitative analysis). 2007. Singh and Kanchandani K. Pearson/Sanguine Pub. TMH publisher. numerical problems. PHI / Pearson publisher 2004. of Lecture Hrs. Variable DC link inverter. external pulse commutation. Daniel W. current source invertors. Performance parameters. Principles of on and off control. EMBEDDED SYSTEM DESIGN Subject Code : 10EC74 No.Thyristor turn off methods.7 DC CHOPPERS: Introduction. L Umanand. V Nattarasu and R.M. 3. “Power Electronics” .B. D. UNIT .8 INVERTORS: Introduction. “Power Electronics” . McGraw Hill. TEXT BOOKS: 1. 2. 2nd Ed. Ltd. “Power Electronics”. Principles of operation. Hart. Step down chopper with RL loads.6 AC VOLTAGE CONTROLLERS: Introduction. : 52 41 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 . “Power Electronics” . 2006. 1φ bridge inverter. Chopper classification. UNIT . 2. of Lecture Hrs/Week : 04 Total no. REFERENCE BOOKS: 1. Complementary commutation. AC line commutation. Principles of phase control. H. Single phase controllers with restive loads and Inductive loads. Principles of step down and step up choppers. class A and class B types. Rashid 3rd edition. self commutation. voltage control of 1φ invertors.M. numerical problems.
UNIT 4: Embedded Systems Design and Development : System Design and Development. DRAM Design. Basic Concepts of Caching. Sharing Resources. Other Considerations. Tasks and Task control blocks. ROM Overview. Instructions. UNIT 2: The Hardware Side: An Introduction. Threads – Lightweight and heavyweight. The methodology. Dynamic Memory Allocation. Archiving the Project. Finite State MachinesA Theoretical Model. Embedded Systems-An Instruction Set View. DRAM Memory Interface. Architectural Design. The real time operating system (RTOS). Register View of a Microprocessor The Hardware Side: Storage Elements and Finite-State Machines (2 hour) The concepts of State and Time. Registers-A First Look. The operating System. Prototyping. Response Time. Embedded Systems.UNIT 1: Introduction to Embedded System: Introducing Embedded Systems. The State Diagram. A Memory Interface in Detail. Partitioning and Decomposing a System. The Memory Map. Dynamic RAM Overview. Programs and Processes. Instructions in Detail. Functional Design. Formulating the Requirements Specification. UNIT 3: Memories and the Memory Subsystem: Classifying Memory. The CPU is a resource. Analyzing code. Designing a Cache System. Identifying the Requirements. – A more detailed look. Philosophy. SRAM Design. The Core Level. etc. System Specifications versus System Requirements. The Design Process. A General Memory Interface. Functional Model versus Architectural Model. 42 . Addresses. Time. Representing Information. OS architecture. Understanding Numbers. Static RAM Overview. The System Design Specification. Problem Solving-Five Steps to Design. Complexity Analysis. Memory Subsystem Architecture. UNIT 5 & 6: Real-Time Kernels and Operating Systems: Tasks and Things. Life-cycle Models. Embedded Systems-A Register View. Terminology. Embedded Design and Development Process. memory management revisited UNIT 7 & 8: Performance Analysis and Optimization: Performance or Efficiency Measures. Foreground/Background Systems. Chip Organization.
Dreamtech Software Team. An inverter A Buffer Transmission Gate Basic/universal gates Flip flop -RS. Peckol. 2005 3. Hardware Accelerators. Tricks of the Trade. Tammy Noergaard. John Weily. iv. Caches and Performance Text Book: 1. Embedded Systems Architecture – A Comprehensive Guide for Engineers and Programmers. TMH. John Wiley India Edition. Thoughts on Performance Optimization. observe the waveform and synthesize the code with technological library with given Constraints*. : 42 Exam Marks : 50 (Wherever necessary Cadence/Synopsis/Menta Graphics tools can used) PART . v. viii. Do the initial timing verification with gate level simulation. vii. JK. Embedded Systems – A contemporary Design Tool. ii. 2008 Reference Books: 1. of Practical Hrs/Week : 03 Exam Hours : 03 Total no. Performance Optimization. 2008 2. Write Verilog Code for the following circuits and their Test Bench for verification. Embedded Systems: Architecture and Programming. of Practical Hrs. Memory Loading. 2008 VLSI LAB Subject Code : 10ECL77 IA Marks : 25 No.A DIGITAL DESIGN ASIC-DIGITAL DESIGN FLOW 1. Evaluating Performance. T Serial & Parallel adder 4-bit counter [Synchronous and Asynchronous counter] Successive approximation register [SAR] 43 .Time Loading. MS. Elsevier Publication. Programming for Embedded Systems. iii. vi. D. James K. i. Raj Kamal.
ERC c. AC Analysis iii) Transient Analysis b. Draw the schematic and verify the following i) DC Analysis ii) Transient Analysis b.B ANALOG DESIGN Analog Design Flow 1. i) A Single Stage differential amplifier ii) Common source and Common Drain amplifier 3. Power and Area to the given constraint*** 2. completing the design flow mentioned below: a. Draw the Layout and verify the DRC. Check for LVS d. Draw the Layout and verify the DRC. Check for LVS d. ERC c. Draw the schematic and verify the following i) DC Analysis ii) AC Analysis iii) Transient Analysis b. Verify & Optimize for Time. Design an op-amp with given specification* using given differential amplifier Common source and Common Drain amplifier in library** and completing the design flow mentioned below: a. ERC c. Extract RC and back annotate the same and verify the Design. Extract RC and back annotate the same and verify the Design. Check for LVS d. 44 . Extract RC and back annotate the same and verify the Design e. Design an Inverter with given specifications*. Draw the Layout and verify the DRC. Draw the schematic and verify the following i) DC Analysis ii). completing the design flow mentioned below: a. Design the following circuits with given specifications*.* An appropriate constraint should be given PART .
a. ** Applicable Library should be added & information should be given to the Designer. Design a 4 bit R-2R based DAC for the given specification and completing the design flow mentioned using given op-amp in the library**. Draw the schematic and verify the following i) DC Analysis ii) AC Analysis iii) Transient Analysis b. 5.4. [Specifications to GDS-II] * Appropriate specification should be given. ERC c. Draw the Layout and verify the DRC. Extract RC and back annotate the same and verify the Design. For the SAR based ADC mentioned in the figure below draw the mixed signal schematic and verify the functionality by completing ASIC Design FLOW. *** An appropriate constraint should be given POWER ELECTRONICS LAB Subject Code : 10ECL78 No. of Practical Hrs/Week: 03 45 IA Marks Exam Hours : 25 : 03 . Check for LVS d.
: 42 1. 12. The Sampling Process. Digital Filters. Generation of firing signals for thyristors/ trials using digital circuits / microprocessor. Exam Marks : 50 Static characteristics of SCR and DIAC. 7. Voltage (Impulse) commutated chopper both constant frequency and variable frequency operations. Discrete Time Sequences. 10.2 ARCHITECTURES FOR PROGRAMMABLE DIGITAL SIGNALPROCESSORS: Introduction. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT). Speed control of a separately exited DC motor.1 INTRODUCTION TO DIGITAL SIGNAL PROCESSING: Introduction. Single phase Fully Controlled Bridge Converter with R and R-L loads. 13.3 46 . A Digital Signal-Processing System. Features for External Interfacing. Note: Experiments to be conducted with isolation transformer and low voltage DSP ALGORITHMS AND ARCHITECTURE Subject Code : 10EC751 No. of Practical Hrs. Controlled HWR and FWR using RC triggering circuit SCR turn off using i) LC circuit ii) Auxiliary Commutation UJT firing circuit for HWR and FWR circuits. Linear Time-Invariant Systems. Data Addressing Capabilities. 11. Address Generation Unit. of Lecture Hrs/Week : 04 Total no. Decimation and Interpolation.Total no. Bus Architecture and Memory. 3. Speed control of universal motor. Basic Architectural Features. UNIT . UNIT . Parallel / series inverter. AC voltage controller using triac – diac combination. 6. Speed control of stepper motor. Static characteristics of MOSFET and IGBT. of Lecture Hrs. 9. Programmability and Program Execution. 8. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . DSP Computational Building Blocks. 5. 4. 2.
Srinivasan. DSP Based Bio-telemetry Receiver. 2010 47 . UNIT . Thomson Learning. Memory Interface. 2004. UNIT . Jervis B. UNIT . Data Addressing Modes of TMS32OC54xx.PROGRAMMABLE DIGITAL SIGNAL PROCESSORS: Introduction. Parallel I/O Interface. Interrupts and I / O Direct Memory Access (DMA). Synchronous Serial Interface. W Pearson-Education. PHI/ 2002 2. Pipeline Operation of TMS32OC54xx Processor. A CODEC Interface Circuit. External Bus Interfacing Signals.8 INTERFACING AND APPLICATIONS OF DSP PROCESSOR: Introduction. REFERENCE BOOKS: 1. C. TEXT BOOK: 1. Digital Signal Processing: A practical approach.4 Detail Study of TMS320C54X & 54xx Instructions and Programming. IIR Filters. Overflow and Scaling. Interrupts of TMS32OC54XX Processors. A Speech Processing System. The Q-notation. Memory Space Organization. Interpolation and Decimation Filters (one example in each case). “Digital Signal Processing”. Commercial Digital Signal-processing Devices. 2nd. Programmed I/O.5 IMPLEMENTATION OF BASIC DSP ALGORITHMS: Introduction.6 IMPLEMENTATION OF FFT ALGORITHMS: Introduction. UNIT . Bit-Reversed Index Generation & Implementation on the TMS32OC54xx. “Digital Signal Processors”. An Image Processing System. Ifeachor E. Program Control. B Venkataramani and M Bhaskar TMH. FIR Filters. Memory Space of TMS32OC54xx Processors..7 INTERFACING MEMORY AND PARALLEL I/O PERIPHERALS TO DSP DEVICES: Introduction. An FFT Algorithm for DFT Computation. OnChip peripherals.. Avatar Singh and S. UNIT .
Applications areas. fiber-optic gyroscope and surface-acoustic-wave based wireless strain sensor. Silicon micromachining: surface. polymers and metals f. Processing of other materials: ceramics. piezo-resistive pressure sensor. blood analyzer. “Architectures for Digital Signal Processing”. UNIT . Smart material processing: e. etching (wet and dry). c) Actuators: silicon micro-mirror arrays.3 MICROMANUFACTURING AND MATERIAL PROCESSING: a./ Week Total No. moulding. Components of a smart system. Application areas. : 10MS752 : 04 : 52 IA Marks Exam Hours Exam Marks : : : 25 03 10 0 UNIT . electrostatic comb-drive and micromotor. of Lecture Hrs. and metallization. shapememory-alloy based actuator. and systems. thin-film deposition. 2007 MICRO AND SMART SYSTEMS TECHNOLOGY Subject Code No. wafer-bonding. Thick-film processing: d. electro-thermal actuator. Commercial products. Commercial products.2 MICRO AND SMART DEVICES AND SYSTEMS: PRINCIPLES AND MATERIALS: a) Definitions and salient features of sensors. lithography. active noise control in a helicopter cabin. b. Emerging trends 48 . piezo-electric based inkjet printhead. Evolution of micro-manufacturing. d) Systems: micro gas turbine. UNIT . b) What are microsystems? Feynman’s vision. b) Sensors: silicon capacitive accelerometer.1 INTRODUCTION TO MICRO AND SMART SYSTEMS: a) What are smart-material systems? Evolution of smart materials. portable clinical analyzer.3. Peter Pirsch John Weily. of Lecture Hrs. c. Multi-disciplinary aspects. conductometric gas sensor. Silicon wafer processing. Micromachined transducers. structures and systems. magnetic micro relay. bonding based process flows. bulk. actuators.
semiconductor diodes. Heat transfer issues. state-space modeling. UNIT . Coupled-domain simulations using Matlab. and model order reduction. operational amplifiers.UNIT . Piezoresistive modeling. Residual stresses and stress gradients.7 INTEGRATION AND PACKAGING OF MICROELECTRO MECHANICAL SYSTEMS: Integration of microelectronics and micro devices at wafer and chip levels. Thermal loading. Elastic deformation and stress analysis of beams and plates. stability. UNIT . PID controllers. Capillary electro-phoresis. Lowtemperature-cofired-ceramic (LTCC) multi-chip-module technology. UNIT . Coupled electromechanics. Transfer function.8 CASE STUDIES: BEL pressure sensor. Examples from smart systems and micromachined accelerometer or a thermal cycler. b. UNIT . Examples from microsystems. Commercial software. Scaling issues. MOSFET amplifiers. flip-chip. c. Electromagnetic actuation. Microelectronic packaging: wire and ball bonding.4 MODELING: a. Microsystem packaging examples. UNIT . Magnetostrictive actuators. thermal cycler for DNA amplification. and active vibration control of a beam.5 COMPUTER-AIDED SIMULATION AND DESIGN: Background to the finite element element method.9 Mini-projects and class-demonstrations (not for Examination) a) CAD lab (coupled field simulation of electrostatic-elastic actuation with fluid effect) b) BEL pressure sensor 49 . Piezoelectric modeling. Basic fluids issues. transistors. Basic Op-Amp circuits. Charge-measuring circuits.6 ELECTRONICS. CIRCUITS AND CONTROL: Carrier concentrations. Electrostatics.
Animations of working principles. ISBN 0-444-51616-6. 2. Analysis and Design Principles of MEMS Devices. Smart Material Systems and MEMS: V. Laboratory hardware kits for (i) BEL pressure sensor. 4. REFERENCE BOOKS: 1. process flows and processing techniques. (ii) thermal-cycler and (iii) active control of a cantilever beam. S. 2. The Netherlands. S. MEMS & Microsystems: Design and Manufacture. Tata Mc-Graw-Hill. Gopalakrishnan. 1. Varadan. Kluwer Academic Publishers. Boston. Senturia. MEMS. Amsterdam. TaiRan Tsu. TMH 2007 50 . J. ISBN 0-7923-7246-8. Minhang Bao. K. Vinoy.c) Thermal-cycler for PCR d) Active control of a cantilever beam TEXT BOOKS AND A CD-SUPPLEMENT: 1. USA. Design and Development Methodologies. D. 3. Wiley. Microsystems Design. A CD-supplement with Matlab codes. 2001.Nitaigour Premchand Mahalik. photographs and movie clips of processing machinery and working devices. Elsevier.
ARTIFICIAL NEURAL NETWORKS Subject Code : 10EC753 No. of Lecture Hrs/Week : 04 Total no. of Lecture Hrs. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
UNIT - 1 Introduction, history, structure and function of single neuron, neural net architectures, neural learning, use of neural networks.
UNIT - 2 Supervised learning, single layer networks, perceptions, linear separability, perceptions training algorithm, guarantees of success, modifications. UNIT - 3 Multiclass networks-I, multilevel discrimination, preliminaries, propagation, setting parameter values, theoretical results.
UNIT - 4 Accelerating learning process, application, mandaline, adaptive multilayer networks.
UNIT - 5 Prediction networks, radial basis functions, polynomial regularization, unsupervised learning, winner take all networks.
UNIT - 6 Learning vector quantizing, counter propagation networks, adaptive resonance theorem, toplogically organized networks, distance based learning, neo-cognition. UNIT - 7 Associative models, hop field networks, brain state networks, Boltzmann machines, hetero associations. UNIT - 8
Optimization using hop filed networks, simulated annealing, random search, evolutionary computation. TEXT BOOK: 1. Elements of Artificial Neural Networks, Kishan Mehrotra, C. K. Mohan, Sanjay Ranka, Penram, 1997. REFERENCE BOOKS: 1. Artificial Neural Networks, R. Schalkoff, MGH, 1997. 2. Introduction to Artificial Neural Systems, J. Zurada, Jaico, 2003. 3. Neural Networks, Haykins, Pearson Edu., 1999. CAD FOR VLSI Subject Code : 10EC754 No. of Lecture Hrs/Week : 04 Total no. of Lecture Hrs. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
UNIT – 1&2 INTRODUCTION TO VLSI METHODOLOGIES: VLSI Physical Design Automation - Design and Fabrication of VLSI Devices - Fabrication process and its impact on Physical Design.
UNIT – 3&4 A QUICK TOUR OF VLSI DESIGN AUTOMATION TOOLS: Data structures and Basic Algorithms, Algorithmic Graph theory and computational complexity, Tractable and Intractable problems.
UNIT – 5&6 GENERAL PURPOSE METHODS FOR COMBINATIONAL OPTIMIZATION: partitioning, floor planning and pin assignment, placement, routing.
UNIT – 7&8
SIMULATION-LOGIC SYNTHESIS: Verification-High level synthesis Compaction. Physical Design Automation of FPGAs, MCMS-VHDLVerilog-Implementation of Simple circuits using VHDL and Verilog.
“Algorithms for VLSI Physical Design Automation”, N. A. Shervani, 1999. “Algorithms for VLSI Design Automation”, S. H. Gerez, 1998. APPLIED EMBEDDED SYSTEM DESIGN Subject Code : 10EC755 No. of Lecture Hrs/Week : 04 Total no. of Lecture Hrs. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100
UNIT - 1
Analog Communication.............................8 Unit - 8...................................................13 ...................13 Microprocessor......................................19 Unit - 2...................................................19 ..............................................19 Unit - 5...................................................20 .............................................20 Antennas and Propagation.......................22 Unit - 1................................................30 Unit - 2................................................30 ..........................................30 Unit - 3................................................30 ...........................................31 Unit - 4................................................31 ...........................................31 Unit - 5................................................31 ..........................................31
Unit - 6................................................31 ..........................................31 Unit - 7................................................31 ..........................................31 Unit - 8................................................31 ..........................................31 Reference Books:.....................................61 Unit - 1...................................................70 .............................................70 Unit - 2............................................70 ......................................71 Unit - 8...................................................71 .............................................71 Text Book:..............................................77 Reffrence Books:......................................77 Real Time Operating Systems...............................................81 Unit - 1...................................................................................81 Definition and Classification of Real time systems: Concept of computer control, sequence, loop and supervisor control, centralized, hierarchical and distributed systems, Human Computer interface, hardware requirement for real time applications, specialized processors, interfaces, communications.....................................................................81 ............................................................................81 Unit - 2...................................................................................81 Special features of languages for real time application, review of data types, concurrency, exception handling, corountines, low-level facilities. Overview of Real time languages, modula 2 and Ada as a Real Time Languages.......................81 ............................................................................81 Unit - 3...................................................................................81 Real Time Operating Systems: (PSOS+Vx WORKS). Scheduling strategies, priority structures, Task management, Real Time Clock Handler, Code sharing, Resource Control, Inter task Communication and Control, Example of Creating
............................................84 Unit .........................................................82 .84 . Ward and Mellor Method. HATLEY & Pribhai method.....................7.........83 .2........................................... Specification.........82 ..............81 Unit ......................................8..81 Development Methodologies: Yourdon.82 Reliability evaluation: Introduction.82 Unit ...........81 Introduction to Design of Real Time Systems........ Disk Scheduling Algorithms......................................................... Reliability Models for Hardware............................................................... Software Error Models...........82 Unit ..................... MASXOT...........6.....81 ................... Redundancy..............................................................83 .......................................................................................................... Integrated Failure Handling..83 Unit ......... multitasking Approach..........................................82 Fault tolerance techniques: Introduction...........................................81 Design analysis: Introduction............................... Scheduling problem Real Time Database........................................5................82 Reference Books:.......81 Unit .......... Preliminary Design..........................81 ................................................. Methodology.............83 Unit ...... Errors and Failures..82 Unit .....81 Unit ................................................... monitors.. Real Time Vs General Purpose Databases..................84 55 ................................................................ Parameters................ Petrinets............................................. Concurrency Control.... Rendezvous................................... Maintaining Serialization Consistency.......................... Practical Real Time Operating Systems... PAISLEY System..........81 ................................................................................................................. Faults........8... Fault types......................6.............1............................................................................. Detection and Containment............................................................81 ....................................................................... Transaction priorities and Aborts...and RTOS based on modula 2 kernel.............4.. Analysis of Petri Nets.....
.. 56 .. Pearson Edition 1999........84 TEXT BOOK: 1... Frank Vahid...... Raj Kamal..... TMH.... Embedded Systems : Architecture.... 2002.. An embedded Software Primer by David E Simon. 2nd Edn. 2.. REFERENCE BOOKS: 1....... Embedded System Design – A certified Hardware / Software Introduction. Programming. 2008......... and Design... John Wikey & Sons.
short-time energy and average magnitude. semivowels. hearing applications and clear speech.SPEECH PROCESSING Subject Code : 10EC756 No. homomorphic system for convolution. UNIT .6 Filter bank summation and overlap add methods for short-time synthesis of speech. nasals. UNIT . sampling rates in time and frequency.5 FREQUENCY DOMAIN METHODS FOR SPEECH PROCESSING: Introduction. diphthongs. UNIT . Acoustic phonetics: vowels. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . silence detection. of Lecture Hrs/Week : 04 Total no. short-time autocorrelation function. pitch period estimation using parallel processing approach. sinusoidal and harmonic plus noise method of analysis/synthesis. UNIT . short-time average zero crossing rate. enhancement.7 HOMOMORPHIC SPEECH PROCESSING: Introduction.2 TIME-DOMAIN METHODS FOR SPEECH PROCESSING: time dependent processing of speech. UNIT .8 57 .3 Speech vs. the complex cepstrum of speech. stops and affricates. of Lecture Hrs. UNIT . mechanism of speech production.1 PRODUCTION AND CLASSIFICATION OF SPEECH SOUNDS: Introduction. UNIT . homomorphic vocoder. fricatives.4 Brief Applications of temporal processing of speech signals in synthesis. definitions and properties: Fourier transforms interpretation and linear filter interpretation.
2004. Rabiner and R. 2004. F. Schafer. Gold and N. TEXT BOOK: 1. Digital Processing of Speech Signals. Pearson Education Asia.APPLICATIONS OF SPEECH PROCESSING: Brief applications of speech processing in voice response systems hearing aid design and recognition systems. R. Speech and Audio Signal Processing: Processing and Perception of Speech and Music. John Wiley. 2. 2004. W. Morgan. T. B. L. Quatieri. REFERENCE BOOKS: 1. Pearson Education Asia. 58 . Discrete Time Speech Signal Processing.
continue statements.1 C++. UNIT . the C++ program. Class Initailization.4 FUNCTIONS: Prototype. switch. Exception Specification and Exceptions and Design Issues. The Built-In Array Data Type. UNIT . bitset operations. UNIT .6 CLASSES: Definition. Pointer Type. Assignment operators. An Object-Oriented Design.5 EXCEPTION HANDLING: Throwing an Exception. the bool type. Class constructior. Variables. Reference Types. Class Objects.3 OPERATORS: Arithmetic Operators. The class destructor. Enumeration types. Preprocessor Directives. Increment and Decrement operator. Operators new and delete.2 THE BASIC LANGUAGE: Literal Constant. Catching an exception. while. Array types. AN OVERVIEW: Getting started.7 Overload Operators. An Object – based Design. An array. Relational and Logical operators. of Lecture Hrs/Week : 04 Total no. Operators ++ and --. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Bitwise operator. Class Object Arrays and Vectors. goto. Dynamic Memory Allocation and Pointers. UNIT . The vector container type. Recursion and linear function.ELECTIVE-3 (GROUP-C) PROGRAMMING IN C++ Subject Code : 10EC761 No. 59 . Statements: if. Equality. break. for Loop. An Exception – based Design. of Lecture Hrs. String Types. UNIT . UNIT . const Qualifier. Argument passing. The conditional Operator.
Lippman & J. TEXT BOOK: 1. Time constraints. Galgotia Publications. Cohoon and Davidson. Communications. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . B.2 CONCEPTS OF COMPUTER CONTROL: Introduction. TMH publication. Sequence Control. REAL-TIME SYSTEMS Subject Code : 10EC762 No. 2. 2000. private & protected inheritance. General purpose computer.3 COMPUTER HARDWARE REQUIREMENTS FOR RTS: Introduction. Class scope under Inheritance.Oriented Design. 2004. public. Object Oriented Programming using C++. Supervisory control.1 INTRODUCTION TO REAL-TIME SYSTEMS: Historical background. Loop control. C++ Program Design: An Introduction to Programming and Object. Centralised computer control. 3rd Edition. Single chip microcontroller. Lafore. C++ Primer. Specialized processors. 2004. of Lecture Hrs. Data transfer techniques.8 Multiple Inheritances. Distributed system. Human-computer interface. 3rd Edn. UNIT . of Lecture Hrs/Week : 04 Total no. RTS Definition. Lajoie. Classification of Real-time Systems. Standard Interface. REFERENCE BOOKS: 1. Addison Wesley. 60 . Benefits of computer control systems. Process-related Interfaces.UNIT . Classification of Programs. R. S. UNIT .
2005. Co routines. 2nd Edn. Memory Management. UNIT . Single-program approach. Preliminary design. Modularity and Variables. Concurrency. Priority Structures. 2. 61 . Real . Stuart Bennet.7 DESIGN OF RTSS – GENERAL INTRODUCTION: Introduction. Low-level facilities. Hately and Pirbhai Method. TEXT BOOKS: 1. Scheduler and real-time clock interrupt handles.UNIT . Yourdon Methodology. Elsevier. Monitors. Minimum OS kernel. Data transfer. 3. Scheduling strategies. Real-time support. Code sharing. Resource control. Embedded Systems. PHI. Phillip. Mutual exclusion. Foreground/background.5 & 6 OPERATING SYSTEMS: Introduction.Time Computer Control. Liveness. Specification documentation.An Introduction. UNIT . Rob Williams. Examples. Task co-operation and communication.8 RTS DEVELOPMENT METHODOLOGIES: Introduction. Tata Mc Graw Hill. 2006. Real-time multi-tasking OS. Exception Handling. Compilation. second edition. Pearson Education. Task management. Declaration and Initialization of Variables and Constants. Control Structure. A. Raj Kamal. Real-Time Systems Development. UNIT .4 LANGUAGES FOR REAL-TIME APPLICATIONS: Introduction. Ward and Mellor Method. Data types. REFERENCE BOOKS: 1. Syntax layout and readability. Real-Time Systems Design and Analysis. Multi-tasking approach. Interrupts and Device handling. 2005. Mutual exclusion. Requirement definition for Drying Oven. India. Overview of real-time languages. 2005. Laplante.
noise models. inverse filtering. UNIT . properties of unitary transforms. Haar transform.IMAGE PROCESSING Subject Code : 10EC763 No. Enhancement Using Arithmetic/Logic Operations.2 Image Sensing and Acquisition. Some Basic Gray Level Trans -formations. Image Sampling and Quantization. Linear and Nonlinear Operations.7 Model of image degradation/restoration process. Smoothing Frequency Domain filters.3 IMAGE TRANSFORMS: Two-dimensional orthogonal & unitary transforms. of Lecture Hrs. fundamental Steps in Digital Image Processing. homomorphic filtering. UNIT . elements of Visual Perception. minimum mean square error (Weiner) Filtering 62 . UNIT .6 Basics of Spatial Filtering Image enhancement in the Frequency Domain filters. two dimensional discrete Fourier transform. Only-Spatial Filtering Periodic Noise Reduction by Frequency Domain Filtering. Restoration in the Presence of Noise. Histogram Processing. Hadamard transform. Slant transform. Linear Position-Invariant Degradations. Components of an Image processing system.5 IMAGE ENHANCEMENT: Image Enhancement in Spatial domain.4 Discrete cosine transform. KL transform. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . UNIT . Some Basic Relationships between Pixels. Sharpening Frequency Domain filters. of Lecture Hrs/Week : 04 Total no.1 DIGITAL IMAGE FUNDAMENTALS: What is Digital Image Processing. UNIT . UNIT . sine transform.
Inductors. Pearson Edun. Shannon. resisters. 2001. RLC Networks as impedance Transformers. PHI. Pearson Education. Parallel RLC Tank. Anil K. Propagation. 2001. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . RADIO FREQUENCY INTEGRATED CIRCUITS Subject Code : 10EC764 No.Gonzalez and Richard E. The long – channels approximation. Dutta Majumdar. A little history. Chanda and D. FETs. MOS device physics in the short – channel regime. Series RLC Networks.3 A REVIEW OF MOS DEVICE PHYSICS: Introduction. Modulations & Alphabet Soup. “Digital Image Processing and Analysis”. Transformers. UNIT . Pseudo color Image Processing.UNIT . of Lecture Hrs. REFERENCE BOOKS: 1. Rafael C. Capacitors. Jain. Other RLC networks. processing basics of full color image processing TEXT BOOK: 1. 2. PASSIVE RLC NETWORKS: Introduction. Woods. of Lecture Hrs/Week : 04 Total no.8 Color Fundamentals.1 OVERVIEW OF WIRELESS PRINCIPLES: A brief history of wireless systems. “Fundamentals of Digital Image Processing”. Interconnect at radio frequencies: Skin effect. 2nd edition.. Other effects. 2003. 63 . Color Models. “Digital Image Processing”. operation in weak inversion (sub threshold). UNIT . Interconnect options at high frequency. B.2 CHARACTERISTICS OF PASSIVE IC COMPONENTS: Introduction. Noncellular wireless applications. MOSFET physics.
Power-constrained noise optimization. Constant gm bias. AB. AM – PM conversion. The shunt –series amplifier. The method of short circuit time constant. Derivation of intrinsic MOSFET two-port noise parameters. Examples of noise calculations.7 LOW NOISE AMPLIFIER DESIGN: Introduction. additional design considerations. general considerations. Popcorn noise. Introduction. Supply –independent bias circuits. Cascaded amplifiers. Tuned amplifiers. UNIT .port noise theory. TEXT BOOK: 64 .DISTRIBUTED SYSTEMS: Introduction. summary of PA characteristics. The method of open – circuit time constant. Flicker noise.8 Multiplier – based mixers. B and C power amplifier.4 THE SMITH CHART AND S-PARAMETERS: Introduction. Review of diode behavior. UNIT .6 VOLTAGE REFERENCES AND BIASING: Introduction. UNIT . Diode ring mixers. Nonlinear systems as linear mixers. RF PA design examples. Class A. Delay and bandwidth. Bandgap voltage reference. linearity and large signal performance. Class D amplifiers. Introduction. Typical noise performance. artificial lines. Band Width Estimation Techniques. Zeros as bandwidth Enhancers. The smith chart. UNIT . Modulation of power amplifiers. Sub sampling mixers. UNIT . Mixers: Introduction. Link between lumped and distributed regimes driving-point impedance of iterated structures. Noise: Introduction. LNA topologies: Power match versus noise match. S-parameters. Diodes and bipolar transistors in CMOS technology. Design examples. Thermal noise. Spurious – free Dynamic range. Risetime. summary of transmission line equations. Shot noise. A handy rule of thumb. Transmission lines in more detail. Neutralization and unilateralization. Bandwidth Enhancement with fT Doublers. RF power amplifiers. Mixer fundamental.5 HIGH FREQUENCY AMPLIFIER DESIGN: Introduction. Classical two. Class E amplifiers Class F amplifiers. Design summery. Behavior of Finite – length transmission lines.
The design of CMOS radio-frequency integrated circuit. 65 . Behzad Razavi.1. Design of Analog CMOS integrated circuit. 2004. Tata Mc Graw Hill. Thomas H. 2005. 2nd edition Cambridge. REFERENCE BOOK: 1. Lee.
Construction of a general orthonormal MRA. inverse CWT.4 EXAMPLES OF WAVELETS: Examples of orthogonal basis generating wavelets. UNIT . (ii) Basis for the detail subspace (iii) Direct sum decomposition. UNIT . Example MRA. the signal. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . UNIT . of Lecture Hrs/Week : 04 Total no. (i) Two scale relations for (t). (i) scaling function and subspaces. Filtering relationship for bi-orthogonal filters. (ii) Example of approximating vectors in nested subspaces of an infinite dimensional linear vector space. (iii) Basis functions for DTWT. Digital filtering interpolation (i) Decomposition filters. Formal definition of an MRA. Examples of bi-orthogonal scaling functions and wavelets. C-T wavelets. (i) example of approximating vectors in nested subspaces of a finite dimensional liner vector space. Definition of CWT. Interpreting orthonormal MRAs for Discrete time MRA. (ii) Implication of dilation equation and orthogonality.2 INTRODUCTION TO DISCRETE WAVELET TRANSFORM AND ORTHOGONAL WAVELET DECOMPOSITION: Introduction. (i) Bases for the approximations subspaces and Harr scaling function. a wavelet basis for MRA.1 CONTINUOUS WAVELET TRANSFORM: Introduction. (ii) band limited wavelets. UNIT . Approximation of vectors in nested linear vector spaces.5 ALTERNATIVE WAVELET REPRESENTATIONS: Introduction. of Lecture Hrs. Constant Q-Factor Filtering Interpolation and time frequency resolution. ORTHO NORMAL WAVELETS AND THEIR RELATIONSHIP TO FILTER BANKS: Introduction. (ii) Bases for detail subspaces and Haar wavelet.WAVELET TRANSFORMS Subject Code : 10EC765 No.3 MRA. the CWT as an operator. (ii) reconstruction. Biorthogonal wavelet bases. The CWT as a correlation. 66 . (i) Daubechies D4 scaling function and wavelet. 2-D wavelets.
edge detection and object isolation. Time Reversibility.P. UNIT . TEXT BOOK: 1. speckle removal. Wiley estern. Networks of Queues.UNIT . transform coding.separable multidimensional wavelets. Image fusions. Person Education. Wave-let and filter banks.7 (i) Embedded tree image coding (ii) compression with JPEG audio compression (iii) Audio masking.6 Non . M/G/1 System. Ramchandran. REFERENCE BOOKS: 1. Raghuveer M. Wavelet transforms. M/M/1. Bapardikar. Eastern Economy Edition. Wavelets Transform and Data Compression: Introduction. wavelet de-noising. Other Applications of Wavelet Transforms: Introduction.Rao and Ajit S. UNIT . Gilbert Strang and Nguyen Wellesley Cambridge press. of Lecture Hrs/Week : 04 Total no. 2008 MODELING AND SIMULATION OF DATA NETWORKS Subject Code : 10EC766 No. (iv) Wavelet based audio coding.L. M/M/m. Soman and K. Wavelet transforms. Networks of Transmission Lines. M/M/∞. K.8 CONSTRUCTION OF SIMPLE WAVELETS: Construction of simple wavelets like Harr and DB1. Prasad and Iyengar. 2001. M/M/m/m and other Markov System. 2.Introduction to theory and applications. 67 . wavelet packets. 1996 3. DTWT for image compression (i) Image compression using DTWT and run-length encoding. Insight into WAVELETS from theory to practice. Object detection by wavelet transforms of projections. of Lecture Hrs. 2000. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT – 1&2 DELAY MODELS IN DATA NETWORKS: Queuing Models.
Network Algorithms and Shortest Path Routing. UNIT – 7&8 FLOW CONTROL: Introduction. 2004. Flow models. 2003. UNIT – 5&6 ROUTING IN DATA NETWORKS: Introduction. Characterization of Optimal Routing. Carrier Sensing. and Topological Design. Projection Methods for Optimum Routing. Rate Adjustment Algorithms. Pearson Education (Asia) Pte. “Data Networks" Dimitri Bertsekas and Robert Gallager. Feasible Direction Methods for Optimal Routing. REFERENCE BOOKS: 1. Rate Control Schemes. Prentice Hall of India. Multi-access Reservations. Harcourt India Pvt. “High-Speed Networks and Internets” William Stallings. Packet Radio Networks. Overview of Flow Control in Practice. 2nd edition. Ltd.UNIT – 3&4 MULTI-ACCESS COMMUNICATION: Slotted Multi-access and the Aloha System. Walrand and P. “High Performance Communication Networks” J. Window Flow Control. Ltd. Splitting Algorithms. 2nd edition. Routing in the Codex Network. Broadcasting Routing Information: Coping with Link Failures. & Morgan Kaufman. Optimal Routing. 68 . Varaya. 2000. 3. 2.
6 CDMA technology. GSM Network and system Architecture. Radio resources and power management Wireless network security UNIT . GSM channel concepts. Roaming. UNIT . views of cellular networks.3G and 4G networks.4 GSM and TDMA techniques. UNIT . 3G cellular systems components. GSM identifiers UNIT . CDMA channel concept CDMA operations. UNIT . Cal handoff. CDMA overview. Cellular component identification Call establishment. History and Evolution Different generations of wireless cellular networks 1G.3 Wireless network architecture and operation.VIII SEMESTER WIRELESS COMMUNICATION Subject Code : 10EC81 No. Traffic cases.2 Common Cellular System components. of Lecture Hrs. 2g. TDMA systems UNIT .7 69 .5 GSM system operation. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . GSM protocol architecture.1 Introduction to wireless telecommunication systems and Networks. Cellular concept Cell fundamentals. Capacity expansion techniques. of Lecture Hrs/Week : 04 Total no. Cellular backbone networks. Common cellular network components. GSM system overview. Hardware and software. Mobility management.
Markoff statistical model for information source. 2009. UNIT .D P Agrawal: 2nd Edition Thomson learning 2007. Average information content of symbols in long dependent sequences.Y. Wireless communication .15X technologies in PAN Application and architecture Bluetooth Introduction to Broadband wireless MAN. Wireless Telecom Systems and networks. INFORMATION THEORY AND CODING Subject Code : 10EC82 No.2 SOURCE CODING: Encoding of the source output. Discrete communication channels. David Tse. Evolution of Wireless LAN Introduction to 802. Path loss models.C. Diversity techniques. Mullet: Thomson Learning 2006. wireless coding techniques. Mobile Cellular Telecommunication. Communication Channels. Measure of information.Wireless Modulation techniques and Hardware. Characteristics of air interface. OFDM. 3. 70 . 2.1 INFORMATION THEORY: Introduction.16X technologies. UNIT . Average information content of symbols in long independent sequences. Digital modulation techniques. Shannon’s encoding algorithm. Cambridge 2005. Entropy and information rate of mark-off source. TEXT BOOK: 1. Continuous channels. Typical GSM Hardware. of Lecture Hrs.8 Introduction to wireless LAN 802. UWB radio techniques. 802. Fundamentals of Wireless Communication. of Lecture Hrs/Week : 04 Total no. Lee W. 2nd. MGH. REFERENCE BOOKS: 1. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Pramod Viswanath.11X technologies.
Digital Communications . Discrete memory less Channels. 2003. examples. Shortened cyclic codes. Syndrome calculation. Channel Capacity. Digital communication. 1996.5 INTRODUCTION TO ERROR CONTROL CODING: Introduction.4 Channel coding theorem. Sam Shanmugam. UNIT . Burst and Random Error correcting codes.8 Convolution Codes. Channel capacity Theorem. 2nd Ed 2008 71 . Encoding using an (n-k) bit shift register. Mutual information.7 RS codes. II edition.3 FUNDAMENTAL LIMITS ON PERFORMANCE: Source coding theorem. Types of errors. ITC and Cryptography. K. Simon Haykin. Error detection and correction. Algebraic structures of cyclic codes. Transform domain approa TEXT BOOKS: 1. 2007 2. Time domain approach. 2. Huffman coding. Differential entropy and mutual information for continuous ensembles. Pearson Ed.Glover and Grant. John Wiley.UNIT . BCH codes. Golay codes. REFERENCE BOOKS: 1. Burst error correcting codes. Types of codes Linear Block Codes: Matrix description. UNIT . UNIT . Digital and analog communication systems. TMH. Ranjan Bose. UNIT . UNIT . John Wiley.6 Binary Cycle Codes. Standard arrays and table look up for decoding.
Examples of distributed systems.1 CHARACTERIZATION OF DISTRIBUTED SYSTEMS: Introduction.7 72 . Architectural models. Global states. External data representation and marshalling. Synchronizing physical clocks. UNIT . UNIT . Clocks. Clint-server communication.6 TIME & GLOBAL STATES: Introduction. Communication between distributed objects. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . The API for the internet protocols.2 SYSTEM MODELS: Introduction.4 DISTRIBUTED OBJECTS AND REMOTE INVOCATION: Introduction. UNIT . UNIT . Remote procedure call. Events and notifications. UNIT . Group communication. Distributed debugging. Challenges.3 INTERPROCESS COMMUNICATION: Introduction. Resource sharing and the web. Cryptography progrmatics. Process states.ELECTIVE –4 (GROUP D) DISTRIBUTED SYSTEM Subject Code : 10EC831 No. of Lecture Hrs/Week : 04 Total no. Fundamental mode. Events.5 SECURITY: Introduction. Digital signature. UNIT . Overview of security technique cryptographic algorithms. of Lecture Hrs.
COORDINATION AND AGREEMENT: Distributed mutual exclusion. Kay Romer. The strength of DES. Hash Functions.2 SYMMETRIC CIPHERS: Symmetric Cipher Model. a Middleware Approach” Arno puder. Concepts & Design”. “Distributed Systems. UNIT . Elliptic Curve Arithmetic. A model for network security. NETWORK SECURITY Subject Code : 10EC832 No. The RSA algorithm. 2006. CORBA RMI. CORBA Services. Tim Kindberg. Diffie . Jeam Dollimore. TEXT BOOK: 1. Multicast communication. Block Cipher Design Principles and Modes of Operation. Key Management. Transposition Techniques. George Coulouris. REFERENCE BOOK: 1. 73 .Hellman Key Exchange. Evaluation Criteria for Advanced Encryption Standard. Frank Pilhofer. Differential and Linear Cryptanalysis. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . of Lecture Hrs/Week : 04 Total no. Authentication functions. Pearson education. Simplified DES.1 Services. UNIT . fourth edition. Data encryption standard (DES). Substitution Techniques. of Lecture Hrs. Morgan Kaufmann publishers. UNIT . mechanisms and attacks. The AES Cipher. “Distributed System Architecture.8 CORBA CASE STUDY: Introduction. The OSI security architecture.3 Principles of Public-Key Cryptasystems. Elections.
UNIT . : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . TMH. Cryptography and Network Security.1 INTRODUCTION TO OPTICAL NETWORKS: Telecommunication networks. Digital Signature Standard. Authentication Protocols. of Lecture Hrs. 2003. 2. UNIT . Forouzan. Atul Kahate. Trusted Systems. TEXT BOOK: 1.7 MALICIOUS SOFTWARE: Countermeasures. Solitons. OPTICAL NETWORKS Subject Code : 10EC833 No. of Lecture Hrs/Week : 04 Total no. Second generation optical networks.8 Firewalls Design Principles.5 Web Security Consideration. Cryptography and Network Security.4 Digital signatures. Non linear effects SPM. TMH. System and network evolution.6 Intruders. Behrouz A. First generation optical networks. Secure Electronic Transaction. 2003. 2007. Virus UNIT . Multiplexing techniques. CPM. REFERENCE BOOKS: 1. Password Management. Cryptography and Network Security. four wave mixing. Intrusion Detection. Security socket layer (SSL) and Transport layer security. 74 . UNIT . Pearson Education. William Stalling.UNIT . Viruses and Related Threats.
UNIT . fault management. receiver. UNIT . Photonic packet switching. Multiplexing and demultiplexing Synchronisation. Transmitter. Computer interconnects. Network design and operation. UNIT . isolators and Circulators. Node design. an ILP formulation. Dispersion. Mans. Optical networks: A practical perspective Kumar Sivarajan and Rajiv Ramaswamy: Morgan Kauffman 1998. present and future access networks. Crosstalk. FTTC.6 WAVELENGTH ROUTING NETWORKS: Optical layer. Multiplexes and filters Optical amplifiers. TEXT BOOK: 1. optical amplifiers. Switches.2 COMPONENTS: Couplers. Network management configuration management.5 FIRST GENERATION NETWORKS: SONET/SDH. 75 .UNIT .8 ACCESS NETWORKS: Network architecture overview. Overall design Consideration. Performance management.4 TRANSMISSION SYSTEM ENGINEERING: System model.3 Transmitters. Combines SONET/WDM network design. Regular virtual topologies. OTDM. Power penalty. UNIT . UNIT . HFC. Layered architecture for SONET and second generation networks. UNIT .7 VIRTUAL TOPOLOGY DESIGN: Virtual topology design problem. Optical access networks Deployment considerations. Wavelength converters. Control and management. detectors. routing and wavelength assignment architectural variations.
1 History of Communication Networks. TCP and UDP. High performance networks. Optical Networks. UNIT . : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . SMTP. Wireless networks today.3 INTERNET AND TCP/IP NETWORKS: Multicast IP. signaling and Routing. UNIT . Network Elements. ATM AAL. Network design. Internet success and limitations. of Lecture Hrs/Week : 04 Total no. Channel Access.5 ATM: Main features of ATM. Network architectures. UNIT . UNIT . Applications. ad hoc networks. Traffic characterization and quality of services..2 NETWORK SERVICES AND LAYERED ARCHITECTURE: Applications. Mobile IP. DSL. Intelligent networks CATV. High speed Digital cellular. Network services. Performance of circuit switched networks. 2. Pure TAM Network. 76 . DWDM. Future networks. of Lecture Hrs. Network bottlenecks.6 WIRELESS NETWORKS: Link level design. Networking principles. HIGH PERFORMANCE COMPUTER NETWORKS Subject Code : 10EC834 No. ATM header structure. Home RF and Bluetooth. Optical Communication Networks: Biswajit Mukherjee: TMG 1998.REFERENCE BOOKS: 1. Open data network model. Layered applications. FTH. Internetworking with ATM. Wireless. Cable Network. Future networks Internet. UNIT . Ulysees Black: Pearson education 2007.4 SONET. Performance of TCP/IP Networks. Addressing. FTP.
High-Speed Networks and Internet: Performance and Quality of service. of Lecture Hrs/Week : 04 Total no.8 OPTICAL NETWORKS: WDM systems. Tere Parnell. NETWORK REFERENCE MODEL: Layered architecture. Derived demand for network services. Protocol entity specification. subscriber demand model. Interface specifications. of Lecture Hrs. and communication protocol: Representation. 2001. Objectives and methods of control. TMGH. Network services and interfaces. Optical LANs. Datagram Networks Network economics. Protocol engineering process.2 PROTOCOL SPECIFICATION: Communication service specification. Optical cross connects. TEXT BOOK: 1. 2. High Performance Communication Networks. Optical paths and networks. Building High-Speed Networks. Application protocols. Empirical model. 2000. Circuit switched networks.. REFFRENCE BOOKS: 1. TCP/IP protocol suite. William Stallings. Interactions. Warland and Varaiya: Morgan Kauffman/ Elsivier 2nd Edition 2000. OSI model.1 INTRODUCTION: Communication model. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . Communication software. protocol functions. Pearson Edu. INTERNET ENGINEERING Subject Code : 10EC835 No. ISPs.7 Control of networks. Multimedia protocol specifications. Development methods. UNIT .UNIT . UNIT . Internet protocol specifications. 77 .
interactive synthesis algorithms. REFERENCES BOOKS: 1. P. Manvi. ELECTIVE –5 (GROUP E) 78 .5 Protocol validation. 2006. UNIT . SDL based interoperability testing of CSMA/CD and CSMA/CA protocol using bridge. SDL based protocol validation. Protocol verification.UNIT . Conformance testing with TTCN.7 PROTOCOL PERFORMANCE TESTING: SDL based performance testing of TCP. UNIT . Conformance testing of RIP. Adrian Farrel. 2006. Test sequence generation methods. automatic synthesis algorithm. S. Distribute architecture by local methods. 2004. and protocol validation approaches. Conformance test architectures. Scalability testing. 2. UNIT . TCP/IP Protocol Stack. Elsevier.6 PROTOCOL CONFORMANCE TESTING: Conformance testing methodology and framework. SDL based protocol verification. SDL based tools for conformance testing. UNIT . B A Forouzan. Interoperability testing. Multimedia applications testing. PHI. Protocol design errors. Venkatarm and S. Verification of a protocol using finite state machines.3 SPECIFICATION AND DESCRIPTION LANGUAGE (SDL): A protocol specification language: SDL. The Internet and its Protocols. TMH. automatic synthesis of SDL from MSC protocol re synthesis. Communication Protocol Engineering.8 PROTOCOL SYNTHESIS: Synthesis methods. TEXT BOOK: 1.4 Examples of SDL based protocol specifications. Other protocol specification languages. Protocol Verification And Validation. UNIT . OSPF.
6 THE INTERNET: Introduction. H. ARP and RARP.8 79 . Token ring. ADPCM. of Lecture Hrs. APC. video. UNIT . Cell format. UNIT . UNIT . multipoint conferencing. Fragmentation. UNIT . network QoS application QoS. Bridges. video compression. multimedia information representation. audio. of Lecture Hrs/Week : 04 Total no. multimedia networks. H. images. network types. and MPEG-4. MPEG-1. multimedia applications. IP Datagrams. FDDI High-speed LANs. LAN protocol. media types. LPC. digital principles.263. text compression. video compression principles. compression principles.7 BROADBAND ATM NETWORKS: Introduction. Ethernet. UNIT . text. DPCM. communication modes. audio compression.5 MULTIMEDIA INFORMATION NETWORKS: Introduction. UNIT . Switfh and Protocol Architecture ATM LANs. IP Address. UNIT . MPEG.2 MULTIMEDIA INFORMATION REPRESENTATION: Introduction. QoS Support. image compression. MPEG-2.3 TEXT AND IMAGE COMPRESSION: Introduction. LANs.MULTIMEDIA COMMUNICATIONS Subject Code : 10EC841 No.261.4 AUDIO AND VIDEO COMPRESSION: Introduction.1 MULTIMEDIA COMMUNICATIONS: Introduction. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . IPv8.
Media Coding and Content Processing”. Networks. PHI. 2. Multimedia Communications: Applications. 80 . Pearson Education. TCP/IP. Multimedia Information Networking. REFERENCE BOOKS: 1. Prabhat K. RTP and RTCP. Sharda. 2004. UDP.TRANSPORT PROTOCOL: Introduction. 2004. Nalin K. Pearson Education. Second Indian reprint 2002. Protocols and Standards. TEXT BOOK: 1. TCP. “Multimedia Systems Design”. Kiran Thakrar. Ralf Steinmetz. Klara Narstedt. PHI. “Multimedia Fundamentals: Vol 1 . 3. 2003. Fred Halsall. Andleigh. Asia.
6 DESIGN ANALYSIS: Introduction. centralized. hardware requirement for real time applications. Example of Creating and RTOS based on modula 2 kernel. Rendezvous. Real Time Vs General Purpose Databases. review of data types. Inter task Communication and Control. monitors. MASXOT. Preliminary Design. Analysis of Petri Nets.4 Introduction to Design of Real Time Systems. of Lecture Hrs/Week : 04 Total no. specialized processors. HATLEY & Pribhai method. 81 .3 REAL TIME OPERATING SYSTEMS: (PSOS+Vx WORKS). Real Time Clock Handler. Methodology. Code sharing. UNIT . PAISLEY System. UNIT . Disk Scheduling Algorithms. Scheduling strategies. Petrinets. sequence. priority structures. Practical Real Time Operating Systems. Specification. Scheduling problem Real Time Database. exception handling. interfaces. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . multitasking Approach. corountines. UNIT . of Lecture Hrs. Ward and Mellor Method. hierarchical and distributed systems. low-level facilities. Maintaining Serialization Consistency. loop and supervisor control. Human Computer interface. Resource Control. Concurrency Control. Transaction priorities and Aborts. UNIT . concurrency.5 DEVELOPMENT METHODOLOGIES: Yourdon. Task management.2 Special features of languages for real time application.REAL TIME OPERATING SYSTEMS Subject Code : 10EC842 No. Overview of Real time languages.1 DEFINITION AND CLASSIFICATION OF REAL TIME SYSTEMS: Concept of computer control. communications. UNIT . modula 2 and Ada as a Real Time Languages.
Parameters. 2005. 2008. Real-Time Systems Design and Analysis. Detection and Containment. Laplante.7 FAULT TOLERANCE TECHNIQUES: Introduction. S. 2. Raj Kamal. 82 . second edition. 3. Phillip. Real Time Systems. Pearson education. C. 1997. Fault types. Reliability Models for Hardware. Krishna. India. M. REFERENCE BOOKS: 1.UNIT . W. Real Time Systems. India. Tata Mc Graw Hill.8 RELIABILITY EVALUATION: Introduction. Software Error Models. Shin. UNIT . Mc Graw Hill. 2005. Faults. Liu. Embedded Systems. A. G. Redundancy. Errors and Failures. Integrated Failure Handling. Kang. PHI. Jane. TEXT BOOK: 1.
: 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . GSM PLMN services. GSM bursts. GSM Subsystems. AND CALL FLOWS IN GSM: Introduction. GSM frame structure. Quality. GSM Subsystems entities. Delay. Smart antenna.2 RADIO LINK FEATURES IN GSM SYSTEMS: Introduction. GSM interfaces. Discontinuous transmission (DTX). of Lecture Hrs/Week : 04 Total no. Vocoders. GSM logical channels. Frequency domain waveform coding. Allowed logical channel combinations. MESSAGES. Transmission bit rate.GSM Subject Code : 10EC843 No. Speech code attributes. ITU-T standards. Future techniques to reduce interface in GSM. SFH. SERVICES. LPAS.1 GSM ARCHITECTURE AND INTERFACES: Introduction. TCH multi frame for TCH/H. GSM frequency bands. GSM PLMN Services. Waveform coding. Complexity. Access burst. Radio link features of GSM. The radio interface (MS to BSC). 83 . Time domain waveform coding. Interfaces between other GSM entities. Abits interface (BTS to BSC). A interface (BSC to MSC). Mobility management. Full-rate vocoder. Mapping of GSM layers onto OSI layers. Speech coding methods. UNIT . GSM PLMN. Synchronization burst.4 SPEECH CODING IN GSM: Introduction. Normal burst. UNIT . Data encryption in GSM. Frequency correction channel burst. Half-rate vocoder. CCH multi frame. Location registration. Objectives of a GSM PLMN.3 GSM LOGICAL CHANNELS AND FRAME STRUCTURE: Introduction. Mobile identification. Bit rate. Radio link measurements. UNIT . Dynamic power control. of Lecture Hrs. Channel borrowing.
Authentication requirements. TMN nodes. TMN layers. UNIT . GSM call setup by an MS. Token-based authentication. Constraints for hardware implementation. TEXT BOOK: 84 . OSI systems management. MSC to VLR and HLR. MS-BS interface. Token-based registration. Platform-centered management. Interconnection for switched data. TMN. User-to-user signaling. GSM information model. Mobility in cellular / PCS networks. Physical requirements. Design example for a GSM system. Design of a wireless system. Selection of modulation scheme. Personal mobility management. OMC functionality. GSM data services. TMN interface. Data services. Wireless security requirements. Privacy of communications.8 MANAGEMENT OF GSM NETWORKS: Introduction. Mobile-Terminated call. Topology model. Service mobility management. NMS functionality. Planning of a wireless network. SMS. Future work items. BS to MSC messages on the A interface.6 PRIVACY AND SECURITY IN GSM: Introduction. Radio design for a cellular / PCS network. Handover. Application of a fluid flow model. Tele traffic models. UNIT . GSM GPRS. SIM cards. SNMP. Management of GSM network. Relationship between delay spread and symbol rate.UNIT . Data interworking. Introduction. Coverage planning. Group 3 fax. Traditional approaches to NM. System lifetime requirements. Radio link design. TMN management services. Management requirements for wireless networks. UNIT .5 GSM messages.7 PLANNING AND DESIGN OF A GSM WIRELESS NETWORK: Introduction. GSM containment tree. Call release. Security algorithms for GSM. Service requirements. Packet data on the signaling channel. TMN applications. Terminal mobility. Receiver sensitivity and link budget. NM interface and functionality. System requirements. Call model. Management of radio resources. Propagation path loss. Design of TDMA frame. Token-based challenge. Spectral efficiency of a wireless system.
Friedhelm Hillebrand. Design goals of a MAC protocol for Ad hoc wireless Networks.5 Hybrid routing protocol. Issues in designing a routing protocol for Ad hoc wireless Networks. Pearson education/ PHI. Wilkes. 85 . UNIT . UNIT . 1999. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . GSM: Evolution towards 3rd Generation Systems. 1st edition 1998 2.4 ROUTING PROTOCOLS FOR AD HOC WIRELESS NETWORKS: Introduction. 2001. John Wiley & Sons. UNIT . REFERENCE BOOKS: 1. Karl Kammerlander Springer. Table drive routing protocol. Contention based protocols with reservation mechanisms.2 MAC PROTOCOLS FOR AD HOC WIRELESS NETWORKS: Introduction. Power aware routing protocols. Vijay K.1. On-demand routing protocol. “Principles of Applications of GSM”. of Lecture Hrs/Week : 04 Total no. Garg & Joseph E.3 Contention . Hierarchical routing protocols. GSM & UMTS: The Creation of Global Mobile Communication. Other MAC protocols. ADHOC WIRELESS NETWORKS Subject Code : 10EC844 No. UNIT . Ad hoc wireless internet. Routing protocols with effective flooding mechanisms. (Editor). Issues in designing a MAC protocol for Ad hoc wireless Networks. Classification of routing protocols. of Lecture Hrs. MAC protocols that use directional antennas. Issues in Ad hoc wireless networks.based MAC protocols with scheduling mechanism. Classification of MAC protocols.1 AD HOC NETWORKS: Introduction. Z. Zvonar Peter Jung.
TCP over Ad hoc wireless Networks. Xiuzhen Cheng. MAC layer solutions. DingZhu Du. : 52 IA Marks Exam Hours Exam Marks : 25 : 03 : 100 UNIT . TEXT BOOK: 1. Issues in designing a transport layer protocol for Ad hoc wireless Networks.8 QUALITY OF SERVICE IN AD HOC WIRELESS NETWORKS: Introduction. Tonguz and Gianguigi Ferrari. REFERENCE BOOKS: 1.7 SECURITY: Security in wireless Ad hoc wireless Networks. Siva Ram Murthy & B. basic diffraction 86 .1 MATHEMATICAL AND DIGITAL IMAGE FUNDAMENTALS: Introduction. “Ad hoc wireless Networks”. Key management. network layer solutions. Other transport layer protocols for Ad hoc wireless Networks. Manoj. Xiao Hung. 2nd Edition. reprint 2005.6 TRANSPORT LAYER PROTOCOLS FOR AD HOC WIRELESS NETWORKS: Introduction. discrete Fourier transform. Classification of QoS solutions. Pearson Education. Ozan K. Fourier Transform. Network security requirements. Kluwer Academic publishers. of Lecture Hrs/Week : 04 Total no. Issues & challenges in security provisioning. Secure routing in Ad hoc wireless Networks. C. OPTICAL COMPUTING Subject Code : 10EC845 No.UNIT . S. Wiley 2. Classification of transport layer solutions. Network security attacks. Design goals of a transport layer protocol for Ad hoc wireless Networks. UNIT . UNIT . “Ad hoc wireless Networks”. Issues and challenges in providing QoS in Ad hoc wireless Networks. “Ad hoc wireless Networking”. of Lecture Hrs.
Nonlinear devices. Arithmetic operations.6 SHADOW-CASTING AND SYMBOLIC SUBSTITUTION: Introduction. Programmable logic array. Integrated optics.7 OPTICAL MATRIX PROCESSING: Introduction. image restoration.3 ANALOG OPTICAL ARITHMETIC: Introduction. Symbolic substitutions. Deblurring. Matched filter. UNIT . Threshold devices. Theta modulation devices. UNIT . sampling and quantization. UNIT . POSC logic operations. Phase-only filter. Amplitude modulated recognition filters. Associative memory. Multiplication. Neural networks.4 RECOGNITION USING ANALOG OPTICAL SYSTEMS: Introduction. Limitations and challenges. inverse filtering. Joint transform correlation. spatial filtering using binary filters.2 LINER OPTICAL PROCESSING: Introduction. Cellular logic architecture. Fourier transform property of lens . Melllin transform based correlation. Shadow casting system and design algorithm. photographic film. Interconnections. Multiplication using convolution. UNIT . Sequential ALU using POSC. holography. UNIT . Artificial Intelligence. Optical implementation of symbolic substitution.5 DIGITAL OPTICAL COMPUTING DEVICES: Introduction.theory. Halftone processing. UNIT . Parallel ALU using POSC. POSC multiprocessor. Spatial high modulators. nonlinear optical processing. Optical implementations. Generalized correlation filter. Matrix operations. TEXT BOOK: 87 . image enhancement. POSC image processing.8 ARTIFICIAL INTELLIGENT COMPUTATIONS: Introduction. UNIT .
Bradly G Boore Oxford University Press 1998. 1992.1. Signal Processing in Optics . Optical Signal Processing by Vanderlugnt John willy & sons NY 1992. 2. Karim. Mohammed A. 88 . “Optical Computing An Introduction”. John Wiley & Sons. REFERENCE BOOKS: 1.
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