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EE391 – Special Studies in Electrical Engineering 1

Current Programmed Control of 4-Switch


Synchronous Buck-Boost DC-DC Converter
Mahmoud Saadat, Student Member, IEEE

for portable application since switches and control circuit can


Abstract— Control design is a challenging step in the design be integrated into a single CMOS chip.
process of 4-Switch Synchronous Buck-Boost DC-DC Converter. Control is invariably required in DC-DC converters. It is
While it is possible to design the controller without sensing nearly always desired to produce a well-regulated output
current, with only output voltage information in voltage mode, voltage, in the presence of variation in the input voltage and
short-circuit protection and increasingly stringent performance load current. Figure 1 depicts a general block diagram of a
requirements force designers to include a current-sensing
closed loop converter using voltage mode control. As can be
function to find practical solutions. In this project, an extensive
analysis of 4-switch DC-DC converter is presented. After an seen in this figure, in voltage mode control the output voltage
overview of voltage-mode control, detailed steps of current- is compared to a reference value to produce the error signal.
programmed control are presented. Simulation results verify our The error signal then feeds into a compensator which makes
modeling results as well as give practical design considerations the loop stable and guarantees the large loop gain at low
for circuit level implementation. frequencies and desired phase and gain margin. The
compensated error will be the duty cycle of the PWM and
Index Terms— DC-DC power conversion, Current mode eventually drives the gate of four switches.
control, Buck-Boost converter, Usually, the most challenging block of this scheme is found
to be the compensator. Variations in the load impedance as
well as input voltage change the quality of control loop.
I. INTRODUCTION Therefore, care should be taken in design of compensator so
that the desired specifications will be met in all different
S WITCHING converter is the key element of power
electronics which can process the raw input power as
specified by the control input and yields the conditioned
circumstances.
On the other hand, current-mode control is very popular in
output power. In a DC/DC converter, the DC input voltage is switching power converters due to its important advantages.
converted to a DC output voltage having a larger or smaller Current-mode control remains a single pole system regardless
magnitude, possibly with opposite polarity or with isolation of of conduction mode (continuous-mode or discontinuous) and
the input and output ground references. The power level also peak current limiting for protection can be achieved by
encountered in such switching converters range from less than clamping the error signal.
one watt in battery operated portable equipments to kilowatts
and Megawatts in variable speed motor drives. In this work, II. ANALYSIS OF OPEN LOOP CONVERTER
we have focused on buck-boost non-inverting DC-DC A. Basic Operation and Steady-State Waveforms
converter which has the capability of producing both larger
and smaller output voltage than input voltage with the same Before going to dynamic behavior of the converter and
polarity. control design, we discuss the steady-state and DC response
One of the most popular configurations of buck-boost of the open loop converter. Fig. 1 shows the schematics of
converters is single switch converter which employs only one open loop circuit of 4-switch buck-boost converter. The gate
switch and single inductor but is inverting and so the polarity control signals which drive the gate of switches are shown in
of the output voltage is opposite to the input voltage. This figure 2.
drawback limits the application of single switch converters. In
some application this problem can be resolved by simply
changing the polarity of the supply voltage connection at the
input port of converter but in this case the same battery cannot
be used for other sub-circuits.
The solution to this problem is four switch buck-boost
converters which are essentially a cascade combination of a
buck and then a boost converter. This topology is very useful

M. Saadat is pursuing his M.Sc. degree in Electrical Engineering


Department of Stanford University, Stanford, CA 94305 USA (e-mail: Fig. 1. Schematics of open-loop converter
mahmoud@ Stanford.edu).
EE391 – Special Studies in Electrical Engineering 2

Fig. 2. Gate control signals of converter shown in fig 1. Fig. 4. Equivalent circuit during t 

During ton, switches PMOS1 and NMOS1 are on whereas


NMOS2 and PMOS2 are off. In this case, as can be seen in B. Converter Dynamics
Fig 3, inductor is charged by input voltage source and stored As we discussed before, DC-DC converters require
current in inductor boosts up. On the other hand capacitor feedback loop to provide a regulated output voltage in spite of
functions as a battery and provides the output node with load variations in load current and input voltage. In addition, like
current. Pulling out current from capacitor leads to decrease in many other closed-loop systems, the feedback system should
its stored voltage and hence the output voltage. be stable, and properties such as transient overshoot, settling
time, and steady-state regulation should meet specification.
To design such a feedback system, we need a dynamic
model of our converter and figure out how the output of the
converter responses to variations in the power input voltage,
load current, and the duty cycle. To simplify this modeling
problem, we assume that the converter operates in continuous
conduction mode (CCM). Analyzing the converter in
discontinuous conduction mode (DCM) adds insignificant
details to this problem which are not crucial to first order in
our analysis.
The key step in finding converter dynamic behavior is to
Fig. 3. Equivalent circuit during t 
average the converter waveforms over one switching period.
This removes the switching harmonics, thereby exposing
During toff, switches PMOS2 and NMOS2 are on while directly the desired DC (low-frequency) and ac components
PMOS1 and NMOS1 are off. As depicted in Fig. 4, in this of the waveforms. In this methodology, we focus on averaged
case, stored current in inductor flows to both capacitor and voltages and currents over one switching period instead of
load and so provides load with current along with recharging working with accurate time domain signals. Since in most
the capacitor for the next cycle. Since the capacitor is cases the converter designed in such a way so that the
charging with inductor current, the output voltage goes up switching ripple is very small, this methodology results in a
while the inductor current goes down. very good approximation of the actual signals of the
converter.
In equilibrium, i.e. after passing the initial transient and any Since switching converters are nonlinear systems, analysis
possible change in input voltage, load current, and duty cycle, is done about a quiescent operating point. This method is very
the average voltage applied to inductor must be zero. This fact
well known in circuit theory as small-signal analysis and the
can be employed to calculate the DC voltage at the output
basic idea behind it is so called perturbing and linearizing. In
node in our circuit.
this analysis, all of the voltages and currents are decomposed
in two components, DC (low-frequency) component and ac
variation.
So far, we have discussed several key points in analyzing
the switching converter which are common in all of the
approaches to some extent. In this report, given these key
ideas, we applied the circuit averaging and averaged switch
modeling technique to analyze our converter.

Circuit Averaging
EE391 – Special Studies in Electrical Engineering 3

Circuit averaging is a well-known technique in derivation


of converter equivalent circuits. In this technique, all analysis Therefore two open loop transfer functions can be defined as:

 
 

and manipulations are accomplished on the circuit diagram,


 
| and  
|

  

instead of on its equations, and therefore gives a more
physical insight to the model. Circuit averaging is easy to
apply and can be used to analyze various types of converters
either in CCM or DCM. Neglecting the effect of on-resistance of switches simplifies

transfer functions for  


and  
:
The first step in circuit averaging is to decompose the the equations for transfer functions and leads to following
circuit to switch network(s) containing the converter
switching elements and a time-invariant network, containing
   !"  1 -
 

the reactive and other remaining elements. This step is done

 
 "$ %$ () ,
,
"'   !*  1
in our case and Fig. 5 displays the resulted network.

%$ &
 &! +
Switch Switch
Network 1 Network 2
Vin L Vout

 -
Rc

"
1   !"
1 1 2 ,
Iload Rload
 %$. ,
C
.
./0 &  3

 () +
 

 "$ &
 " ' %$   !*  1
%$  ()
d(t)

&!
Fig. 5. Converter can be divided to switch networks, shown inside the dashed
boxes, and time-invariant elements displayed in red.
However, simulation results show that on-resistance of
The next step is to find a DC and small-signal ac averaged switches greatly affect the open-loop response; specially the
circuit model of two switch networks annotated in Fig. 5. DC gain of converter and damping factor of the response at
Since switch network is inherently nonlinear, perturbation and the output terminal. Including the effect of on-resistance of
linearization should be applied to find the desired model. The switches gives us the more accurate transfer functions. The
detail of this analysis for several types of switch networks is accurate line to output transfer function is found to be:

 -
discussed in [1]. Fig 6 demonstrates the schematic of the

 

4 56 789:
 ,
converter after substituting switch networks with their
4% ?
A=>< B6 @A<BCD @
;<
averaged model. In this model, variables in lowercase refer to
BEFGC
98H I9:
 +
=>< <BCD <BCD
ac small-signal variation whereas variables in uppercase refer
A =>< A
?@ BEFGC BEFGC
to DC operating point values. The resulted model helps in
analyzing DC characteristics of the converter as well as ac
small-signal analysis. And using the same model, we can find the more accurate
transfer function for control (duty-cycle) to output transfer
function:

./0 2L  () 3()


 
J1 2 '1  *M 1
 % ()  %$ .

Q V
O  " -O
O1   !"
1 
12
%$ . 2L ,,O
O 2 O
O .  () O
&   3()

Fig. 6. DC and ac small-signal model of 4-switch buck-boost DC-DC

 +
converter.
()
P & U
"$ %$ !  2L !
O () O
 " R S  1
Converter Transfer Functions

O%$ 2L 2L O


O &!  ()  
Having the small-signal circuit of the converter, we can

O
%$
()
define and calculate several transfer functions of the
O O
converter. In particular, we are interested in control-to-output
N T
and line-to-output transfer functions. In fact, the ac output
voltage variations can be expressed as the superposition of
terms arising from variations in control input and the line Right Half-plane Zero
input. We have observed that the control-to-output transfer
Based on notation used in Fig 6, this relation can be expressed functions of the buck-boost converter exhibits RHP zero. The
 
 

  
 

as: presence of RHP zero tends to destabilize wide-bandwidth


EE391 – Special Studies in Electrical Engineering 4

feedback loops, because during a transient the output initially


changes in the wrong direction.
The reason behind this effect can be explained by revisiting
equivalent circuits during on-state and off-state. If we increase
the duty cycle, the off-state will become shorter and before
the inductor charges to a higher value, the shorter off-time
leads to a smaller increase in the capacitor charge which is
equivalent to a relative drop in the output voltage. Eventually,
this initial decrement at the output voltage will be
compensated when inductor current increases to its new value.

C. Simulation of Open loop Converter


Model verification is an indispensable step in almost any
engineering design process. In control design for switching
converters, this step is crucial because the model might have
systematic discrepancies from actual system due to various
approximations and sources of nonlinearity in the system. To
ease model verification step in this project, a set of open loop
simulations has been added to I-Converter which allows the Fig. 8 (a). Model verification of control-to-output transfer function: Top: Step
user to compare the actual converter’s behavior with those response of the output voltage when a small (2% change) is applied in duty
cycle input.
predicted by models.
Instead of comparing the transfer functions of converter in
S-domain, we compare their corresponding step responses
which are easier to derive when using a simulation tool such
as Simulink. Fig 7 shows the block diagram of a simulation
set up for calculating the control-to-output transfer function.
In this configuration, feedback loop is open and a small step is
applied at control (duty cycle) input. The variation at the
output node of the converter is the step response
corresponding to control-to-output transfer function.

Fig. 8 (b) Model verification of control-to-output transfer function: Step


response of the output voltage when a small (20% change) is applied in duty
cycle input.

III. VOLTAGE MODE CONTROL


As we discussed before, control is essential in all switching
converters. It is desired to obtain a constant output voltage in
Fig. 7. Simulation set up to find control-to-output step response.
spite of disturbances in input voltage, load current, and also
Results of model verification for control-to-output transfer converter circuit elements. For example, in a typical Li-Ion
function are shown in Fig 8. As can be seen in this figure, battery operated device, the input DC voltage provided by
when the amplitude of applied step is small enough, the battery might vary from about 4.5V (when the battery is fully
model predicts the actual behavior very accurately. This fact charged) to 1.8V (when the battery is almost discharged) and
is consistent with the condition of small-signal analysis. the output voltage should be regulated around its desired
The same methodology can be applied to verify the line-to- value during this variation, for example 3.3V. The load
output transfer function. Fig 9 depicts the result of model current might have large variation if we think of standby
verification process for line-to-output transfer function. Since mode versus full-load operation of the device. The values of
the output of the converter has a more linear behavior with the circuit elements are constructed to a certain tolerance, and
respect to input voltage than duty cycle, the resulted model particularly in high-volume manufacturing of a converter,
predicts the actual behavior very well when a fairly large
signal step (1 Volt amplitude) is applied at the input voltage.
EE391 – Special Studies in Electrical Engineering 5

Fig 10. Block diagram of a closed-loop converter employing continuous-time


voltage-mode control.

Essentially, compensator design can be done either in


Fig. 9. Model verification of line-to-output transfer function: Step response
of the output voltage when a 1-Volt step is applied at input voltage. continuous-time or discrete-time. Continuous time control is
the most common method has been commercialized. The
process variations also affect circuit parameters. Considering basic idea in continuous-time compensator design is pole-zero
all these non-idealities, we cannot expect to simply set the cancellation and phase equalization in S-domain.
DC-DC converter duty cycle to a single value, and obtain a Implementation of continuous-time control is accomplished
given constant output voltage under all conditions. using well-known opamp networks and passive components
The solution to this problem is negative feedback and the (resistors and capacitors). The major drawback in the
idea behind that is to build a circuit which automatically continuous-time implementation is the large spread in the
adjusts the duty cycle as necessary to obtain the desired value of capacitors and resistors which make the circuit
output voltage with high accuracy, regardless of disturbances difficult to be integrated with other components in the same
in input voltage and load current and variations in component die. Many of the commercial products in the market suffer
values. from various off-chip passive components which are
A block diagram of such a negative feedback system, necessary for proper functionality of the compensator
referred to as voltage-mode control (or duty-cycle control), is network.
shown in Fig 10. In this method, as can be seen in the Details of voltage-mode control and compensator design is
diagram, the output voltage is sensed and then compared with well documented and is not focus of this work. In the rest of
a reference input voltage to produce the error signal. If the this section, we present the designed compensator and result
feedback system works perfectly, the error signal is zero. In of continuous-time control of our converter before going
practice, the error signal is nonzero but nonetheless small. through current-programmed mode control.
This error signal is then fed to the loop compensator which Fig 11 displays the schematic diagram of type-III
guarantees the large DC gain of the loop (i.e. small static error compensator network. This compensator network gives the
in the output voltage), benign transient behavior, and stability overall loop gain with the bode plot shown in Fig. 12.
of the loop.
Usually, the most challenging block of this scheme is found
to be the compensator. Variations in the load impedance as
well as input voltage change the quality of control loop.
Therefore, care should be taken in design of compensator so
that the desired specifications will be met in all different
circumstances.

Fig 11.Schematic diagram of type-III compensator network


EE391 – Special Studies in Electrical Engineering 6

(the control signal) and make the loop stable, and a digital
pulse-width modulator (DPWM) that generates a pulsating
waveform to control switches in the converter with calculated
duty cycle. The DPWM block resembles digital to analog
converter in the control loop. DPWM is the most power-
hungry block in the discrete-time controllers. The consumed
power is usually proportional to the product of switching
frequency and the resolution of the DPWM and thus limits the
maximum frequency at which DPWM controllers can be
effectively used.
The major drawback of digital control method is high
power consumption and hence although the advantages are
known, in low-power portable applications, high frequency
continuous-time control is preferred because exhibits
considerably lower power consumption, and consequently
provide significantly better overall efficiency.

IV. CURRENT PROGRAMMED CONTROL


So far, we have discussed voltage-mode control of our
converter, in which the output is controlled by direct choice of
the duty cycle of switches. Another control scheme, which
Fig 12. Bode plot of over loop-gain function for nominal values of input- finds wide applications, is current programmed control, in
output voltages. Type III compensator results in a gain margin of 20.6 dB and which the converter output voltage is controlled by choice of
phase margin of 72.6 deg as annotated in this figure.
the peak inductor current. The control input signal is a current
ic(t) which is a compensated version of the error signal at the
As we discussed before, discrete-time control is another
output of the converter. In this method, duty cycle is not
popular implementation of voltage-mode control and has been
directly controlled, but depends on ic(t) as well as on the
recently studied in the literature. In this case both loop
converter inductor current, output voltage, and input voltage.
analysis and compensator design is done in discrete-time The block diagram of a typical current programmed
domain using Z-transform. The implementation can be controller is illustrated in Fig. 16. Important waveforms of the
accomplished similar to many digitally controlled systems converter are shown in Fig 14. A clock pulse at the Set input
using A/D and D/A conversion. Digital control offers
of a latch initiates the switching cycle, causing the latch
advantages such as simple introduction of advanced control
output Q to be high and therefore turning on PMOS1 and
functions and power management techniques, use of NMOS1 and turning off PMOS2 and NMOS2. During this
automatic design tools for fast implementation, low sensitivity state, inductor current increases with some positive slope that
to external influences, and realization with a small number of depends on the input voltage and the inductance. The inductor
external components.
current, after adding with an artificial ramp, is compared to
the control current. Eventually, this current becomes equal to
the control signal ic(t). At this point, the output of comparator
resets the latch and therefore converter goes to off state until
next clock pulse occurs at the set input of latch. In practical
implementation, voltages proportional to inductor current and
control current are compared.
It can be shown that without adding the artificial ramp to
inductor current, the current programmed controller can be
unstable whenever the steady-state duty cycle is greater than
0.5. Details of oscillation and role of artificial ramp in solving
this problem are very well documented [1].
To analyze the closed-loop behavior of current
programmed controlled converter, first of all, we need to find
the transfer function from control input, ic(t) and input voltage
to the output. In this topology, indeed, the duty cycle is not
the signal which controls the output voltage, but because of
Fig 13. Block diagram of a digitally controlled converter the function of current programmed mode controller, duty
cycle is itself a function of the main control signal ic(t), input
Fig 13, demonstrates the block diagram of a digitally voltage, output voltage, and inductor currents. The amplitude
controlled buck-boost switching converter. The system has an of the artificial ramps also shows up as a constant in the
analog to digital converter (A/D) to sample the output voltage, average of the duty cycle.
a digital filter to determine the value of the switch duty cycle
EE391 – Special Studies in Electrical Engineering 7

The relationship between variables involved in the small-signal condition should be held in this case, we can
determination of duty cycle can be found by looking at the apply a small step at control input around some DC operating
waveforms shown in Fig. 14. According to this plot, the duty point and then observe the change in the output voltage. In
cycle depends on the intersection of stabilized control input fact, the verification of transfer function is done through step
and inductor current. response. The setup for this verification process is designed in
Assuming linear waveform for inductor current, the IConverter and has been integrated in open-loop simulations.
average of inductor current is related to the other variables

 $ \L  %$ \L
according to the following equation:
W XY 
Z W X 
Z 2[) \L 2 [: 2 [$
2 2
Where [) is the slope of artificial ramp and [: and [$ are
inductor current slopes and for our converter can be found


[: ,
from the following equations:

&

[$ ,
&
Solving equation (??) for duty cycle yields:

1 $ \L  %$ \L

_X 
2 XY 
2 [: 
2 [$ 
`
^) \L 2 2

And substituting the equations for [: and [$ in the

cycle and other converter variables, X 


, XY 
,  
,  

Fig 14 Waveforms of converter in current-programmed mode. The duty


previous equation gives us the relationship between duty cycle is determined by intersection of control input and inductor current.


ab cX 
2 XY 
2 a  
2 a  
d
and therefore can be expressed as:

Where ab , a , and a can be calculated from following


The control-to-output transfer function in current
programmed mode predicts that one pole is eliminated from

ab 1e^ \
equations: the duty cycle-to-output transfer function. Current
) L
programming does not alter the transfer function zeros and the

 $ \Le
dc gain become load dependent. The elimination of pole

a 2&
allows using a simpler compensator circuit for stability and
dynamic behavior considerations.

2%$ \Le
We conclude this section with simulation results of closed-
a 2&
loop converter employing current-programmed mode control.
The start-up waveform is illustrated in Fig 18.

The equation for duty cycle suggests a block diagram which,


indeed, models the current-programmed mode controller
block. This model can be added to the model of our open loop
converter to calculate the transfer functions from different
input signals to the others. Fig 17 illustrates the block diagram
of the current programmed mode controller and then whole
converter.
Using the block diagram representation of current
programmed controller shown in fig 17 we can find the
transfer functions from different input voltages or currents to
the output voltage or inductor current. Particularly, we are
interested in the transfer function from control input, ic(t), to

&
 %  f1 2 %$ g
the output voltage which is found to be:

 
 
!
1  
f1  g
1

(For simplicity of calculation, the on-resistance of switches Fig 15 Verification of control-to-output step response of a converter in
is neglected in finding this transfer function.) current programmed mode. Red curve is the waveform predicted from
Using the same approach as we applied to verify the duty modeling and black is the simulation results.
cycle-to-output and line-to-output transfer functions, we can
verify the control-to-output transfer function as well. Since
EE391 – Special Studies in Electrical Engineering 8

Fig 19 depicts the simulation results of the converter


employing current programmed mode control when input
voltage is changed abruptly. As it can be seen in these plots,
the transient behavior of the output of the converter as well as
inductor current have approximately a first order response to
the perturbation in load current or line voltage.

V. CONCLUSIONS
The current programmed mode control modeling, design
and simulation of a dynamic, noninverting, synchronous,
buck-boost converter is presented in this paper. Both
theoretical and simulation results proves that this method
result in a simpler dynamic behavior of converter than voltage
mode control and therefore eases the design of compensator
circuit.

REFERENCES
[1] R. W. Erickson and D. Maksimovic. Fundamentals of Power
Electronics. Nowell, MA: Kluwer, 2001.
[2] R. Middlebrook, “Modeling current-programmed buck and boost
regulators,” IEEE Trans. Power Electron., vol. 4, pp. 36–52, Jan. 1989.
[3] Current-Sharing Techniques for VRMs. Intersil Corp., Milpitas, CA,
Technical Brief TB385.1.
[4] R. W. Erickson, Fundamentals of Power Electronics, 1st ed. NewYork:
Chapman and Hall, 1997.
[5] LTC3440: The power industries first buck-boost dc/dc converter. Tech
Rep., Linear Technology. [Online]. Available:
http://www.soanar.com.au/newsandinfo.cfm?newsid=232&archive=1
[6] B. Shaffer, “Internal compensation—Boon or Bane,” in Proc. Power
Supply Design Sem. (SEM 1300), 2000.
[7] G. A. Rincón-Mora, “Integrated dc–dc converters: a topological
journey,” in Proc. Midwest Symp. Circuits Syst (MWCAS’02) Tutorial,
2002.
[8] G. A. Rincón-Mora, “Self-oscillating hysteretic V-mode DC-DC
controllers: from the ground up,” in Proc. IEEE Power Electron. Spec.
Conf. (PESC) Tutorial, 2001.
[9] A. Pressman, Switching Power Supply Design, 2nd ed. New York: Mc-
Graw-Hill, 1998.
[10] J. Chen, D. Maksimovic, R.W. Erickson. Buck-Boost PWM converters
having two independently controlled switches. in Proc. IEEE PESC,
Vancouver, Canada, 2001, 736-741.
EE391 – Special Studies in Electrical Engineering 9

Fig 16 Block diagram of a converter in current-programmed mode


EE391 – Special Studies in Electrical Engineering 10

Fig 17. Top: Model of current programmed mode control (b) complete AC small signal model for 4-switch converter employing current
programmed mode control
EE391 – Special Studies in Electrical Engineering 11

Fig 18 Start up waveforms of converter in current programmed mode control

Fig 19 Waveforms of converter in response to change in line voltage. Shown in blue is the output voltage and the black curve is
inductor current. The perturbation in the input voltage is the red pulse.

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