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EE391 – Special Studies in Electrical Engineering

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Current Programmed Control of 4-Switch Synchronous Buck-Boost DC-DC Converter
Mahmoud Saadat, Student Member, IEEE

Abstract— Control design is a challenging step in the design process of 4-Switch Synchronous Buck-Boost DC-DC Converter. While it is possible to design the controller without sensing current, with only output voltage information in voltage mode, short-circuit protection and increasingly stringent performance requirements force designers to include a current-sensing function to find practical solutions. In this project, an extensive analysis of 4-switch DC-DC converter is presented. After an overview of voltage-mode control, detailed steps of currentprogrammed control are presented. Simulation results verify our modeling results as well as give practical design considerations for circuit level implementation. Index Terms— DC-DC power conversion, Current mode control, Buck-Boost converter,

I. INTRODUCTION converter is the key element of power electronics which can process the raw input power as specified by the control input and yields the conditioned output power. In a DC/DC converter, the DC input voltage is converted to a DC output voltage having a larger or smaller magnitude, possibly with opposite polarity or with isolation of the input and output ground references. The power level encountered in such switching converters range from less than one watt in battery operated portable equipments to kilowatts and Megawatts in variable speed motor drives. In this work, we have focused on buck-boost non-inverting DC-DC converter which has the capability of producing both larger and smaller output voltage than input voltage with the same polarity. One of the most popular configurations of buck-boost converters is single switch converter which employs only one switch and single inductor but is inverting and so the polarity of the output voltage is opposite to the input voltage. This drawback limits the application of single switch converters. In some application this problem can be resolved by simply changing the polarity of the supply voltage connection at the input port of converter but in this case the same battery cannot be used for other sub-circuits. The solution to this problem is four switch buck-boost converters which are essentially a cascade combination of a buck and then a boost converter. This topology is very useful
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for portable application since switches and control circuit can be integrated into a single CMOS chip. Control is invariably required in DC-DC converters. It is nearly always desired to produce a well-regulated output voltage, in the presence of variation in the input voltage and load current. Figure 1 depicts a general block diagram of a closed loop converter using voltage mode control. As can be seen in this figure, in voltage mode control the output voltage is compared to a reference value to produce the error signal. The error signal then feeds into a compensator which makes the loop stable and guarantees the large loop gain at low frequencies and desired phase and gain margin. The compensated error will be the duty cycle of the PWM and eventually drives the gate of four switches. Usually, the most challenging block of this scheme is found to be the compensator. Variations in the load impedance as well as input voltage change the quality of control loop. Therefore, care should be taken in design of compensator so that the desired specifications will be met in all different circumstances. On the other hand, current-mode control is very popular in switching power converters due to its important advantages. Current-mode control remains a single pole system regardless of conduction mode (continuous-mode or discontinuous) and also peak current limiting for protection can be achieved by clamping the error signal. II. ANALYSIS OF OPEN LOOP CONVERTER A. Basic Operation and Steady-State Waveforms Before going to dynamic behavior of the converter and control design, we discuss the steady-state and DC response of the open loop converter. Fig. 1 shows the schematics of open loop circuit of 4-switch buck-boost converter. The gate control signals which drive the gate of switches are shown in figure 2.

M. Saadat is pursuing his M.Sc. degree in Electrical Engineering Department of Stanford University, Stanford, CA 94305 USA (e-mail: mahmoud@ Stanford.edu).

Fig. 1. Schematics of open-loop converter

Since in most cases the converter designed in such a way so that the switching ripple is very small. Converter Dynamics As we discussed before. Analyzing the converter in discontinuous conduction mode (DCM) adds insignificant details to this problem which are not crucial to first order in our analysis.e. thereby exposing directly the desired DC (low-frequency) and ac components of the waveforms. As depicted in Fig. given these key ideas. this methodology results in a very good approximation of the actual signals of the converter. load current. Fig. we need a dynamic model of our converter and figure out how the output of the converter responses to variations in the power input voltage. Equivalent circuit during t During toff. 2. To design such a feedback system. and the duty cycle. This method is very well known in circuit theory as small-signal analysis and the basic idea behind it is so called perturbing and linearizing. as can be seen in Fig 3. 4. Since switching converters are nonlinear systems. the output voltage goes up while the inductor current goes down. To simplify this modeling problem. and duty cycle. In addition. we applied the circuit averaging and averaged switch modeling technique to analyze our converter. the average voltage applied to inductor must be zero. The key step in finding converter dynamic behavior is to average the converter waveforms over one switching period. settling time. Circuit Averaging . we have discussed several key points in analyzing the switching converter which are common in all of the approaches to some extent. like many other closed-loop systems. B. we assume that the converter operates in continuous conduction mode (CCM). DC (low-frequency) component and ac variation. In this case. Gate control signals of converter shown in fig 1. So far. Equivalent circuit during t Fig. In this analysis. we focus on averaged voltages and currents over one switching period instead of working with accurate time domain signals. after passing the initial transient and any possible change in input voltage. 3. analysis is done about a quiescent operating point. the feedback system should be stable. During ton. This fact can be employed to calculate the DC voltage at the output node in our circuit.EE391 – Special Studies in Electrical Engineering 2 Fig. switches PMOS2 and NMOS2 are on while PMOS1 and NMOS1 are off. Pulling out current from capacitor leads to decrease in its stored voltage and hence the output voltage. inductor is charged by input voltage source and stored current in inductor boosts up. and properties such as transient overshoot. load current. and steady-state regulation should meet specification. 4. This removes the switching harmonics. In this report. DC-DC converters require feedback loop to provide a regulated output voltage in spite of variations in load current and input voltage. On the other hand capacitor functions as a battery and provides the output node with load current. all of the voltages and currents are decomposed in two components. in this case. stored current in inductor flows to both capacitor and load and so provides load with current along with recharging the capacitor for the next cycle. In this methodology. i. switches PMOS1 and NMOS1 are on whereas NMOS2 and PMOS2 are off. In equilibrium. Since the capacitor is charging with inductor current.

Vin Switch Network 1 Switch Network 2 3 Therefore two open loop transfer functions can be defined as: | and | Neglecting the effect of on-resistance of switches simplifies the equations for transfer functions and leads to following transfer functions for and : 1 1 L Vout Rc Iload C Rload 1 1 1 d(t) Fig. and time-invariant elements displayed in red. instead of on its equations. this relation can be expressed as: Right Half-plane Zero We have observed that the control-to-output transfer functions of the buck-boost converter exhibits RHP zero. DC and ac small-signal model of 4-switch buck-boost DC-DC converter. The resulted model helps in analyzing DC characteristics of the converter as well as ac small-signal analysis. The detail of this analysis for several types of switch networks is discussed in [1]. simulation results show that on-resistance of switches greatly affect the open-loop response.EE391 – Special Studies in Electrical Engineering Circuit averaging is a well-known technique in derivation of converter equivalent circuits. perturbation and linearization should be applied to find the desired model. However. 6. we can define and calculate several transfer functions of the converter. the ac output voltage variations can be expressed as the superposition of terms arising from variations in control input and the line input. we are interested in control-to-output and line-to-output transfer functions. containing the reactive and other remaining elements. The presence of RHP zero tends to destabilize wide-bandwidth . This step is done in our case and Fig. shown inside the dashed boxes. 5. Since switch network is inherently nonlinear. Circuit averaging is easy to apply and can be used to analyze various types of converters either in CCM or DCM. The accurate line to output transfer function is found to be: And using the same model. we can find the more accurate transfer function for control (duty-cycle) to output transfer function: 1 1 2 1 2 2 2 1 2 1 Fig. Fig 6 demonstrates the schematic of the converter after substituting switch networks with their averaged model. The first step in circuit averaging is to decompose the circuit to switch network(s) containing the converter switching elements and a time-invariant network. In this technique. In particular. 5. variables in lowercase refer to ac small-signal variation whereas variables in uppercase refer to DC operating point values. In this model. and therefore gives a more physical insight to the model. Converter Transfer Functions Having the small-signal circuit of the converter. Including the effect of on-resistance of switches gives us the more accurate transfer functions. Converter can be divided to switch networks. Based on notation used in Fig 6. In fact. 5 displays the resulted network. all analysis and manipulations are accomplished on the circuit diagram. specially the DC gain of converter and damping factor of the response at the output terminal. The next step is to find a DC and small-signal ac averaged circuit model of two switch networks annotated in Fig.

a set of open loop simulations has been added to I-Converter which allows the user to compare the actual converter’s behavior with those predicted by models. Instead of comparing the transfer functions of converter in S-domain. III. 8 (b) Model verification of control-to-output transfer function: Step response of the output voltage when a small (20% change) is applied in duty cycle input. Fig. . and particularly in high-volume manufacturing of a converter.5V (when the battery is fully charged) to 1. feedback loop is open and a small step is applied at control (duty cycle) input. Results of model verification for control-to-output transfer function are shown in Fig 8. If we increase the duty cycle. control is essential in all switching converters. The load current might have large variation if we think of standby mode versus full-load operation of the device. 8 (a). VOLTAGE MODE CONTROL As we discussed before. Fig. in a typical Li-Ion battery operated device. As can be seen in this figure. For example. Eventually. Fig 7 shows the block diagram of a simulation set up for calculating the control-to-output transfer function. the shorter off-time leads to a smaller increase in the capacitor charge which is equivalent to a relative drop in the output voltage. The reason behind this effect can be explained by revisiting equivalent circuits during on-state and off-state. 7. C. In control design for switching converters. when the amplitude of applied step is small enough. the input DC voltage provided by battery might vary from about 4. 4 Fig. and also converter circuit elements. we compare their corresponding step responses which are easier to derive when using a simulation tool such as Simulink. It is desired to obtain a constant output voltage in spite of disturbances in input voltage. this step is crucial because the model might have systematic discrepancies from actual system due to various approximations and sources of nonlinearity in the system. To ease model verification step in this project. the model predicts the actual behavior very accurately. Since the output of the converter has a more linear behavior with respect to input voltage than duty cycle. The variation at the output node of the converter is the step response corresponding to control-to-output transfer function. for example 3. This fact is consistent with the condition of small-signal analysis. Model verification of control-to-output transfer function: Top: Step response of the output voltage when a small (2% change) is applied in duty cycle input.8V (when the battery is almost discharged) and the output voltage should be regulated around its desired value during this variation. this initial decrement at the output voltage will be compensated when inductor current increases to its new value. the off-state will become shorter and before the inductor charges to a higher value. Fig 9 depicts the result of model verification process for line-to-output transfer function.3V. Simulation set up to find control-to-output step response. Simulation of Open loop Converter Model verification is an indispensable step in almost any engineering design process. load current. The values of the circuit elements are constructed to a certain tolerance. The same methodology can be applied to verify the line-tooutput transfer function. In this configuration. the resulted model predicts the actual behavior very well when a fairly large signal step (1 Volt amplitude) is applied at the input voltage. because during a transient the output initially changes in the wrong direction.EE391 – Special Studies in Electrical Engineering feedback loops.

and obtain a given constant output voltage under all conditions. Considering all these non-idealities. Model verification of line-to-output transfer function: Step response of the output voltage when a 1-Volt step is applied at input voltage.e. Many of the commercial products in the market suffer from various off-chip passive components which are necessary for proper functionality of the compensator network. we present the designed compensator and result of continuous-time control of our converter before going through current-programmed mode control. referred to as voltage-mode control (or duty-cycle control). 9. In practice. A block diagram of such a negative feedback system. Variations in the load impedance as well as input voltage change the quality of control loop. This compensator network gives the overall loop gain with the bode plot shown in Fig. The solution to this problem is negative feedback and the idea behind that is to build a circuit which automatically adjusts the duty cycle as necessary to obtain the desired output voltage with high accuracy. Details of voltage-mode control and compensator design is well documented and is not focus of this work. The basic idea in continuous-time compensator design is pole-zero cancellation and phase equalization in S-domain. Implementation of continuous-time control is accomplished using well-known opamp networks and passive components (resistors and capacitors). If the feedback system works perfectly. Fig. 12. Block diagram of a closed-loop converter employing continuous-time voltage-mode control.Schematic diagram of type-III compensator network . process variations also affect circuit parameters. Continuous time control is the most common method has been commercialized.EE391 – Special Studies in Electrical Engineering 5 Fig 10. as can be seen in the diagram. Fig 11. In the rest of this section. is shown in Fig 10. Therefore. In this method. we cannot expect to simply set the DC-DC converter duty cycle to a single value. benign transient behavior. Usually. small static error in the output voltage). Fig 11 displays the schematic diagram of type-III compensator network. the error signal is nonzero but nonetheless small. care should be taken in design of compensator so that the desired specifications will be met in all different circumstances. This error signal is then fed to the loop compensator which guarantees the large DC gain of the loop (i. The major drawback in the continuous-time implementation is the large spread in the value of capacitors and resistors which make the circuit difficult to be integrated with other components in the same die. the most challenging block of this scheme is found to be the compensator. Essentially. regardless of disturbances in input voltage and load current and variations in component values. compensator design can be done either in continuous-time or discrete-time. the output voltage is sensed and then compared with a reference input voltage to produce the error signal. the error signal is zero. and stability of the loop.

duty cycle is itself a function of the main control signal ic(t).6 deg as annotated in this figure. but because of the function of current programmed mode controller. The consumed power is usually proportional to the product of switching frequency and the resolution of the DPWM and thus limits the maximum frequency at which DPWM controllers can be effectively used. output voltage. In this case both loop analysis and compensator design is done in discrete-time domain using Z-transform. The major drawback of digital control method is high power consumption and hence although the advantages are known. During this state. and inductor currents.5. output voltage.EE391 – Special Studies in Electrical Engineering 6 (the control signal) and make the loop stable. In practical implementation. we have discussed voltage-mode control of our converter. and input voltage. At this point. the duty cycle is not the signal which controls the output voltage. The DPWM block resembles digital to analog converter in the control loop. In this topology. ic(t) and input voltage to the output. and consequently provide significantly better overall efficiency. Bode plot of over loop-gain function for nominal values of inputoutput voltages. after adding with an artificial ramp. and a digital pulse-width modulator (DPWM) that generates a pulsating waveform to control switches in the converter with calculated duty cycle. Block diagram of a digitally controlled converter Fig 13. The amplitude of the artificial ramps also shows up as a constant in the average of the duty cycle. The implementation can be accomplished similar to many digitally controlled systems using A/D and D/A conversion. CURRENT PROGRAMMED CONTROL So far. and realization with a small number of external components. high frequency continuous-time control is preferred because exhibits considerably lower power consumption. inductor current increases with some positive slope that depends on the input voltage and the inductance. In this method. in low-power portable applications. It can be shown that without adding the artificial ramp to inductor current. Digital control offers advantages such as simple introduction of advanced control functions and power management techniques. use of automatic design tools for fast implementation. Another control scheme. As we discussed before. input voltage. Fig 12. is compared to the control current. causing the latch output Q to be high and therefore turning on PMOS1 and NMOS1 and turning off PMOS2 and NMOS2. The block diagram of a typical current programmed controller is illustrated in Fig.6 dB and phase margin of 72. The system has an analog to digital converter (A/D) to sample the output voltage. voltages proportional to inductor current and control current are compared. we need to find the transfer function from control input. Eventually. Fig 13. demonstrates the block diagram of a digitally controlled buck-boost switching converter. 16. is current programmed control. but depends on ic(t) as well as on the converter inductor current. DPWM is the most powerhungry block in the discrete-time controllers. the output of comparator resets the latch and therefore converter goes to off state until next clock pulse occurs at the set input of latch. Type III compensator results in a gain margin of 20. To analyze the closed-loop behavior of current programmed controlled converter. low sensitivity to external influences. Important waveforms of the converter are shown in Fig 14. IV. in which the converter output voltage is controlled by choice of the peak inductor current. Details of oscillation and role of artificial ramp in solving this problem are very well documented [1]. which finds wide applications. in which the output is controlled by direct choice of the duty cycle of switches. indeed. a digital filter to determine the value of the switch duty cycle . discrete-time control is another popular implementation of voltage-mode control and has been recently studied in the literature. The control input signal is a current ic(t) which is a compensated version of the error signal at the output of the converter. this current becomes equal to the control signal ic(t). The inductor current. duty cycle is not directly controlled. A clock pulse at the Set input of a latch initiates the switching cycle. first of all. the current programmed controller can be unstable whenever the steady-state duty cycle is greater than 0.

Particularly. Red curve is the waveform predicted from modeling and black is the simulation results. and can be calculated from following 1 Fig 14 Waveforms of converter in current-programmed mode. According to this plot. .EE391 – Special Studies in Electrical Engineering The relationship between variables involved in determination of duty cycle can be found by looking at the waveforms shown in Fig. 2 The equation for duty cycle suggests a block diagram which. The setup for this verification process is designed in IConverter and has been integrated in open-loop simulations. and therefore can be expressed as: Where equations: . . . In fact. we are interested in the transfer function from control input. . . the on-resistance of switches is neglected in finding this transfer function. indeed. the average of inductor current is related to the other variables according to the following equation: 2 2 is the slope of artificial ramp and and are Where inductor current slopes and for our converter can be found from the following equations: . Using the block diagram representation of current programmed controller shown in fig 17 we can find the transfer functions from different input voltages or currents to the output voltage or inductor current.) Using the same approach as we applied to verify the duty cycle-to-output and line-to-output transfer functions. The elimination of pole allows using a simpler compensator circuit for stability and dynamic behavior considerations. ic(t). to the output voltage which is found to be: 1 1 1 1 2 The control-to-output transfer function in current programmed mode predicts that one pole is eliminated from the duty cycle-to-output transfer function. 7 the small-signal condition should be held in this case. We conclude this section with simulation results of closedloop converter employing current-programmed mode control. Fig 17 illustrates the block diagram of the current programmed mode controller and then whole converter. The duty cycle is determined by intersection of control input and inductor current. the duty cycle depends on the intersection of stabilized control input and inductor current. . Since Fig 15 Verification of control-to-output step response of a converter in current programmed mode. we can verify the control-to-output transfer function as well. (For simplicity of calculation. 14. we can apply a small step at control input around some DC operating point and then observe the change in the output voltage. This model can be added to the model of our open loop converter to calculate the transfer functions from different input signals to the others. Assuming linear waveform for inductor current. The start-up waveform is illustrated in Fig 18. the verification of transfer function is done through step response. Solving equation (??) for duty cycle yields: 1 2 2 and in the And substituting the equations for previous equation gives us the relationship between duty cycle and other converter variables. Current programming does not alter the transfer function zeros and the dc gain become load dependent. models the current-programmed mode controller block.

” in Proc. 1st ed. D.. 2002. W. Rincón-Mora. Maksimovic. MA: Kluwer. Shaffer.1. IEEE PESC. Buck-Boost PWM converters having two independently controlled switches. 8 [6] [7] [8] [9] [10] . REFERENCES [1] [2] [3] [4] [5] R. Both theoretical and simulation results proves that this method result in a simpler dynamic behavior of converter than voltage mode control and therefore eases the design of compensator circuit. vol. Erickson. Intersil Corp. CA.W. R. R.cfm?newsid=232&archive=1 B. V.” in Proc. CONCLUSIONS The current programmed mode control modeling. [Online]. Rincón-Mora. pp. Linear Technology.. Erickson. synchronous. Fundamentals of Power Electronics. W. Conf. 1997. “Modeling current-programmed buck and boost regulators. 1989.com. 2nd ed. “Self-oscillating hysteretic V-mode DC-DC controllers: from the ground up. noninverting. Nowell. Vancouver. R. 2001. Milpitas.EE391 – Special Studies in Electrical Engineering Fig 19 depicts the simulation results of the converter employing current programmed mode control when input voltage is changed abruptly. Midwest Symp. (SEM 1300). Available: http://www. “Integrated dc–dc converters: a topological journey. New York: McGraw-Hill. Erickson and D. Power Electron.” IEEE Trans. Tech Rep. Pressman. Middlebrook. Current-Sharing Techniques for VRMs. G. Power Supply Design Sem. Spec. Chen. NewYork: Chapman and Hall. LTC3440: The power industries first buck-boost dc/dc converter. 36–52. 736-741. Technical Brief TB385. As it can be seen in these plots. A. 1998. Canada. J. 4. in Proc.” in Proc. IEEE Power Electron. 2000. 2001. Circuits Syst (MWCAS’02) Tutorial. design and simulation of a dynamic. 2001. (PESC) Tutorial. Maksimovic.. the transient behavior of the output of the converter as well as inductor current have approximately a first order response to the perturbation in load current or line voltage. Jan. “Internal compensation—Boon or Bane.soanar. buck-boost converter is presented in this paper.au/newsandinfo. A. Fundamentals of Power Electronics. Switching Power Supply Design. G. A.

EE391 – Special Studies in Electrical Engineering 9 Fig 16 Block diagram of a converter in current-programmed mode .

Top: Model of current programmed mode control (b) complete AC small signal model for 4-switch converter employing current programmed mode control .EE391 – Special Studies in Electrical Engineering 10 Fig 17.

. The perturbation in the input voltage is the red pulse.EE391 – Special Studies in Electrical Engineering 11 Fig 18 Start up waveforms of converter in current programmed mode control Fig 19 Waveforms of converter in response to change in line voltage. Shown in blue is the output voltage and the black curve is inductor current.