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1. Introduction
In the present scenario of technological revolution it has been observed that the

power is very precious. The industrialization primarily increasing the inductive

loading, the Inductive loads affect the power factor so the power system loss its

efficiency. There are certain organizations developing products and caring R&D

work on this field to improve or compensate the power factor. In the present

trend the designs are also moving forwards the miniature architecture; this can

be achieved in a product by using programmable device. When ever we are

thinking about any programmable devices then the embedded technology comes

into fore front. The embedded is now a day very much popular and most the

product are developed with Microcontroller based embedded technology. The

electrical engineering and its applications are the oldest streams of Engg. In the

present scenario all the electrical protection systems are based on electro

mechanical devices. Though these systems are quit reliable and cheaper. It has

certain disadvantages. The electro mechanical protection relays are too bulky

and needs regular maintenance. The multifunctional is out of question. Recently,

the technical revolution made embedded technology cheaper, so that it can be

applied to all the fields. The pioneer manufactures of Power system and

protection system such as SIMENS, LARSON & TUBRO, and CUTLER

HAMPER etc. manufacturing power factor improvement devices on embedded

technology. The protection and conditioning devices may be of any kind but they

are very much important, interconnectivity and networking between different

devices are very much required in the modern age instrumentation and control.
Now a days the devices and developed with Rs485 compatible and also multiple

function are integrated in a small and economical package. This technology is

very fast so controlling of multiple parameters is possible; also the parameters

are field programmable by the user.

The Automatic Power factor Correction device is a very useful device for

improving efficient transmission of active power. If the consumer connect

inductive load, then the power factor lags, when the power factor goes below

0.97(lag) then the Electric supply company charge penalty to the consumer. So it

is essential to maintain the Power factor below with in a limit. Automatic Power

factor correction device reads the power factor from line voltage and line current,

calculating the compensation requirement switch on different capacitor banks.

This device is developed on a 89C51 Microcontroller. The use of Microcontroller

reduces extra hard wares such as timers and connectors etc. The controller is

embedded with all the components. The controller is the heart of the device and

there are other hardware used for signal conditions and comparison.
Power Factor.

Power factor is the ration between the KW and the KVA drawn by an electrical

load where the KW is the actual load power and the KVA is the apparent load

power. It is a measure of how effectively the current is being converted into

useful work output and more particularly is a good indicator of the effect of the

load current on the efficiency of the supply system.

All current will causes losses in the supply and distribution system. A load with a

power factor of 1.0 results in the most efficient loading of the supply and a load

with a power factor of 0.5 will result in much higher losses in the supply system.

A poor power factor can be the result of either a significant phase difference

between the voltage and current at the load terminals, or it can be due to a high

harmonic content or distorted/discontinuous current waveform.

Poor load current phase angle is generally the result of an inductive load such as

an induction motor, power transformer, lighting ballasts, welder or induction


A distorted current waveform can be the result of a rectifier, variable speed drive,

switched mode power supply, discharge lighting or other electronic load.

A poor power factor due to an inductive load can be improved by the addition of

power factor correction, but, a poor power factor due to a distorted current

waveform requires an change in equipment design or expensive harmonic filters

to gain an appreciable improvement. Many inverters are quoted as having a

power factor of better than 0.95 when in reality, the true power factor is between

0.5 and 0.75. The figure of 0.95 is based on the Cosine of the angle between the

voltage and current but does not take into account that the current waveform is

discontinuous and therefore contributes to increased losses on the supply

Power Factor Correction.

Capacitive Power Factor correction is applied to circuits which include induction

motors as a means of reducing the inductive component of the current and

thereby reduce the losses in the supply. There should be no effect on the

operation of the motor itself.

An induction motor draws current from the supply, that is made up of resistive

components and inductive components. The resistive components are:

1) Load current.

2) Loss current.

and the inductive components are:

3) Leakage reactance.

4) Magnetizing current.
The current due to the leakage reactance is dependant on the total current drawn

by the motor, but the magnetizing current is independent of the load on the

motor. The magnetizing current will typically be between 20% and 60% of the

rated full load current of the motor. The magnetizing current is the current that

establishes the flux in the iron and is very necessary if the motor is going to

operate. The magnetizing current does not actually contribute to the actual work

output of the motor. It is the catalyst that allows the motor to work properly. The

magnetizing current and the leakage reactance can be considered passenger

components of current that will not affect the power drawn by the motor, but will

contribute to the power dissipated in the supply and distribution system. Take for

example a motor with a current draw of 100 Amps and a power factor of 0.75 The

resistive component of the current is 75 Amps and this is what the KWh meter
measures. The higher current will result in an increase in the distribution losses

of (100 x 100) /(75 x 75) = 1.777 or a 78% increase in the supply losses.

In the interest of reducing the losses in the distribution system, power factor

correction is added to neutralize a portion of the magnetizing current of the

motor. Typically, the corrected power factor will be 0.92 - 0.95 Some power

retailers offer incentives for operating with a power factor of better than 0.9, while

others penalize consumers with a poor power factor. There are many ways that

this is metered, but the net result is that in order to reduce wasted energy in the

distribution system, the consumer will be encouraged to apply power factor


Power factor correction is achieved by the addition of capacitors in parallel

with the connected motor circuits and can be applied at the starter, or applied at

the switchboard or distribution panel. The resulting capacitive current is leading

current and is used to cancel the lagging inductive current flowing from the

Capacitors connected at each starter and controlled by each starter is known as

"Static Power Factor Correction" while capacitors connected at a distribution

board and controlled independently from the individual starters is known as "Bulk


Bulk Correction.

The Power factor of the total current supplied to the distribution board is

monitored by a controller which then switches capacitor banks In a fashion to

maintain a power factor better than a preset limit. (Typically 0.95) Ideally, the

power factor should be as close to unity as possible. There is no problem with

bulk correction operating at unity.

Static Correction.

As a large proportion of the inductive or lagging current on the supply is due to

the magnetizing current of induction motors, it is easy to correct each individual

motor by connecting the correction capacitors to the motor starters. With static

correction, it is important that the capacitive current is less than the inductive

magnetizing current of the induction motor. In many installations employing static

power factor correction, the correction capacitors are connected directly in

parallel with the motor windings. When the motor is Off Line, the capacitors are

also Off Line. When the motor is connected to the supply, the capacitors are also

connected providing correction at all times that the motor is connected to the

supply. This removes the requirement for any expensive power factor monitoring

and control equipment. In this situation, the capacitors remain connected to the

motor terminals as the motor slows down. An induction motor, while connected to

the supply, is driven by a rotating magnetic field in the stator which induces
current into the rotor. When the motor is disconnected from the supply, there is

for a period of time, a magnetic field associated with the rotor. As the motor

decelerates, it generates voltage out its terminals at a frequency which is related

to it's speed. The capacitors connected across the motor terminals, form a

resonant circuit with the motor inductance. If the motor is critically corrected,

(corrected to a power factor of 1.0) the inductive reactance equals the capacitive

reactance at the line frequency and therefore the resonant frequency is equal to

the line frequency. If the motor is over corrected, the resonant frequency will be

below the line frequency. If the frequency of the voltage generated by the

decelerating motor passes through the resonant frequency of the corrected

motor, there will be high currents and voltages around the motor/capacitor circuit.

This can result in severe damage to the capacitors and motor. It is imperative

that motors are never over corrected or critically corrected when static correction

is employed.

Static power factor correction should provide capacitive current equal to 80% of

the magnetizing current, which is essentially the open shaft current of the motor.

The magnetizing current for induction motors can vary considerably. Typically,

magnetizing currents for large two pole machines can be as low as 20% of the

rated current of the motor while smaller low speed motors can have a

magnetizing current as high as 60% of the rated full load current of the motor. It

is not practical to use a "Standard table" for the correction of induction motors

giving optimum correction on all motors. Tables result in under correction on

most motors but can result in over correction in some cases. Where the open

shaft current can not be measured, and the magnetizing current is not quoted, an

approximate level for the maximum correction that can be applied can be

calculated from the half load characteristics of the motor. It is dangerous to base

correction on the full load characteristics of the motor as in some cases, motors

can exhibit a high leakage reactance and correction to 0.95 at full load will result

in over correction under no load, or disconnected conditions.

Static correction is commonly applied by using on e contactor to control both the

motor and the capacitors. It is better practice to use two contactors, one for the

motor and one for the capacitors. Where one contactor is employed, it should be

up sized for the capacitive load. The use of a second contactor eliminates the

problems of resonance between the motor and the capacitors.


Static Power factor correction must not be used when the motor is controlled by a

variable speed drive or inverter. The connection of capacitors to the output of an

inverter can cause serious damage to the inverter and the capacitors due to the

high frequency switched voltage on the output of the inverters.

The current drawn from the inverter has a poor power factor, particularly at low

load, but the motor current is isolated from the supply by the inverter. The phase

angle of the current drawn by the inverter from the supply is close to zero

resulting in very low inductive current irrespective of what the motor is doing. The

inverter does not however, operate with a good power factor. Many inverter

manufacturers quote a cos Ø of better than 0.95 and this is generally true,

however the current is non sinusoidal and the resultant harmonics cause a power

factor (KW/KVA) of closer to 0.7 depending on the input design of the inverter.
Inverters with input reactors and DC bus reactors will exhibit a higher true power

factor than those without.

The connection of capacitors close to the input of the inverter can also result in

damage to the inverter. The capacitors tend to cause transients to be amplified,

resulting in higher voltage impulses applied to the input circuits of the inverter,

and the energy behind the impulses is much greater due to the energy storage of

the capacitors. It is recommended that capacitors should be at least 75 Meters

away from inverter inputs to elevate the impedance between the inverter and

capacitors and reduce the potential damage caused.

Switching capacitors, Automatic bank correction etc, will cause voltage transients

and these transients can damage the input circuits of inverters. The energy is

proportional to the amount of capacitance being switched. It is better to switch

lots of small amounts of capacitance than few large amounts.

Solid State Soft Starter.

Static Power Factor correction capacitors must not be connected to the output of

a solid state soft starter. When a solid state soft starter is used, the capacitors

must be controlled by a separate contactor, and switched in when the soft starter

output voltage has reached line voltage. Many soft starters provide a "top of

ramp" or "bypass contactor control" which can be used to control the power

factor correction capacitors.

The connection of capacitors close to the input of the soft starter can also result

in damage to the soft starter if an isolation contactor is not used. The capacitors
tend to cause transients to be amplified, resulting in higher voltage impulses

applied to the SCRs of the Soft Starter, and the energy behind the impulses is

much greater due to the energy storage of the capacitors. It is recommended that

capacitors should be at least 50 Meters away from Soft starters to elevate the

impedance between the inverter and capacitors and reduce the potential damage


Switching capacitors, Automatic bank correction etc, will cause voltage transients

and these transients can damage the SCRs of Soft Starters if they are in the Off

state without an input contactor. The energy is proportional to the amount of

capacitance being switched. It is better to switch lots of small amounts of

capacitance than few large amounts.

Capacitor selection.

Static Power factor correction must neutralize no more than 80% of the

magnetizing current of the motor. If the correction is too high, there is a high

probability of over correction which can result in equipment failure with severe

damage to the motor and capacitors. Unfortunately, the magnetizing current of

induction motors varies considerably between different motor designs. The

magnetizing current is almost always higher than 20% of the rated full load

current of the motor, but can be as high as 60% of the rated current of the motor.

Most power factor correction is too light due to the selection based on tables

which have been published by a number of sources. These tables assume the

lowest magnetizing current and quote capacitors for this current. In practice, this

can mean that the correction is often less than half the value that it should be,

and the consumer is unnecessarily penalized.

Power factor correction must be correctly selected based on the actual motor

being corrected. The Busbar software provides two methods of calculating the

correct value of KVAR correction to apply to a motor. The first method requires

the magnetizing current of the motor. Where this figure is available, then this is

the preferred method. Where the magnetizing current is not available, the second

method is employed and is based on the half load power factor and efficiency of

that motor. These figures are available from the motor data sheets.


Motor A is a 200 KW 6 pole motor with a magnetizing current of 124A. From

tables, the correction applied would be 37KVAR. From the calculations, this
would require a correction of 68.7 KVAR

Motor B is a 375KW 2 pole motor with a half load efficiency of 93.9% and a half

load power factor of 0.805, the correction recommended by the tables is 44

KVAR while the calculations reveal that the correction should be 81.3KVAR

Busbar.exe is a shareware program which means that you can try it before you

buy it. You can freely distribute copies to anyone you please, but if you find it to

be useful, as I'm sure you will, then you must purchase it at $NZ35.00 Registered

copies of Busbar will be eligible for continued updates, and registered users will

be advised of all major upgrades as they become available.

Static Power factor correction can be calculated from known motor

characteristics for any given motor, either the magnetizing current and supply

voltage (method 1) or half load efficiency and half load power factor (method 2),

or, as a last resort, table values can be used. These will almost always result in

under correction.

Supply Harmonics.

Harmonics on the supply cause a higher current to flow in the capacitors. This is

because the impedance of the capacitors goes down as the frequency goes up.

This increase in current flow through the capacitor will result in additional heating

of the capacitor and reduce it's life. The harmonics are caused bu many non

linear loads, the most common in the industrial market today, are the variable

speed controllers and switch mode power supplies. Harmonic voltages can be
reduced by the use of a harmonic compensator, which is essentially a large

inverter that cancells out the harmonics. This is an expensive option. Passive

harmonic filters comprising resistors, inductors and capacitors can also be used

to reduce harmonic voltages. This is also an expensive exersize.

In order to reduce the damage caused to the capacitors by the harmonic

currents, it is becomming common today to install detuning reactors in series with

the power factor correction capacitors. These reactors are designed to make the

correction circuit inductive to the higher frequency harmonics. Typically, a reactor

would be designed to create a resonant circuit with the capacitors above the third

harmonic, but sometimes it is below. (Never tuned to a harmonic frequency!!)

Adding the inductance in series with the cpacitors will reduce their effective

capacitance at the supply frequency. Reducing the resonant or tuned frequency

will reduce the the effective capacitance further. The object is to make the circuit

look as inductive as possible at the 5th harmonic and higher, but as capacitive as

possible at the fundemental frequency. Detuning reactors will also reduce the

chance of the tuned circuit formed by the capacitors and the inductive supply

being resonant on a supply harmonic frequency, thereby reducing damage due

to supply resonances amplifying harmonic voltages caused by non linear loads.

Supply Resonance.

Capacitive Power factor correction connected to a supply causes resonance

between the supply and the capacitors. If the fault current of the supply is very

high, the effect of the resonance will be minimal, however in a rural installation
where the supply is very inductive and can be a high impedance, the resonance

can be very severe resulting in major damage to plant and equipment. Voltage

surges and transients of several times the supply voltage are not uncommon in

rural areas with weak supplies, especially when the load on the supply is low. As

with any resonant system, a transient or sudden change in current will result in

the resonant circuit ringing, generating a high voltage. The magnitude of the

voltage is dependant on the 'Q' of the circuit which in turn is a function of the

circuit loading. One of the problems with supply resonance is that the 'reaction' is

often well remove from the 'stimulus' unlike a pure voltage drop problem due to

an overloaded supply. This makes fault finding very difficult and often damaging

surges and transients on the supply are treated as 'just one of those things'.

To minimize supply resonance problems, there are a few steps that can be

taken, but they do need to be taken by all on the particular supply.

1) Minimize the amount of power factor correction, particularly when the load is

light. The power factor correction minimizes losses in the supply. When the

supply is lightly loaded, this is not such a problem.

2) Minimize switching transients. Eliminate open transition switching - usually

associated with generator plants and alternative supply switching, and with some

electromechanical starters such as the star/delta starter.

3) Switch capacitors on to the supply in lots of small steps rather than a few large

4) Switch capacitors on o the supply after the load has been applied and switch

off the supply before or with the load removal.

Harmonic Power Factor correction is not applied to circuits that draw

either discontinuous or distorted current waveforms.

Most electronic equipment includes a means of creating a DC supply. This

involves rectifying the AC voltage, causing harmonic currents. In some cases,

these harmonic currents are insignificant relative to the total load current drawn,

but in many installations, a large proportion of the current drawn is rich in

harmonics. If the total harmonic current is large enough, there will be a resultant

distortion of the supply waveform which can interfere with the correct operation of

other equipment. The addition of harmonic currents results in increased losses in

the supply.

Power factor correction for distorted supplies can not be achieved by the addition

of capacitors. The harmonics can be reduced by designing the equipment using

active rectifiers, by the addition of passive filters (LCR) or by the addition of

electronic power factor correction inverters which restore the waveform back to

its undistorted state. This is a specialist area requiring either major design

changes, or specialized equipment to be used.


Circuit connection: - In this we are using Transformer (0-12) VAC, 1A, IC 7805

& 7812, diodes IN 4007, LED & resistors.

Here 230V, 50 Hz ac signal is given as input to the primary of the transformer

and the secondary of the transformer is given to the bridge rectification diode.

The o/p of the diode is given as i/p to the IC regulator (7805 &7812) through

capacitor (1000mf/35v). The o/p of the IC regulator is given to the LED through


Circuit Explanations: - When ac signal is given to the primary of the

transformer, due to the magnetic effect of the coil magnetic flux is induced in the

coil(primary) and transfer to the secondary coil of the transformer due to the

transformer action.” Transformer is an electromechanical static device which

transformer electrical energy from one coil to another without changing its

frequency”. Here the diodes are connected in a bridge fashion. The secondary

coil of the transformer is given to the bridge circuit for rectification purposes.

During the +ve cycle of the ac signal the diodes D2 & D4 conduct due to

the forward bias of the diodes and diodes D1 & D3 does not conduct due to the

reversed bias of the diodes. Similarly during the –ve cycle of the ac signal the

diodes D1 & D3 conduct due to the forward bias of the diodes and the diodes D2

& D4 does not conduct due to reversed bias of the diodes. The output of the

bridge rectifier is not a power dc along with rippled ac is also present. To

overcome this effect, a capacitor is connected to the o/p of the diodes (D2 & D3).
Which removes the unwanted ac signal and thus a pure dc is obtained. Here we

need a fixed voltage, that’s for we are using IC regulators (7805 & 7812).”Voltage

regulation is a circuit that supplies a constant voltage regardless of changes in

load current.” This IC’s are designed as fixed voltage regulators and with

adequate heat sinking can deliver output current in excess of 1A. The o/p of the

bridge rectifier is given as input to the IC regulator through capacitor with respect

to GND and thus a fixed o/p is obtained. The o/p of the IC regulator (7805 &

7812) is given to the LED for indication purpose through resistor. Due to the

forward bias of the LED, the LED glows ON state, and the o/p are obtained from

the pin no-3.

Description (78XX regulator)

The L78xx series of three-terminal positive regulators is available in TO-

220, TO-220FP, TO-3, D2PAK and DPAK packages and several fixed output

voltages, making it useful in a wide range of applications. These regulators can

provide local on-card regulation, eliminating the distribution problems associated

with single point regulation. Each type employs internal current limiting, thermal

shut-down and safe area protection, making it essentially indestructible. If

adequate heat sinking is provided, they can deliver over 1 A output current.

Although designed primarily as fixed voltage regulators, these devices can be

used with external components to obtain adjustable voltage and currents.


■ Output current to 1.5 A

■ Output voltages of 5; 6; 8; 8.5; 9; 12; 15; 18; 24 V

■ Thermal overload protection

■ Short circuit protection

■ Output transition SOA protection

7 8 0 5 + 5 V
1 k

0 - 1 2 / 1 A

7 8 1 2 + 1 2 V
230V 50H z

2 . 2 K
1 0 0 0 u F /3 5 V

I N 4 0 0 7 * 4

Here the op-amp is used as a comparator; a comparator is a ckt, which compares a signal

voltage applied at one input of an op-amp with a known reference voltage at the other

input. Here we have used 741 op-amp is used as a copmarator; the primary limitation is

the slew rate. Since 741 has slew rate equal to 0.5V/us, it takes 2* 13/0.5= 50uS to swing

from one saturation level to the other. The output from the secondary of the transformer

which is a sinusoidal (AC) signal of 50Hz is given as input to the op-amp i.e., to the non-

inverting terminal through a 2.2k limiting resistor and the inverting terminal is

grounded(Vref) . Thus the sine wave is converted to square whose output is swings from

+Vsat to –Vsat. Similarly the output signal is given to the opto-isolator as input.
VC C =+12V

2 .2 K


12 V L M 7 4 1O U T 6
1 5
230V D 1N 41 48

50Hz 4 8


VC C = -1 2 V

VC C =+5V

1 k 470E

U 2
B C 547 D 1N 41 48
1 3 .3 V
5 0 .1 u F
2 4

M C T2 1k


The motherboard of this project is designed with a MSC –51 core

compatible micro controller. The motherboard is designed on a printed

circuit board, compatible for the micro controller. This board is

consisting of a socket for micro controller, input /output pull-up

registers; oscillator section and auto reset circuit.

Micro controller core processor:


Despite it’s relatively old age, the 89C51 is one of the most popular

Micro controller in use today. Many derivatives Micro controllers have

since been developed that are based on--and compatible with--the

8051. Thus, the ability to program an 89C51 is an important skill for

anyone who plans to develop products that will take advantage of

Micro controller.

Many web pages, books, and tools are available for the 89C51


The 89C51 has three very general types of memory. To effectively

program the 8051 it is necessary to have a basic understanding of

these memory types.

The memory types are illustrated in the following graphic. They are:

On-Chip Memory, External Code Memory, and External RAM.

On-Chip Memory refers to any memory (Code, RAM, or other) that

physically exists on the Microcontroller itself. On-chip memory can be

of several types, but we'll get into that shortly.

External Code Memory is code (or program) memory that resides

off-chip. This is often in the form of an external EPROM.

External RAM is RAM memory that resides off-chip. This is often in

the form of standard static RAM or flash RAM.

Code Memory

Code memory is the memory that holds the actual 8051 program that

is to be run. This memory is limited to 64K and comes in many shapes

and sizes: Code memory may be found on-chip, either burned into the

Microcontroller as ROM or EPROM. Code may also be stored completely

off-chip in an external ROM or, more commonly, an external EPROM.

Flash RAM is also another popular method of storing a program.

Various combinations of these memory types may also be used--that is

to say, it is possible to have 4K of code memory on-chip and 64k of

code memory off-chip in an EPROM.

When the program is stored on-chip the 64K maximum is often

reduced to 4k, 8k, or 16k. This varies depending on the version of the

chip that is being used. Each version offers specific capabilities and

one of the distinguishing factors from chip to chip is how much

ROM/EPROM space the chip has.

However, code memory is most commonly implemented as off-chip

EPROM. This is especially true in low-cost development systems and in

systems developed by students.

Programming Tip: Since code memory is restricted to 64K, 89C51

programs are limited to 64K. Some assemblers and compilers offer

ways to get around this limit when used with specially wired hardware.

However, without such special compilers and hardware, programs are

limited to 64K.
External RAM

As an obvious opposite of Internal RAM, the 89C51 also supports what

is called External RAM.

As the name suggests, External RAM is any random access memory

which is found off-chip. Since the memory is off-chip it is not as

flexible in terms of accessing, and is also slower. For example, to

increment an Internal RAM location by 1 requires only 1 instruction

and 1 instruction cycle. To increment a 1-byte value stored in External

RAM requires 4 instructions and 7 instruction cycles. In this case,

external memory is 7 times slower!

What External RAM loses in speed and flexibility it gains in quantity.

While Internal RAM is limited to 128 bytes (256 bytes with an 8052),

the 8051 supports External RAM up to 64K.

Programming Tip: The 8051 may only address 64k of RAM. To

expand RAM beyond this limit requires programming and hardware

tricks. You may have to do this "by hand" since many compilers and

assemblers, while providing support for programs in excess of 64k, do

not support more than 64k of RAM. This is rather strange since it has

been my experience that programs can usually fit in 64k but often

RAM is what is lacking. Thus if you need more than 64k of RAM, check
to see if your compiler supports it-- but if it doesn't, be prepared to do

it by hand.

On-Chip Memory

As mentioned at the beginning of this chapter, the 89C51 includes a

certain amount of on-chip memory. On-chip memory is really one of

two types: Internal RAM and Special Function Register (SFR) memory.

The layout of the 89C51's internal memory is presented in the

following memory map:

As is illustrated in this map, the 8051 has a bank of 128 bytes of

Internal RAM. This Internal RAM is found on-chip on the 8051 so it is

the fastest RAM available, and it is also the most flexible in terms of
reading, writing, and modifying it’s contents. Internal RAM is volatile,

so when the 8051 is reset this memory is cleared.

The 128 bytes of internal ram is subdivided as shown on the memory

map. The first 8 bytes (00h - 07h) are "register bank 0". By

manipulating certain SFRs, a program may choose to use register

banks 1, 2, or 3. These alternative register banks are located in

internal RAM in addresses 08h through 1Fh. We'll discuss "register

banks" more in a later chapter. For now it is sufficient to know that

they "live" and are part of internal RAM.

Bit Memory also lives and is part of internal RAM. We'll talk more

about bit memory very shortly, but for now just keep in mind that bit

memory actually resides in internal RAM, from addresses 20h through


The 80 bytes remaining of Internal RAM, from addresses 30h through

7Fh, may be used by user variables that need to be accessed

frequently or at high-speed. This area is also utilized by the

Microcontroller as a storage area for the operating stack. This fact

severely limits the 8051’s stack since, as illustrated in the memory

map, the area reserved for the stack is only 80 bytes--and usually it is

less since this 80 bytes has to be shared between the stack and user

SFR Descriptions

There are different special function registers (SFR) designed in side the

89C51 micro controller. In this micro controller all the input , output

ports, timers interrupts are controlled by the SFRs. The SFR

functionalities are as follows.

This section will endeavor to quickly overview each of the standard

SFRs found in the above SFR chart map. It is not the intention of this

section to fully explain the functionality of each SFR--this information

will be covered in separate chapters of the tutorial. This section is to

just give you a general idea of what each SFR does.

P0 (Port 0, Address 80h, Bit-Addressable): This is input/output

port 0. Each bit of this SFR corresponds to one of the pins on the

Microcontroller. For example, bit 0 of port 0 is pin P0.0, bit 7 is pin

P0.7. Writing a value of 1 to a bit of this SFR will send a high level on

the corresponding I/O pin whereas a value of 0 will bring it to a low


Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and

P3), if your hardware uses external RAM or external code memory

(i.e., your program is stored in an external ROM or EPROM chip or if

you are using external RAM chips) you may not use P0 or P2. This is
because the 8051 uses ports P0 and P2 to address the external

memory. Thus if you are using external RAM or code memory you may

only use ports P1 and P3 for your own use.

SP (Stack Pointer, Address 81h): This is the stack pointer of the

Microcontroller. This SFR indicates where the next value to be taken

from the stack will be read from in Internal RAM. If you push a value

onto the stack, the value will be written to the address of SP + 1. That

is to say, if SP holds the value 07h, a PUSH instruction will push the

value onto the stack at address 08h. This SFR is modified by all

instructions which modify the stack, such as PUSH, POP, LCALL, RET,

RETI, and whenever interrupts are provoked by the Microcontroller.

Programming Tip: The SP SFR, on startup, is initialized to 07h. This

means the stack will start at 08h and start expanding upward in

internal RAM. Since alternate register banks 1, 2, and 3 as well as the

user bit variables occupy internal RAM from addresses 08h through

2Fh, it is necessary to initialize SP in your program to some other

value if you will be using the alternate register banks and/or bit

memory. It's not a bad idea to initialize SP to 2Fh as the first

instruction of every one of your programs unless you are 100% sure

you will not be using the register banks and bit variables.
DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The

SFRs DPL and DPH work together to represent a 16-bit value called the

Data Pointer. The data pointer is used in operations regarding external

RAM and some instructions involving code memory. Since it is an

unsigned two-byte integer value, it can represent values from 0000h

to FFFFh (0 through 65,535 decimal).

Programming Tip: DPTR is really DPH and DPL taken together as a

16-bit value. In reality, you almost always have to deal with DPTR one

byte at a time. For example, to push DPTR onto the stack you must

first push DPL and then DPH. You can't simply plush DPTR onto the

stack. Additionally, there is an instruction to "increment DPTR." When

you execute this instruction, the two bytes are operated upon as a 16-

bit value. However, there is no instruction that decrements DPTR. If

you wish to decrement the value of DPTR, you must write your own

code to do so.

PCON (Power Control, Addresses 87h): The Power Control SFR is

used to control the 8051's power control modes. Certain operation

modes of the 8051 allow the 8051 to go into a type of "sleep" mode,

which requires much, less power. These modes of operation are

controlled through PCON. Additionally, one of the bits in PCON is used

to double the effective baud rate of the 8051's serial port.

TCON (Timer Control, Addresses 88h, Bit-Addressable): The

Timer Control SFR is used to configure and modify the way in which

the 8051's two timers operate. This SFR controls whether each of the

two timers is running or stopped and contains a flag to indicate that

each timer has overflowed. Additionally, some non-timer related bits

are located in the TCON SFR. These bits are used to configure the way

in which the external interrupts are activated and also contain the

external interrupt flags which are set when an external interrupt has


TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used

to configure the mode of operation of each of the two timers. Using

this SFR your program may configure each timer to be a 16-bit timer,

an 8-bit auto reload timer, a 13-bit timer, or two separate timers.

Additionally, you may configure the timers to only count when an

external pin is activated or to count "events" that are indicated on an

external pin.

TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two

SFRs, taken together, represent timer 0. Their exact behavior depends

on how the timer is configured in the TMOD SFR; however, these

timers always count up. What is configurable is how and when they

increment in value.
TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two

SFRs, taken together, represent timer 1. Their exact behavior depends

on how the timer is configured in the TMOD SFR; however, these

timers always count up. What is configurable is how and when they

increment in value.

P1 (Port 1, Address 90h, Bit-Addressable): This is input/output

port 1. Each bit of this SFR corresponds to one of the pins on the

Microcontroller. For example, bit 0 of port 1 is pin P1.0, bit 7 is pin

P1.7. Writing a value of 1 to a bit of this SFR will send a high level on

the corresponding I/O pin whereas a value of 0 will bring it to a low


SCON (Serial Control, Addresses 98h, Bit-Addressable): The

Serial Control SFR is used to configure the behavior of the 8051's on-

board serial port. This SFR controls the baud rate of the serial port,

whether the serial port is activated to receive data, and also contains

flags that are set when a byte is successfully sent or received.

Programming Tip: To use the 8051's on-board serial port, it is

generally necessary to initialize the following SFRs: SCON, TCON, and

TMOD. This is because SCON controls the serial port. However, in most

cases the program will wish to use one of the timers to establish the
serial port's baud rate. In this case, it is necessary to configure timer 1

by initializing TCON and TMOD.

SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is

used to send and receive data via the on-board serial port. Any value

written to SBUF will be sent out the serial port's TXD pin. Likewise, any

value which the 8051 receives via the serial port's RXD pin will be

delivered to the user program via SBUF. In other words, SBUF serves

as the output port when written to and as an input port when read


P2 (Port 2, Address A0h, Bit-Addressable): This is input/output

port 2. Each bit of this SFR corresponds to one of the pins on the

Microcontroller. For example, bit 0 of port 2 is pin P2.0, bit 7 is pin

P2.7. Writing a value of 1 to a bit of this SFR will send a high level on

the corresponding I/O pin whereas a value of 0 will bring it to a low


Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and

P3), if your hardware uses external RAM or external code memory

(i.e., your program is stored in an external ROM or EPROM chip or if

you are using external RAM chips) you may not use P0 or P2. This is

because the 8051 uses ports P0 and P2 to address the external

memory. Thus if you are using external RAM or code memory you may

only use ports P1 and P3 for your own use.

IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is

used to enable and disable specific interrupts. The low 7 bits of the

SFR are used to enable/disable the specific interrupts, where as the

highest bit is used to enable or disable ALL interrupts. Thus, if the high

bit of IE is 0 all interrupts are disabled regardless of whether an

individual interrupt is enabled by setting a lower bit.

P3 (Port 3, Address B0h, Bit-Addressable): This is input/output

port 3. Each bit of this SFR corresponds to one of the pins on the Micro

controller. For example, bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7.

Writing a value of 1 to a bit of this SFR will send a high level on the

corresponding I/O pin whereas a value of 0 will bring it to a low level.

Auto reset Circuit:

39 21
38 P 0 .0 /A D 0 P 2 .0 /A 8 22
37 P 0 .1 /A D 1 P 2 .1 /A 9 23
36 P 0 .2 /A D 2 P 2 .2 /A 1 0 24
35 P 0 .3 /A D 3 P 2 .3 /A 1 1 25
34 P 0 .4 /A D 4 P 2 .4 /A 1 2 26
33 P 0 .5 /A D 5 P 2 .5 /A 1 3 27
32 P 0 .6 /A D 6 P 2 .6 /A 1 4 28
P 0 .7 /A D 7 P 2 .7 /A 1 5
1 10
2 P 1 .0 P 3 .0 /R X D 11
3 P 1 .1 P 3 .1 / T X D 12
4 P 1 .2 P 3 . 2 /I N T 0 13
5 P 1 .3 P 3 . 3 /I N T 1 14
6 P 1 .4 P 3 .4 /T 0 15
7 P 1 .5 P 3 .5 /T 1 16
8 P 1 .6 P 3 .6 /W R 17
22pF P 1 .7 P 3 .7 /R D
19 30
18 X TA L1 A L E /P R O G 29
4 - 12Mhz X TA L2 P S E N
9 E A /V P P
22pF VC C =+5vdc
A T 89C 51


8 .2 k

The auto reset circuit is a RC network as shown in the mother board

circuit diagram. A capacitor of 1-10mfd is connected in series with a

8k2 resister the R-C junction is connected to the micro controller pin –

9 which is reset pin. The reset pin is one when ever kept high( logic 1)

the programme counter (PC) content resets to 0000h so the processor

starts executing the programme. from that location. When ever the

system is switched ON the mother board gets power and the capacitor

acts as short circuit and the entire voltage appears across the resistor,
so the reset pin get a logic 1 and the system get reset, whenever it is

being switched ON.

Pull-UP Resisters:

VC C =+5V


39 21
38 P 0 .0 /A D 0 P 2 .0 /A 8 22
37 P 0 .1 /A D 1 P 2 .1 /A 9 23
36 P 0 .2 /A D 2 P 2 .2 / A 1 0 24
35 P 0 .3 /A D 3 P 2 .3 / A 1 1 25
PORT-0 34 P
0 .4 /A
0 .5 /A
P 2 .4 / A 1 2
P 2 .5 / A 1 3
33 27
32 P 0 .6 /A D 6 P 2 .6 / A 1 4 28
P 0 .7 /A D 7 P 2 .7 / A 1 5
1 10
2 P 1 .0 P 3 .0 / R X D 11
3 P 1 .1 P 3 .1 / T X D 12
4 P 1 .2 P 3 .2 /IN T 0 13
5 P 1 .3 P 3 .3 /IN T 1 14
6 P 1 .4 P 3 .4 /T 0 15
7 P 1 .5 P 3 .5 /T 1 16
8 P 1 .6 P 3 .6 / W R 17
P 1 .7 P 3 .7 /R D
19 30
18 X TA L1 A L E /P R O G 29
9 E A /V P P

A T 89C 51

The PORT0 and PORT2 of the MCS-51 architecture is of open collector

type so on writing logic 0 the pins are providing a perfect ground

potential. Where as on writing logic 1 the port pins behaves as high

impedance condition so putting a pull-up resister enables the port to

provide a +5volt( logic 1). Port1 and Port3 are provided with internal
pull-ups. A pull-up resister is normally a 10K resistance connected

from the port pin to the Vcc (+5) volt.

Crystal Oscillator

The 8051 family microcontroller contains an inbuilt crystal oscillator,

but the crystal has to be connected externally. This family of

microcontroller can support 0 to 24MHz crystal and two numbers of

decoupling capacitors are connected as shown in the figure. These

capacitors are decouples the charges developed on the crystal surface

due to piezoelectric effect. These decoupling capacitors are normally

between 20pf to 30pf. The clock generator section is designed as


The Microcontroller design consist of two parts

1) Hardware.

2) Software.

The controller operates on +5 V dc, so the regulated + 5v is supplied

to pin no. 40 and ground at pin no. 20. The controller is used here

need not required to handle high frequency signals, so as 4 MHz

crystal is used for operating the processor. The pin no. 9 is supplied

with a +5V dc through a push switch. To reset the processor .As

prepare codes are store in the internal flash memory the pin no. 31 is

connected to + Vcc



There is a program written with assembly language using MCS-51

mnemonics. The code is written to accept a specific access word to

give access the user to control the devices/appliances. After receiving

the access control word successfully from the telephone the program

enter into the scan mode to accept control word from the remote

mobile and decode it for issuing necessary control signal to different

relay drivers to control the appliances.

3 9 2 1
3 8 P 0 . 0 /P A 2 D . 0 02 / 2 A 8
3 7 P 0 . 1 /P A 2 D . 1 12 / 3 A 9
3 6 P 0 . 2 P/ A2 D. 2 22 / A4 1 0
3 5 P 0 . 3 P/ A2 D. 3 32 / A5 1 1
3 4 P 0 . 4 P/ A2 D. 4 42 / A6 1 2
3 3 P 0 . 5 P/ A2 D. 5 52 / A7 1 3
3 2 P 0 . 6 P/ A2 D. 6 62 / A8 1 4
P 0 . 7 P/ A2 D. 7 7/ A 1 5
F R O MA S I G N A L1 C O N D .1 0
2 P 1 . 0 P 3 . 0 1/ R 1 X D
B P 1 . 1 P 3 . 1 1 / T2 X D
C 3
4 P 1 . 2 P 3 . 2 1/ I 3 N T 0
D P 1 . 3 P 3 . 3 1/ I 4 N T 1
6 P 1 . 4 P 3 . 41 / 5 T 0
S Y N C . 7 P 1 . 5 P 3 . 51 / 6 T 1
8 P 1 . 6 P 3 . 6 1 / W7 R
2 2 p F P 1 . 7 P 3 . 7 / R D
1 9 3 0
1 1 .0 5 9 M H z

1 8 X T A AL L1 E / P2 9R O G
X T A L 2P S E N
3 1
9 E A / V P P
2 2 p VF c c = + 5 V

A T 8 9 C 5 1
1 0 u F

8 . 2 k
D. Differential amplifier:
The circuit shown is used for finding the difference of two voltages each
multiplied by some constant (determined by the resistors).

R f
1 0 k
V c c = + 1 2 v

R 1 U 1 A
V 1 2

1 0 k 6
O U T V o u t
R 2
V 2 3

1 0 k L M 7 4 1
R g

1 0 k V c c - 1 2 v

The name "differential amplifier" should not be confused with the "differentiator", also
shown on this page.

(Rf +R1)Rg
Rf (V1)
Vout = V2 - Rg
(Rg +R2)R1

• Differential Zin (between the two input pins) = R1 + R2 (Note: this is


For common-mode rejection, anything done to one input must be done to the other. The
addition of a compensation capacitor in parallel with Rf, for instance, must be balanced
by an equivalent capacitor in parallel with Rg.

Whenever Rf = Rg and R1=R2 , the differential gain is

Vout = A(V2 – V1) and A = Rf /R1

When R1 = Rf and R2 = Rg the differential gain is A = 1 and the circuit acts as a
differential follower:

Vout = V2 - V1
Subtractor (diff.amplifier):-

V C C 1 k
1 0 k
V y
T o v o l t a g e
c o m p a r a t o r
1 k

2 -
V C C 3 +
1 k
L M 7 4 1

V x 1 0 k

d i f f e r e n t i a l a m p l i f i e r

The above fig. shows the differential amplifier with one op-amp. Close examinations of
the above figure reveals that a differential amplifier is a combination of inverting and
non-inverting amplifier. That is, when Vx is reduced to zero the ckt is a non-inverting
amplifier. Where as the ckt is an inverting amplifier when input Vy is reduced to zero.
The ckt in fig (a) has two inputs, Vx and Vy: we will
therefore use the superposition theorem in order to establish the relationship between
inputs and outputs. When Vy =0V, the configuration becomes an inverting amplifier:
hence the output due to Vx only is
Vox = - Rf (Vx) / R1.
Similarly, when Vx = 0V, the configuration is a non-inverting amplifier having a voltage
–divider network composed of R2 & R3 at the non inverting input. Therefore,

V1 = R3 (Vy) / R2 + R3
And the output due to Vy then is
V0y = ( 1+ Rf / R1) V1
That is,
V0y = R3 / R2 + R3 (R2 + R3 / R1) Vy
Since R1 = R2 & Rf = R3,
V0y = Rf (Vy) / R1
Thus from equation 1 and 2, the net output voltage is
V0 = V0x + V0y
= - Rf / R1 (Vx – Vy)
` = - Rf (Vxy) / R1
or the voltage gain
Ad = V0 / Vxy = - Rf / R1

Note that the gain of the differential amplifier is the same as that of inverting amplifier.

General Description (LM741)

The LM741 series are general purpose operational amplifiers which feature
improved performance over industry standards like the LM709. They are direct, plug-in
replacements for the 709C, LM201, MC1439 and 748 in most applications. The
amplifiers offer many features which make their application nearly foolproof: overload
protection on the input and output, no latch-up when the common mode range is
exceeded, as well as freedom from oscillations. The LM741C/LM741E is identical to the
LM741/LM741A except that the LM741C/LM741E has their performance guaranteed
over a 0C to a70C temperature range, instead of b55C to a125C.
Monostable multivibrator: _ It is also called as a one-shot multivibrator. This

circuit requires an external triggering pulse to change the state of the output,

hence its name one-shot multivibrator. It is a pulse generating circuit in which the

duration of the pulse is determined by the RC network connected externally to

the 555 timers.

In a stable state the outputs of the circuit is approximately zero or at logic low

level. When an external trigger pulse is applied, the output is forced to go high.

The external RC network connected to the timer determines the time output

remains high. At the end of the timing interval, the output automatically reverts

back to its logic low state. The output stays low until the trigger is applied. Then

the cycle repeats.

Monostable operation:- When the output is low i.e. the circuit is in a

stable state, transistor Q1 is on and capacitor C is shorted to ground. However,

upon application of a –ve trigger pulse to pin –2, transistor Q1 is turned OFF

which releases the short circuit across the external capacitor C and drives the o/p

high. The capacitor C now starts charging up towards Vcc through a RA. When

the voltage across the capacitor equals 2/3 Vcc, Comparator 1;s o/p switches

From low to high which in turn drives the o/p to low state via the o/p the flip-flop.

At the same time, the output of the flip-flop turns transistor Q1 ON, enhances
capacitor C rapidly discharges to the transistor. The output of the Monostable

remains low until a trigger pulse again applied. Then the cycle repeat.

The time during which the o/p remains high is given by

Tp =1.1 R.C
When the IR signal is transmitter the sensor at the R*R section catches the

signal and that signal to trigger pin-2 of IC 555,which in turn trigger the ckt and

thus the output remains high. Its remains high until the charging and dis-charging

of capacitor through the resistor and C values decides the ON time.

The relay driver is design by using a BC547 transistor .The relay used here having the

specification as follows

 Coil resistance =400ohm

 Coil voltage=12Vdc

 Contact capacity=230V, 7A

The above specification indicates that the coil requires 12V dc and 200mA current dc.

The Microcontroller can’t supply more then 10mA current. So driver section is very

much required. BC547 has a typical current gain of 200 and maximum current capacity

of 1A. So a typical base current of 200 µ A can trigger to on the relay.


These are vary much reliable devices and widely used on field. The operating

frequency of these devices are minimum 10-20ms.That is 50Hz – 100Hz.The relay

which is used here can care 25mA currents continuously. The electromagnetic relay

operates on the principle magnetism. When the base voltage appears at the relay driver

section, the driver transistor will be driver transistor will be driven into saturation and

allow to flow current in the coil of the relay, Which in turn create a magnetic field and

the magnetic force produced due to that will act against the spring tension and close the

contact coil. Whenever the base voltage is withdrawn the transistor goes to cutoff .So

no current flow in the coil of the relay. Hence the magnetic field disappears so the

contact point breaks automatically due to spring tension. Those contact points are
isolated from the low voltage supply, so a high voltage switching is possible by the help

of electromagnetic relays.

The electromagnetic relays normally having 2 contact points. Named as normally

closes (NC), normally open (NO). Normally closed points will so a short CKT path

when the relay is off. Normally open points will so a short CKT path when the relay is




IN 4 0 0 7
1 0 u F R E L A Y S P D T

1 .5 K
INPUT B C 5 4 7
The indicator section consists of a light emitting diode and its driver

circuit is designed on the basis of current required to glow the light

emitting diode. Here the driver circuit is required for the following


1) The Microcontroller cannot provide adequate current for glowing

the LED. The LEDs requires a current between 10mA to 20mA of

current to glow.

2) The driver circuit provides current to the load from a separate

source, so the load current used not pass through the


3) The driver circuit activates the load on receipt of a logic signal

from the Microcontroller and of the load in the absence of the

signal as he current requirement Is very less to glow a LED a

single stage driver is sufficient to drive the load. The driver

circuit is nothing other than a perfect a transistor switch. The

driver transistor goes in to saturation on receipt of base signal

and drives into cut-off region, in absence of base signal.

The driver designs around a BC548/BC547 transistor and

designed for a working voltage of +5 V dc and 10mA current.

Rc= Vcc-VCEsat = 5-0.2V

IC 10mA

= 4.8KΩ

Ib=Ic/β =10mA/200=5x10-5 A=0.5x10-6A

=0.5µ A

As per the design a 0.5µ A current is sufficient to trigger the driver

circuit. As this current is very small and to avoid mistriggering a

base current of 100µ A is assumed


⇒ IBRB = 5-0.7

RB = 5-0.7V/100µ A = 4.3/100 MΩ

= 0.043x10-6Ω

= 43KΩ

On approximation 68K is connected by calculating back

IB = 4.3/68K = 60≅ 70µ A

Which is adequate to avoid mis-triggering level also this amount of

current can be drawn from the Microcontroller without any problem.

The indicator section consists of 8 no of driver with 8 no of LED as

indicator load. The circuit diagram is enclosed.

Whenever there is a fault in any of the condition (parameter) it

indicates a high output at the Microcontroller, which is given to the

base of the driver transistor (BC547/BC548) with a base resistance

(68k/56k) & thus transistor

r comes to saturation condition i.e. ON condition, thus the emitter

current flows to the collector of the transistor at which the LED is

connected through a current limiting resistor (330E/470E) thus the

LED gets forward biased which turns ON the LED it indicates the

channels fault .



3 3 0 E


6 8 k
INPUT B C 5 4 7
Analog to Digital converters are among the most widely used devices

for data computers use binary values, but in the

physical world everything is analog. Temperature, pressure, humidity,

and velocity are a few examples of physical quantities that we deal

with every day. A physical quantity is converted to electrical signals

using a device called transducer. Transducer is also referred to as

sensors. Although there are sensors are for temperature, velocity,

pressure, light, and many other natural quantities, they produce an

output that is voltage. Therefore we need an analog to digital

converter to translate the analog signal to digital numbers so that the

Micro controller can read them. A widely used ADC chip is ADC804.


The ADC804 IC is an analog to digital converter in the family of the

ADC800 series from national semiconductor. It also available from

many other manufactures. It works with +5 volt and has a resolution

of 8 bits. In addition to resolution, conversion time is another major

factoring judge an ADC.Conversion time is defined as the time it take

the ADC to convert the analog input to digital (binary) number. In the
ADC804,the conversion time varies depending on the clocking signal

applied to the CLK R and CLK IN pins, but it cannot be faster than 110

µ s. The ADC804 pin description follows.


Chip select is active low input used to active the ADC804 chip. To

access the ADC804, the pin must be low.

RD (Read)

This is an input signal and is active low. The ADC converters the

analog input to its binary equivalent and hold it in an internal registrar.

RD is used to get the converted data out of the ADC804 chip. When

CS=0,if a high-to-low pulse is applied to the RD pin, the 8-bit digital

output shows up at the D0-D7 data pins. The RD pin is also referred to

as output enable.

WR (write; a better name might bbe “start conversion_

This is an active low input used to inform the ADC804 to start the

conversion process. If CS=0 when WR makes a low-to-high transition,

theADC804 starts converting the analog input value of Vin to an 8-bit

digital number. The amount of time it takes to convert varies

depending on the CLK IN and CLK R values explained below. When the

data conversion is complete, the INTR pin is forced low by ADC804.


CLK IN is an input pin connected to an external clock is used for

timing. However, the 804 has an internal clock generators. To use the

internal clock generator of the ADC 804,the CLK IN and CLK R pins are

connected to a capacitor and a resistor, as shown in figure. In that

case the clock frequency is determined by the equation :

f = 1/1.1RC

Typical values are R=10k ohms and C=150 pF. Substituting in the

above equation, we get f = that case the conversion time

is 110 µ s.

INTR (interrupt. A better name might be “end of conversion”)

This is an output pin and is active low. It is a normally high pin and

when the conversion is finished, it goes low to signal the CPU that the

converted data is ready to be picked up. After INTR goes low, we make

CS=0 and send a high –to-low pulse to the RD pin to get the data out

of the ADC804 chip.

V in(+) and Vin(-)

These are the different analog inputs where Vin = Vin(+) - Vin(-).

Often the vin(-) pin is connected to ground and the Vin(+) pin is used

as the analog input to converted to digital.


This is the +5 volt power supply. It is also use as a reference voltage

when the Vref /2 input(pin9) is open(not connected)


Pin 9 is an input voltage used for the reference voltage. If this pin is

open, the analog input voltage for the ADC804 is in the range of 0 to 5

volts. However there are many applications where the analog input

applied to Vin needs to be other than 0 to +5 V range.Vref/2 is used to

implement analog input voltages other than 0 –5V.For example, if the

analog input range needs to be 0 to 4 volts,Vref/2 is connected to 2

volts .

D0 – D7

D0 – D7 (where D7 is the MSB, D0 the LSB) are the digital data output

pins. these are tri-state buffered and the converted data is accessed

only when CS = 0 and RD is forced low. To calculate the output

voltage, use the following formula.

Dout = Vin / step size

Where Dout = digital data output, Vin = analog output voltage and

step size is the smallest change, which is (2 X Vref/2) / 256 for an 8-

bit ADC.

VC C =5 V

P1.0 D 0 18 1pF
18 CLK R 1 0 k
P1.1 D 1 19
P1.2 D 2 CLK IN
16 4
15 Vin(+)
P1.4 D 4 6
P1.5 D 5
13 7 Vin(-) 1 0 k
P1.6 D 6
8 Agnd
P1.7 D 7
P3.0 RD
2 Dgnd
P3.1 WR
3 CS

A T 89C51
89S8 252 ADC 0804
4. Principle of Design

Automatic Power Factor correction device is developed basing on a micro

controller 89c51. The voltage and current sampled is converted in to square

wave using a zero cross detector. The V and I sample signals are feed to the

micro controller at INT0 and INT1 and the difference between the arrival of wave

forms indicate the phase angle difference. The difference is measured with high

accuracy by using internal timer. This time value is calibrated as phase angle and

corresponding power factor. The values are displayed in the 2x16 LCD module

after converting suitably. The capacitor banks are switched as per the calibration

in steps.

5. Conclusion:
The project is tested in the laboratory condition and found operating satisfactorily.

The errors observed are under the experimental tolerance limit. This can

measure the power factor with an tolerance of .01. The capacitor banks can be

controlled by the relays controlled by the micro controller.