You are on page 1of 67

Lecture 2: Assembly language -basics

Based on slides prepared by

Carmi merimovich
Processor architecture concepts
Data Representation, Review Boolean Operations, Review Processor architecture concepts

Instruction Execution—Naive

Fetch: Control fetches instruction from the memory into the


CPU. Special register, IP, points to the address in memory to
fetch from.
Decode: The control determines the operations needed to be
done.
Fetch operands: If there is a memory operand, it is fetched.
Execute: The ALU executes the operation on the operands as
instructed by the control.
If an output operand is in memory, the control stores the data
into memory.

Lecture 1(2—31) 20/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Program Loading

In order to run, the program must be in memory. (At least,


some of it must be).
In the operating system, there is a module named the loader.
Given executable file, the loader finds free memory and reads
the instructions, and statically allocated variable into memory.
The executable contains other information, like name of
dynamic libraries used, and addresses to be ‘patched’.
After the patching is done, the loader jumps into the program
entry point. This address is also specified in the executable.

Lecture 1(2—31) 21/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Execution Environment

We will work in the processor ‘protected mode’. In this mode


we can access 4GB of memory.
In ‘real mode’ the processor can access 1MB of memory. This
make the processor very much like the 8086, may it rest in
peace.
In ‘protected mode’, the processor can be in ‘virtual 86’ mode.
This allows several processes to run in environment similar to
the 8086.

Lecture 1(2—31) 22/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Registers

The registers are storage place inside the CPU. Their effective
access time is 0.
32-bit registers:

EAX EBP
EBX ESP
ECX ESI
EDX EDI
EFLAGS EIP

Lecture 1(2—31) 23/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Names for parts of registers (1)

Some 32-bit registers have names for smaller parts:

31 − 24 23 − 16 15 − 8 7 − 0
EAX
AX
AH AL

31 − 24 23 − 16 15 − 8 7 − 0
EBX
BX
BH BL

Lecture 1(2—31) 24/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Names for parts of registers (2)

Some 32-bit registers have names for smaller parts:

31 − 24 23 − 16 15 − 8 7 − 0
ECX
CX
CH CL

31 − 24 23 − 16 15 − 8 7 − 0
EDX
DX
DH DL

Lecture 1(2—31) 25/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Names for parts of registers (3)

31 − 24 23 − 16 15 − 8 7 − 0
ESI
SI
EDI
DI
EBP
BP
ESP
SP

Lecture 1(2—31) 26/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Specified uses (1)

EIP is the instruction pointer. It contains the address of the


next instruction to be executed. Manipulation of IP amounts
to branching.
ESP is used as a stack pointer. It should NEVER be used for
something else.
EBP is mostly used as frame pointer (details in a future
lecture). It is highly recommended not to use it for something
else.

Lecture 1(2—31) 27/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Specified uses (2)

EFLAGS consists of individual bits serving to control the CPU


or to reflect outcome of instruction. A flag is set when it is 1.
CF, Carry flag: Set when unsigned arithmetic operation is too
large for the specifies destination.
OF, Overflow flag: Same as CF, but for signed arithmetic.
SF, Sign flag: Set when result of arithmetic/logical instruction
is ‘negative’.
ZF, Zero flag: Set when result of arithmetic/logical instruction
is zero.
AF, Auxiliary carry flag: Set when result of arithmetic
instructions causes a carry from bit 3 to bit 4.
PF, Parity flag: Set when the number of set bits in the results
is even.

Lecture 1(2—31) 28/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Physical Memory

Each byte in the computer memory has an address. That is,


the memory is byte addressable.
In nowadays processors, the address range begins at 0 and can
reach 236 − 1.
A running program generates directly only logical addresses.
The logical address is translated into physical address by the
processor.

Lecture 1(2—31) 29/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Generation of Physical address

32-bit Linear Address


Paging Unit o Page Table


36-bit Physical Address

Lecture 1(2—31) 30/448


Data Representation, Review Boolean Operations, Review Processor architecture concepts

Paging Unit

If the paging unit is disabled, the linear address is used to


access the memory. That is, the linear address is also the
physical address.
If the paging unit is enabled, the linear address is split into two
fields:
20-bit page number 12-bit offset
A process similar to the way logical address is translated into
linear address is used now. The 20-bit page number is used to
index a table containing physical base addresses (with the low
12 bits always 0) and the offset is added.

Lecture 1(2—31) 31/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Assembly Language: Basics

We will learn how to define variables and constants. Then we write


simple complete programs.

Lecture 2(32—81) 32/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Integer Constants

General form: [{+ | -}] digits [radix]


The radix is one of the follows
h hexadecimal
r encoded real
q|o octal
t decimal
d decimal
y binary
b binary

The default radix is decimal. Examples: 26, 26d, 101010b, 42q,


42o, 1Ah, 0B5h.

Lecture 2(32—81) 33/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Integer Expressions

Integer expression involves integer constants and operators. The


resulting value must be expressible in 32 bits.

Operator Name Precedence


() parentheses 1
+, − unary plus, unary minus 2
∗, /, mod multiply, divide, modulus 3
+, − add, subtract 4

Lecture 2(32—81) 34/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Character Constants

General form: A single character inside ’ or ”.


Examples: ’a’, SZ".
The character constant is converted to integer using the Ascii
table. That is instead of 65 we can write ’A’.

Lecture 2(32—81) 35/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

String Constants

General form: A string of characters inside ’ or ”.


Examples: ’Carmi’, "Hello, world", "What’s up?"

Lecture 2(32—81) 36/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Reserved Words

Instruction mnemonic (e.g., MOV).


Directives (e.g., .model).
Attributes (e.g., byte).
Operators (e.g., mod).
Predefined symbols (e.g., @data).

Lecture 2(32—81) 37/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Identifiers

Identifier might be a variable, a constant, a procedure, or a


label.
It may have up to 247 characters.
It is not case sensitive.
The first character is one of A-Z, _, @, $.
From the second character and on, digits are also legal.
A reserved word can not be an identifier.
Examples: Var, Mone, _12345, Min.

Lecture 2(32—81) 38/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Directives

A directive is a command to the Assembler.


It is not related directly to the machine language at hand.
Example: .data ;identifies area to contain variables.
.code ;identifies area to contain program
code.

Lecture 2(32—81) 39/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Instructions

Instruction is a statement directly related to the processor.


After the assembling/linking, it will be executed.
Instruction contains four parts

[Label:] Mnemonic [Operands] [;Comments]

Lecture 2(32—81) 40/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Labels

A label is an identifier.
A label is used as a place marker, for code or data.
Assuming Var is a label marking address 20 then the following
two instructions do the same thing:

mov ax, [20] ;AX <- 16-bit word from address 20


mov ax, Var

Code example:

target: ; Note: Label in code must end with ‘:’


. . .
jmp target

Lecture 2(32—81) 41/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Instruction Mnemonic

Short string describing the instruction to be executed.


Examples: mov, add, sub, mul, call.

Lecture 2(32—81) 42/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Operands

Instructions can have zero to three operands.


Operands can be one of register, memory, constant, (I/O port),
Examples:

stc ; Set CF
inc ax ; Add 1 to ax
sub count,bx ; Subtract bx from count

Lecture 2(32—81) 43/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Comment

Single line comment: Everything from ‘;’ to the end of line is


ignored by the assembler.

Lecture 2(32—81) 44/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Program with Variables I

TITLE First program

.386
.model flat

extern _ExitProcess@4:Near
.code ;Code area
_main:
push 0 ;Black box. Always terminate
call _ExitProcess@4 ;program with this sequence.

end _main ;end of program.


;The label is the entry point.

Lecture 2(32—81) 45/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

From Source to Execution

?>=<
89:;
.INCC ?>=<
89:;
.LIB? GFED
@ABC
.DLL
CC ?? @@
CC ?? @@
CC ?? @@
C!! ?? @@
 @
@ABC
GFED
.ASM //Assembler // GFED
@ABC
.OBJ //Linker // GFED
@ABC
.EXE //Loader // Memory
CC @@
CC @@
CC @@
CC @@
@ABC
GFED
!! @ABC
GFED
@
.LST .MAP

Lecture 2(32—81) 46/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Assembling

In a Windows command window issue the following:


ML -Zi -c -Fl -coff FirstProgram.asm
The switches cause the assembler to generate in addition to
FirstProgram.obj, also FirstProgram.lst and debug information.

Lecture 2(32—81) 47/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

.LST I

Microsoft (R) Macro Assembler Version 7.10.3077 10/20/03 12:16:07


First Program Page 1 - 1

TITLE First Program


.386
.model flat

extern _ExitProcess@4:Near
00000000 .code ;Code area
00000000 _main:
00000000 6A 00 push 0 ;Black box. Terminate
00000002 E8 00000000 E call _ExitProcess@4 ; program with this
00000007 ; sequence.

end _main ;End of program. The Label


; is the entry point.
Microsoft (R) Macro Assembler Version 7.10.3077 10/20/03 12:16:07
First Program Symbols 2 - 1

Segments and Groups:

N a m e Size Length Align Combine Class

FLAT . . . . . . . . . . . . . . GROUP

Lecture 2(32—81) 48/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

.LST II
_DATA . . . . . . . . . . . . . 32 Bit 00000000 DWORD Public ’DATA’
_TEXT . . . . . . . . . . . . . 32 Bit 00000007 DWORD Public ’CODE’

Procedures, parameters and locals:

N a m e Type Value Attr

$$$00001 . . . . . . . . . . . . P Near 00000000 _TEXT Length= 00000007 Private

Symbols:

N a m e Type Value Attr

@CodeSize . . . . . . . . . . . Number 00000000h


@DataSize . . . . . . . . . . . Number 00000000h
@Interface . . . . . . . . . . . Number 00000000h
@Model . . . . . . . . . . . . . Number 00000007h
@code . . . . . . . . . . . . . Text _TEXT
@data . . . . . . . . . . . . . Text FLAT
@fardata? . . . . . . . . . . . Text FLAT
@fardata . . . . . . . . . . . . Text FLAT
@stack . . . . . . . . . . . . . Text FLAT
_ExitProcess@4 . . . . . . . . . L Near 00000000 FLAT External
_main . . . . . . . . . . . . . L Near 00000000 _TEXT Public

0 Warnings
0 Errors

Lecture 2(32—81) 49/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Linking

In a Windows command window issue the following:


LINK32 FirstProgram.obj kernel32.lib
/SUBSYSTEM:CONSOLE /DEBUG
The switches cause the linker to generate, in addition to
FirstProgram.exe, the map file FirstProgram.map, and debug
information.
Make sure your LIB environment variable points to the
directory containing kernel32.lib.

Lecture 2(32—81) 50/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

.MAP I

FirstProgram
Timestamp is 3f93b8b8 (Mon Oct 20 12:28:08 2003)
Preferred load address is 00400000

Start Length Name Class


0001:00000000 00001011H .text CODE
0002:00000000 00000121H .rdata DATA
0002:00000121 00000000H .edata DATA
0002:00000124 0000018eH .rdata$debug DATA
0003:00000000 00000014H .idata$2 DATA
0003:00000014 00000014H .idata$3 DATA
0003:00000028 00000030H .idata$4 DATA
0003:00000058 00000030H .idata$5 DATA
0003:00000088 0000011eH .idata$6 DATA

Address Publics by Value Rva+Base Lib:Object


0000:00000000 ___safe_se_handler_table 00000000 <absolute>
0000:00000000 ___safe_se_handler_count 00000000 <absolute>
0001:00000000 _main 00401000 FirstProgram.obj
0001:00000008 _ExitProcess@4 00401008 f kernel32:KERNEL32.dll
0003:00000000 __IMPORT_DESCRIPTOR_KERNEL32 00404000 kernel32:KERNEL32.dll
0003:00000014 __NULL_IMPORT_DESCRIPTOR 00404014 kernel32:KERNEL32.dll
0003:00000058 __imp__ExitProcess@4 00404058 kernel32:KERNEL32.dll
0003:0000005c \177KERNEL32_NULL_THUNK_DATA 0040405c kernel32:KERNEL32.dll
entry point at 0001:00000000

Lecture 2(32—81) 51/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

VS.NET suggestion

There are screen shots in the course site.

Lecture 2(32—81) 52/448


Defining Data
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Data Definition

General form:

[label] directive initializer [,initializer] , . . .

Initializers are constants or constant expressions of type and


size matching the directive.
At least one initializer must be given. If none is needed, we use
‘ ?’.

Lecture 2(32—81) 53/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

BYTE, SBYTE

Examples:

v1 BYTE 0
BYTE 255
v2 BYTE ’A’
SBYTE -128
var3 SBYTE 127
BYTE ?

DB is an old version of BYTE and SBYTE:

VAR DB -128
DB 255

Lecture 2(32—81) 54/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

BYTE, SBYTE: Multiple Initializers


The statement
vec BYTE 1,2,3,4
and the statements
vec BYTE 1
BYTE 2
BYTE 3
BYTE 4
generates the same sequence of bytes in memory
Offfset Value
0000 1
0001 2
0002 3
0003 4
Lecture 2(32—81) 55/448
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

BYTE: Strings

Hello BYTE "Hello world!", 0


Hello2 BYTE ’H’, ’e’, "l", "l", ’o’, ’ ’
BYTE ’w’, "o", "r", "l", ’d’, 0
Hello3 BYTE "Hello"
BYTE " world!"
BYTE 0

Null terminated strings are popular in Windows, and in C.

Lecture 2(32—81) 56/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

BYTE: Dup operator

A storage place with repeated initializers in being allocated.

vec1 BYTE 20 DUP(0)


vec1a BYTE 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

vec2 BYTE 10 DUP(?)


vec2a BYTE ?,?,?,?,?,?,?,?,?,?

str BYTE 4 DUP("Hello")


stra BYTE "HelloHelloHelloHello"

Lecture 2(32—81) 57/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

WORD, SWORD

Examples:

v1 WORD 0
WORD 65535
v2 SWORD -32768
SWORD 32767
vec WORD 20 DUP(0)
var3 WORD ?
array SWORD 10 DUP (?)

DW is an old version of WORD and SWORD:

VAR DW -32768
DW 65535

Lecture 2(32—81) 58/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

WORD, SWORD: Multiple initializers


The statement
vec WORD 4,3,2,1
and the statements
vec WORD 4
WORD 3
WORD 2
WORD 1
generate the same memory map:
Offset Value
0000 4
0002 3
0004 2
0006 1
Lecture 2(32—81) 59/448
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

DWORD, SDWORD

Var1 DWORD 01234567h


MinVal SDWORD -2147483648
MaxVal SDWORD 2147483647
Vec DWORD 20 DUP (?)
DD is an old version of DWORD and SDWORD:
VAR DD -2147483648
DD 2147483647

Lecture 2(32—81) 60/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

DWORD, SDWORD: Multiple initializers

DWORD 1,2,3,4,5
generates the memory map

Offset Value
0000 1
0004 2
0008 3
000C 4
0010 5

Lecture 2(32—81) 61/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Little Endian

Offset Value
Bh 06h
Ah 1Fh
9h 22h Word at 1h contains 5C 42h.
8h CDh Word at 2h contains 725Ch.
7h 30h Word at Ah contains 061Fh.
6h D4h
5h 9Bh Doubleword at 4h contains 30D49B8Fh.
4h 8Fh Doubleword at 5h contains CD30D49Bh.
3h 72h QuaDWORD at 3h contains 1F 22CD30D49B8F 72h.
2h 5Ch
1h 42h
0h 8Dh

Lecture 2(32—81) 62/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Program with Variables I

TITLE Second Program

.386
.model flat

extern _ExitProcess@4:Near

.data
var1 DWORD 2000H
var2 DWORD 1000H
var3 DWORD 3000h
result DWORD ?

.code ;Code area


Lecture 2(32—81) 63/448
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Program with Variables II

_main:
mov eax,var1 ;EAX=2000h
sub eax,var2 ;EAX=1000h
add eax,var3 ;EAX=4000h

mov result,eax

push 0
call _ExitProcess@4

end _main ;end of program. The


; entry point is _main.

Lecture 2(32—81) 64/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Scope and Order

Variables have file scope.


‘.code’ and ‘.data’ can be mixed freely.
.code
mov ax,var1
add ax,var2
.data
var1 WORD 5
var2 WORD 6
.code
mov result,ax
.data
result WORD ?
.code

Lecture 2(32—81) 65/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Symbolic Constants

An integer expressions or a string, can be assigned an


identifier. This identifier is a symbolic constant.
This is very much like C’s ’#define’.
Symbolic constant uses no storage, and certainly cannot
change at run-time.

Lecture 2(32—81) 66/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

= Directive

General form: identifier = expressions


Example:
Count=500
mov ax,Count
is the same as
mov ax,500

Lecture 2(32—81) 67/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Symbolic constants, Why? (1)

Example:
Count = 500
.data
Vector dd Count dup (?)
.code
mov ax, Count ;Loop counter
.
.
.
If there is a need for a vector of size, say, 600, then it is
enough to change the first statement to
Count = 600

Lecture 2(32—81) 68/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Symbolic constants, Why? (2)

Numeric constants which have some significance are better


rememberd as symbols
esc = 27 ;Escape key
cr = 13 ;Carriage return key
lf = 10 ;Line feed key

Lecture 2(32—81) 69/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Redefining Symbolic Constants

Example:
Count = 4
mov ax,count ;ax=4
Count = 10
mov bx,count ;bx=10
Count = Count*5
mov cx,count ;cx=50
The changing of Count has nothing to do with the execution
of the program.

Lecture 2(32—81) 70/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

$ Operator

The ‘$’ operator returns the current location counter. That is


the offset associated with the current statement.
Example:
vec1 byte 0,1,2,3,4
vec1_size = $ - vec1 ;vec1 elements number

vec2 DWORD 0,1,2,3,4


vec2_size= ($ - vec2)/4 ;vec2 elements number

str byte "Hello world"


str_len = $ - str ;String length

Lecture 2(32—81) 71/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

EQU Directive

General form:
identifier EQU expression ;Very much like ‘=’
identifier EQU identifier ;Very much like ‘=’
identifier EQU <text> ;Text is substituted for
;identifier, ‘as is’.
The EQU directives resembles the ‘=’ directive: It generates
symbolic constant.
Symbolic constant generated with EQU can not be redefined.
Example:
Avogadro EQU <6.23E23>
Hello EQU <"Hello!">

Real4 Avogadro
Byte Hello
Lecture 2(32—81) 72/448
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

EQU (different forms example)

Example:
Count = 5 ;
e1 equ Count ;e1 will evaluate to 5
e2 equ <Count> ;e2 will evaluate to ‘Count’

mov al,e1 ;al=5


mov bl,e2 ;bl=5

Count = 10

mov cl,e1 ;cl=5


mov cl,e2 ;cl=10

Lecture 2(32—81) 73/448


Simplest Memory Addressing Mode
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Direct Memory Operands

The code
.data
var byte 0

.code
mov al,var
translates into
mov al,[1000h]
assuming var is located at address 1000h.
The notation [number] is called direct memory access.
We use labels to access variables since it is very cumbersome
to count offsets all the time.

Lecture 2(32—81) 74/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Direct Memory Expressions

In the end, a direct memory operand is just a number.


The assembler can add or subtract offset from labels to get
the number.
.data
DWORD 5
L DWORD 2,3,4
DWORD 6
.code
MOV EAX,L-4 ;EAX=5
MOV EBX,L+4 ;EBX=3
MOV ECX,L+12 ;ECX=6

Lecture 2(32—81) 75/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Notational Conventions

Operand Description
r8 One of the 8-bit registers: AL, AH, BL, BH, CL, CH, DL, DH.
r16 One of the 16-bit registers: AX, BX, CX, DX, SI, DI, SP, BP.
r32 One of the 32-bit registers: EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP.
reg Anyone of the general purpose registers.
imm8 8-bit immediate value (i.e., constant).
imm16 16-bit immediate value (i.e., constant).
imm32 32-bit immediate value (i.e., constant).
imm 8, 16, or 32-bit immediate value (i.e., constant).
r/m8 8-bit register or byte in memory.
r/m16 16-bit register or word in memory.
r/m32 32-bit register or doubleword in memory.
r/m a byte, word or doubleword in register or memory.
rel A relative address, 8, 16, or 32-bit displacement

Lecture 2(32—81) 76/448


Basic Data Transfer
Defining Data Simplest Memory Addressing Mode Basic Data Transfer

MOV Instruction

Basic format:
MOV destination, source.
Operation: destination ← source.
General variants:
MOV reg,reg ;Both operands must
MOV mem,reg ;be of the same size
MOV reg,mem
MOV mem,imm
MOV reg,imm
Note there is no memory/memory MOV.

Lecture 2(32—81) 77/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

MOV Example

.data
v1 word ?
v2 word ?

.code
mov ax,v1
mov v2,ax

Lecture 2(32—81) 78/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Different Size Copy

The problem:
.data
I sword -1
.code
mov ebx,0
mov bx,I ;ebx=0000FFFFh=65535

Lecture 2(32—81) 79/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Zero Extension

Move source to destination with zero extension


MOVZX r32,r/m8
MOVZX r32,r/m16
MOVZX r16,r/m8
Example:
MOV BX,0B372h

MOVZX EAX,BX ;EAX=0000B372h


MOVZX ECX,BL ;ECX=00000072h
MOVZX DX,BL ;DX=0072h

Lecture 2(32—81) 80/448


Defining Data Simplest Memory Addressing Mode Basic Data Transfer

Sign Extension

Move source to destination with sign extension


MOVSX r32,r/m8
MOVSX r32,r/m16
MOVSX r16,r/m8
Example:
MOV BX,0B372h

MOVSX EAX,BX ;EAX=FFFFB372h


MOVSX ECX,BL ;ECX=00000072h
MOVSX DX,BL ;DX=0072h

Lecture 2(32—81) 81/448

You might also like