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designideas

Edited By Martin Rowe


and Fran Granville

readerS SOLVE DESIGN PROBLEMS

Photoresistor provides negative D Is Inside


feedback to an op amp, 54 Three-phase digital-signal

producing a linear response generator sweeps frequency


56 Water-leak detector uses 9V
Julius Foit and Jan Novák, batteries
Czech Technical University, Prague, Czech Republic
ETo see all of EDN’s Design


AGC (automatic-gain-con- element’s nonlinear transfer charac- Ideas, visit www.edn.com/design
trol) amplifiers use the nonlin- teristic, which causes a relatively large ideas.
ear characteristics of control devices. degree of nonlinear signal distortion
The magnitude of the real component once the processed voltage amplitude
in some of their differential parame- exceeds millivolts (Reference 2). The circuit in this Design Idea uses a
ters changes depending on variations A photoresistor, which has a VA char- radiation source whose spectral char-
in their dc operating points. A typical acteristic that’s linear in a large range acteristic fits the spectral characteris-
example is the VA characteristic of a of voltages, is up to the task. Common tic of the photoresistor, and its radiat-
silicon PN junction, which results in photoresistors remain perfectly linear ed power should, if possible, be a linear
the differential conductance directly for signal amplitudes of 100V or more. function of the drive signal. Such op-
proportional to the passing dc current Therefore, the amplification-control tocouplers are commercially available,
(Reference 1). In this form of con- device can be an opto­coupler whose but few have properties good enough
trol, the main problem is the control controlled element is a photoresistor. for this purpose. Common photo-­
resistors have spectral characteristics
close to the spectral characteristics of
the human eye, whose peak sensitiv-
ity has approximately a 500-nm wave-
length. So a white or green LED (light-
emitting diode) is a good alternative.
To obtain the highest possible sensitiv-
ity, this circuit uses a white HB (high-
brightness) LED.
Figure 1 shows the individual com-
ponents of the optocoupler and the as-
sembled device. The optocoupler com-
prises a cylindrical holder that accepts
a standard 5-mm HB LED from one
end and a photoresistor at the other
end. An opaque nonconductive seal
prevents external light from entering
the device. The polished metallic inner
wall of the holder results in minimum
light loss between the LED and the
photoresistor. Available off-the-shelf
photoresistors include the LDR 05, the
LDR 07, and a standard white, 5-mm
Figure 1 A metal tube with an HB LED and a photoresistor forms the optocou- HB LED type L-53MWC*E, with out-
pler (left). put-light flux of 2500 mcd at a 20-mA
drive current (Reference 3).

May 27, 2010 | EDN 49


designideas
Figure 2 shows the transfer func-
tion of the optocoupler using the LDR
07-type photoresistor. The output re-
sistance of the device can vary from
100V to 10 MV with LED-drive cur-
rents from 34 mA to 0.1 mA, respec-
tively. The photoresistor’s linear VA
characteristic, even for large-amplitude
signals, lets you use it as the control el-
ement even in situations that require a
relatively large signal voltage, such as
when the photoresistor is part of the
feedback loop of an operational ampli-
fier. Figure 2 also shows that you can
obtain a variation of linear output re-
sistance over at least five decades with
a maximum LED-drive current within Figure 2 The optocoupler’s logarithmic response in a feedback loop produces
the limits of permitted output current a linear amplifier response.
of common monolithic operational
amplifiers.
Such an amplifier can control the nate the photoresistor. Thus, its resis- LED current. This action would drop
overall amplification of the system in tance rises to a high value, which can the optocoupler’s output resistance al-
the same range without additional cur- cause dc runaway and the loss of the most stepwise to a value sufficient to re-
rent amplification. Due to the photo- quiescent operating point of A1. Such store the dc operating point of A1. The
resistor’s linearity, the resulting degree a condition is not harmful in principle ac coupling transfers this transient to
of processed signal nonlinear distortion because the signal path is ac-coupled, the output, and it may cause problems
is almost solely due to the nonlinear- preventing the dc error value from in signal-processing circuits follow-
ity of the operational amplifier. Within getting any further. When a nonzero ing the adaptive amplifier. To prevent
the normal operating range, the overall signal suddenly appears at the input, this effect, you should limit the maxi-
linearity of the system improves with however, A1’s open-loop amplification mum value of the feedback resistance
increasing input-signal amplitude be- would amplify it, causing a rapid rise in to a reasonable value, such as 47 MV,
cause the amount of neg-
ative feedback increases
� A
with increasing signal 1
LF356N
amplitude. � � �
C2 C3
Figure 3 shows the am- 4.7 �F 22 �F
C1
plifier system. The basic R1 R6 � A
3.9k 100 �F 47M 2
signal-processing device LF356N OUTPUT
is inverting op amp A1. INPUT � �
D3
Its inverting connection BAT46
lets you set the absolute
IC1
value of the overall am-
plification from input to R2 R7 D4
C4
1M 10k BAT46
output to a value small- �
47 �F
er than unity, permit-
D2 P1
ting correct processing HB LED BAT46 10k POWER
of an input-signal ampli- � SUPPLY
A3 C5
tude even larger than the LF356N 47 �F �
15V
R3 C6 �
regulated output value. R5
D 5 � 47k 470 �F
BAT46
Opto­coupler IC1 is the 3.9k
D1
BAT46
core component of the P2 C7 �
R4 1M
system, whose output, the 470
470 �F

photoresistor, serves as a �15V

variable part of A1’s neg-


ative-feedback network.
At no-signal conditions, Figure 3 The adaptive-amplifier system has the optocoupler in a feedback loop.
the LED does not illumi-

50 EDN | May 27, 2010


designideas
the value of R6. Because the op amps
have JFET inputs, the value of R6 can
be rather high. The value of 47 MV is
a reasonable compromise, limiting the
maximum absolute value of voltage
amplification in A1 to approximately
82 dB. The limiting factors for select-
ing a value for R6 are the noise and the
open-loop amplification of A1.
Buffer A2 separates the nonlinear
load through the rectifying diodes
from the output signal, thus prevent-
ing the nonlinear load from the recti-
fying diodes from distorting the output
signal. Diodes D3 and D4 compensate
the threshold voltage, including its
temperature coefficient, of rectifying
diodes D1 and D2. If you do not need Figure 4 The amplifier system has a constant output from 0.1 mV to 1V-rms
to set the regulated output-voltage input.
amplitude to a value smaller than the
threshold value that the bias current in sistor P1, using a higher value if nec- lation range of the system, raising the
R4 sets, you can replace D3 and D4 with essary. You can also adjust the release second harmonic to 245 dB and the
a short circuit and omit R7. You can set time using P2. The photoresistors used third harmonic to 240 dB at 2.5V-rms
a larger-than-unity voltage amplifica- have a rather good response speed, and input.
tion in A2 to obtain a regulated out- the introduced delay at a stepwise il- Within the AGC’s range limits, the
put amplitude lower than the thresh- lumination variation is acceptable for overall transfer linearity improves with
old that the bias in R4 sets. Just insert most practical requirements. increasing input-signal amplitude due
an additional resistance in series with Figure 4 shows the overall response to the increasing degree of negative
the D3/D4 pair. of the adaptive amplifier system. The feedback to A1 at increasing input-sig-
The rectifier uses Schottky diodes, output signal remains constant at 350 nal amplitudes. With a value of 10 kV
which have a lower threshold voltage mV rms 61 dB for input-signal volt- for P1 and 1 MV for P2 and a stepwise
than conventional PN diodes. They ages of less than 70 mV rms to more input-signal variation between 100
also have a short recovery time, keep- than 1.2V rms—that is, over a more- mV and 50 mV rms, the attack and re-
ing the same rectification efficiency at than-85-dB range. The no-signal out- lease times are approximately 0.2 and
high signal frequencies. The rectifier put noise is less than 6 mV rms, yield- 2 seconds, respectively. The recovery
operates as a full-wave voltage doubler, ing an SNR (signal-to-noise ratio), or time from a 1-kHz—more than 10V-
providing peak-to-peak rectification processed-signal dynamic range, better rms input overdrive—to full no-signal
even for signals with nonsymmetrical than 20 dB at the onset of regulation sensitivity is less than 2 minutes. You
waveforms. The rectifier output feeds in the worst-case condition and im- can adjust all of these time intervals in
to A3, a voltage-to-current converter, proving proportionally with increasing a wide range by varying the values of
which drives the LED in the optocou- input-signal level. C4, C5, P1, and P2, with P1 setting the
pler. A rectification threshold-shifting The key parameter this design fol- attack time and P2 setting the release
bias-current source connects to cur- lows is its linearity. Because of the time.EDN
rent-sensing resistor R4. In this case R5 photoresistor’s linearity and the sepa-
simulates a current source, setting the ration of the nonlinear rectifier load R e fe r e nce s
regulated output-voltage amplitude. If from the output, the gain control in- 1 Foit, Julius, “AGC amplifier features
the 15V supply voltage isn’t perfectly troduces negligible nonlinearity. Thus, 60-dB dynamic range,” EDN, Aug 4,
stable, obtain bias current from a sepa- A1 alone, in principle, determines the 2005, pg 87, www.edn.com/article/
rate stable source. An opposite-polarity overall linearity of the system. CA629309.
diode connects across the optocoupler’s Harmonic analysis of the output sig- 2 Foit, Julius, “Logarithmic Process-

input to protect the LED from reverse nal at 1 kHz yields higher harmonics ing Amplifier,” Proceedings of the
polarization at no-signal conditions. with amplitudes lower than A1’s noise Fifth WSEAS International Confer-
This LED current-control circuit has level for all input voltages to 200 mV ence on Microelectronics, Nanoelec-
an important advantage: It permits an rms and below 275 dB for input volt- tronics, Optoelectronics, March
almost-independent adjustment of the ages to 1.5V rms. The nonlinear distor- 2006, pg 6.
attack and release time. You can adjust tion becomes noticeable only at large 3 Opto-isolator Catalogue, Tesla Bla-

the attack time through variable re- input amplitudes exceeding the regu- tná, www.tesla-blatna.cz.

52 EDN | May 27, 2010


designideas

Three-phase digital- 120

signal generator
sweeps frequency FREQUENCY
Yi-Chu Liao and Shao-Wei Leu, (kHz)
National Taiwan Ocean University,
Keelung, Taiwan


Many power ICs use frequen-
cy jitter, which spreads a con- 100

trol signal’s spectrum, to control EMI


0 250 500
(electromagnetic interference). If you TIME (mSEC)
need to add frequency jitter to power
ICs that control three-phase signals, Figure 1 This digital three-phase signal sweeps over a 20-kHz range of 100 to
you can use an FPGA and the code in 120 kHz and back in 40 steps in 500 msec.
this Design Idea, which is available at EDN100422DI4644_FIG1 .eps
www.edn.com/100527dia. The digital
three-phase signal sweeps over a 20-
kHz range of 100 to 120 kHz and back FREQMODEL MODEL 2 THREE-PHASE
in 40 steps in 500 msec (Figure 1). CLK
MODEL

The basic clock frequency can range CLKOUT CLK CLKOUT1 OUTPUT
PHASE 1
from 600 to 720 kHz. You can develop 50 MHz CLK STATE_OUT STATE_OUT
CLKOUT2 OUTPUT
the three-phase generator using Veri­ COUNT1[15..0] COUNT1[15..0]
PHASE 2
log (www.verilog.com) HDL code and CLKOUT3 OUTPUT
PHASE 3
Altera (www.altera.com) FPGAs. RESET RESET RESET
The three-phase generator starts RESET
with a 50-MHz clock and ends with
three output phases (Figure 2). The EDN100422DI4644_FIG2.eps
Figure 2 The three-phase generator starts with a 50-MHz clock and ends with
circuit’s two main parts are the se-
three output phases.
quential frequency-scanning part and
the three-phase model. The frequency-
scanning part comprises the frequency
model and Model 2 blocks. The se- START BASIC WORK
quential frequency-scanning part gen- FREQUENCY OF FPGA:
50 MHz
erates a frequency of 600 to 720 kHz. COUNT
The three-phase model receives the
variable clock-period frequency from DIVIDE TO 80 Hz
the output of Model 2. One phase pe-
riod comprises six clock periods from
COUNT=6000
the three-phase input frequency. The
relations of phases 1, 2, and 3 are 101, VARIABLE 600- TO 720-kHz ALGORITHM OF
100, 110, 010, 011, and 001, respec- COUNT=COUNT+6000 INPUT FREQUENCY OF THREE-PHASE MODEL
tively, over six clock pulses. Together, 50 MHz
COUNT NUMBER =
they construct a three-phase waveform [600 kHz+(COUNT–6000)] Hz
with a 1208 phase difference. COUNT=120,000
NO

Using the source code, you can im-


plement the circuit using the Altera YES
FPGA DE2 development tool, which
COUNT=COUNT–6000
has a basic frequency of 50 MHz, to
control these circuits. The three-phase
frequency sweeps in 40 1-kHz steps NO
from 100 to 120 kHz and back in 0.5 COUNT=6000 Figure 3 The three-phase frequency
seconds (Figure 3). The sequential fre- sweeps in 40 1-kHz steps from 100 to
quency-scanning part generates an 80- YES 120 kHz and back in 0.5 sec.
Hz, 20-steps-up/20-steps-down sweep
EDN100422DI4644_FIG3.eps

54 EDN | May 27, 2010


designideas
by the internal divider from the 50-
1 2 3 4 5 6 7 8 9 10 11 12
MHz basic frequency. To obtain the 600- TO 720-kHz
100- to 120-kHz frequency as the out- CLOCK

put frequency of the three-phase sig-


nal, you first generate clocks of 600 PHASE 1
to 720 kHz as the input clock of the
three-phase generator because one of
the output-phase clock periods should PHASE 2
be in six equal periods of 608. The fol-
lowing equation shows how to get the
frequency shift from the basic signal PHASE 3

frequency:
Figure 4 The three-phase frequency changes in sequence, counting up from
600 kHz ↔ 720 kHz EDN100422DI4644_FIG4
100 to 120 kHz and back down.eps
to 100 kHz in 1-kHz steps over 0.5 seconds.
100 kHz ↔ 120 kHz =
6 .

The first phase starts on the posi- shows how the count number derives kHz and back down to 100 kHz in 1-
tive edge of the first period, and the from the 50-MHz clock signal. kHz steps over 0.5 seconds. Figure 4
second phase starts after two peri- The counter increases in value to shows the relationships among the
ods of the input clock at the positive 6000 in 0.0125 seconds, or 80 Hz, three phases.
edge. The second phase now lags by until it reaches 120,000. The count Using this algorithm, you can de-
two input clock periods, or 1208. The then decreases back to 6000. The vari- velop and implement a lightweight,
third phase then starts after two more able “count” is the input to the Model low-cost, three-phase signal with a
input-clock periods. The counter starts 2 block, which generates clocks of 600 1208 relative phase difference and si-
with a value of 6000 because the period to 720 kHz—the input-clock period multaneous sweeping on one FPGA
of the three-phase model requires six of the three-phase block. Finally, the chip. You can use three lowpass filters
clock times, and the sweeping frequen- three-phase frequency changes in se- to create sine-wave signals from the
cy is 1 kHz. The equation in Figure 3 quence, counting up from 100 to 120 outputs.EDN

Water-leak detector uses IC1B, R3, and R4 form a low-voltage


detector. When the water probe is dry
9V batteries and the battery voltage becomes lower
than 6.6V, the voltage on IC1B’s nega-
Yongping Xia, Navcom Technology, Torrance, CA tive input is less than 1.2V. Because the


A previously published Design MAX934, an ultra-low-power quad reference voltage is 1.2V, IC1B’s output
Idea describes a practical gadget comparator with a built-in 1.2V refer- changes from low to high. So when the
that has the potential to save a lot with ence. The chip uses about 6 mA. IC1A, probe is dry and the battery voltage is
little investment (Reference 1). How- R1, and R2 provide water-leakage de- higher than 6.6V, IC1B’s output is low,
ever, the circuit uses 120V line voltage tection. R1 is the water probe, which which forces IC1C’s output high, and
and, as such, it is not that convenient can be two bare copper wires wrapped IC1D’s output stays low.
for many applications. This Design in a sponge. R1 has high impedance Either a wet probe or a low-voltage
Idea describes a portable water-leak when the sponge is dry, so IC1A’s output battery can force IC1B’s output high,
detector that uses a common 9V bat- stays high. Once the circuit detects the freeing a narrow-duty-cycle oscillator
tery for power (Figure 1). The circuit water leak, R1’s value decreases to less comprising IC1C, C2, R5, R8, and D3.
consumes less than 10 mA during de- than a few hundred kilohms, which The oscillation period is approximate-
tection mode, and a 9V alkaline bat- forces IC1A’s output low. Through D1, ly 7 seconds, and IC1C’s output is low
tery has greater-than-500-mAhr ca- it makes the output of IC1B high. for about 0.3 seconds. That low output
pacitance. So one battery can last more allows a 2.4-kHz oscillator comprising
than five years, which is equivalent to IC1D, C3, and R9 to operate. When the
the battery’s shelf life. When the bat-
This portable circuit detects a water leak or the bat-
tery voltage drops below 6.5V, the de- water-leak detec- tery’s power is low, the buzzer sounds
tector beeps to indicate that it is time for a fraction of a second every 7 sec-
to change the battery.
tor uses a com- onds. In this way, the warning sound
The design uses Maxim Integrat- mon 9V battery. can last for a long time before the bat-
ed Circuits’ (www.maxim-ic.com) tery gets too low.

56 EDN | May 27, 2010


Resistors R6 and R7 increase IC1C’s cy’s stability. All capacitors are ceramic, 1 Tregre, Jeff, “Doorbell transformer
hysteresis, which lets you use a smaller ensuring low leakage current.EDN acts as simple water-leak detector,”
value for C2. R10 and R11 increase IC1D’s EDN, Dec 15, 2009, pg 48, www.
hysteresis to improve the sound frequen- R e fe r e nce edn.com/article/CA6711862.

R2 R4
7.5M 10M R10 R11
3.9M 10M

R6 13
7 7.5M �
� R7 15
1 10M
12 �
6 �
D2
BT1 5 1N4148 IC1D
� 3
9V 2 IC1B MAX934
4 � MAX934
11 R9
14 D1 �
C1 16 10M
1N4148
1 µF IC1A 10 �
MAX934 D4
1N4148
IC1C
8 R3 MAX934
1.2V R1 C2 C3
SENSOR 2.2M 1 µF R8 D3 22 pF
REF- BZ1
ERENCE 9 200k 1N4148 BUZZER

R5
10M

Figure 1 IC1A and IC1B determine the conditions for sounding the buzzer, and IC1C oscillates to provide the trigger for IC1D.

EDN100422DI4649_FIG1.eps

May 27, 2010 | EDN 57