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PA Lecture Notes #3

Prof. S. Long

PA notes #3: Higher Efficiency Power Amplifiers Efficiency limitations -Class A: at best 50% at worst 0%

For really high power or battery applications, Class A efficiency is not good enough. How do we improve this? Reduce the conduction angle.

The conduction angle is the portion of the RF cycle in which the device is conducting (ie. Not in cutoff).

How? Change the bias condition from fully on (class A) to partially in cutoff. Class B: Device is biased right at cutoff.

Consequences:

1.

PDC is reduced for same Pout Harmonic termination is now required RF drive signal drives device into conduction More drive is required for Class B than Class A (typically, 6 dB of gain is lost since the input voltage and current swing must be doubled).

2. 3. 4.

1

08/24/07

ECE145B/218B

PA Lecture Notes #3

Prof. S. Long

Ref. S. Cripps, RF Power Amplifiers for Wireless Communications, Artech House, 1999.

Preliminary Observations 1. 2. 3.

P

OUT

roughly the same between Class A and B

Class B reduces

P

DC

by factor of

π

2

Class C provides rapidly increasing efficiency, but rapidly decreasing P OUT

2

08/24/07

Long Class B Device biased at cutoff i = iO + iC Case I: Single-ended i V CC = VCC VCC RF choke I DC = 1T ∫ idt T0 DC blocking cap ic + io RL vo − filter The LC resonator shorts harmonics. The collector current is a half sinusoid because the device conducts only 50% of the time.ECE145B/218B PA Lecture Notes #3 Prof. iC Imax IDC 0 π 2π θ vo θ 3 08/24/07 . S. iO = amplitude of fundamental component of iC. Only the fundamental component of the current can appear at the load resistor.

S. The single ended class B works fine. iC1 I max 0 π 2π iC 2 I max π 2π Push-pull is all about balun design. Transmission line baluns can be made to work well at 500 MHz and below. Unless a balanced amplifier is really necessary (for bandwidths an octave or greater.ECE145B/218B PA Lecture Notes #3 Prof. 4 08/24/07 . PC board balun structures are physically large. there is no need to incur this added complication. A transformer or balun is needed at the input and output. Long Case II: Push-Pull iC1 VBB filter iC 2 Devices conduct on alternate half cycle to provide fully sinusoidal vO . for example).

=0 by even function 5 08/24/07 . Long Class B.. we must calculate DC power and AC fundamental and harmonics from Fourier components. S. drain current is a half cosine function.ECE145B/218B PA Lecture Notes #3 Prof. Case I.. iD (θ ) = a0 + a1 cosθ + a2 cos 2θ + a3 cos3θ + . iD Imax A C B −π −π/2 0 π/2 π θ ic (θ ) = I max cosθ − π 2 ≤θ ≤ π 2 π =0 − π 2 2 <θ < π > θ ≥ −π Since current is not a complete sine wave. We will discuss Class C later. Base bias level is adjusted so that the conduction angle = π (50% duty cycle) Now.

6 08/24/07 . S. Higher harmonics can be calculated in the same way.ECE145B/218B PA Lecture Notes #3 Prof. π V1 = I1 RL I max 2 a2 = ∫ cosθ cos 2θ dθ = 2π ∫ [cos 3θ + cosθ ] dθ π π − −π I max 2 2 2 π π π I max 2 + I max sin3θ 2 = I max − I max sinθ −π = −π 2π 6π 3π π 2 2 2I = max = I 2 3π I2 is the second harmonic current. Long I 1 2 a0 = I max cos θ dθ = max ∫ 2π −π 2π 2 π ⎡ π ⎛ π ⎞⎤ sin − sin ⎜ − ⎟ ⎥ ⎢ 2 ⎝ 2 ⎠⎦ ⎣ 2 I = max = I dc π a1 = I ⎡θ ⎤ I max cos 2 θ dθ = max ⎢ ⎥ ∫ π −π π ⎣2⎦ 1 2 2 π π 2 −π I = max = I1 2 2 I1 is the fundamental current component.

The figure below shows the amplitudes of the fundamental and harmonic currents (relative to an Imax = 1) as a function of the conduction angle. Choose the device accordingly. but shorted by LC resonator. I max ≅ I dc + I1 + I 2 + I 4 + This must be equal to the peak current that the device is capable of providing.ECE145B/218B PA Lecture Notes #3 Prof. the total current. Long I max π 2 I a3 = cos θ cos 3θ dθ = max ∫ [ cos 4θ + cos 2θ ]dθ 2π π ∫−π 2 2 I max 2 + I max sin 2θ sin4θ −π = =0 8π 4π ∫ −π 2 2 π π ω odd terms = 0 ω even terms finite. S. The current that actually is delivered to the load is the fundamental frequency component. 7 08/24/07 . I1 = I max . 2 This is the current that must be used to determine the optimum load resistance. Thus.

Long Imax iD A C B −π −π/2 0 π/2 π θ 8 08/24/07 .ECE145B/218B PA Lecture Notes #3 Prof. S.

when VK is considered. the output power. Efficiency approaches 100% as Pout approaches 0! Large harmonic currents are required. V 2V RL = DC = DC . Not a very effective means of increasing efficiency. Long Class C reduces the conduction angle even more. DC power and efficiency can be calculated for Class B. Recall that I1 = Imax/2. VO = VDC . 2 2 I max RL 1 VDC 1 2 P = I1 RL = = 0 2 8 2 RL PDC = I maxVDC π 2 2VDC = π RL 2 P 0 = VDC 2RL = π η= (79%) 2 PDC 2VDC π RL 4 The efficiency is much greater than Class A: 79% vs 50% 9 08/24/07 . PDC and Pout are both reduced. V − VK 2(VDC − VK ) RL = DC = I1 I max I2 (and higher harmonics of the current) are assumed to be shorted by the LC resonator or bias network.ECE145B/218B PA Lecture Notes #3 Prof. Note that this load resistance is the same as was optimum for class A. S. Choosing load resistance: (neglecting knee voltage VK ) we must choose The best load resistance is the large signal load resistance that allows full voltage and current swing at the device collector or drain. Now. I1 I max Or. To get the full voltage swing across RL .

Long Harmonic Termination We have seen that I c has a strong second harmonic current amplitude 2I I 2 = max = 0.ECE145B/218B PA Lecture Notes #3 Prof.21I max 3π all I n for n = even are present all I n +1 = 0 for odd harmonics How do we provide the even harmonic short? To get half sinusoidal current. RFC DC feed: high QL = ωC1 GL VDD Lpkg Cds C1 Z L = RL @ fO Z L = 0@nfO RL If Cds is large. 4 fO . If L pkg is small. 1. C1 can provide the termination at 2 fO . S. at least I 2 must be shorted. 10 08/24/07 . the harmonic short happens by default at device.

Long 2. λ 4 @f 0 line works well. V λ 4 DC @ f0 Quarter-wave line: 3f 0 f 0 2fo 11 08/24/07 .ECE145B/218B PA Lecture Notes #3 Prof. S. At higher frequencies with low parasitic packages or no package.

ID Imax IDC B A 0 π 2π θ vGS A vT B θ 12 08/24/07 .ECE145B/218B PA Lecture Notes #3 Prof. Long Are there costs to using reduced conduction angle? 1. Not as severe with BJT or HBT because of the nonlinear base voltage collector current relationship. S. Input Drive. this requires that the gate voltage swing is double that of Class A because the negative swing must go below cutoff for half of the period. This requires a 6 dB increase in drive power – a problem for maintaining PAE unless the device has very high fmax. For a MOSFET or HEMT in class B. We must still achieve the Imax of the device to maintain peak current.

Specifically. the voltage swing on the gate in the negative direction can be much larger than in the positive direction. Long 2. if the drive current from the source remains roughly constant. S. Vdg is increased.ECE145B/218B PA Lecture Notes #3 Prof. The gate capacitance of all FETs can be quite nonlinear. It also produces a strong even harmonic voltage on the gate. it drops very fast as the device is biased below threshold into cutoff. Thus. Then. Cgs vs Vgs of GaN HEMTs on SiC 700 600 E xp e rim e nta l (fF /m m ) m o d e le d (fF /m m) C (fF/mm) 500 400 300 200 100 -8 -7 -6 -5 -4 -3 -2 -1 0 gs Vc ≈ Vp V gs (V ) 13 08/24/07 . Nonlinear gate capacitance. This is detrimental to breakdown because the maximum drain voltage occurs at the same time that the gate voltage is at minimum.

“Effect of input harmonic termination on high efficiency Class B and Class F operation of PHEMT devices. [1] P. [1] VDD Cds Resonant @ 2fo ROPT Other costs: 3. 4. Peak drain current is increased. M.ECE145B/218B PA Lecture Notes #3 Prof. IEEE Intl. Long An even harmonic trap has been found to be effective in reducing the impact of these factors. can even become slightly square. 1998. Difficult to realize a wideband even harmonic short circuit. White. Microwave Symp. S. By shorting the even harmonic voltage.” Proc.. the gate voltage can remain either sinusoidal or if some odd harmonics are possible. paper THIF-05. 14 08/24/07 .

or POC. Long Power Output Capability Before going on. but can also affect how much voltage and current stress the device experiences. POC is defined to compare maximum output power with maximum voltage and current on the device.5 dB over Class A or B. POC = POUT VD. we see Class C is a disaster. the power output capability. Class A AB B C (nonlinear) Conduction angle 2π π < θ < 2π π <π Maximum Power output drain efficiency capability <50% 50 – 75% < 79% < 100% 1/8 ~ 1/8 1/8 << 1/8 15 08/24/07 . Recall that efficiency increases as conduction angle is reduced. Since devices are expensive. S. Class AB is slightly better because output power can increase by up to 0. Hence. However.ECE145B/218B PA Lecture Notes #3 Prof.max I D .max We find for the linear operating classes that there is very little difference. we need to introduce another metric for PA performance. Too little power output for the stress on the device. we want to get as much output power as we can from the maximum voltage and current that the device can provide. This benefits the thermal problem of removing dissipated heat.

can produce efficiencies well above 79% but at the cost of linearity.28 VDC as opposed to VDC for Class B. We saw that Class C does not use the device power output capability effectively plus it is highly nonlinear. I1 = I max 2 I DC = I max π 1 1 ⎛ 4V ⎞⎛ I ⎞ V I Pout = V1I1 = ⎜ DC ⎟⎜ max ⎟ = DC max = VDC I DC π 2 2 ⎝ π ⎠⎝ 2 ⎠ So. What if we could produce a square wave voltage at the collector or drain? V1 = 1 π ∫ 2VDC cosθ dθ = 2VDC π [sin(π / 2) − sin(−π / 2)] = 4 π VDC or 1. B are fairly linear if properly designed. AB. This gives us a large increase in fundamental output power for the same VDC and IDC. To achieve better efficiency than Class B. we must intentionally overdrive the input to drive output power into saturation. So. This. class B can give us up to 79%. S. Then all we need to do is produce an ideal square wave voltage.ECE145B/218B PA Lecture Notes #3 Prof. Can we do any better? Not with a linear amplifier. Class F. Pout = PDC! 100% efficiency. How? 16 08/24/07 . with the correct harmonic tuning. Long Path to higher efficiency OK. Classes A.

ECE145B/218B PA Lecture Notes #3 Prof. S. Long ID Imax IDC 0 I DC = I1 = I max π I max 2 π 2π θ VD .max = 2VDD V1 = 4VDD vDS vDD 0 π π 2π θ Class F current and voltage 17 08/24/07 .

this requires infinite bandwidth to produce all harmonics. But. fmax. So. retain the even harmonic short as in Class B. 18 08/24/07 . we can apply a finite number of harmonics. increases the efficiency toward 100%. and all devices have an upper frequency limitation. ideal square wave voltage and half sine wave current can’t be done. Long Unfortunately. We would need all odd harmonics in voltage and all even harmonics in current. we have neglected knee voltage.ECE145B/218B PA Lecture Notes #3 Prof. But. properly applied. S. We can show that each harmonic. but open circuit as many odd harmonics as possible. Overdrive the amplifier to clip the voltage so that we approach a square wave. Also.

the voltage waveform has a single peak. V1 = Vmax/κ Where κ = V peak V1 Note that PDC is not affected by squaring the voltage. Vpeak = V1 – V3 = 8V1/9 The reduction in peak voltage allows us to increase V1 by increasing RL. In general. The DC current IDC remains fixed at Imax/π. we can increase the fundamental voltage from V1 = Vmax (Class B) to a higher value. 19 08/24/07 .ECE145B/218B PA Lecture Notes #3 Prof. S. Long Consider only third harmonic: VD (θ ) = V1 cosθ − V3 cos3θ If V3/V1 < 1/9. At 1/9.

S. 20 08/24/07 .ECE145B/218B PA Lecture Notes #3 Prof. Long Class F circuits: VDD 3f0 Cds f0 RL Circuit above gives low ZL at even harmonics and high ZL at 3fo. VDD RFC λ/4 @ f0 Cds f0 RL This circuit gives gives low ZL at even harmonics and high ZL at odd harmonics due to the impedance transforming nature of the quarter wave line (assuming the capacitive reactance of the tank C is small at harmonic frequencies).

θ1 ≈ Lbw Lbw λ 4 Z 2 .θ 2 COUT Zdrain Z3 θ3 = λ 6 RL • • • • Dual bondwires off the drain pad improve even harmonic short Low impedance even harmonic termination (2nd and 4th) RL and the 3rd harmonic peaking is set by Z2.ECE145B/218B PA Lecture Notes #3 Prof. θ2 and Z3 Matching network facilitates tuning after assembly 21 08/24/07 . Long VD bias Z 1 . S.

the dual of Class F. Vol. 1462 – 1468. S. F. C and F Power Amplifiers based upon a finite number of harmonics. “Class E. It has the opposite harmonic requirements: high ZL for even. 22 08/24/07 . low ZL for odd harmonics. #8. 49.” IEEE MTT. Long ∞ Odd harmonic impedance F C-1 E C 0 Even harmonic impedance F-1 ∞ Let’s also consider inverse F. pp. August 2001.ECE145B/218B PA Lecture Notes #3 Prof. Raab.

I(t) Vdc t Inverse F voltage and current.ECE145B/218B PA Lecture Notes #3 Prof. Long Inverse F circuit: VDD RFC λ/4 @ f0 RL f0 Cds V(t). 23 08/24/07 . S.

max = 3. HBT.184 RL Class E typical circuit implementation.56VDD I D . S. Design equations: 2 8VDD RL = POUT (π 2 + 4) 24 08/24/07 .max = 2. high fT and high VBR – Require fT >> 10 fo for fast switching VD . Long Class E PAs • Very popular on paper • Very effective for most devices below 100 MHz • Serious power/freq limitations above 1 GHz – LDMOS.15RL RL Cds+CD jB = f0 j0.098 jX = j1.86 I DC VDD RFC POC = 0.ECE145B/218B PA Lecture Notes #3 Prof. GaAs PHEMT • Power output capability less than AB or F • GaN HEMT is clearly best device for Class E – Needs low CDS.

2 pF IDC > 1 A 25 08/24/07 . this is not the case.159. Consider VDD fixed.max = POUT 2 2π 2CDSVDD The maximum Class E frequency of operation is limited by CDS.5 Ω Maximum CDS = 3. Long Higher VDD gives higher load resistance which is desirable for efficient implementation of the output network. f E . Then.8v RL = 4. the drain capacitance. POUT scales with Imax. thus the upper frequency is really determined by the device.098 rather than 0. a typical GaAs PHEMT might be constrained by: • Suppose VD. thus POC at best is 0. The Imax/CDS ratio is a constant.ECE145B/218B PA Lecture Notes #3 Prof. Both the peak voltage and current are higher. It is also evident that Class E stresses the device more than Class F or inverse F. Devices such as the GaN HEMT with a large Imax/CDS ratio perform at higher frequency than other devices such as LDMOS which have rather low Imax /CDS.max=10V fo = 2 GHz POUT = 1W VDD = 2. For example. While it appears that higher power leads to higher frequency. S.

This requires a high performance device with high Imax. low CDS. Read: S. Cripps. Artech House. Class F. Long Summary Reduced conduction angle can be used to improve efficiency of power amplifiers Class B: • Conduction angle π • Same Pout as Class A. inverse F and E can attain over 90% drain efficiency provided sufficient harmonics are possible. 1999.ECE145B/218B PA Lecture Notes #3 Prof.” Chap. POC = 0. and high fmax. (on RBR website) 26 08/24/07 . S. “Conventional High-Efficiency Power Amplifier Modes. 3 from RF Power Amplifiers for Wireless Communication.125. but PDC is reduced. • Maximum efficiency is 79% All reduced conduction angle amplifiers require specific harmonic terminations as well as fundamental frequency load impedances in order to shape the current or voltage at the collector or drain of the power transistor.

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