Solder Reflow Guide for Surface Mount Devices

June 2009 Technical Note TN1076

Introduction
This technical note provides general guidelines for a solder reflow and rework process for Lattice surface mount products. The data used in this document is based on IPC/JEDEC standards. Each board has its own profile which depends upon the reflow equipment used and the board design. The PCB must be individually characterized to find the reliable profile. This document covers both the SnPb Eutectic process and the Pb-Free process.

Reflow
• Use caution when profiling to insure the maximum temperature difference between components is less than 10°C (7°C within an individual component). • Forced convection reflow with nitrogen is preferred (with maximum oxygen content of 50-75 PPM).

Inspection
• Pre-reflow: Use visual inspection to verify solder paste dispense location and quantity. • Pick and Place: Use machine vision as necessary to ensure proper component placement. • Post reflow: Use electrical testing to verify solder joint formation (100% post-reflow visual inspection is not recommended).

Cleaning Recommendations
• After solder reflow, printed circuit boards should be thoroughly cleaned and dried using standard cleaning equipment. • Final rinse should be warm DI water (50° to 75°C) with resistivity of 0.2 Meg Ohms/cm or greater. • After cleaning, boards should be baked for a minimum of 1 hour at 125°C to evaporate residual moisture.

Rework Recommendations
Removal and replacement of SMT packages on printed circuit boards is fairly straightforward. However, reattachment or touch-up of SMT packages that have already been soldered to the board is not practical in most cases. A few important criteria should be considered when choosing a rework system: • Minimize the change in temperature across the solder joint array to promote good solder joint formation, minimize intermetallic growth, improve solderability and minimize component warpage. • Minimize die temperature to prevent die delamination and wire bond failure. • Minimize board temperature adjacent to the rework site to reduce intermetallic growth, prevent secondary reflow, and prevent possible component delamination. • For boards with no internal ground plane, apply localized heat to the SMT package. When the solder is molten, remove package using appropriate vacuum tool. • While the board is still hot, remove excess solder from the site using a vacuum desoldering system or a soldering iron and solder wicking material. Use care to avoid damaging the solder pads or the surrounding solder mask. • For PCBs with internal ground plane(s), preheat the entire board to at least 80°C before removing the SMT packages.

© 2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

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Quad Flat Pack (QFN).5 mm ≥ 2. BGA Reballing BGA reballing is not recommended.6 mm to < 2. leads) and non-integral heat sinks. Tables 2 and 3 show the peak reflow temperature for Lattice devices by package type and size. Lattice offers a broad range of Pb-Free/RoHS-compliant products in a variety of package configurations. Table 2. Peak Reflow Temperature (TP) Classification SnPb Eutectic Package Package Thickness < 2.5 mm ≥ 2. bumps. Reballed BGA packages will void the original Lattice specifications. Fine Pitch BGA (fpBGA). Pb-Free/RoHS-Compliant Products All Lattice Pb-Free products are also fully RoHS compliant. Fine Pitch Super BGA (fpSBGA) and Chip-Scale BGA (csBGA).Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices • Use alcohol to remove residual flux.5 mm 260 + 0/-5°C 250 + 0/-5°C Volume < 350 mm3 240 + 0/-5°C 225 + 0/-5°C Volume = 350 . SnPb Packages Package Type caBGA Number of Leads/Balls 49 100 256 56 64 csBGA 100 132 144 ucBGA 64 132 1020 fcBGA 1152 1704 Moisture Sensitivity Level 3 3 3 3 3 3 3 3 3 3 4 4 4 Peak Reflow Temp (+0/-5°C) 240 240 240 240 240 240 240 240 240 240 225 225 225 2 .5 mm < 1. Peak Reflow Temperature (TP) by Package Size Table 1 illustrates the peak reflow temperatures by package size. Refer to the Package Diagrams document and use maximum package dimensions to determine package thickness and volume.2000 mm3 225 + 0/-5°C 260 + 0/-5°C 250 + 0/-5°C 245 + 0/-5°C 245 + 0/-5°C Volume > 2000 mm3 Note: Package volume excludes external terminals (balls. then wash the entire board using the standard board cleaning process before attempting to replace SMT components. Peak Reflow Temperature (TP) by Package Type and Size. Table 1. These packages include the Thin Quad Flat Pack (TQFP). lands.6 mm Pb-Free Package 1.

0mm) 44 48 272 BGA 388 492 20 28 PLCC 44 68 84 100 120 128 PQFP 144 160 208 240 304 PQFP with Heat Sink 160 208 Moisture Sensitivity Level 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 3 3 3 3 3 3 3 3 3 3 3 3 3 1 1 3 3 3 3 3 3 3 3 3 3 3 3 3 Peak Reflow Temp (+0/-5°C) 240 240 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 240 240 240 240 225 225 240 240 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 225 3 . Peak Reflow Temperature (TP) by Package Type and Size.Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices Table 2.4mm) 100 128 144 176 TQFP (thickness: 1. SnPb Packages (Continued) Package Type Number of Leads/Balls 100 144 208 256 388 416 fpBGA 484 516 672 676 680 900 1152 1156 fpSBGA ftBGA 680 1036 256 324 48 64 TQFP (thickness: 1.

Pb-Free Packages Package Type caBGA Number of Leads/Balls 49 100 256 56 64 csBGA 100 132 144 ucBGA 64 132 1020 fcBGA 1152 1704 100 144 208 256 388 fpBGA 484 516 672 680 900 1152 1156 ftBGA 256 324 Moisture Sensitivity Level 3 3 3 3 3 3 3 3 3 3 4 4 4 3 3 3 3 3 3 3 3 3 3 3 3 3 3 Peak Reflow Temp (+0/-5°C) 260 260 260 260 260 260 260 260 260 260 245 245 245 260 250 250 250 250 250 250 250 250 250 250 250 260 260 4 . Peak Reflow Temperature (TP) by Package Type and Size. SnPb Packages (Continued) Package Type Number of Leads/Balls 24 QFN 32 48 64 256 320 SBGA 352 432 600 SSOP 28 Moisture Sensitivity Level 1 1 3 3 3 3 3 3 3 1 Peak Reflow Temp (+0/-5°C) 240 240 240 240 225 225 225 225 225 225 Table 3. Peak Reflow Temperature (TP) by Package Type and Size.Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices Table 2.

Peak Reflow Temperature (TP) by Package Type and Size.4mm) 100 128 144 176 TQFP (thickness: 1. 5 . But it can also be a result of solder paste slumping caused by rapid temperature rise in the preheat phase.0mm) BGA 44 48 272 388 20 PLCC 28 44 84 100 120 PQFP 128 144 160 208 24 QFN 32 48 64 256 320 SBGA 352 432 680 Moisture Sensitivity Level 3 3 3 3 3 3 3 3 3 3 3 1 1 3 4 3 3 3 3 3 3 1 1 3 3 4 4 4 4 4 Peak Reflow Temp (+0/-5°C) 260 260 260 260 260 260 260 260 260 250 250 250 245 245 245 245 245 245 245 245 245 260 260 260 260 250 250 250 245 245 Reflow Profile for SMT Packages The typical reflow process includes four phases. • Solder Ball Spattering – The most common solder balling defect is spattering which is caused by explosive evaporation of solvents. Pb-Free Packages (Continued) Package Type Number of Leads/Balls 44 48 64 TQFP (thickness: 1. 1. During this phase the solvent evaporates from the solder paste. It can be eliminated by a slower temperature rise in the preheat phase. Preheat temperature ramp rate should be less than 2°C/second to avoid solder ball spattering and bridging. Flux Activation – The temperature rises slowly and reaches a point at which the flux completely wets the surfaces to be soldered.Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices Table 3. • Bridging – Often seen on fine pitch components and usually caused by inaccurate or splashy screen printing. 2. Preheat – Brings the assembly from 25°C to TS.

150°C 200°C 60-180 seconds 217°C 60-150 seconds 20-40 seconds 6°C/second max. Cool Down – Ramp down rate should be as fast as possible in order to control grain size. 6 minutes max. the temperature rises to a level sufficient to reflow the solder. 8 minutes max. Temperature Preheat Peak Max. Reflow – In this phase. Table 4. Temperature Time between TSMIN and TSMAX Solder Melting Point Time Maintained above TL Time within 5°C of Peak Temperature Ramp-Down Rate Time from 25°C to Peak Temperature Sn-Pb Eutectic Package 3°C/second max. 4.Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices 3. Pb-Free Package 3°C/second max. The flux wicks surface oxides and contaminants away from the melted solder.latticesemi.com 6 . Figure 1.com Internet: www. Table 4 and Figure 1 describe the reflow profile. resulting in a clean solder joint. but should not exceed 6°C/second. Thermal Reflow Profile TP Ramp-up tP Temperature (°C) TL TSMAX tL Ramp-down TSMIN tS Preheat 25°C Flux Activation t 25°C to Peak Reflow Cool Down Time (Seconds) Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: techsupport@latticesemi. Reflow Profiles Parameter Ramp-Up TSMIN TSMAX tS TL tL tP Ramp-Down t 25°C to TP Description Average Ramp-Up Rate (TSMAX to TP) Preheat Peak Min. 100°C 150°C 60-120 seconds 183°C 60-150 seconds 10-30 seconds 6°C/second max.

Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size. Updated QFN information in Peak Reflow Temperature (TP) by Package Type and Size.2 02. SnPb Packages table. Pb-Free Packages table.Lattice Semiconductor Solder Reflow Guide for Surface Mount Devices Revision History Date — April 2008 June 2009 Version — 02. Change Summary 7 .3 Previous Lattice releases. Updated Peak Reflow Temperature (TP) by Package Type and Size table.