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PBOFEfISIOI{IL EDUCAIION

C.ER}IDOIEBUIIDI}IG
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PREFACE

As in learnJng to drlve a car, a nl,croprocessor nust be pnactlced


rLth. Iou cqnot really leara how tp use @e frm just read,i.rngbooks

alone. Sls course i.nclndes a ntcrocoqruter and nore lnfornatLon tlran


can be covered in a tbree-day senlnari because lt .l.s the autborst

purpose to glve yor suffLcient background, rsrlttea.naterlal, and


lurdrare to be able to des{gn a nLcroccnputer systen. BUT THIS C4$Rgl
hrFpea if the student does Dot strrdy ALL ttre lnfornatLon gLven rrltb the
course ald bulLd rry a systen using tbe lf,il-l,
COUNSEOUTLINE 1-1

RElDIlKt .{$S]I}ilMESITS 2-L

EXPENI!,TENTS
g[P. #t 3-1
EIP. #z 3-3
ETP. lf3 3-5
ETP. #b 3-8
EXP. #5 3-9
E]F. #6 3-lo

DEVTCES
rcGIC AI{DINTERT'ACE

B.SSTC IPGIC L.1-1


T. TOil-I}II'ENTINC BT'FFEN b.r-2
II. II{VERTSE BUffER lr.1-2
rI[. .$ID SAIE b.1-3
rT. $al{D GelS lr.l.-lr
V. ORGITE b.L-5
VI. NORGAE b.1-6
VTI. EXCU'SIYE-OR GAIE u.L-7
VIT[. EXCLTfiiIYE-ITO8 GAIE lr.1-8
IX. DrSC'USSrOil OF IOW-IRI,EI'GIC lr.1-8
ruIP-EIOPS
I. R-S LAICH lr.2-L
II. R-S TLIP-fLOP b.2-L
I[I. D-fNE TLIP-FIPP b;2-2
IY. J-tr ITPE ELIP-FIOP L.2-2
V. T-TIPE FLIP-EIOP I+.2-2
DECODERS,/DWT'LTIPIJAXENS lr.3-1
LTIPI,&TffiS
A{CODERSATIJ b.h-1
I}MffiFACE DE\IICES
OPEI{-COIJ,ESTOR
IOGIC h.5-1
T?I-ST&TE IPGTC \.5-2
BUS TRANSCEIVERS b.5-lr

AlIltTZIilG SONilNJEE
PROBIE!{S

5.o SIIE SOFI'lflnE DESIGNPROCEDIIRE 5-t


5. L SfEP 1: DEFINEltIE PA0BLEU 5-z
5. 2 STEP2: P.0BTIIIO$THEPROBLEI!
INTO TUUCTIONAI' 5-e
BIOCKS

5. 3 Slm 3; .0IEOBITHUDETEIOP!{E!$? 5-tz


Il]R EACHPTRTITIOII
.lxttrzrNc soFlw^[RE (comnlurD)
PRoBIEI'Is
5.\ OBJECTTVES
TO FIOT'CHTBTS 5-n
5.5 ArtER AICORT$IU DE\IEIOP!.IENT
PBOCEDURES 5-22
QIIESTIONS 5-23

DEsrGu
tm ilnomng,/sorrliltRr tpPRoAcET0 I'frcRoccn-tnngR
II{IRODUCTION 6-L
5.1 COST
HIRDWARE 6-2
6.1.1 STSTEMSFEED 6-2
6.L.2 DIn{OBI BEQUTBEI'{EIIIS 6-3
6.L.3 Vo nregmB@NTS 6-5
5.1.1r PERIPEER.AL
DEVICES 6-7
6J.5 DEYICESTIPPORT 6-7
6.L.6 tflcRoPnocEsgoREfiDi{tRE 6-9
SEI^ECTIO}T
St'MM.Off
6.2 SOTffARECOSTB 6-9
t
6.2.L ORG.0IITZATIOI{
PROCESSOn 6-10
6.2.2 PRSBAI'f-slBucrItnE 6-11
6.2.3 rI{PIAMENTAIIoN
r,JuWiU&E 6-II
6.3 sf,sr$-fcosrs 6-L2

6.3.L DEVELoP!€NT
cosrs 6-L2
cosrs
6.3.2 MoDrrrclrroN 6-r3
6,3.3 C6lS
!4.[IUTEN.0]ICE 6-1I

6.h oN C6TS
A PERSPECTTVE 6-L5

6.5 TBADrlteoFF sort'r{tRE ANDgtRD[ilaRE 6-L6

6.9.L oOIIDITIONS WIIICHLEADTO 6-L6


DESIOI{1n'.CDE
OI'FS
6.5.2 STS1EUSFEEDPROBIJ!{S 6-n
6.5.3 srsluM cosr PRoBLEl.ts 6-A

6.6 EenDt,t&E
sFEmtn.{DEotr'rs 6-2L

6.6.L pRocE$sons
txD ltEl.loRrns 5-2J
6.6.2 I}ECODEI'GIC 622
6.6.3 I{BORI ilITFEBS 622
6.6.b SPEcI.ILIZEDI!{TEBTAcEDETICEI 623
6.6.5 D{IERRUPIS 6-U
6.7 SOFmAnErRtDE OmS 6-25
6.7.1. FRMRA}T
IOOPSAI{DSUBROTNINES 6-25
6.7.2 FI'NCTIOIIAL
COUpUTATIOTS 6-26
6.7.3 BEPEAfEDCOUpUUIIoNS 6-27

5.8 $ruM.oR:r 6-27


RT,PNESEMTIIG
BI}IINT DAIA 7-L

NI'MBERSTSTEUCO}MERSIOI{S

DECIilAL TO BIT.ABT 8-1


BIS.OBTrc DECIUAL 8-1
DECIUALTO OCTAL 8-3
OCTEITO DECII{AL 8-3
DECII{ALTO HEIADECII.IAL &L
HEX.CDECII.'IL
fO DECI}{AL 8-5
coNvmslous
OC:TII TO BI}IABI, 8-5
HEI.qDECIUAL TO BII{rff,
.OCIIL TO HEI.ADECII{AL;
fiO BACK

BCDmnAEnS 9-L

BII{IRI IIRICTIOI{S 10-1

BIUARTARITHMETIC IPGIC INSIRUCTIOTS


^OIID
11.1 CoUPUTER
.0RI$IME?ICII{SmUctIOilS Ll-1

L1.1.1 tldo'S COUPI,EMENT


NO4ATIO}I u-1
IL.I.z BINANI .0RIITIUEEIC u-3
rL.2 COUpUmnrtrrc TNSTRUCTiOUS \-5
TT.2.2 IOGIC COMPTE}IENT tL-5
JJ.z.? IOGIC .E}ID 11-6
1L.2.3 IOOIC0R L1-6
Il.z.lr IOOIC XOR IL-7

TPPESpICES

l. UODITIED55OOOP CODET.{BI,E A-1

B. KIU INFOR}TIfIOII

IIU PNGil}T DATASNEET B-1

rIil BIPCK DIII}BA}T B-2

KIU INTER,FACIT{G
DATASHET B-3
KIM MONITOR IMPORTANTADDRESSES B- 4
C. COLLECTEDKIM SOFTWARE

DIS P LA Y ROUTINE c- 1
DIRECTORY c- 2
VU TAPE c- 3
SUPERTAPE c- 4
TAPE DUPE t.-/
MOV E-A -B LOCK c-8
HEX DUMP c-10
FRE QUE NCY COUNT E R c-11
A NA LOGTO DIGITAL CO NV E RS I O NDE MO c-13
RE A L-TIME CLOCK C-L 4
TIT,IER c-15
HEDEC c- 16
B INA RY MULTIP LIC A T I O N A ND DI V I S I O N C-L 7
16 B rT S QUA RERO O T c-22
LUNAR LANDER c-23
HORSE RACE c- 26
ONE-ARMEDBANDIT c-27
KIMMAZE c- 28
MUS IC MA CHINE c-31
HUNT THE WUMPUS c- s3
D. KIM DEMONSTMTIONTAPE

INDE X D- 1
PROGRAMHEX DUMPS D- 2
E . SPECIA L A P P TICA TIONS

E IGHT B IT A TO D CO NV E RS I O N E -1
MULTICHANNELANALOG INTERFACE E -3

F. KIM /6s00 INFORMA TIONSO URCE S

KIM SOFTWARESOURCES F- 1
65OO MICROP ROCE S S OSRUP P T I E RS F- 5

G. GENERALREFERENCEINFORMATION

H. TTt REFERENCESHEETS

I. MOS TECHNOLOGYDATA SHEETS

J. MI CROCOMPUTER
B IBt IOGRAPHY

K. GLOSSARYOF COMMONLY
USED TERMS
3Nt1In0ltsunoc
MI CROPROCESS
I NG FUNDAMENTALS

CO URS EO UT L I NE

FIRS T DA Y

I. Introduction to Micro p ro c e s s o rs a n d Mic ro c o mp u t e rs


A . Hardware
B . S oftware
C. Nurnber systems

II. Operating a Typical Mic ro c o rn p u t e r: T h e K I M-1


A . E xanining and n o d if y in g me mo ry
B . Loading and runn in g s a mp le p ro g ra ms
C. Using the K IM a u d io c a s s e t t e s y s t e n
D. Using the single s t e p mo d e

III. E xperinent 1: Loa d in g a n d Ru n n in g a S in p le P ro g ra m

IV. Microc.omputer A rchi t e c t u re a n d E le n e n t a ry P ro g ra rn n in g


A . S inplifi-ed CP U mo d e l
B . Data, address, a n d c o n t ro l buses
C. Memory and I/O a d d re s s in g
D. The K IM monitor
E . A selected subs e t o f in s t ru c t i-o n s

V. Programming E xamples
A . P arallel data in p u t a n d o u t p u t
B . Use of the K IM-1 k e y b o a rd a n d d is p la y

VI. E xperinent 2: P aralle l Da t a I n p u t and Output

SECONDDAY

I. In terfacing Microconpu t e rs t o E x t e rn a l De v ic e s
A . Using programma b le I / O lin e s f o r d e v ic e c o n t ro l
B . Device control s o f t wa re t e c h n iq u e s
C. Common interface d e v ic e s
D. A nalog input and o u t p u t t e c h n iq u e s

II. E xperiment 3: Contr o llin g E x t e rn a l De v ic e s

III. Further S oftware


A . Flags and condi t io n a l b ra n c h e s
B . Counting and tirn in g lo o p s

1- 1
THIRD DAY

I. Adva nced S oftware


A. B inary and decimal a rit h rn e t ic
B. Indexed addressing
C . Indirect addressing

II. In terval Timersi and In t e rru p t s


A. Using an interval t ime r f o r t ime d e la y s
B. The 6502 interrupt system
C. Interval tiner trigg e re d in t e rru p t s
D . fnterrupt application s

III. Experinents 5 and 6: Us in g the I n t e rv a l T ime r a n d I n t e rrup t s

IV. Se r ial Data Input and O u t p u t


A. The K IM-1 serial T/O system
B. 20 rnA current loop a n d RS -2 3 2 in t e rf a c e s
C . The A S CII code
D. K IM monitor,routines f o r s e ria l I/0

IV. Fur ther Topics as Reque s t e d

L- 2
SINInN0|SSV
oNtovitu
P.EADII'IG ASSfGI!,IENTS

Ii is -.rirtua]]lr inrpossibla to reaci a.}l ihe r+rltten materia] given

rith this colrrse j-n the tno nights during wir-ich the course is given.

This rnaterial is given with the course to facilitate a hi.gher level

of expertise than can be presented or absorbed in a three-day seninar.

lhe readi-ng assignnents llsted belos are tr-ighly recornnended in order

to receive the most from the next dayrs lecture. These assignraents

O!fLYcover the two nights of the course. &ead these assignnents for
infor:nation and understanding, NOTFORDETAILEDknowledge.

KII'I-I USEP, HANDWARE PRGRA},I SEMINAR


MAi{tJAT MANUAI M..INUAT WORKBOOK

PIRST NIGHT Chapter 1 Sections Chapter l_ Basic Logic


Sections 1.0 ttru Chapter 2 Interf ace
2.1 thru 2 . lr 1.2, r.J.1, Devices
Chapter l L.3.3 t
Section h.1 1.)+ thru
Chapter I 1.L.1.2.L

SECOT.ID
NIOHT Sections Chapters Glossary of
1 . 3 . 2 t h ru ^!/U-
JtU t> tor( Cornmon?erms
Section
1^^/
L.).2.O
1.5 thru 11.3 r
./l
.,L.Oo4.J 11"3.1
Appendix H

A5"TERCOMPIETIONOF T}IE SE}"ID[AR:

You should reread aIL the reading assigrunents FORDETAILEDIOIOh|LEDGE.

Ttrere are many sections of the KIM-I USERl,lAMrAl, H.ARDWIREAI{D PROGRA},I

M4NUALS,that were not made reading assigrunents. this D0ES NOt MEAI{

that they are wtimportant or not relevant. The reading assignnents were

made a basic understandiag for tbe lecture materia^L. You should reari

FOR.DEf,AILEDIC{O"{LEEEthe entire set of manuals anci the SB{!\AR WORKBOOK.

You will firrd all the jaforrnation in the W0RKB00K,highly eondensed and

extremely useful.

2-r
sINStUtUrdXS
, {,
KIM EXPERIMENTS

WARNING: Your KI}I-I experinental set-up operates on 1ow voltage on1y.

EXPERII,IEM 1 Loadi.og and Rrmning a Sinple Progran

1. KIM-I Ini.tializarion:
Tura oa 5V power. Press the RS key (reset). The display should
light e''d show some ramdom hex nutbers.

2. Address Selectlon:
Press AD to put ICIM ln address entry uode (address entry mode ls
autonatically seJ-ected after reset). Enter 0000 oo the keyboard.
Obsexive the dl-splay see 0000 tn the left four digLts. You are
looklug at locacloa 0000 in the KIM-I read/wrlt@ ul€rtrorlr Ttre
rlght two dlgits show the contents of thls Iocat,lon. Wtrat are the
cootents? Look at the next location by presslag *. Coatlnue pressing
* to see what aumbers are 1a your DeEory after system start uP.
Do you see a pattera to the ouubers? Go to locatlons 01001 0200t
0300, 0800, etc. and note the nunbers you flad. KIM readlwxLte
meaory rauges froa 0000 to 03I1F. I{hat utlrabers are found ln locatl-oos
whgre there is oo physlcal uenory?

3. Data Eatry:
Go to address O0OO. Put KIII into the data entry node by pressJng the
DA key. Press varLous keye and obsenre the display, To go co the
aext address, press *. For practLce enter the followLng data lnto
the KIM-I memory:

address data

0000 00
0001 01
0002 02
0003 03
Ttre * key alJ.ows you to lncrenent the address Ln either the AD or
DA mode. Eow do you go to a lower address or to a much hlgher
address?' You must retura to the address mode and key la the new
address theo contlnue data entry in the DA node.

4. Load{ng a Carned prograu:


Enter the progrrnt a8 lleted on the codl-ng eheet folJ.owtng this page.
This prograo w111 cycle through the meuory and dlsplay the conteuts
of each locatlon. For uore lnforuatlon consult the prograo aoces
in your literature package

3-1
PROGRAM: EPERIMENT 1 - Display Routine

MrcRopRocE S S oR coDI NG S HE E T PAGE oF

I"ABEL ADDRESS OP CODE MNEMONIC COI&i1I{TS

0000 A2
0001 04
0042 8A
0003 48
0004 A9
0005 62
0006 8D
0007 47
0008 L7
0009 20
000A t9
0008 1F
000c 2c
000D 47
0008 L7
000F L0
0010 F8
0011 68
0012 AA
0013 ca,
o014 DO
0015 EC
00L6 E6
0017 rA
0018 DO
0019 E6
001A E6
0018 FB
001C DO
00lD E2

GENERAL COMMENTS1

3-2
5. Progr:m Execut.ion:
Go to the beginning of rhe progrrTq using rhe AD mode (address 0000).
Press the G key. The address display will count up and the data
display will show the contents of each memory location. To stop
the program and return t.o the KrM monitor, press RS. This program
is written as a loop and will run forever.

6. Opti.onal- Experiment:
select one of the game programs in the lj.terature package and load
and run i.t. Lunar Lander, Horserace, and Kj.maze are reasonably short.

ilGERII(ENT 2 Parallel Dara Inpur and Output

1. Prepare Experlmental Equipnreut:


Locate the SK-10 breadboarding socket and the LR-25 module. Plug
the LR-25 into the SK-10 socket so that it is oriented as shown in
the drawing be1ow. Insert the flat cable plug 1n the center of the
SK-10 as shown. The flat cable should enter the plug fron the side
away from you. This will put pin 1 on the front left side. Connect
the black lead (GNn) to the GND ter-rninal on the LR-25. Connect the
red lead (+5V) ro the +5 LR-25 rerrinal.

(red )
(black)

Experlmental Breadboard

tr f'L J rt < :-' '*.}-.uo''l S

l -t .i t{st:i f ,
wl pi ,Jt{
. f
3-3 i )6.r
+r-
{f
r -;,.0t-
Use 8 w-ires to cormect the KIM PA output lines to the I LED
indicators on the LR-25. Connect:

pAO = piu 9 to IA
pAL = pin 10 to IB
pA2 = pin 1l to IC
pA3 = pln J.2 to ID
pA4 = pin 13 ro IE
pA5 = pin 14 to IF
pA6 = pin 15 ro IG
pA7 = pia 16 to IE

Use 6 sires to connect the KIM PB ioput/output llnes to the


switches and pulsers on the LR-25. Connect:

pBQ = pin I to SA
pB1 = ptn 2 ro SB
pBZ = pin 3 to SC
pB3 = pin 4 to SD
pB4 = pin 5 ro pt (0)
pB5 = pi:r 5 ro p2 (0)
ac pin 7 used in interrupt e:cp.
PB7 plu 8 ro 61[D

2. Eight Blt ParalJ-el Output:


Establish the eight PA lines as OUIPUT LINES by storiag the
aumber $I"F fu the PA data direction register at locatloa
$1701. Use the KIM-1 keyboard to do thls. Now use the
KIM-1 keyboard to write various hex oumbers into the output
register and observe the effect oo the I LED lndicators.
Go to address$1700 = PAD, press DA, then press hex keys.
You wllL see the blnary represenLatiou of the hex anrnbers
shown in the data di.splay.

Note: Ttre RS key resets the data direction registers to


$00 = INPUT, so you must reenter the $Ff io $1701 each time
you use RS.

3. Parallel Input From ExternaL Swltches:


Establish PBO - PB7 as INPUT by storLng $00 in the PB data
direction register at locatlon $1703. Remeruberthat this
ls done automaticalJ.y by the RS key. Use the KIM-L keyboard
to look at the conteats of the PB data register at locatioo
$L702. 0perate the exteroal switches and obserrze the effect
ou the memory contents.

4. Nr.rnerical Input frou the KilFl Keyboard:


The KI!1-1 keyboard is scanned by a software routlne. If no key
ls pressed the routlne returns wlth $15 1n the accrnulator. If
a key ls pressed, the routlne returns with the hex key code ln the
accumulator. The followlng program ca1ls the keyboard lnput
routloe aad transfers the contents of the accumulator to the
PA output port. This will enable you to see the key codes on
the 8 LED iadicators.

)-4
Keyboard Input Test, Program

0000 D8 CLD set binary mode


0001 M LDX// estabLish PA as out
0002 I'F $FF
0003 8E STX@
0004 01 $01
0005 17 $17
0006 20 JSR@ call keyboard input routine
0007 64 $6A
0008 1F $1F
0009 8D STAC send contents of A out to PA
{ 000A' 00 $00
.. ,,i* oooB 17 $rz
-, b*- ,r000c 4c JMPG J-oop back for more data
*
^.,Q., Tr 000D 06 $06
.,'iYt \ o00E o0 $oo
)
To run thls prograu, go co addrees $0000, Ehea press G. Ttre
display wiJ-l go dark because lt is :rot used by this program.

5. Prograro Output to the KIM-J. Dfsplay:


The KIM-1 display is a softnare drlven multip3.exed seven segnent
display. We are going to use the dlsplay to output hex nr.rmbers,
Three Eexoory locatioos hold the nuobers which are displayed by
the dlsplay routlne. Ttre leftmoet two diglts are stored ln
$0088, the niddle th'o 1n $00FA, the right two ln $00tr'9. To
display a number, we must store lt t4 the approprlate locatlon
and then call the display routlne. If a contiauous dlsplay ls
desired, you must include the call instruction in a loop so that
i.t is repeatedly executed. The following prograrn displays
0L0203 oa the KIM-I dlsplay.

Display Output Test Program

000F
49 LDLII load first number
00L0
01 $01
001L
8D STA@ store lt ln left display
0012
IB $TN
0013
00 $00
0014
A'9 LDA# load second nr.rmber
0015
02 $02
0016
8D STA@ store it in niddle dispJ-ay
0017
FA $FA
0018
00 $00
100L9 A9 LDAI/I load thlrd nr.rober
. I 001A 03 $03
{n I 00tB 8D STA@ store lt 1rr rlght dtsplay
I 001c I.9 $r9
[ooro 00 $00
I 0018 20 JSR@ call dlsplay routine
' 001F lF $rr
lF $rr
-*'0920
'0 0 2 L 4C JMPG loop back to call routlne agaln
lE
^i *,-'O022
v''r $18
oo23 00 $00

3-5
Note that thls progrrn staree ee $00*1i" Gc che prograB
begtnnfug aod run the pragr.aa" 'Pr*ss RS te st6F the
Prograo.

As a final project, you rnright like to 1lnk the keyboard


eatry program with the display outpr.tt progrso so that the
hex key codes are displayed in the righE hand displays.
Eow would the prognms given need to be nodifled? Try
it and see what you can do.

EXPERIMENT3 Cootrolliag ExternaL Deviees

1. Single Step Exeeutlon of Programs:


Ihe KIM single step function uses the NMI interrupt feature.
In order to actj.vate the slngle step futrctlon, you nust load
the proper address into the II}fI vector locatioas. This is
doue by stoting $00 lu location $l"7F"Eand $1C tn location
$17E8. Ooce this vector has beea loaded the ST key can be
used to stop a program and returu Lo the KIM monitor.
You are aow ready to try the single ste:, fr.rnctloa" Load
a progrilm and set the address to poiat lo the progran start
location. Switch the keyboard switch to liSorr. Press G
and one lnstructlon vilL be executei. I{hile in ghe SS eode
' the data display will only show the first byte of each lnst,cuction.
I,lhlle ln the SS mode, you can use the AD and DA modes to exanlne
and nodlfy ey memory l-ocatlon. T1'rePC key w111 recall the
progrErn counter vaLue for the next iastructlon to be executed.
After each i.nstruction, the CPU registers are stored in memory
where they can be examlned or nodi.fLed, this g*ves you the
Eeaas of checking program execution or nodifiyLng register
vaLues between steps. Memory locatlons f,or regl.ster storage
are:
OOEF PCL
00F0 .p6H
00FL status reglster (P)
00F2 stack pointer (S)
00F3 acetrmul"ator (A)
00F4 Lndex register (Y)
00F5 index register (X)

2. We are norr going ge r'nrm:giae that our KIM-I Ls connected to an


experlmental apparatus. The devlces to be cont'dolled are hooked
to the elght PA llnes (used agaln as output). 0f course we
will have to use appropriate polrer drlvers and Lnterface devlcee
to convert the TTL output slgnals to whatever is needed. We
w111 al.so have several feedback slgnals to feed lnto our KIM-I.
Ttrese are considered to be si"pLe contact closures aad are
" connected to the PB Lines whlch wtll be prograuned ae lnputs.
The devlces to be controlLed and their laput/output aesignments
are showu in the following schemati-c:

3-6
LEVEL lir (1)
,, A],ARIY
DNT
lEl'tP nI \r ,/ 7 '.AFFFF

DRAIN cL (0) 3 AGITAIOR


EEAT oN ( 1) f FILLii2
START ( 1) r FILL#1
STOP ( 0) 9 DMIN VALVE
Nc 7 6 ItE.\TrR
o 4 nne

Let SA = Level, SB = Teup., SC = Drain, SD = Ileat, Pl = Start,


P2 = Stop.

3. We are now going to use the logical i.nstructions OR and AI.ID


to turn individual devices on and off. Load che following
progrr{ and single step through 1t so you can see the effect
of each instruction on the output LEDrs which represenL the
actual devices. NoEe that you wiLl have to look uP your own
op codes.
Device Control Program

0000 A1 LDA/I $rr eshblish PA as output


2 vu SlAe $IioL (^i/1t \ (\v -- O c ' -' -'
5 A{ tDA/l $00 turn off all devices ( , ;o " , - ,,r '
7 g* STAG $1700 :. I
_

t,.
A Arr LDAG $1700 get outPut status li

D {81 oM/l $40 turn on coffee pot ft'

,l
F Se STAG $1700
t ,i:
"ir 12 LDAG $1700 set status
I;-
^p onail* +o*i i"t
,"15'""-tsb bn ptni!r*
\ ,t-17
-1A ep
sTA.9*-JfZoU li)

\v
r^rU ,-
., j
,l aD LDA@ $1702 get iupuE status -*
|t
tt\
l
LD h? AbID/l $04 check state of drain valve
r_ lF Ds glrgr $F9 if drain is open, loop back and check agai.n
j
2L A? LDAG $L700 ger srarus
24 s? 0RA// $08 drain ls closed so start EL].L lll
26 F;. SreG $1700
29 r:'li LDAG $1700 get status
2C sX AIID/I $f7 turn off ELL]- llL
2E $? STAG $1700
4,C JMP@ $1C4F
etc.

As you run through the progiV.n, turn switch SC on and off co si,uulate
havi.ng the drain valve open and closed.

Program termination: r

ff you want to have a program run just oncer You must end it
with a command to return to the KIM monitor. This can be
done by terminating your Program with: JMP@ $1C4f'.

.l
\D
D\ oo
3-7 .j:,
E)(PERIMENT4 Countlng and T{rn{ng Loops

1. Counting Loops:
The following example shows how to set up a cotrnter (bere the
X register) to a1low executioa of a progta'n segnent for some
preselected nunber of tlmes. We eould Just as easily used the
accumulator, the Y register or any r/w moory locatiou as a
couDter.

Counting Loop Prograo Example

LI)A# $l'f establish PA aa output


srA@ $1701
tDA/l $00 turn off all LED's
srAG $1700
COUNT LDX/ SOe load cormter wLrh 10,
LOOP INCG ^
$1700 iocremeat rhe ourpurrflort
DEX decrement the cor:nter
BNEr LoOP if cor"rater not zera. jr:mp to loop
DONE JMPG $1C4F return ro rhe moniror

Rr:n thls program in the SS node and at fu11 speed. Change the
count value and observe the result.

2. f { m ing Loops:
. A11 operations lrr the KIM-I system are tioed by the crystal clock
oscillator operatlng at a nominal 1.000 MIIz. The osclllator ls
quite stable, but nay not be exactly L MEz slnce that would requlre
a nore experisive crystal. If you need preclss. g{m{4g, check your
osclllator with a good frequeucy cornrter. Each instruction requires
a specific nr:mber of clock eycles for lts executlon. Ttrus progr€rn
segmeots and J-oops can be used to produce very preclse tlme delays
which are as stable as the crystal clock. The nunber of cycles for
each instructi.oo ls found otr the MCS6500 Srrnrrnary card and l.n the
MOS Microcomputer Prograrrming ldanual" Ihe folJ.owi-ug progrErn ylelds
a delay of 502 cycles = 502 oicroseconds froo a sr4gle loop.

Time Delay Program cycles

t"Dxlif $64 2
LOOP DEX 2
Bl{Er LOOP 3

Ttre loop ls 5 eycles and 1s executed 100 tLmes. the Lal.tla1 LDX#
adds the last 2 cyeles. To obtaln long delays, loops cen be nested
to produce delays of aay length. Now that you have the baslc idea
here is a more coruplicated program. I{e put the ti-oe delay ln a
subroutlne so that lt caa be readlly used by other progrsms. The
maLa program clearg A then lacreuente lt and outputs Lt to the .
PA port. Each cycle 1s delayed by the tloe delay subroutlne.
You w111 have to look up the op codes.- Start the oaln progrirm at
0000 and the delay subroutlne ar 00L3.

aQ
)-v
Tjoe Delay Test Program w:tth Subroutine

:ii::r.:i:,
START tDA/l $ff
.L- srAG $1701
{ LDA/I $00 clear A
I SUOW STAG $1700 look at A
n CLC clear carry before add
$ $D,9Jf,".,$Or add 1 to A

rS JMPG SHOW J-oop back to SE0W


16 ogtav LDY# $ce load 20019 i.uto Y =
i., i$ LOOPY tDX/l $62" load 98rn j-nto X = ;'
x
iF STXZ $l'51' srr w8$t€ 3-Eyeles
sii "i LOOPX DEX_9 o , * 'd decremeot X
' 't'BNEr.',1L0OPX if X not zeto, loopx
'1,*.,-o
LS . DEY decreuent Y
't"i BNEt''{LOOpy if Y not zero, loopy
?-: RTS. return

The total tiue delay here ls TD = 5Ty( Tx + 2 ) + L4 microsec.

Run the program and try dlffcrent values for T., and T*. You
ulght try to write a progrEu that would al1ow fou to 6nter tlne
constants from the keyboard ln real tLme as the program ls runnlng.

This is a good progran t,o use to see the effects of eorne of the
other accr:uulator instructlons. Replace Ehe CLC, ADC# sequence
with SEC, SBC#, or RORa, ROLa, ASLa, LSRa. If you replace a two
byte instruction rrith a one byte lnstruction, be sure to add
a NOP to fill rhe gap.

EXPERIMENT 5 The Interval Timer

1. Ihe KIM-I j-n.terval tlmer can produce a wide range of progra'rnable


tine delays from a few microseconds to 250 nSEC. the intenral
timer consl-sts of an eight bit down counter and a programmable
cLock divider which produces time intervals of 1 uSEC, 8 uSEC,
64 uSEC, or LO24 uSEC. The auuber of counts and the cor.rnt latervaL
are easily controlJ.ed. In thls experiment we sha1l use the
intenral tLmer to produce a Llme delay subroutlne. You should
use the sarnemain program used ln EXP. 4 to test thls routlne.
start ldth Ehe rDLy address E $1707, then try the other values
sholrn in the following Eable: l-. '

TDLY Tlor (X) Delay :., :


.j. .

$L704 1 USEC $64 100 uSEC


$1705 8 USEC $64 800 uSEC
$L706 64 USEC $64 6400 uSEC
$1707 I nSEC $64 100 nSEC

3-9
Interval Timer Subroutl::e

INTDLY PEA save the eontents of A


LDX/I $54 load ccunt
SIXG SLY load counter aad set divide ratlo
WAIT LDAG $1707 gec tjrner status
BEQr WAIT if status = 0, wait
DONE PI,A restore aecunulator
RTS retura

Note that the interrraL timer always runs io real time. If you
single step through a program ccntinlng an interval tiner delay,
the program wiLl flow rlght through the delay aad aot get huog
up for N loops as is the case with tising loops.

H(PERIMENT 6 Interrupts

1. The interval tiuer can be prograurned to interrupt the KIM-I system


every nnn machine cycles. In this experiment we are going to generate
an interrupt every 0.2 eec and uee ttili-s interrupt to run a progrs:l
which will increment the PA output port" You shouLd run a ualn
progtam which does not use the PA port. flre g,ane prograrus, or Ehe
display routine used in experiment 1 are good for this purpose.
Here is the interrupt routine:

Interval Timer Interrupt Program

1780 PHA save A


1781 tDAil $Ce ioad A wirh 2001n
1783 STAG $170f Load tiner and 3Et aiviae rarlo ro L{t24
L786 rDAti $FF
1788 STAG $1701 set P.Ato out
1788 INCG $1700 lncrenent PA lines
178E Pl"A restore original A
enable interrupt
1-78F RTI teturn froo interrupt

We put this program in one of the enoall blocks of t/w Eemory not
used by Bost programs. Set the IRQ interrupt veetor to polnt tc
the above routine by storing the entry addrese in $17FE and $17FF
( store 980 in $17fE and $17 ln $17FF ). You nnrst connect the
the lnterval timer output slgnal to the IRQ lnput l.lne. This le
acconpllshed as follows. Attach a Bpare 22 pLn edge connector to
the expansion Lines on the KIM-I board. Connect the orange clip
to the IRQ input (pin 4). Connect a- ihort jr:mper between pins
7 and 8 of the dip plug. Make sure PB7 is prograrnmed as an lnput
line eveo though it is used to send the tlmer signal out to IRQ.
After a system reset (RS key used) you mrst enable the lntervaL
timer interrupt capabiLlty by readlng location $170E once. this
can be dcne manually uslng thc KII{ keyboarci. You are now ready
to run'your rrrain Program. You shctrld obeerve noruel Program
executlon and apparently simultaneous lncrementing of the PA
output lndlcat,ors. Be sure the processor atalcs wlth the interrupt
enabled by storing $00 in locatioa S00F1 befc're running the program.
TI{IS PBOGRAUWILI NOT T"TIIICTIONUNI,SS$ YOU REI'{OVETHE GNO$NDWIAE FRO},I
prN # B ou nm 16-PI3l RIBB0:{coNhTcT0fi,"
3-1C
TT-6
' rrD rr
parrE' sTBurErraf aqf ur srofrsBdBc Jo sazrs fuaraJJTp EuTfrasur dq
r(cuanba:y rof"TTTcso eqf rrpA .ooo0$ f" gurlrers-urergord,aqS ung
'(t qd) ggg 1ndul ratunoc aqf of 3nd1no rofeTTTrso
{coTc SZ-g-I ar{l
fJauuog '(r-g 'dxa u1 euop sB ? urd roleauuoc uo;suedxa o1 drlc
a8uBro aqf 1ooq pue g pu" Z suld .:adun.f) bUf ol /gd fcauuoc .f; peol
'atalced arnfBrafTl :no{ u1 urarSo:d ra3unoS dcuanbarg aq1 dn qool
ralunoC dcuanba:g :luau-:.radxg 1euo11dg .Z
sIctASolcvJuSINtoNv3t901
BXSIC IPSIC DE'IIICES

Although mLcroprocessors 6s:s sallsd (end oftEn are used as) logLc rerplace-

merrts, basJ,c logi,c gates are sttU. needed ln most nlcrocoqnrter systems. ThEr

are rrsed for &rffers, Latches, Ad&ess Decoderse and Sfgnal Condltloners.

Therefore, lt ls tnportat to bave a good rrnderstendl.rog ald rorklag borl'edge

of basl.c J.oglc gates.

Dl€ltal loglc operates tn tb€ btnary nlnber systan. Tberefore, ar\y one

taput or outlmt can oaly be l.a one of tno dlstlact stat€s, elllre a xJ'tr or

s trgltt. Norrnally, references nade !n regard, to a dJgltal sig[a,L, a loglcal-


ttUt ls greater than 2.0 volts and a logJcal ttf,tr 13 Less tban O.8 volts;

thls l.s gal1sd HICIH-TRUEor PGIIWE-IBUE L@IC. IPI{-ItsUE or II&ATIVD-TRUB

tCtiIC ts tlre opposlte, a loglcal ttUr ls lees then 0.8 volts and logleal- ndn

Js greater t'han 2.0 volts. Ott logJ.cal dlagrgs, ttro tJrpe of logJc (PoeXtlve

or Negatlve) ,.s stsnt by the use of a clrc.Le tn ttre fnfnrt/ortpUt lead tcrrch-

lng tbe logic synbol for the eate ta ladlcate a LOU-TRUEfnprut/oaq)ut. The

absence of thls clrcle lndlcatps a HIGH-BIIE lrput/output.

PGITTYE IOCIC
INPUT
fl
NUiAITVE I'GIC
I![PUT

t{hen the clrcle ls used ln an outprt J.ead of a POSITfV hput gate

or the absence of lt ln a IOW-TRIJE


lnput Eatr.t lt clunges tbs n:ne of tJe
gat€ bV a<lrt{ngthe letter rrNfrln frcrrt of t,lte gatefs name, such 8Er

HIGH-IIR,{IEINPUT GATES LOI{-IRUEINPUTOAIEI


- -
_{-\ ___<{-\ ___-ol--,
I l- | lc,-- | br- | l-
aND NAIrD4*/ AtrD 4_/ NAI{D
a_/

-_/

L.1- 1
.0n ogll,anatJo of tbe bastc loglc gates folLlons:

I. }ION-IIffERTINGBUFFER

TblE devl,ce l^s used prlnarlly to lacrease tbe load handllag

capabdlltles of aotb€r dsvtce. &e ou@ut of thls dwlce rllJ.

alrry: be tJre sae loglc Level as ltE fuFnrt.

INSIICY:

ff.
&s srlt€h closed represeots rr{gh lnput
The srltch opeo represents a Low " laput
the lar;> on rslreseots a lrgh oulnrt
the lary of,f retrnreseots a J.owout4nrt
C]'osrng tlte srltch ArrDs
the laq> ON. Ope'rhg tbs
srLtcb turrs the lap OFF.

LOGICSIMBOT:

A - Inptrt
e - otttput

t?INE T.ABI,E;

A e
I 1

0 o
BOOI,EAN
EQUATION:

a .e
II. ffYERTIIffi MT'SER

Tbls.devLce ls used prlnarJty for loglc leve1 Luverelon. Tbe

ollut of t'bl,s dgvice rtll alrrys be ths opposLte Loglc lsvel to

lts lnpet.

IITAI,OGT:

lbe erltcb cloaed repreeots a hlgh lapnt


The erttch open rqreamts a 1or lnpnt
Tbe J.arp oB represelats a hrgin @Ulut
lbe 14l off rqrresente a lor output

Cl.osbg tbe srltch siA[ short


out tb 3'ap and turn Xt off .
Op€ltfug thc srltch rLLL rmove l'
the abmt end turlu on tJo IaP.
I.OGIC $$TBOI,:
-

A+e A -
A - arEut
Ilput

ths smet]. clrcJ.e at tb end of tbe


€ate tadlcates outErt lsversis"
lnu$t tABLEl
-

A a
1 0
o 1

POoLEailE@AITON:
A iE'

??.F IND
III.

srhlc devlce uaed pJnanfly to lndtcate rbsths e aot g!! of lts


lapte 4ts hlgh at tbe same tlneo Tbe ou@ut ls EE}H-TBIIE.

.0$IIOGIr
-
I srritch closed retrEesents a hJgh lap'ut
A srLtch opq retrneserts a lon lxput
e Ttre J.ap oo represots a ldgb output
Xhe 1op off relreseots a 1or ortPut

Both srrttches mrst be closed


to bltr t'be ].ap o" If elther
on both srLtcbes ere op@, ths
Iary rtl-l be off,o

I$GIC SIMSLT

l&B - INPUS!
a - 0Ut?Ul

lr'1-3
IAI]TE TABT,E:
-

A B e
o 0 0

0 I 0
I o o
1 I 1

B0oLEArEQITA?ION!

lo B s a
IY. U.OI{D

thls d€wl,ce ls used the sae es t&s .A![D,ercept tbe ortput ls LOtf-IRlIE.

INAIOGI:

4 srttcb c.loeed repreeerils a btgb 3sryg


A sritch otr].@,
retreeets a 1or tnfnrt
l&e ]'ap @ rspr€sents a ftl.gb mtpnrt
lhe J'ap of,f represents a l.on outpr:*

tt@ bot& sritctps ae closede they


ebort out ths lap ald tum, lt off.
If elths or botb sritrcbss open, tba
short rILt be rmoved ard trlrn ths
3.fubtm.
IPGIC SIMBOI:

a&8 - Iuprts
e - Artlnrt

I3IN[ ?TBT.E:
-

A B a
0 0 1
0 1 I

I o 1
L I 0
L.1-L
EQU48S:
BO0r.E0s,
Ao ?EE'

VO OR

Sls d€rrtce Ls used to ladLeatE rtFD qt lg_&st gq9 of Xts tapts ls

hlgho lte o,$nrt ls EIDH-$UE.

A srrttrh closed retraesents a hlgb floptrt


A snttph open repreeeots a 1or tglnt
&e 1ry m rspteseots a hlgh otpot
lte lap of,f relneoeots a lor outPut

Clootrg of eLtlc or bot& srttcheg


turns tbc flght on" llJ. ths srrLtcbee
uut be open to 'lilnil ths lmp offo

rocrcs4agr:

A&B - IEPute
e - 0utpt

IRUM TABI,E:
-
A B e
o o 0

o 't
1

1 o I

1 I I

EOOI,EAII
E@IUTION:

A+Bte

b.t-5
VI. NOR

ltls d€nlae ls used for the sae Itulpose as the 0R gatee ercept tho

sutlnt ls l0tf-ffiIE.

4{4€'
A sttttcb closed relnesotg a h{gh lnprt
At Bt ,f1 C A srltph open rqpaesats a lor lnpst
lte laP ql rqlresots e rrgh ottrrt
eB lu1l off relneseots a lcr ootput

Closbg of ettlren or both snlte,hes


sbrts ouf tie Lry ad Utrns lt
offc Botb Errttthes nrst be oPen
to ADta o the lalr"

IPGIC SIilBOL:

A & B Irytrts

A OutErt

BINH TA8L8:
-
A B a
o o 1

o I 0

1 0 0

1 I o
F@ATION:
BOOI.EAI{

A + I EE

l+.1-6
VII. EKCLItsIgg - OR

fbfu dtrLce ls rrsed to lxdfua.te rbea one, and o.ly oep icptrt is hl€b.

lbe otpnt ls ECiH-tRtIEo

a{3rpcr:

A srltsh ,n t&e ,,1r posltdolr


rqneets a hlglt lnpt$
A srrttch fu the n2r positlm
!^ relneeots a Lcrr laput
the 14l @ rqp€sats a hrdl outprt
Tbe 3-anp off represeote a 1or mttrnrt

Fc tbe 14l to be q,r qre srltch


urst be ln tbe n3.'t trnsltton and oe
n1gt be ln tba r/n positJono Oth,ff_
rlse, tb f-ql rlAL be of,fo

IOGIC SI!{BOL:

A&B - Inputc
a - Ortput

18,I'THTABI,E:
-

A B a
o o o
0 1 I

I 0 1
I I 0

BOOI,EAI{EQIIATION:

a (DB. aE+ - . ln r e

lr.1-7
VIII. EICLIBM-NOB

lbls d€wlcs Ls tne saFe as tbe EXCIJIIfIE-OB gatet ercept tbe Eutput
ls LOI|-IUIE.
IN.EIOGT:

I srrttch tlr tha rln posltdCIa relreeots


g h{gh fDp11t
A srttcb lD tbe nl; prosltJ.@, relroeeate
a lon lnput
lte Lql qn rspreseots a hrgh ouQnrt
Ilte 3.ep off represelrts a Low ertgxrt
eF orqy rqy to sbort-qrt tho
lap 8d Ulrtr tt off, ls to
b^ge oe suitch ln, tbe nl,tt
posXtioa ad one Erltch ia
ths r2r po€Ltt@c 0therrtse,
tbe l.anp rtlt be o,o

&OGICSIMBOL:

,lr:" ..
IRUB TIBI,E:
A&

e
- lnputs
- Output
-

A B a
o o I

0 1 o
1 o o
L 1 I

EOOTE/IT
&IUATTON:

A @ B .A F+ T B : 0
I]T. DT.CSCI'SSIOII
OF IPW-IRI'E IOGIC
lbe peceedbg dLscnsslon on tbe baglc J,oglc gates hae Dot dlgcnssed
gatee rl,ti LOt{ e NE}ASM-$IIE fuputse 'l?r{o ls becanse there ar.e no

I.C.rs epeclf,lca{y deelgnat€d fon IOU-IBIIE l4nltsr h,t a close eraLnatlon

lr.1-8
of tbe inrth tables sbons t&e foltow{ng r*,rlatlors}rt5s:
NOIE: b tne foltoming talrrtb t,aLles, sLs & rEn ar:e used lngtead
of nlrt & n0n to re&ce tbe enfuslm of rhat ls a I&IG.{L
nlr e rOil betrreea HIOH-B,UEand fp!{-!ffifi lalnt IffIC.
b L4, Oc8 voLts sFd atr H> 2oO voltso

HIDH-lRllE INPUT r ISTf-TEIIEINPUT

HIGH-BIIE .eilD trOtf-IRIIE 0B

A B e A B e
L t L L t t
L E L L g t
H L L E L L
H R H E H H

HIOH-IRIIE N.0ND LOLJ-lfgtB ggi

A B e A B a
L L H ?
E t H
L H H I H g

E L H H I H
H H L fl E L

lr.1-9
HIIIH-BIIE OB t IOtf-lBIIE AIID

A B a A B a
L t L t L L

t E H t E H

H t H g L E

E E H H H E

HIDE-IBIIE NOB IIW-tRIIE NIilD

I B e l B e
L t E L t E

L E L t a L

H L L g L L

H H L I H L

lr.1-10
p(. Lri -4

.j! :, !

:",' )
ai r
ELIP-ff[O-PSr
ffi
{i

I. 8"8 LAICE.

the n S, latcb rat probably the flrst t3pe of ft$-flop enrc tnrflte
( n - R e s e t & S =$ e t)o

1*l 1*
]' lo
o ll

Itilort dlmd

lb mks tee 8€ lafnh tato a ctocked (Ltptlepr a d[oc& lnRrt urst be


addedo

II. B-g ErJp EIOP.

Ibe 8.8 fllp-fl.op ls tha slqfleet of t&e f,Llgrf,lqrc

B s e e
0 o NO,]HTM}I
o I 1 0

I o 0 I

t t 1* 1*
xt{ot altmed

tha addlilpn of ths bto NAIIDgates rrlt& t&e clock latrlt cbsses lt
lato a ctocked n S fljp-tXopc Ilbe bprlts (B & S) ca oly &ange tbe
otrtputs (e a O drrllog a fdgb lnfut dloek pnlsec Ibe A€, f,tlp-ffop tu
usualty dran tn tnfs nsrlnrt

lr.2-1
rrr. DATAoR D-frpE FLrp-FIop:
Tire D-type F. F, is used primarily for a data latch, It can be made

effectively from an 8-S F. F. by:

D a 0
D
CIOCK 1 1 U

0 n 1

rv. J.K IYPE FI,IP-FI!P:

fhe J-K or Master-Slave F. F. is used whenever data is to be trapped

and laiched at a given instant in time, such as in shift registers. ft can

be effectively made from two R-S F. F.rs by:

J K v

o an WHERE:
Qn = value
0 1 0 of Q during
previ.ous
I o t clock eycle.
a
I 1 6'tt

V. TOGGIEOR T-IYPE FLIP-FIOP:

Thc T-fype F. tr'. is used pri.rna-r'i1yin counters. It can be effectively

made fron a J-K (Master-Slave) F. F. by:

CL a a
1 1 U

I o 1

U I

For every complete clock cycle ( | ), O and 0 go through L of their


cycle. Therefore, tb T-type F. F. divides the clock frequency by 2 as long

as the ItTtr input is held high.

It,2-2
Dtr ODEBIDN4II, TIPI,NXTNS

DECODERS:

Tbese devices are most comrorrly used for address decodlng. llrery are
avall able ln 2-Llae to l+-llner 3-1lne to B-line, h-Line to LO-Ilae, l+-].lne

to l6-$xe conffuuratiqr. For sinpl5.city, a 2-1jne to lr-llne decoder ls


sbffla belov:

B A o L 2 3
0 0 L H .H H

0 1 H I u H

1 0 H H t H

1 L H H H t

t'lhere n.0'nls the least-


s{gniflp4lt blt Ard rtttt
ls the nost_stgnrflcant
bit.

Witn thJs device, tt m.ly takes 2 llnes to speclfy or e'nable L dlfferent

devlces. the outtrnrt is lor-tarre"


DUJIIILTIPLF.XTnS
:

these gat€s are the same as a decoder, except tbe NAIiD gates have an

addltlqra.l lnprrt for data. lhis devlce eeparates serial data oa olre Llne

to separate Llnes.

B A o I 2 3
0 o D H H H

0 1 H D H H

t 0 H H D H

t I H H E D

where rrDrrls tbe DarA


preseoted to the data
Jngrt"
ENcopEvur&rrPr€Fm$

EIICODEFS:

Ibese devices are used to ccnvert several lnputs lnto a few encoded

Llrres. Tlrese are used m keyboards and nr:.ltLposltlon sritches.

I I 2 3 B A

L I t 0 o
H L L o 1

L H L 1 o
3
L t H t L

MULTIPLETffi r

l0rltiplexorc or Data $electors are used to seleet qre of several data


sources and plaoe tbs data frm tbat source qrto a stngle ortErt llne. these

are avaJ'lable ln lr to 1, I to L, and 15 to L ccnfiguratlons,

h.lr-t
z-1'1
SEV9 frll00 = X
T T x x x T T
0 0 x x x T T
T x T x x 0 T
0 x o x x 0 T
T x x T x T 0
o x x o x T o
T x x x T o o
0 x x x 0 o o
I €c ec TC 9c v
]NTERFACEDEYICES

OPE}I-COLI,ECTOR
INGIO

There are severaL instances where a large multiple input oR gate


is needed. rn certai.n cases the commonpractice is to create a
IfiRED-OR. This is done by riri:rg tro or more gate outputs together
to create a single inpui into anottrer gate. The WIRED-@ is a LoW-TRuE
output. the l{fRED-oR is used frequent\y to 0R several iaterrupts together.
BUT, this procedure cANNoTbe d,one rith just any logic gate. The
standard TIL logic gate has both active pu11-up and active pull-dolrn.
Therefore, if two standard TTL outputs were tied together and one output
was hlghl nhile ttre other was low; each gate would try to make itrs
outprt prevail until finally one of the output transistors of one of the
gates burned out.

I'he only type of loglc that can be WIRED-ORtogether is 0PEN-C0r.T.trCTOR


logic. The inte:nal differenees of the output driving circuits is shomn
below:

STA}IDANDTTL OPEN-COII,ECTOR
OUTPUTDRTVEA, OUTPUTDRTVER
Vsc Vcc
EXIERNAL
PUil-UP
RESISTOR

0ulPuT
OUTFUT

l+.5-t
NOIE: The open-collector logic has no inter4:] pull-up device (neither

active nor passive). Therefore, the gate can 0NtY pull what is attacbed

to its outpu.t to grotnd. Sjnce there is no pull-up device in the gate2

several of these types of outputs call be rired together with no i1l

effects. But their cqrbiaed outputs must have two states (high and 1ow)

to be of any use as an input to another gate. Therefore, an external

pu1l-ry resistor must be added to the jrrnction of the WIRED-0R. The

value of the resistor is caleulated by:

2 .6 \D \1 r.5
2 5' ." isE;
E

W}ERE:

I1X = Total of the leakage currents of all the gates of


the IfJRED-0R when thei-r outputs are aI[ high.

IS = The lowest mocimrln ctrrent sinking capaliU.ty of


any of the gates forming the WIRED-0Rwben its
output is 1or.

TRI.STATE I.OGIC

Il a micro-computer systern transferriry of data from oae part of the

systeua,to another is done via the DA?A BUS. In a large number of systemsl

the number of devices attached to the data bus exceeds tlie load driving

capa.bi'lities of the rnj.croprocessor or other devices ttrat are conrected to

it. Ttrerefore, there ls a aeed to buffer the sectious of the system to

ttre data bus. There is always more than one secti@r connected to the data

bus, so for intellegent commrnications, one and oaly one can cormrunicate

to the bus at arry one time. Therefore, there is a need to turn off on

discorurect al'l but the section ttrat has been enabled by the processor.

b.5-2
But a large nr:rnber of devices only have tro output states (high or lon)
-
So, there is a need. for a special output that has tbree statcs (higb, 1ow,

or off) . This is referenced to as tbee-state or TRI-STATE 1ogic. The

logic symbols for these devices are belol:

ITIGII-TBUEEN^ABI"ES

IOhI-TRUEETIABI.ES

I+.5-3
These gates when enabled, through the separate enable input, will

function like the standard gates that we have abeady <iiscuss€d.

Butr rhen they are disabled their outputs go to a high-inpedance or

off-staie. Therefore, many l-state devices caa be attached to a

commonllne withcut unwanted interaction as long as one ald onJ-y one

is enabled to output -uo that line at arry given tine.

BUS TBA}ISCETVERS

lhe TRI-STATE devices that have been di-scussed are essential

to one-way cornmunications to a bus, BUT, the processor and a number

of other derrices are by-directional and need to cqnnunicate in both

directions with the by-directj.onal data bus. this caused the creation

of BUS TRAIISCEIIERS. BUS TRINSCEIVER.S


a.re effecti.vely two IRI-STATE

buffers strapped together in sucb a nanner as to tie the input of each

buffer to the output of the other. Ore of the jr.rnctions is to be

attached to one of the d.ata bus lines whlle the other junction is attached.

to the sane res'pecti're line of a device or section that is to be buffereci.

One and only one gate is enabled at any given tjrne. The gate that is

enabled is deterrnined by the ciesired direction of communlcations (tr't

or OUT). This is uzual1y done by the READIdRITEcontrol line. There

gf,'s usuelly fonr strapped pairs in one IC, In some Bus lbansceivers,

one of the junctions (j.rrput to output) is not rnade within the fC to

facilitate interfacing a bj--di-rectj-ona1 bus to a split data bus or

de'rice. If this is not desired cn needeci, the user can externally make

the connection.

IN/OUT
sy|l3lgoud
3uv,l,uJos
oNtzlvNV
ANALYZING
SOFTUARE
PROBLEMS

I N T R OD U C T ION
T h e o bi e ct o f th i s ch a p te r ;s to pr esent a gener al pr ocedur eused to
d e s i g n so ftw a re to so l ve a pr ob' lem. This pr ocedur eis com pletelymac h'i ne
i n d e p e n d e n t,a n d 'i t ca n b e applied to any softwar e pr oblem syou ar e l .i k el y
t o e n co u n te r. T h e mo st i mpor tant thing to r eme+ nber about this pr ocedur e
i s t h a t yo u d o n o t co n ce rnyounself with the pr ogr ar nming languagede tai l s
u n t i l we l l i n to th e so l u ti on. This is tr ue of even the seemingly"tri v i al "
p r o g r a ms. T h e re i s n o w a ym or ecer tain to r esult in a pr ogr amthat is
s l o p p y' i l l -d e si g n e d , a n d har d to debugthan to tr y to wr ite the pr ogr am
d i r e c t l y fro m th e p ro b 'l e mdefinition. To be effective softwar emust be
d e s i g ne dfi rst a n d th e n i mplem ented using the cor r ect techniques.

5 . 0 Th e S o ftw a re Oe si o nP rocedur e
T h e s yste ma ti c a p p ro a chto developinga pr ogr ar lnedsystemis a logica l
e x t e n s i o n o f th e n o rma l p roblemsolving cycle engineer sand scientists
h a v e e mp l o ye dfo r ye a rs. It consists of seven basic steps:

1. p ro b l e md e fi n i ti o n,
2. p ro b 'le m p a rti ti o ni ng,
3. for each par tition,
a l g o ri th m d e ve l o pment
4. w ri ti n g th e p ro g ramfor each par tition,
5. d e b u g g i n ge a ch p rogr am,
6. i n te g ra ti n g th e pr ogr amsback into the system ,and
7. fi n a l syste md e b ug.

U s i n g th i s te ch n i q u e , th e pr oblen js br okendown into smaller and smal l er


s u b - p r o b l e msu n ti t th e y a re a size which you can dea' l with convenient'l y
a n d e f fe cti ve l y. T h i s i s becausejt is mucheasier to focus your att en-
t i o n o n o n e sma l 'l se cti o n o f the systemat a time. Youdevelop each of
t h e s e bl o cks a n d su b -b l o ck sinto a gr oup of detailed flowchar ts and p r o-
g r a m s , e a ch o f w h i ch i s te sted and debugged. They ar e then inter faced
a n d t h e w h o l e syste mte ste d. This system aticappr oachis intended to hel p
y o u m i ni mi ze e rro rs, si n ce the sm all highly localized pr ogr am sar e muc h
e a s i e r to th o ro u g h l y ch e ckout than a single lar ge, spr eadout pr ogr am .

5-t
G r a p h i c a ll y, th e p ro ce d u rei s 'illustr ated in Figur e 1.1. You star t with
a c e n t r a l p ro b l e ma n d p a rti ti o n it jntcl logical blocks, solve and debug
e a c h o f t he b l o cks, a n d fi n a l l y integr ate and r efine the blocks into the
f i n a l s y s te m. T h e rema y b e o n e or m anylevejs of blocking, depend.ing on
t h e c o m p l e xi ty o f th e p ro b l e m. |.lith exper ience,you wil l f ind thjs gen-
e r a l a p p r o a chto b e th e mo st d i r ect and consistent way to im plementa
w o r k i n g s oftw a re syste m,re g a rdless of size. Less or ganizedappr oaches
m a yw o r k f o r sma l l e r syste ms,but you wi11 becom e hopelesslytangled as
t h e s y s t e msg ro w i n si ze . It i s best to lear n the gener al pr ocedur eand
u s e i t o n al l p ro b 'l e ms,sma l l or lar ge. The gr eatest disaster s usually
o c c u r w h e nth e w h o 'l ed e si g n p rocedur eis dispensedwith becausethe pr o-
b l e m i s t o o " tri vi a l " to w a rra nt the gener al appr oach. Conver sely,dogg ed
a p p l i c a t i o n o f th i s a p p ro a chcan m akemanyfor midablepr oblem stur n out
f a r b e t t e r a n d fa ste r th a n a n ti c ipated.

I n t h e r e ma i n d e ro f th i s Je sso nwe will initiate our study of the gener a l


s o f t w a r e s ol u ti o n p ro ce d u re . L essonsThr ee thr oughTen will then expand
a n d r e f i n e th e te ch n i q u e su se d dur ing the solution pr ocess.

5 . 1 S t e p 1 : D e fi n e th e P ro b l em
A s w i t h a n y p ro ce d u refo r so l vi ng any pr oblem,the fir st step is always
t h e s a m e( an d th e h a rd e st): d efine the pr oblem. For the case of software
p r o b l e m s ,yo u mu st d e ci d e e xa ctly what the finished softwar e systemis to
do. T h i s de fi n i ti o n o f th e o p er atjonal char acter istics you want the final
sy s t e mt o h a ve fs ca l l e d th e fu nctional specificgtion. Natur ally, it is
e a s i e r t o de fi n e a n d sp e ci fy so lutions for som etype of pr oblemsthan for
o t h e r s . P ro b l e msw h i ch a re co n cer nedwith the im plementation of specific
which r equir e both judgem ent
f e a t u r e s a r e g e n e ra l l y e a si e st. Pr ob' lems
a n d i m p ' l e m e n ta ti oanre th e h a rdest. In the fir st case, the task is to
fi g u r e o u t h o wto d o so me th i n g. In the later case, it is often a questio n
o f w h e t h e ro r n o t th e j o b ca n b e done, and if it can, what is the best wa y
to d o i t . F o r e xa mp l e ,a p ro g ramto wr jte single data bytes onto a mag-
n e t i c t a p e u n i t i s a fa i rl y sp e cific pr oblemwith a sjr nilar ly str aight-
fo r w a r d f u n cti o n a l sp e ci fj ca ti o n. Ther e is little conceptualdesign wor k
to b e d o n e . It i s ma i n l y a q u e s tion of using a pr ogr amto contr ol the
5-e
I'IAJOR
SYSTEM ELOCK

SYSTEI'I sYsTEt'l SYSTEM


SUB-BLOCK SUB.BLOCK SUB-BLOCK

DEVELOP
ALGORITHM

II{TERFACE
ANDDEBUG
MAJOR SYSTEI'I
BLOCK

FIGURE5"1 GENEML
PROBLEM
SOLUTION
PROCESS
)^
5-J
s e l e c te d h a rd w a re . 0 n th e other hand, the pr ogr amr equir ed to use thi s
p r o g r ama s p a rt o f a syste mto for mat sequences of data bytes into r e c or ds
o n t h e ta p e w i l l re q u i re consider ablymor edesign. Youwill have to de-
c i d e o n re co rd l e n g th , re cor d m ar ks, whetheror not you want to for m at the
d a t a w i th p a ri ty a n d /o r ch eck sum, and so on. Not only that, you mus t
d e c i d e o n th e p ro b a b l eu sa geof the r outine. The quick for m at pr ogr am
r e q u i r e d to te st a ta p e d e ck' s oper ation in the lab is apt to be quite
d i f f e r e n t fro m a g e n e ra l u sageexchangefor r nat for a tape libr ar y. In the
s e c o n dca se yo u mu st co n si der pr oblemsof compatibility with differ ent
h a r d wa re ,re l i a b i l i ty, u se rdocum entation,
and m anyother details. Al l of
t h e s e qu e sti o n s sh o u l d b e settled in the functiona' l specification befor e
y o u p r o ce e dto th e n e xt d e s ign phase. lr Jewi]' l exam ineboth of these
c a s e s a s e xa mp l e so f g e n e ral pr oblemsolutions in th' is and later lessons .

5 . 1 . 1 In fo rma ti o n R e q u i re dFor A Functional Specification


I t i s di ffi cu l t to g i ve a c ompietedefinition of infor mation that is al w ay s
r e q u i r ed fo r a fu n cti o n a l specification. It var ies widely fr om pr obl em
t o p r o b l e m. S i mp 'l esyste mscan be specified adequatelyin a few pages .
L a r g e , cu n p l e x syste msma y have hundr edsof pagesof specifications a nd
s t l l l b e i n a d e q u a te l yd e fi n ed. However the
, following infor mation sh oul d
a l w a y s b e p re se n t.

1. A co n ci se p ro b l e mstatem ent. Oneshor t par agr aphdescr ibin g


th e p ro b 'l e mth e systemis being designedto soive.

2. R e q u i re dh a rd w a re. Youmust knowwhat signals and devices a r e


a va i l a b l e o r re q uir ed. The exact l/0 or m emor yaddr essesar e
n o t i mp o rta n t a t this point, but you must knowthe har dware
yo u w i l l b e u si n g .

3. R e q u i re dso ftw a re inter faces. W hendesigning pr ogr amsr) ou


w i l l o fte n b e p l a cing them into syster nswher ethey will hav e
to co -e xi st w i th or utilize other pr ogr am s. If this is to b e
th e ca se , i t sh o uld be noted in the specification. In this
ca se , e xa ct d e ta i l s ar e necessar y;you should m ention the

5-lt-
re l e va n t syste mstandar dor for m at ( i.e., all output must
co n fo rmto syste mi/0 standar d i- 13) for all r outjnes to be
i n te rfa ce d . T h e ser equir em entswilJ often have a significant
a ffe ct o n yo u r d e s ign.

4. A co mp l e ted e scrfp tion of howthe systemis supposedto func ti on


w h e nco mpel te . T h is is usual' ly the ' longestpar t of the func -
ti o n a 'l sp e ci fi ca ti on. This section should' include a descr ipti on
o f u se r i n te ra cti o n ( if any) , data r equir ed, output pr oduced,
sp e ci a l fe a tu n e s, er r or condition handling, etc. In other w or ds ,
a co mp l e ted e scri p tion of howthe systemwill look to the wo r l d
fro m th e o u tsi d e w ith no consider ationfor how it will look
fro m th e i n si d e .

T h i s p r o b l e mma ke sw ri ti n g the softwar e specification soundl' ike a r ather


f o r m i d a b l e ta sk. It i s. A good, well thought out specification is the
k e y t o a g o o d (i .e .su cce ssf,uj!) pr oject. It is well wor th the time r e-
q u i : ^ e dt o th i n k th e p ro b l e mthr ough com pletely. If you knowwhat you hav e
t o d o ' i t b e co memu s che a si e r to pr oceeddir ectly to a solution than when
y o u m u s t co n sta n tl y sto p a n d star t to fill in the blanks in the pr oblem
definition. F e wsp e ci ffca ti o ns ar e ever totally com plete, but you sho ul d
s t r i v e t o g e t a s cl o se a s p o s sible befor e you star t the actual design.
0 n c e y o u b e co mei mme rse di n the details of the solution, it becom es m uc h
m o r e d i f f icu l t to se p a ra teth e nor m al implementationpr ob' lemsfr om thos e
c a u s e db y a fu n d a me n tadl e si gn' logic er r or .

E x amp l e(.1
C o nsi d e rth e d e si g n o f a pr ogr amto inter face a magnetictape
r e c ord e r to mi cro co mp uter . This pr ogr amwili contr ol the tr ansfer
o f pa ra '|1 e 1d a ta b e tw e enthe tape deck and the micr ocomputer . It
w i l l co n tro l a l l ta p e d eck har dwar efunctions which ar e r equir ed to
p e r fo rm th e se d a ta tra n sfer s. The following is a possjb1efunctjo n-
a l sp e ci fi ca ti o n .

5-5
S c o p e: T h i s sp e ci fi ca ti o n cover s the pr ogr amr equir ed to inter face
a f ' l a gb yteMo d e l 1 0 1 0d j g i ta l magnetictape dr ive to an ever yday
microcomputer.

R e q u i r e dH a rd w a re : T h e i n ter face wil' l r equir e the tape dr ive to be


connectedto the computerthrough two input ports and two output
p o r t s : o n e d a ta i n p u t p o rt with par allel data fr om the tape deck,
o n e d a ta o u tp u t p o rt w i th par al' lel data out to the tape deck, one
s t a t u s i n p u t p o rt a n d o n e c ontr ol output por t. Status input signals
a v a i l a b l e a re E n d o f T a p e , }{ r r ' te Pr otect and Ready. Contr ol signals
r e q u i r e d a re T a p eA d va n ce ,Read/llr ite and Tr ansfer Data. The timing
w a v e f ormsa re sh o w ni n F i g ur e 1.2.

Software Requirements: The I/0 routines must conform to the normal


s y s t e mre q u i re me n ts: o u tp ut data to be passedvia the C r egister
( o r t h e a p p ro p ri a te re g i ste r or memor ylocation for your system)and
i n p u t da ta i s to b e re tu rn e d in the A r egister ( or the appr opr iate
r e g i s t e r o r me mo ryl o ca ti o n for your system )upon exit. The r outines
m u s t r esto re a n y re g i ste rs or memor ylocations used.

O p e r a ti o n a lD e scri p ti o n :
I n p u t 0p e ra ti o n : U p o nca l l ,the r outine will gener ateal' l timing and
c o n t r o l si g n a l s re q u i re d to tr ansfer one data byte fr om the tape in
t h e t a pe d ri ve i n to th e p ro cessor . It will then r etur n to the call-
i n g p r o g ra mw i th th a t d a ta byte. If the tape dr ive status indicates
En d o f T a p e , a n e rro r i n d i cator shouJdbe set on r etur n. 0ther wise
i t s h o u l d b e re se t.

0 u t p u t 0p e ra ti o n : U p o nca l l , the r outine will gener ateal1 tim ing


a n d c o ntro l si g n a l s re q u i re d to tr ansfer the data byte passedfr om
t h e c a l l i n g p ro g ra mo n to th e m agnet{ ctape in the tape dr ive. If
t h e t a p e d ri ve sta tu s i n d i cates Endof Tapeor W r ite Pr otect, an er r or
i n d i c a t or sh o u l d b e se t o n retur n. Other wiseit should be r eset.

5-6
READ =+ ADVANCE
TAPF i II

--> READ/WRITE

ENDOF TAPE

_> TRANSFER

+- D A T A (S )

+- READY

WRITE ..+ ADVANCE


TAPE

-..-> READ/WRITE

<_- ENDOF TAPE

HIGHIF PROTECTED
1
I.JRITEPROTECT
LOI,JIF ENABLED

DATA

TRANSFER

<-- READY

_-> ADVANCE
TAPE
ENDOF TAPE
<-- ENDOF TAPE

FIGURE5.2 TAPEDECKTIMINGIJAVEFORMS
t.n
Th ea b ov eex ampl e i s the s pe c if ic a t io nf o r a n I / 0 d r iv e r r o u t in e . A ll a n
I/0 driver does is control the transfer of data betweenthe cqnputerand
an I/0 device. Notethat the specificationmakesno mentionof the re-
quirements for initialization of the tape drive, howthe data is to be
formatted,etc. This is because an I/0 driver is strictly concerned with
transferringdata to or from the device it interfaces. It is the responsi-
bility of those progranswhichutilize an I/0 driver to interpret the data
and signals returned. A complete tape I/0 systemwhichwill use this
d r i ve r w i l l be di s c us s edi n L e s s o n7 .

1 1 .2 Us i ngthe Fungti onaSp


l e c if ic a t io n
Thefunctional specificationis the baseuponwhichyou will build your
system. If it has beenproperlydesigned,it will supportand guide the
rest of your problemsolvingeffort. lfit has not beenproperlydesigned,
your project is probablydoomed to failure or overrunbeforeyou evenget
started. Therefoie,onceyou haveestablisheda functional specification,
use it. If you don't, you are apt to run into that dreadedsoftware
diseaseknownas "creepingfeatures". This happens whenan inadequate or
disregardedproblemspecificationallows non-specified"neat" featuresto
creepinto the systgnafter rrprkhas begun. This can be disastrous,be-
causechangeseasily ac@rmodated in the planningstage can require massive
effort and re-designmrk during the implerilentationstage. Usually, the
farther work has progressed,the moreeffort is required to makeany sig-
nificant changes. Thediseaseis often well advanced before detectedand
it can be fatal to eventhe best softwareprojects. (Professionalengineers
note: marketingdeparfinents are notoriouscarriers of this disease. l,lhile
they seldomshowany syrnptoms, they are knownto infect entire departments.)

Theabovecorrnentsshouldnot be construedto meanthat advanced features


are to be shunnedor omitted. Far from it. Themicrocomputer makesthese
featuresboth possibleandattainable. blhatis meantis that they should
be deslgnedin from the top, not addedfrom the side. Therefore,whenyou
designyour functional specifications,take sometime. Brainstormfor a
whi'leand comeup with a list of featuresthat the systemcan really accom-
plish. Try trading off somehardware and softwareto lowercost or increase
s y s t e mp e rfo rma n ce . Mi cro c omput€rmake
s whole newfields of featur es
p o s s i bl e , a n d i t i s w o rth your time to see if you can find sonr efor y our
p r o j e c t. B u t o n ce th a t fu nctional specification is done, stick with i t.
I f r e a l l y d ra sti c ch a n g e sar e needed,you will pr obably be better off
s t a r t i n g o ve r th a n tryi n g to patch an inadequatespecification.

5 . 2 Ste p 2 : P a rti ti o n T h e Pr oblemInto Funct' ionBlocks


0 n c e y o u h a ve co mp 'l e te thd e functional spec' ification for your system,
y o u c a n b e g i n to p a rti ti o n it into oper ational blocks. An oper ational
b l o c k i s a se cti o n o f th e systemwhich is r esponsiblefor per for m ing s om e
s p e c i f i c syste mfu n cti o n . 0per ational blocks can be as com plexas a c om -
p l e t e f lo a ti n g p o i n t a ri th m etic packageor as simple as a few instr uc ti on
d a t a c o n ve rsi o n s. i n syste moper ations, contr ol passesfr om one funct i onal
b l o c k t o a n o th e r a s th e p ro gr amexecutes. In this r espect the block d i agr am
c a n a c tu a l l y b e co n si d e re das a type of over all systemflowchar t. It dj f-
f e r s f r o m th e fl o w ch a rt i n that it does not specify lhe actual algor ithns
u s e d t o i mp l e me n tth e fu n ctions ( see Section 5.3) . You fir st design the
s t r u c t u re o f th e p ro g ra ma s a ser ies of successivelym or edetailed oper a-
t i o n a l bl o cks u n tj l yo u re a ch a level of comp' lexitythat you can deal w i th
e f f e c t i v e l y. Y o u th e n p ro ceedto algor ithm development
for each bloc k .

Bl o c k i ng a n d p a rti ti o n i n g a r e the cor ner stoneof conver ting a function a'l


s p e c i f i c a ti o n i n to a fu n cti onal pr ogr am . You can have as m anylevels of
b l o c k s an d su b -b l o cksa s th e pr oblemr equir es. l,Jhenyou ar e fir st lea r n-
i n g , y o u sh o u l d n o t h e si ta te to block downto sections which seema' lmos t
trivial. A s yo u g a i n e xp e rienceyou will be able to judge m or e accur atel y
w h a t s i ze b l o cks yo u ca n co m for tably handle. Also, extr eme' lyinvolved
o r c o m pl e xse cti o n s o f a systemm ay r equir e muchmor edetailed blocking
t h a n t h e mo re stra i g h tfo rw a r r dsections. The flexibility of blocking is
t h a t i t a l 1 o w syo u to e a si l y adjust the level of detail to match the c om -
p l e x i t y o f th e p ro b l e m.

(.2.1 D e ci d i n g o n th e S ystemBlocks
T h e d e c i si o n o f w h a t b l o cks to divide the systeminto initially is usua'l l y
m a d eb y r.e fe r.ri n gto th e ch ar acter istics defined in the functional spec i -
fication. S o mecg mmoinn i ti a l blocks ar e:

1-9
a. i n p u t o p e ra ti o n s,
b. pro g ra mfu n cti o n s (transfer data, sear chmsnor y,do ar ithm etic,
etc. ) ,
c. syste mco n tro l a n d ti m inE,
d. o u tp u t o p e ra ti o n , a n d
e. ma j o r d a ta stru ctu re s ( tables, lists, etc.) .

Theseblocks are then drawnand interconnectedto form the system block


d i a g r a m . It i s i mp o rta n t to re member
that at this initial point you ar e
c o n c e r n e dwi th i d e n ti fi ca ti o n of the major systemstr uctur es. You ar e not
y e t c o n c e rn e dw i th th e i r a ctu a l oper ation. The design of howthe oper a-
ti o n a l b l o cks w i l l i mp l e me nth t eir functions will cor mence once the over al l
s y s t e ms t r uctu re h a s b e e ne sta blished. In theor y, it should be possible
to implementthe system in either hardware, software, or somecombination
o f h a r d w a rea n d so ftw a re a t th e end of the blocking oper ation. This
l e a v e s y o u w i th th e ma xi mu mfl e x ibility for actual systemim p' lem entation.

Ex a m p l e!.2
L e t ' s ta ke th e sp e ci fi ca ti on for the m agnetictape I/0 dniver we
w r o t e i n E xa mp l e5 .1 a n d d o the block diagr am sfor that system .
l . l ec a n se e fro m th e fu n cti onal specification that we will r equir e
b l o c k s to i n p u t d a ta , o u tp ut data, and contr ol the data tr ansfer s.
F i g u r e 5 .3 a sh o w sa n i n i ti a l block diagr amfor this s' imp1esystem .
N o t e t h a t i t sh o w sa l l d a ta and contr ol signals that.ar e passed
through the system. Since the data is transferred to and from the
t a p e d e ck i n p a ra l l e l fo rm, no fur ther blocking is neededfor the
I n p u t a n d 0 u tp u t b 'l o cks. Howevet'the
, contr ol block is r equir ed to
p e r f o rm se ve ra l o p e ra ti o n s. It must detect end of tape, contr ol
t h e r e a d /w ri te l fn e , se n sea wr ite pr otect condition, and advance
t h e t a p e . T h i s b l o ck i s sufficiently com plexto war r ant sub- blockin g.
I t i s sh o w nsu b -b l o cke di n Figur e 5.3b. Note howal' l inputs and
o u t p u ts o f th e su b -b l o ckd i agr ammatch those on the main block
d i a g r a m. It i s th e sa mei nter face expanded
to showmor edetail.

5-ro
TAPEDATAIN DATA INPUT

ENDOFTAPE
WRITEPROTECT
TIM ING
READY ERRORINDICATOE
AND
TAPEADVANCE CONTROL
TRANSFER
DATA

DATAOUTPUT DATAFROMSYSTEM

FIGURE5.3a MAGNETIC
TAqEt/0 BLoCK
DIAGRAI1
DATAIHPUT
ENDOF TAPESTATUS ENDOF INTERFACE
TAPEOETECT

TAPEADVANCE TAPEADVANCE
CONTROL

READ/t.IRITE DATAOUTPUT
SELECT INTERFACE

WRITEPROTECT
TRANSFER
DATA

READY:
FIGURE
5.3b TIMII{GANOCONTROL
SUB-BLOCK
DIAGRAI'I

F T G URE
5.3
5-u
5 . 2 . 2 C h e cki n oth e B l o c! 0 i a q ram
0 n c e y o u h a ve b l o cke do u t th e system ,step back and see if it will neet
yo u r f u n c t i on a l sp e ci fi ca ti o n . Be sur e you have accountedfor all inputs,
o u t p u t s , d ata tra n sfo rma ti o n s, s ystem sfunctions, er r or conditions, and so
o n . A u s e f u l te st i s to l i st a l j the r equfr ed syster nf,eatur esand ver ify
t h a t y o u h ave i n cl u d e d a l l th e blocks r equir ed to per for m these functions.
A f t e r y o u h ave co n fi rme dth a t e ver ything is ther e, be cer tain that the
b l o c k s a r e de ta i l e d e n o u g hfo r you to pr oceedon to the togic design im-
p l e m e n t a t i o n . If so meo f th e b l ocks soundvagueor " only par tly defined,
y o u m a y n e ed to a d d mo re E u b -b l ocksin that ar ea. Repeatthis pr ocedur e
u n t i l y o u a r e co n vi n ce dth e systemdefined by the block diagr an m atches
y o u r f u n c t i on a 'l sp e ci fi ca ti o n . Onceyou ar e satisfied that you have covered
a l l t h e r e q u i re d fu n cti o n s i n sufficient detail, you ar e r eady to pr oceed
t o t h e n e x t ste p a n d b e g i n d e si g ning the actual logjc functions r equir ed
t o i m p l e m e n th
t e syste mb 'l o cks

A t t h i s p o i n t i t i s i mp o rta n t to r ecognizethat i{ hile we ar e going to


c o n t i n u e u s in g th e a ssu mp ti o nth at we ar e designing a softwdr e system ,this
is n o t a l w a y s th e ca se . T h e p ro blemspecification and blocking m ethodswe
ha v e p r e s e nte dso fa r a re p e rfe ctly gener al; they can be applied with equa l
f a c i l i t y t o h a rd w a re ,S o ftw a re , and har dwar e/softwarsystem
e designs. In
t h e l a t t e r c a se , th e o p ti mu mtra d e off betweenthe two implsnentationtech-
ni q u e s w i l l b e l o o ke d fo r a t th i s point. Backgr ound Section C is devoted
t o h o wt h e s e fu n d a me n tadl e si g n decisions ar e m ade.

5.3 S t e p 3 : A l q o ri th n D e ve l o p ment For Lach Par t_itiol


Up t o t h i s p o i n t w e h a ve o n l y b e enconcer nedwith.the functions to be
pe r f o r m e do n a b l o ck (o r n o n -fu nctional) leve1" br ith algor ithm develop-
me n t w e m a k eth e tra n si ti o n fro m logical systempar titions to the actual
lo g i c r e q u i r e d to i mp l e me n tth e system . Most of our algor ittr n develognen t
wi ' l l b e d o n e u si n g f l o w ch a rts. The f ' lowchar ti s of ten m entionedas the
m o s t i m p o r t a n t ste p i n th e so ftw ar e pr ob' lemsolution. This is plainly not
t ru e . T h e f lo w ch a rt i s si mp l y a tool in the continuing design pr ocess
wh i c h b e g a nwi th th e p ro b l e rnsp e cification. It is no r nor ecor r ect to sit
do w na n d s t a rt d ra w i n g fl o w ch a rts than it is to sjt downand star t wr it' ing

5-t2
m a c h in eco d e . B o th o p e ra tions have their place in the pr oblemsoluti on
p r o c e d u re . N e i th e r i s sa tjsfactor y alone. Flowchar tsar e one possib l e
w a y t o co n ve n i e n tl yd e ve l o pand check the logic of the pr oblemblocks for
c o r r e ct o p e ra ti o n . U si n g flowchar ts it is possible to develop pr ogr a nr
l o g i c in d e p e n d e not f a n y specific computer . It is also mucheasier to
f i n d l o g i c e rro rs i n th e sy m bolicflowchar t than to tr y and hunt them
d o w no n ce th e y a re co mmi ttedto pr ogr amimplementation. ( This is par ti c u-
l a r l y tru e w i th th e re l a ti vely pr im itive debugfacilities cur r ently pr o-
v i d e d b y mi cro p ro ce ssoma
r nufactur er s.
)

5. 311 Fl owchart S.ymbol s


T h e d a ta p ro ce ssi n gi n d u stry has a standar dset of flowchar t symbolsand
y o u s h o u l d a d h e re to th e se in the inter est of makingyour wor k usable to
others. (IB M p ro d u ce sa n excellent tem p' lateof all the standar dsym bol s ;
i t i s w i d e l y a va i l a b l e i n s tationer y supply houses.) The most conr no n'l y
u s e d symb o l sa n d th e i r fu n ctt' onsar e shownin Figur e 5.4 ( see page i-]di .
Thesesymbo'lsshould prove adequatefor the construction of any flow-
c h a r t s yo u w i l l re q u i re .

(.3.2 T yp e o f F l o w ch a rts
F l o w c ha rtsca n b e d ra w nto r epr esent algor ithm s at any desir ed level of
c o m p l exi ty. T h e tw o mo st cor mnonly used types of flowchar t ar e the log i c
f l o w c h a rt a n d th e ma ch i n e -dep.endent flowchar t. A logic flowchar t r epr e-
s e n t s a l g o ri tl m l o g i c i n g ener al oper ating ter m s with no r efer ence to
s p e c i f ic ma ch i n efe a tu re s (r egister s, memor y,flags, etc.) . The m achi ne
d e p e n d e n flt o w ch a rt p re se n ts algor ithm logic within the context of the
f e a t u r e s p ro vi d e d b y so mespecific pr ocessor . It is advantageous to
i n i t i a l l y d ra w a l o g i c fl o w c har :tfor each functional block in the bloc k
d i a g r a m. T h e sea re th e n th or oughlydebuggedand used as the basis for the
m a c h i n ed e p e n d e n tfl o w ch a rts r equir ed for the com puteryou ar e usin9.

I f y o u p ro g ra mi n h i g h e r l e vel languages,you will har dly ever use m ac hi ne


d e p e n de n fl t o w ch a rts. T h e l ogic flowchar ts r equir ed to define the alg o-
r i t l r n t o b e g se d a re a l l th at ar e r equir ed. This is becauseall of the
t e ta i l s w ill be handledby the languagepr ocessor .
m a . c h i n de e p e n d e n d

5-L3
SYMBOLS EXAI-IPLES
PROGRAH
FLOW. ARROWSINDICATE
THATTHE PROGRAH
SEQUENCE FOLLO}JS.

P R OC ESS. THEFUNCTION SPECIT:IED


IN THERECTANGLE IS TO BE PER. A=AX2
F 0 R ME D,
e.9. A IS T0 BE MULI-
P L IE DB Y 2

P R E .D EFINED
PROCESS. THEEXTER-
NALROUTINE DEFINED BY THENAIIIE
Ii'I THERECTANGLE IS TO BT IIIVOKED CALLTTI
T 0 P E R F0RI4
ITS FUNCTI0N.e.9. THE
ROUTINE DEFINED BY THENAME ''TTI''
IS TO PERFORM A FUNC'IION.

A=A+ 1

DECISIOI{. THEFLOI.J OF THEPROGMI4


I.IILLBE BASED ONTHECONDITION
S P E C I F IEIN
D S ID ET H ED IA MONO. A=A+ ?
=
e . g . I F A ? , A D Dl . 0 T H ERTJISE
AD D2 .

I/O OPERATION. THEINPUTOR


OUTPUT OPEMTION INDICATEOIN THE
PARALLELOGRAM IS TO BE PERFORI4ED, PRINTA
e.g. THEVALUE 0F THEVARIABLE
IIAIIIS TO 8E SENTTO AII OUTPUT
D E V IC E.

TERI''IINAL OR INTERRUPT.THEOVAL
INDICATES T}IEBEGINI{ING
OREI{DOF EIITERTTI
A PROGMI'I ORAN INTERRUPT OPERA.
T I0 tl , e .9. TNTRYP0INTFORR0UTINE ,.TTI" .

I.IHET.I
CONNECTORS. FLOI.II,IIJST
PROCEED
TO ANOTHER
\ / t j PAGE
0R ANoTHER PLACE0N THESME PAGE,USEA
\.-/ \,/ coNNEcr0R
IF IT Is AltKt{ARD
T0 usEANARR0IJ.

FiGURE5.4 FLOI.J
CHART
SYIIBOI.S
Si m i l a rl y, g e n e ra l a l g o rj th ms and pr oblemsolutions which ar e to be
i m p i e r n e n teodn a va ri e ty o f computer sar e best pr esentedusing Iogic fl ow -
c h a r t s . A n y u se r ca n th e n take the gener al logic flowchar t and use it as
t h e b asi s fo r th e i mp 'l e mentation of a solution on any computeror in any
l a n g u ag e . A s yo u g a i n e xp er iencewith your par ticular installation, y ou
w i l l b e a b 'l e to g o d i re ctl y fr om the block diagr amsto flow char ts that
a r e a cro ss b e tw e e np u re l y logical and pur ely m achinedependentflowc har ts :
H o w e ve r,i f yo u i n te n d to save the algor ithm or solution for documentati on
o r p o ssi b l e u se o n so meo th er system, it would be a good jdea to dr aw a
g o o d l og i c fl o w ch a rt a fte r the systemis completed.

5 . 3 . 3 - H o wto D e si q nA l q o ri thms
T h e d e s i g n o f p ro g ra ma l g o ritfr ns' is actually the design of softwar e, a
v a s t s ub j e ct i n d e e d . Wew i ll be cover ing a por tion of that subject in the
n e x t e i g h t l e sso n s. H o w e v erwe , can discuss som eof the gener ai Pr oc edur es
u s e d w h e ntra n sl a ti n g a l o g ical systemblock to an algor ithm.

1. D eci d ew h a t th e b l o ck is to do. This is the sam estep as whenwe


i n i ti a l l y sp e ci fi e d th e pr oblem . The only differ ence is that jt i s
n ow b e i n g d o n e fo r a small, local pr ogr amr ather than for the wh ol e
s yste m. N a tu ra l yi th e label on the block w' i' ll pr ovide a good s tar t-
i n g p l a ce fo r th i s d e s cr iption. Usually a one or two sentence
d e scri p ti o n o f th e o p er atjon to be per for medis all that is r equ i r ed.

2. D eci d ew h e re th e d a ta to be oper ated upon is located. Is it r ead i n,


p a sse dfro m a n o th e r b l ock, looked up in a tabl€, or what? You wi l l
n e e d o p e ra tj o n b l o cks to input the r equir ed data. tllhile you dec i de
w he re to g e t th e d a ta , decide if you need to do anything special to
i t b e fo re yo u u se i t. Doesit have to be com plemented? Rotated?
M a ske d ? S ca l e d ? If so, you knowyou wi' ll need somedata tr ansfo r m a-
t i o n b l o cks i n th e fl o wchar t.

J. F i gu re o u t h o wto p e rfor m the r equir ed oper at' ion. This is the r e al


m ea t o f th e a l g o ri th m developm ent. This wjll be wher eyou com bi ne
p r oce ss b l o cks, d a ta a nd decisions to conver t the data fr om the i nput
(_1 c
f orma t to th e o u tp u t for m at. This par t of the pr ocesswill usua 'l l y
a cco u n tfo r th e l a rg e st por tion of your wor k. Rem ember ,
develcp i ng
t he a l g o ri th m i s a n i ter ative pr ocess.

I t w i l l u su a l l y ta ke sever al tr iesbefor e you get the algor ithr n


c orre ct. S ta rt o u t b y wr iting downthe sequenceof oper ations to
b e p e rfo rme di n th e o rder they must be per for m ed,like "r ead in data,
t h e n te st fo r co n tro l char acter s, then test for iower case char a c ter s " ,
a nd so o n . T h i s w i l 'l give you that all impor tant feel for the se-
quencesof actions which are to be performed. After you have the
g e n e ra l fl o w , a d d th e pr ocessand decision blocks you need to actua'l l y
perform the operations

A fte r yo u h a ve a n a l g o r ithm that should wor k, tr y it out with data


t o se e i f i t d o e s w o rk ( all on paper , of cour se) . Tr y to imagin e
e ve ry p o ssi b l e d a ta co ndition that could occur and then be sur e y our
a l go ri th m ca n p ro ce ss i t cor r ectly. Youmust be cer tain your log i c
i s co rre ct i n th e a l g o r ithm befor e you pr oceedto cod' ing. Be par ti -
c u l a r'l y ca re fu l th a t your algor itlr m can handle er r or conditions.
T h i s i s a n a re a w h i ch i s par ticular ly susceptible to er r or s which
w il l b e ve ry h a rd to d etect. Be patient and thor ough. Tim e spe nt
g e tti n g th e l o g i c co rrect in the algor ithm will be tim e saveddur i ng
s yste md e b u g g i n g . T h i nk fir st, pr ogr amlater .

4. D e ci d ew h a t to d o w i th the finished data. Doesit have to be spe c i al l y


f o rma tte d ? D o yo u sa ve it? Pass it back to a calling r outine? 0ut-
put it? Add the blocks reguired to get the output data ready for the
r e c e i vi n g ro u ti n e o r d evice.

5. Ke e pth e stru ctu re si mple. Hakeit a goal to keep the flow str aight-
f o r w a rd , l o g i ca l a n d cl ear . Be par ticular ly car eful about howyou
e n te r a n d e xi t fro m th e r outines. Ther e ar e r eally only a few sim pl e
s t r u ctu re s yo u sh o u l d ever need to use in constr uction of any algor i thm .
W ew i 'l l e xa mi n eth e se str uctur es in the next few lessons.

5-l.6
Ex a m p l e5 .3
L e t ' s d e ve l o p th e a l g o ri th ms r equ' ir ed for our magnetjctape dr ive
i n t e r f ace syste mu se d i n Exam ples 5.r andS.z. The fir st thing
t h a t be co me as p p a re n t i s that the data input and output blocks ar e
v e r y l arg e b l o cks a n d ve ry sm all pr ogr ams. The data is to pass
t h r o u gh th e ro u ti n e i n p a rallel without being m odified. Thus the
f l o w c h a rts fo r th o se b l o ck s would be simply one block each:

INPUT DATAFROMTAPEDECK OUTPUTDATATO TAPEDECK

T h e o b vi o u s co n cl u si o n i s that the major ity of these flowchar ts will


b e c o nce rn e dw i th w h e nto read and wr ite the data, nam elythe tim ing
a n d c o n tro l b l o cks. L e t's take the r ead block fir st. Fr omthe tim -
i n g d i a g ra mw e ca n se e th a t for this tape deck the sequenceof contr o l
f o r r e ad i n g a d a ta b yte fro m the tape is advancethe tape ( fr om the
m a n u f a ctu re r's sp e ci fi ca ti o n we find that it automaticaliy advances
i n o n e b yte i n cre me n ts),te s t for End of Tape, set the Read/W r ite
l i n e t o R e a d ,w a i t fo r d a ta r eady, r ead the data, then exit. The
a l g o r i t h m fo r th i s fu n cti o n is shownin the logic flowchar t in
F i g u r e 5 .5 . N o te h o wth e f' lowchar t defines a logical solution to
t h e p r o b 'l e mw i th o u t re fe re nce to any specific har dwar e.

A s i m i la r p ro ce d u rei s u se d to design the algor ithm for wr iting data.


F o r l , | r i te o p e ra ti o n th e ti ming wavefor mspecifies that we advance
t h e t a p e , te st fo r E n d o f T ape, test for l,lr ite pr otect, set the Read /
w r i t e I i n e to I'l ri te , se t u p the output data, str obe the data tr ans-
f e r l i n e , w a i t fo e D a ta R e adyand exit. This flowchar r tis shownin
F i g u r e 5.6 . U si n g th e se tw o logic flowchar ts we could then dr aw the
m a c h i n ed e p e n d e n tfl o w ch a rts or pr oceeddir ectly on to the actual
program

5-L7
EilTER
TAPEREAE

AEVANEE
TAPE

INPUT
TAPEilECK
STATUS

SET ERROR
INDICATOR

OUTPUT
TRAilISFER
SI6NAL

I}IPUT
TAPEDECK
STATUS

DATARFADY

F IGU R5E.5 T APEDECKREADLOGICFL0l'CHART


l
INPUT
TAPE
STATUS

SET ERROR
PROTECT
INDICATOR

FERSIGNAL

I NPUT
TAPE
STATUS

F IGU R5E.6 LOGICFLOt,l


T APEW RITE CHART
5 . 4 O b j e c ti o n s to F l o w ch a rts
l' l e h a v e b e en u si n g (a n d w i I I co ntinue to use) flowchants to r epr eseni the
a l g o r i t h m s we h a ved e ve 'l o p e d . This pr ocedur eis not univer sally accepted ,
p a r t i c u l a r l y i n th e d a ta p ro ce s singindustr y. cr itics maintain, with a
c e r t a i n a m ou n to f i u sti fi ca ti o n , that flowchar ts ar e unnecessar and
y even
m i s l e a d i n g . T h i s p o si ti o n a ri se s fr om the basic contention that ( 1) flow-
ch a r t s a r e o n l y ma rg i n a l l y u se ful in higher level languagepr ogr amdevelop-
m e n t s a n d ( 2 ) co mp l e xfl o w ch a rts can become ver y difficult to follow. To
su p p o r t t h i s p o si ti o n th e y ci te ver y valid evidencethat m ost pr ofessional
p r o g r a l m e r sd ra w o n l y ve ry l fmi ted flowchar ts pnior to com m encingcoding.
I n f a c t , m ost fl o w ch a rts fo r l a rge systemsar e dr awnfor documentation
p u r p o s e sa f te r th e p ro g ra mi s co mplete. This situation ar ises fr om the
f a c t t h a t w h e nw ri ti n g p ro g ra msin moder nhigher levei languages,a' lgor ith m s
c a n b e e f f i c i e n tl y d e ve l o p e dd i rectly in the languagewith no inter m ediate
f lo w c h a r t s at a l l .

T o a n s w e rt h e se a rg u me n ts(w h i ch we r eally basicaily agr ee with) , we must


po i n t t o t t t o b a si c fa cts: (1 ) satisfactor y higher level languagesar e
no t y e t g e n era l l y a va i l a b l e fo r rnicr ocom puter s,
and ( 2) m ost pr ogr ar m er s
d e v e l o p i n gmi cro co mp u tepr ro g ra m sar e not pr ofessional pr ogr amner s. The
c o n t e n t i o n t h a t p o o rl y stru ctu re d flowchar ts ar e har d to follow is com-
p l e t e l y t r u e . Wew i l l a l w a ysg o to gr eat lengths to keep flowchar t logic
s t r u c t u r e c l e a r.

Th e f i r s t f a ct, th e l a ck o f h i g h er level languageavailability, is obvious .


Th e r e a r e a t p re se n t o n l y tw o w i dely available higher level micr ocomputer
la n g u a g e s( I nte l 's P L IM*a n d va ri ous BASIC**inter pr eter s.) 0f these,
o n l y BA S I Ci s a va i l a b l e fo r sma l l systemuse. It will be sometime befor e
c o r m o nh i g h er l e ve l l a n g u a g e ssu ch as F0RTRAN
or C0B0Lwill be available
f o r m i c r o c o mp u te rs. In th e i n te rim , the wor k will be done in assembly
lan g u a g e . Eve nw h e nh i g h e r l e ve l languagepr ocessor sbecom eavailab]e
f or m i c r o p r oce sso rs,th e n a tu re o f manym icr opr ocessorapplications is

* W l 4 i s a r . eg i ste re dtra d e ma rko f Intel cor p.**BASICis a r egister ed


t ra d e m a r ko f D a rtmo u thU n i ve rsi ty.

5-20
s u c h th a t a kn o w l e d g e o f assemblylanguagewill still be r equ.ir ed. H .i gher
l e v e l l a n g u a g e sa re o n T y mar g' inallyeffective in
developingpr ogr amsfor
u s e i n co n tro l o r re a l ti m e app' lfcations. Pr ogr am sof
this type r equi r e
t h e co mp l e teco n tro J o f the computer ' shar dwar ethat assembly
langu age
p r o v i d e s. F o r a sse mb l y'l anguagBr us€ of the flowchar t pr ovides a ps eudo
h i g h e r l e ve l l a n g u a g efo r algor ithm deveiopm entthat can
be either dependent
o r i n d e p e n d e not f th e co mputerto be used. ( L,lewill
havem uchmor eon
t h e h i g h e r l e ve i -a sse mb l ylanguagetr adeoffs .in l_esson9. )

T h a t mo st mi cro co mp u tepr rogr amm erar s e not pr ofessjonal pr ogr am m erjss


a i s o fa i rl y o b vi o u s. Mo s t cur r ent m icr ocomputer s e ' logi c
pr ogr ar ,r nerar
d e s i g n e rsa n d h o b b yi sts, n lanypr ' ugr ar r nr r ir
f-ror
g ,Lhe !"ir .st,tim e. Sinc e they
w i l I p ro b a b l y b e fo rce d to use assem btylanguage,these user s yu' ilI b e
l e a r n in g p ro g ra mmi n ga, i g or itir n developm ent,and m achjnestr uctur e a l l at
t h e s ameti me . T h e u se o f, assemblylanguagepr ogr anr ning and flowchar ts
w i l l en a b l e u s to se p a ra te these jear ning activities. In par ticu' lar, the
i n i t i a l p ro ce sso f te a ch i ng gener al algor ithm developmentis better pr e-
s e n t e d w i th g e n e ra 'lfl o w char ts than with som especific language. The
t e c h n i q u e sp re se n te du si n g somespecific languaEem ay r eflect the com pr o-
m i s e s ma d eb y th e l a n g u a g er ather than those r equ' ir ed to sclve the p r obl em .
Af t e r s o mei n i ti a l a 'l g o ri thmdeve' lopr nenttr aining, the user m ay be a bi e
t o p r o ce e dto fl o w ch a rt free higher level languagepr ogr am m ing. For that
i n i t i a l tra i n i n g , h o w e ve r,the iogic flowchar t is an im por tant teach i ng
tool.

T o m a kema xi mu m u se o f fl o wchar ts without becom ingunduiy attached to


t h e m w e w i l l a d o p t a ca re fully str uctur ed appr oach. Ali a' lgor ithm sw i l l
b e p r e se n te di n g e n e ra l l o g ic flowchar ts. l,{ ewill not use m achinedepen-
d e n t f l o w ch a rts e xce p t i n the contexi of specific exam ples. All flowc har t
s t r u c t u re s w i l l b e ch o se nfrom a sr nall gr oup of simple, 1og' icall.ysuffi -
c i e n t stru ctu re s w h o seu se can be djr ectly tr ansfer r ed to m ost h' !gher
l e v e l l a n g u a g e s. i n th i s w ay we will makem axjmum
use of flowchar ts w hi l e
a v o i d i ng th e ma j o r o b j e cti o ns.

5-zt
(.5 P ro ce d u re sA fte r A l qor ithm Developm ent
A f t e r yo u h a ve co mp l e te dthe pr oblemdefinition, block diagr am s,and
a l g o ri ttrn s, yo u ca n b e g i n to think about wr iting the pr ogr amr equir ed to
i m p l e me n tht e l o g i c syster nyou havedefined. However ,it should be appar -
e n t by n o wth a t i f yo u h ave followed the fir st thr ee steps cor r ectl y ,
t h i s ste p sh o u l d p re se n t you with ver y little tr ouble. The blockin g and
a l g o ri ttrn ste p s co mb i n e dwith the flow char ts will have supplied th e s y s -
t e m s tru ctu re a n d co n tro l logic. All you will need to do is implem ent
t h e se fe a tu re s u si n g th e pr ogr anminglanguageyou have available. N atur al l y ,
t h a t i s e a si e r sa i d th a n done, but if the logic is cor r ect, the pr o bl em
w i l l h a ve b e e n re d u ce dto finding com binationsof machineinstr ucti ons or
h i g he r l e ve l l a n g u a g estatem entsto per for m the desir ed oper ations . l l e
w i l l sp e n dth e n e xt e i g h t lessons r efining and expanding.yourpr obl em
s b l v in g ski l l s, a u g me n tingthese skills with useful pr ogr anmingtechni ques .

.5.6 Summary
This lesson has presented the general approachrequired to solve software
p r o bl e ms. A l l so ftw a re pr oblem scan be solved by dividing than int o b'l oc k s
a n d s u b -b l o cks, d e ve l o p i ngalgor ithms for those blocks, wr iting pr ogr am s
t o i mp l e me n tth e a 'l g o ri tl ms and inter facing the blocks back into a s y s tefi t
w h i c h so l ve s th e p ro b l e m. The gener al appr oachto pr oblemdefinition,
was then pr esentedand illustr ated us -
b l o c k i n g a n d a l g o ri ttm d evelopment
i n g th e e xa mp l eo f a d i g i tal Read/l,lr itemagnetic tape deck.

5-22
QU E S T ION S

1. D e scri b e th e g e n e r al softwar e pr oblemsolution pr ocess. Is thi s the


w a y yo u n o rma l l y a ppr oachpr oblems? Do you think the generai pr oc e-
d u re ca n b e a p p l i e d to other , non- softwar epr oblems?

2. l rl h yi s i t i mp o rta nt to establish and follow a functional spec i fi c ati on


a t th e o u tse t o f the solution to a pr oblem ?

3. D e scri b e " cre e p i n g featur est' . Haveyou ever seen it in actio n? W hat
w a s th e ca u se ? Whatwas the r esult?

4. D e scri b e th e d i ffe rence betweena logic flowchar t and a m achi ne


d e p e n d e n fl
t o w ch a rt. W hichdo you usually use? If you usua l l y us e
a ma ch i n ed e p e n d entflowchar t, do you usually dr aw a logic flow c har t
o f th e so l u ti o n fo r futur e use?

PROBLEI{S

1. l l h a t va l u e o f A w i l l be pr inted in the exam pleflow char t bel ow :

B =B * 2

B=A+1
2- Th e F i b o n a cci se ri e s F( N) is a m athem aticalnum bersequencewhic h i s
d e fi n e d fo r a l l i n te g er values of l{ by the fojlowing algor ithm

F (0 ) = g
F (1 ) = I
F (tt1 = F (N - 1) + f( H - 2) for all N > I
F o r e xa mP l e ,F (2 ) = F (2 - l) + F ( 2 - 2)
= F (1) + F( 0)
=1 +0
= t.
Thusthe Fibonacciseries can be representedas follows
N 01?34567 N
F(N ) 0 rL2 3 s 8 13 . F ( N - 1 ) + F ( N- 2 )
Drawthe flowchart to computeF(N) for any value of N.

3. Drawa flowchart which incorporatesthe flowchart developedin


Problern
2, to computeand print the first 100valuesof N and F(N).
(Assumethat the cormand "Print" is sufficient to print a value.)

4. Onesimplemethodoften usedto multiply tuo numbers together is to


repeatedlyadd one numberto itself. For example,3 * 4 can be thought
o fas 3 + 3 + 3 + 3= L 2 . De v e lo pt h e a lg o r it t u nt o m u lt ip ly t wo n u m -
bers using this method. Drawthe flowchart. Doyou feel this is an
efficient wayto multiply two numbers? Is there any way to makethis
basic algorithmmoreefficient?

5-U
l'lglSlq USrndHOCOUClltl
0I HCV0UddV
3UV/tA.ktOS/3UV,l
oUVHIHI
THEHARDWARE/SOFT}JARE
APPROACH
TO M ICROCOM PUTER
OESIGN

INTRODUCTION
I n th e co u rse o f d e si g n i ng a systemther e ar e a ser ies of cr ucial dec i s i ons
w h i ch mu st b e ma d ere g a r ding the u' ltimate systemim plementation. T hr ough-
o u t th e so ftw a re co u rse we ar e concer nedpr imar ily with the im plementati on
o f th e so ftw a re p o rti o n s of these systemsand how they inter act wi th av ai l -
a b ' l e h a rd w a re . T o b e su r e, this ar ea is vital to the designer . How ev er ,
t h e th o rn i e st p ro b l e mi n i tially confr onting m ost designer s of micr opr oc es s or
b a s edsyste msi s h o wto par tition the systemfunctions betweenhardw ar e
a n d so ftw a re i mp l e me n tatlons. This is under standablbsince r lost us er s ar e
f a r mo ree xp e ri e n ce dw i th har dwar edesign than softwar e design. How ev er ,
t h e p l a i n tru th i s th i s: within the speedlim its imposedby any com puter ,
a n y th i n g th a t ca n b e d o n e with har dwar ecan be done with softwar e. In fac t,
o n l y a sma l l p e rce n ta g eof applications will pr esent speedpr oblems .
U s u a l l y e ve n th e se a p p l i cations ar e only speedsensitive in ar eas w hi c h
c a n be re a d i l y i d e n ti fi e d and pr ocessedwith discr ete logic to m ak ethem
a d a pta b l eto a so ftw a re s olution. ice thus have a sliding scale of i m pl e-
m e n ta ti o n p o ssi b i l i ti e s fr om applications with no softwar e ( i.e. no m i c r o-
p r o c e sso r)to a p p l i ca ti o ns wher e 95%of the systemcost will be in the s oft-
w a r e . Gi ve n th i s w i d e ra nge of possibilities, howdo we decide wher eto
d r a w th e l i n e ? Wh e rei n deed. Assumingthat the objective is to do the
j o b a n d ma keso memo n e y,the answeris obvious: we dr aw the line a t the
point wherewe find the lowest cost hardware/softwaresystem that does
t h e jo b .

B e f o re w e cd n d i scu ss h o wto tr ade har dwar ecost for softwar e cost, w e


m u s t fi rst i d e n ti fy th e ar eas that affect cost in both of these ar eas .
F o r t h e p u rp o se so f d i scu ssion we shall consider cost to be localized i n
t h r e e a re a s: h a rd w a reco st, SOftwar ecost' and systemcost' After w e
h a v e d i scu sse dth e va ri o us cost ar eas we will be able to discuss tr adeoffs
r e q u ire d to mo d i fy syste mcost and per for mance.

6- 1
T h e C P Uch o se nfo r th e systemwil' l have the centr al effect on the har d w ar e
c o s t o f th e syste m. T h i s i s not becauseof the cost of the pr ocessor i t-
s e l f . Fo r mo st syste msth e actual CPUcost wil' l be an insignificant p or ti on
o f t h e t o ta l syste rnco st. It is a r esult of the effect of the CPUon a l i
o t h e r a s p e cts o f th e syste mdesign, both har dwar eand softwar e. It the r e-
f o r e m a ke sth e mo st se n seto discuss these costs within the context of the
C P Ui t s e l f.

6 . 1 H a rd w a reC o st
H a r d w a reco st w i l l b e co n si d er edto be all of the har dwar ewhich m ust be
d e s i g n e dto i mp l e me n tht e re quir ed systemfunctions. This would includ e
t h e m i c r op ro ce sso r, me mo ri e s,inter faces, clocks, powersupplies, ter min al s ,
p r i n t e r s, o r o th e r p re -co n fi gur edper ipher als.

6 . 1 . 1 Syste mS p e e d
T o p a r a p h ra sea n o l d p o l i ce traffic slogan, "Spbedkil' ls micr ocompUte r
p r o j e c t s " . T h i s i s d u e to the sad fact that of all the gr eat things m i c r o-
p r o c e s s o rsd o , d o i n g th e mfa st isn' t their best attr ibute. M ost com m onl y
a v a i l a b l e mi cro p ro ce sso rsh a vem aximum cycle speedsin the ZMHzr ange.
E x e c u t i o no f a n i n stru cti o n gener a' llyr equir es fr om 4 to 10 machinecyc l es .
l ' l o r e o v er,d o i n g a n yth in g u se ful wi 1I r equir e sever al i nstr uctions. lr lhat
al'l this meansis that a Itcfqproq-elqofp-pe!:p!.9_"sJ-"q!_:_iqgfAhl.y*,q_1gleJ*:m
c o n v e n t i o n a l se q u e n ti a l a n d com binationallogic. As a r ough r ule of th ur nb,
'if your
|l@-.

'AC
syste mre q u i re s th e p r ocessorto do anything faster than lOusec
( 1 0 0 k H z ) yo u w i l l n e e dto b e ver y car eful in your design

r f high speedm icr opr ocessor savailable, but


T h e r e a r e a l i mi te d n u mb e o
t h e s e a r e se ts o f d e vi ce s, n ot sing' le packagemicr opr ocessor s. They ar e
s o m e w h ahta rd e r to u se a n d co nsider ablym or e expensive. If you.begin to
u s e t h e s e yo u ma yd i sco ve r your cost r apidly exceedingthe cosflof som e
o t h e r f o r m o f l o g i c i mp l e me ntation. Also, high speedfor the CPUgener al l y
r e q u i r e s h i g h sp e e dme mo ri e s,inter face ' logic,andper ipher al devices,
f u r t h e r r a i si n g co sts.

6-2
A s w e me n ti o n e de a rl i e r o few pr ojects have over all speedr equir em entsthat
a re so se ve re a s to p recludemicr opr ocessoruse. However they , do ex i s t,
a n d i f yo u th i n k yo u have one, be ver y car eful to be cer tain fr ^o mthe s tar t
t h a t a mi cro p ro ce sso will r be able to do the job. Conver sely,ther e i s no
p oi n t i n p a yi n g fo r sy stemspeedyou don' t need. Speedis expens i v e. You
g en e ra l l y g e t a ce rta i n level of speedwith the m icr opr ocessor . If y ou'r e
n ot u si n g i tr s€ € i f you can tr ade it for som einter face sim plici ty . N o
u se b u yi n g a fa st p ro cessorand fast inter faces if a fast pr oces s orand
s o mesl o w e r, d u mb e r,a nd cheaperinter faces will do. tle' ll ta]k m or e about
t h i s l a te r.

,6-.l.:,2 ltleqgryRequirements
T h e syste mme mo ryi s w her eyou will stor e the pr ogr am sand data requi r ed
f or syste mo p e ra ti o n . l.lith most micr ocomputersystemsthis m emor yw i l l
c o n si st o f a co mb i n a tionof r ead/wr ite m emor y( RAM )and r ead only m em or y
( R0M) . (t,|ith someprocessors the CPUi tsel f contai.ns a sma'l I read/wri te
m ern o ry,th u s ma ki n gi t possib' leto implementsimple systemswith j us t the
C PUa n d R OM's. L a rg e r system swi' 11r equir e additional r ead/wr ite m em or y) .
T h e o b i e ct o f th e g a meher e is, as usual, to minimize cost. Thi s 'i s done
b y g e tti n g a s mu cho f the softwar e fnto ROMas possible. This is bec aus e
R OM ca n b e l e ft w i th p oweroff and the pr ogr amwill still be there w hen
p ow e ri s re sto re d . A l as, such is not the case for RAM . Thuswheny ou
h ea r p e o p l e sa y th a t p rogr amsshould be in ROMbecauseROMis cheaperthen
R A M,i t i sn 't re a l l y true. Bit for bit the costs ar e becomingqui te c om -
p ara b l € r w i th ma n ytyp es of ROMconsider ablymor e expensivethan R AM . T he
f a ct i s th a t R A Mi s n o t pr actical in dedicated system swhicttm ust m ai ntai n
the prograrnwithout re-loading memoryevery time the power is tunned 0N.

anddynamig84F:.
Bead/writenelqry can be broadlydivided into static RAM .a

ma i n tain its data as long as power is applied. A dy nam i c


A s ta ti c*8 & [*Wi " ].J

@.l l * p ' s r r * j " * ] k . T h i sr e fr e sh o p e r a tio n isa cio m p lish e d


b y p u l si n g so meo f th e addr esslines ( usually the most significan t bi ts )
p e ri o d i ca l l y. T o d o th is r equir es the addition of special cir cuitr y to
t h e syste m. In g e n e ra l, the integr ated cir cuit constr aints ar e s uc h that
a static memory
requires morea
me m o r o y f si mi l a r si ze . S ta ti c m emor iesalso dissipate m or e powerper bit .
T h e l a r g e s t R A Mme mo ri e sa re , ther efor e, usual' ly dynam ic,at least initial l y .
A s t h e d e v ice te ch n o l o g yi mp ro v esthese lar ger m emor iesusual' ly then be-
c o m ea v a i l a b l e i n sta ti c fo rm.

T h e c o s t o f b o th sta ti c a n d d yn amicmemor ieshas declined and wil' l continu e


to d e c l i n e . T h i s co st i s b a se don the absolute cost per bit for a given
a m o u n to f s to ra g e . H o w e ve r,th e device or ganization and not this absolute
c o s t p e r b i t i s o fte n mo re i mp or tant in pr actical applications. In ter ms
of cost per bit, a 4096 x 1 dynamicmemorymay be muchcheaper than a 256 x 8
2 s t a t i c m e mo ry. H o w e ve r,yo u w i l l need eight of the dynamicmemor iesto do
a n y g o o d . T h e y w i l l re q u i re re fr esh cir cuitr y, and they will take up eight
t i m e s m o r e P.C . b o a rd sp a ce i n pr oduction. If you only need a 128 byte
b u f f e r a n d so memi sce l l a n e o u sp r ogr amstor age, the bigger "cheaper "memor y
m a yc o s t f a r mo re . F o r co st e ffective design it is im per ative that you
a v o i d m e m oryo ve rki l l . D e si g n i n what you need, allow someextr a for un-
f o r e s e e nd i ffi cu l ti e s a n d re a so nablefutur e expansionand stop.

T h e a d v a n c e si n me mo ryte ch n o l o gyar e im pr essiveand they r eceive lots of


publicity. But the fact remains that fglv *glg!5.,fe.ri-mas,5.-p1odu.9_!io1..ry!11
gas-eol.
oftea nrin'i{'J[*P-?g!qq-e---c-9u[!""91d
tggglqe*y.$l_3ll.9"l1.ng:*-9,f,-"SM.
one
"vglyrye.Buv
I3.'.':-..:.lTp"'!.!t.rhansheer
:y*g_tg!,g.t'3ce""ylll-1.
d e v e l o p m e nsyste
t mw i th l o ts o f RAM. Use it to developlots of system s
w i t h o n l y t h e R A Mre q u i re d to d o the job.

l, l i t h R O M ' s,th e si tu a ti o n i s co nsider ablydiffer ent. Readonly stor age is


data wor d .
re a l l y o n l y u se fu l o rg a n i ze di n m ultiples of the computey' sbasic
I t d o e s n ' t m a kemu chse n seto maskpr ogr amtwo 1023X 4 ROMs for use in an
1 0 2 4X 8 s y s te m. A s a re su l t, ROM ar s e widely available for eight- bit
p r o c e s s o r si n si ze s fro m B x 8 to 2048 x 8. ROMar s e available in thr ee
t yp e s , e a c h su i ta b l e fo r ce rta i n ar eas of application: ER0M s,PR0Ms and
maskedprogrammed ROMs.

An E R 0 Mi s a R OMw h i ch ca n b e e rased and r e- used. An EROM can be pr ogr am m ed


a n d , i f e r r o rs a re fo u n d , e ra se dand r epr ogr am m ed.Er asur e is accom plished

b4
b y e xp o si n gth e E R 0 M to intense ultr aviolet light for a half hour or s o.
I n th i s w a y th e E R 0 Mcan s be r e- used indefinitely. EROMs ar e th e m os t
e x p e n si veL yp e o f R 0 M. Theyar e best used in development wor k o r l ow
v o l u mep ro d u cti o n e g u ipnentwhich r equir e fr equent changesto the oper at-
i ng p ro g ra m.

A P R 0 Mi s a R Of'l w h i ch comesfr om the manufactur erwith all locati ons as


o n e 's o r ze ro 's. It can then be pr ogr am m ed by the user . Unlike an ER OM ,
however, once programmed a PR0f'fcannot be erased. PR0l'lsare somewhat
l o w e r i n co st th a n E R Ol' ls.However ,fr equent pr ogr amchangescan qui c k l y
m a keth e mmo re e xp e n sive. Theyar e best used in pr oduction system sw hi c h
w i l l re q u l re fe w ch a n gesbut whosepr oduct' ionvolumedoes not jus ti fy a
maskprogrammed
ROM.

A mask programmed R0l'lis fabricated by the manufacturerto contain the


d e si re d p ro g ra m. It i s neither field pr ogr amr nable
nor er asable. A R OM
manufactur eryour pr oqr a m . T hey
i s o rd e re d b y se n d i n gthe ser niconductor
t h e n g e n e ra te a cu sto mROMfr om your specification. The cost of R OM pr s o-
d u ce dth i s w a y i s th e l owest available. However ,the ssnicondu c torm anu-
f a c tu re rs ch a rg e a fl a t fee for the gener ation of the r equir ed mas k . T hi s
cost makesmask programmed ROMscost effective only for those high volume
p r od u cts w h o sep ro g ra mwil' l never ( hopefully) r equir e change.

6 . 1.3 I/0 R e q u i !" e ments


I t i s ra p i d l y b e co mi n gappar entthat I/0 is the soft under belly o f m os t
microprocessorbased systems. Interfacing the microprocessorto the rest
of the system is always a requirement. =
JE_fn-i_."rsp.r9cg9lgtg,*cgf.r-el!.U
. a va i l a b l e g e n e ra l l y p rovide only enoughinter face capability to di r ec tl y
Jll.II3.e one normalTTt,device. This me.qns"!h,q"t j1. g{ out
?l! .!.r"9,.[9.].s-
1u1t bg b.uffered, Further,control signalsmustbe
:l !rl.:*,_--Ti91oOrocesso.1
d e co d e d ,i n te rru p ts mu st be pr ocessed,data m ust be latched and h el d unti l
the processor or peripheral is ready to accept it, and manyother system
r e qu i re me n tsmu st b e met. All this falls within the r ealm of I/0.

6-s
T h e f u n d a me n tael l e me n to f mi cr opr ocessorI/0 oper ations is the l,r g por t.
A n I / A p o rt fs th e p o i n t w h e re the signals to and fr om the var ious 1/A
d e v i c e s me e t th e i r re sp e cti ve signals fr om the m icr opr ocessor . I/0 ports
p r o v i d e bo th b u ffe ri n g a n d so mecontr ol decoding. The I/0 addr essessent
o u t b y t h e C P Ua re d e co d e dto pr ovide an enable signal to a specific llA
p o r t , t h ere b y g a ti n g th e i n fo rmation fr om that por t onto the systemdata
b u s f o r a re a d o p e ra ti o n o r g ating the infor m ation on the systemdata b us
i n t o t h e p o rt fo r a w ri te o p er ation. The mechanicsof howthe por t wor k s
a r e n o t a s i mp o rta n t a s th e realization that all data into and out of the
m i c r o p r o ce sso ri s g o i n g to h a ve to pass thr ough I/0 por ts. This means
t h a t y o u w i l l w a n t to g e t yo u r m oney' swor th out of ever y por t. To help
y o u d o t h i s, so mep ro ce sso rspr ovide a small num ber( usually two or four )
o f I / 0 p orts ri g h t o n th e C P Uchip itself. If you only need one or two
p o r t s f o r a si mp l e syste m, th i s can be a significant cost saving factor .

Af t e r y o u 've g o t th e I/0 p o rts, Jou then m ust design the speciai log' ic
r c q u i r e d to co n tro l ti re d e vi ces or cir cuits you ar e inter facing. For mos t
s i s is wher eyou will do the m ajor ity of your
m i c r o p r o c e sso ra p p l i ca ti o nth
h a r d w a r ed e si g n . i f yo u d o l ot,s of micr opr ocessorsystem s,you will
e v e n t u a l l y a rri ve a t so mesta ndar d I/0 por t design, but ther e will almos t
a ' l w a y sb e so med e ta i l e d i n te rface design wor k to be done.

l . l h e nm a k i n gth e d e ci si o n s a b o ut howto implementyour I/0 por ts and contr ol


l o g i c r y o u ma y b e a b l e to o b tain somecost advantageby using a specializ ed
i n t e r f a c e d e vi ce . S o memi cro pr ocesson manufactur er shave designedspeci al
f a m i l i e s of d e vi ce s to e a se I/0 design.' Thesedevices usually consist of
s e v e r a l I /0 p o rts, so med e fi n ed logic functions, and all r equir ed contr ol
l o g i c r e q ui re d to i n te rfa ce som edevice dir ectly to the m icr opr ocessorwi th
l i t t l e o r n o e xte rn a l l o g i c. For example,the data por ts, contr ol log' ic,
a n d i n t e r fa ce ci rcu i try re q u i red to input and output par allel data dir ec tl y
t o a s e r i al i n te rfa ce i s o n e popular example. 0ther s include inter r upt
h a n d l e r s , re a l ti me cl o cks, b i -dir ectional data por ts, and so on, with
m o r e b e c o mi n ga va i l a b l e a s th e industr y defines what functions ane conr nonl y
u s e f u l . . If yo u ca n fi n d so me ofthese to fit your needs, they can save
you money.

s- o
I / 0 d e s i g n i s th e a re a w h e reyou can often achieve significant savings b y
t r a d i n g h a rd w a refo r so ftw a re. It is also the ar ea wher eyou m ay be ab l e
t o t r a d e so meco st fo r e n o u g haddedspeedto makea usable system. I/O
d e s i g n i s a n a re a w h e recre a tive use of softwar e and har dwar ewill r esuJ t
i n o p t i m u msyste mp e rfo n n a n ceat Jowestsystemcost.

6 . 1 . 4 P e ri p h e ra l D e vi ce s
I n t e r m s o f p ro d u cti o n co st th e most expensivepor tions of your system
c a n e a s i l y tu rn o u t to b e th o se assem bliesyou have to buy pr e- assem bled.
Al l t y p e s o f co mp u te rke yb o a rds,displays, pr inter s, tape equipm ent,A/0
a n d D / A c o n ve rte rs, a n d si mi l a r per ipher als ar e ver y expensiver elative
t o t h e c o st o f th e mi cro p ro cessorhar dwar e. In the nor m alm icr opr ocess or
s y s t e mt h ese d e vi ce s a cco u n tfor over 50%of the har dwar ecost. If you
m u s t i n c l ud e th e se co mp o n e n tsin your system, it is ver y im por tant to mak e
a v e r y c a r e fu l a n a l ysi s o f w h etheror not your pr oduct is sti' ll cost effec -
t i v e . I t ca n b e d e va sta ti n g to have to add a $75 keyboar dto a micr opr o-
c e s s o r s y s te mw h e re th e to ta l com ponent cost is only 950. In this type
o f s i t u a t i o n yo u mi g h t se e i f y ou can use a less expensivedevice and add
t h e o t h e r fe a tu re s w i th so ftw ar e. All these types of decisions m ust be
w e i g h e d c a re fu l l y b e fo re yo u star t the actual design.

I n t o t h i s c a te g o ry w e to ss a l l those m icr opr ocessorsystemdetails that


d r i v e y o u r syste mco st u p . T h esear e par ticular Jy obnoxiousbecausethey
a r e o f t e n ove rl o o ke du n ti l i t i s too late. The thr ee m ost com m on
offender s
i n t h i s c a te g o ry a re cl o cksr p ow€Fsupplies and inter face r equir ements.

T h e s y s t e mcl o ck i s u se d to p rovide the timing signa' ls r equir ed to r un th e


C PUa n d s o rn eo f th e o th e r systemlogic. Fr oma cost standpoint, ther e are
tw o a r e a s o f i n te re st: w h og e ner atesthe clock and howgood does it hav e
t0 be. I n th e fi rst ca se th e a nsweris r :ither the CPUor ihe system. If
t h e C P Ug e ne ra te s i ts o w ncl o ck ( it m ay need an exter nal r esistor and
ca p a c i t o r ) , yo u d o n 't h a ve to wor r y about the secondquestion. If you hav e
t 0 g e n e r a t e th e cl o ckr Jo u d e fi nitely have to wor r y about jt. Somem icr o-
p r o c e s s o r sa re ve ry fi n i cky a b out their clocks. This m eansspecial dr ive r
6-7
c h i p s, crysta l s, i o g i cr p ow€rsupplies ( i.e. money) . If you ar e in a
v e r y c o st se n si ti ve o p e ra tion, this can r nakea significant differ enc e.

I n a d d i ti o n to th e ma fn C PUclock, c€!"tdin inter faces will r equir e t hei r


o w n c lo cks. T h i s i n c'l u d esser ial inter faces, r ea' l time clocks, and m any
s p e c ia l i n te rfa ce s. In somecasesyou may be able to der ive the r eq ui r ed
c l o c k (s) fro m th e ma i n systemclock. if nat, you will have to plan on
t h e a d d e dco st o f th e re q uir ed additional clock( s) .

Po w ersu p p l i e s a re a n o th er ar ea wher er equinements


d' iffer wide' ly fr om
m i c r o p ro ce sso rto mi cro p rocessor . Somemicr opr ocessor will
s r un off
t h e s a me+5 V p o w e rsu p p l y that' is used for all the logic. Somer equ i r e
u p t o th re e d i ffe re n t p o u rersupplies. Powersupplies ar e not cheapand
y o u c a n q u i ckl y a d d a l a rg e cost to the systemthat you m ay be able to
a v o i d e n ti re l y b y ch o si n ga differ ent pr ocessor . ( Note: after you go to
t h e t r o u b l e o f p i cki n g a micr opr ocessor "be sur e the r est of the sys tem
r u n s o n th e sa mevo i ta g e s. it doesn' t m akemuchsenseto cut cor ners to
g e t a si n g l e su p p l y mi cro pr ocessorand discover the memor ieschosenneed
t h r e e su p p l i e s a n yw a y.
)

Be s i d e sp a yi n g a tte n ti o n to the num berof systempowersupplies, you m us t


b e a wa reo f th e o ve ra l 'l systemcur r ent r equir ements. Theser equir ernents
c a n v a ry w i d e l y, d e p e n d i ngupon the CFU,m$r CIr ies,and inter face logi c
u s e d . Y o umu st b e ce rta i n that your powersuppTiescan supply enough
c u r r e nt to me e t p e a k systemusage. Conver sel,y, you don' t want to pay for
m o r e ca p a b i 'l i ty th a n yo u n eed. To solve this pr oblem ,you usually don't
s e t t l e o n th e fi n a l p ro d u ction powersupply r atings until the systemi s
c o m p l e tea n d i ts p o w e rre q uir em entsar e char acter ized. This is in contr as t
t o t h e se l e cti o n o f th e systemhar dwar enwher e the numberof supplies to
b e u s e d i n th e syste mi s d eter m inedbefor e beginningthe design.

I n t e r f a ce re q u i re me n tsre l ate to suppor t cjr cuitr y r equir ed to use the


m i c r o p ro ce sso w r j th o th e r devices jn the systm n. A r nicr opnocessor that
i s v e r y, e a sy to u se a mo n gthe m emberof s its own family of devices m ay
t u r n o u t to b e a h o rro r to inter face to the r est of the wor ld. This i s

6-B
pa rti cu l a rl y tru e o f P- channeldevices to be used in N- channelo r T T L
s yste ms. In co mp a ti b ilities amongsystemcomponents can lead to pr obl em s
a n d i n cre a se dco sts a l l over the system , including the pr evious l y m enti oned
c l o ck a n d p o w e rsu p p l y ar eas.

6. I . 6 MicroprocessorHardwareSelection SuJrnnarv
I t sh o u l d b e o b vi o u s from the pr ecedingbr ief discussion that pic k i ng
m i cro p ro ce sso hr a rd w ar eis a tr icky business. Even ignor ing the s oftw ar e
c r i te ri a r |o u mu st b e ver y cer tain you get a devicewhichwill meet y our
s yste mre q u i re me n tsa t the lowest cost. It is im por tant to r em em ber at
t hi s p o i n t th a t l o w e st systemcost maynot always be the sameas l ow es t
p ossi b l e h a rd w a reco st. M odification ease, maintenanceand other fac tor s
ma y e n te r i n to th e p i ctur e. Ther e ar e times whenyou maywant to k now i nEl y
a ll o w so mee xtra h a rd war ecost to lower the costs in someother ar ea. | r l e
wi l l p o i n t o u t th e se ar eas as we go along.

6 .2 S o ftw a reC o sts


S o ftw a reco sts a re i n sidious. You can' t see it, or feel it, or hear i t'
b u t so ftw a re ca n b re a k your micr ocomputer pr oject faster than alm os t any -
t h i n g . A s h a rd w a resystem sand per ipher al devices becom e mor e and m or e
s ta n d a rd , mo rea n d mo r e of the design- to- pr ice bur den is going to fal 1 on
t h e d e si g n e r w h o h a s to design the softwar e to hold these har dw ar ebl oc k s
t og e th e r.

So ftw a re i s ch a ra cte ri zedby a ver y high development cost and a v er y 1ow


d up l i ca ti o n co st. B y way of exam ple,IBM' s softwar e development of 0S 360
( a ve ry l a rg e a n d co mplexsoftwar e pr oject, to put it m ildly) is es ti m ated
to have taken over 5000 manyears of developmenttime. However,the entire
s y ste mca n e a si l y b e d uplicated and stor ed on $1000wor th of m ag neti ctape'
is expensive. This c har ac ter -
As w e sa i d , d u p l i ca ti o n is cheap, developm ent
i s ti c b ri n g s w i th i t the following gener alization: softwar e for us e i n
h ig h vo l u mep ro d u ctsmust be fixed. It is absolutely not possibl e to pr o-
duce low cost customsoftware. 0nce you cornnit a programto R0l'1,don't
c o n si d e r ch a n g i n gth e pr ogr amunless you ar e pr epar edto changee v er y other
i d en ti ca l R OMi n e ve ry other system . ( Not to mention updating a1l

5- 9
r e f e re n ce d o cu me n ta ti o n.) The cost of customsoftwar e ( unless you ar e i n
t h a t b u si n e ss) i s so h i g h as to com pletelypr eclude it fr om volumes y s tem s .
T h e so ftw a re d e ve l o p me nt cost ver y quick' ly completelyover shadowthe
s har d-
w a r e co st.

So f tw a ree xe rts co st p ressur eon pr ojects fn two basic ways. The fi r s t


i s w h e np o o r te ch n i q u ea nd analysis lead to system swith inefficien t us e
o f e xp e n si veh a rd w a rere s our ces. This causesthe systemto end up w i th
m o r eme mo ryth a n i t re a i ly needed,high speedinter faces that cou' l d hav e
b e e n e l i mi n a te d w i th g o od softwar er €XtFa i/0 por ts that som esoftw ar e
m u i ti p l e xi n g co u l d h a ve eliminated, and so on. The secondway soft w ar e
r a i s e s co st i s i n th e d e v elopm ent/suppor t
cycle. This r esults in late
p r o j e cts d u e to i n a d e q u atetime r equir em entfor ecasting, pr ogr ambu gs that
t u r n u p j u st a fte r yo u take dejiver y on 10,000maskpr ogr anmed R0Ms ,
d o c u me n ta ti o nth a t re q u i r es a com pletesoftwar e systemr edesign whenthe
p r o gra mh a s to b e ch a n g eda year after r elease, and other gor y, exp ens i v e
e x a mp 'l e s. 0 f th e tw o a reas softwar e causespr obiems,the secondis far
m o r e se ri o u s th a n th e fi rst. The fir st set of pr oblemswill natur a l l y
b e c omel e ss se ve rea s yo u become m or e familiar with har dwar e/softwar e
s y s te md e si g n s. (A fte r al' 1, that' s what this cour se is her e to tea c h y ou.)
T h e se co n dse t b e l o n g to that gr oup of pr ob' lems that the entir e computer
c o m mu n i tysu ffe rs a l o n g with year after year . Somepr ogr ess is being
m a d e ,b u t i t i s sti l l a thor ny pr oblem . Goodeng' ineer ingpr actice i s
y o u r b e st d e fe n se . R e member this basic r ule: har dwar eand softwar e des i gn
a r e eq u a l l y co mp l i ca te d . The only differ ence ' is the r uies.

L e t ' s l o o k a t th o se a re a s wher esoftwar e can r aise ( or lower ) your har dw ar e


c o s t s . R e me mbw e re a re cons' ider inga sliding cost scale fr om all har dw ar e
t o v irtu a l l y a 'l l so ftw a re.

6 .2 .1 P roc es s or 0rqani za t io n
Thearchitectureof the processoryou choosefor your systemcan havea
si g n i fi c ant effec t on y ou r s o f t wa r ec o s t s . T h is is f e lt p r im a r i1 yi n tw o
a re as : memory and l /0. A p r o c e s s owh r ic his d e f ic ie n t in m e m o rady d r e ss-
i n g m odes w i l l requi re l ar g e r p r o g r a mtso a c c o m p listhh e s a m eio b as a
6- 10
p r o c e sso rw i th mo re fl e xi b le addr essing. M or epr ogr ammeansmor emem or i es ,
a n d mo reme mo ri e sme a n smor e cost. A lack of on- chip r egister s m ay r e-
guire you to use memoryfor temporarydata storage. Thesememoryreferences
t a k e mo re ti me d u ri n g p ro gr amexecutionand maym akethe differ ence betw een
a s i m p l e (i .e . ch e a p ) i n te rface and a m or e complex( i.e. expensive)one.
A v e r sa ti l e i n te rru p t systemmayenableyou to do m ost of the inter r upt
d e c o d i n gw i th l o g i c b u i l t into the CPU. 0ther wise, you will have to add
m o r e se rvi ce ro u ti n e s, I/0 devices and m oney. A pr ocessorwith a v er s a-
tile i n stru cti o n se t ma y e nableyou to im plementyour pr ogr amsmuchm or e
e f f i c i en tl y, th e re b y sa vi ng msnor yspace. The list goes on and on. Any
a r e a of th e mi cro p ro ce ssor ' sar chitectur e can becomea cost sensitiv e
p o i n t i n ce rta i n a p p l i ca ti ons. The ultlmate goal is to find the cos t
s e n s i ti ve a re a s i n yo u r a pplication and pick a pr ocessorthat is str o ng
i n t h o se a re a s.

6 . 2 . 2 P ro g ra mS tru ctu re
T h e p r o g ra mstru ctu re , j u st as with the pr ocessorar chitectur e, exer ts i ts
primary effect on the systemmemoryrequirementsand I/0 structure. Poorly
d e s i g ne dp ro g ra msw i 'l l o ften take.tur icethe m emor yof mor e car efully de-
s i g n e d p ro g ra ms. Y o un ru stbalancethe time and cost r equir ed to opti m i z e
p r o g r a msa g a i n st th e co st of memor ysaved. ideally, you will becom e
s k i l l e d e n o u g hto d e si g n n ear optim umcode the fir st time, ther eby avoi d-
i n g t h e e xp e n si vere fi n e ment pr ocedur e. Also, differ ent pr ogr amstr uc tur es
can be used to get maximum speedof programexecution in speed sensitive
a r e a s . F a i l u re to ta ke a d vantageof these str uctur es can r esult in t he
u s e o f mo re e xp e n si veI/0 i nter face har dwar ethan is actually needed.
The different programstructures and their tradeoffs in speedand memory
u s a g eare d i scu sse d th ro u g houtthe softwar e lessons.

6.2.3 Imp l e me n ta ti o nL a n quaqe


The level at which you develop your programshas its primary effect on
systemmemorysize and overa'll systemspeed. Programsdeve:lopedin higher
l e v e l l an g u a g e sw i l l g e n e rally be faster to develop, but they will tak e
more time to.execute and occupy from two to ten times more memorythan the
s a m ep ro g ra md o n e i n a sse mblylanguige. Assemblylanguagepr ogr am sc an

6. l1
be designed for optimummemoryusageand system speed but they take more
t i me to d e ve l o p . A d a ta pr ocessingindustr y estimate is that ass em bl y
l a n g u a g ep ro g ra msta ke fr om two to five tim es longer to develop than c om -
p ara b l e h i g h e r l e ve l l anguagepr ogr ams. This is par ticular ly tr u e of
l a r g e , co mp l e xsyste ms . Youm ust balancethe cost of developm ent agai ns t
t h e co st o f th e a d d i ti onal har dwar er esour ces. As a gener al r u' le , hi gher
l e ve l l a n g u a g e sw i l l b e lower in cost for small quantities of sys tem sw i th
a sse mb l yl a n g u a g eb e co ming m or ecost effective as pr oduction quan ti ty
i n cre a se s. (T h i s a ssu mesthe higher ' level languagepr ogr amscan meet al l
s yste msp e e dre q u i re mentswithout extr a wor k.) ttr e hig' herlevel l anguage/
a sse mb l y'l a n g u a g e
tra d eoffs ar e discussedin Lessons9 and 10.

6.3 SystemsCos_t
B e yo n dth e co sts a sso ciatedwith pr oducingthe har dwar ear e those c os ts
a s s o ci a te dw i th d e ve l o pingand maintaining the pr oduct. Unlike pr oduc ti on
c o s ts, w h i ch a re i n cu rred as a function of howm anyunits ar e pr oduc ed,
t h e se co sts a re l a rg e l y independent of pr oduction. Indeed, it is pos s i bl e
t o i n cu r ve ry l a rg e co sts in this ar ea and never pr oducea sing' fe uni t.

6 . 3 . 1 D e veol u n e n tC o sts
Sy ste mD e ve l o p me nCt o sts include all of the expensesyou incur dur i ng the
d e si g n o f th e p ro d u ct. Since these costs will be incur r ed pr ior to pr o-
d u cti o n , th e y w i l l u su ally have to be met fr om your available r eso ur c es .
T h e a re a s o f co st i n th is phasear e ajl well known. However the , addi ti on
adds a few extr a categor ies.
o f so ftw a re d e ve l o p me nt

H a rd w a reS e l e cti o n
A l l ti me a n d mo n e yspent evaluating var ious micr opr ocessor sa nd
syste mco mp o n e n tspr ior to com m encing the actual systemdes i gn.
T h i s w o u l d a l so i n clude a1l analysis of cr ucial tim ing and inter -
fa ce s a n d th e i n i ti al par titioning of the systeminto har dwar eand
so ftw a re b l o cks

tgrdw.are
?esiS
A l l ti me a n d mo n e yspent designing and&buggingthe har dwar er equi r ed
to i mp l e me n th
t e sy stemhar dwar e.
2
S o ftw a reD e si q n
A l l ti me a n d mo n e yspent designing and debuggingthe pr ogr am s
re q u i re d fo r u se i n the system . This m ay include a s' ignificant
a mo u n to f e xp e n sefor timeshar ingcomputerusageif you do not
h a ve th e re q u i re d p r ogr amtr anslation facilities available in
h o use .

D e vq l o p me nTto o l s
T h i s i n cl u d e s a n -yspecial har dwar e( such as a m icr ocomputer
develognent systemor special test hardware)you have to buy
fo r d e b u g g i n ga n d checkingout the systemdesign. Som eof
th i s co st w l 'l l a ctu ally be spr eadout over al' l developments
w h i ch e n d u p b a se don the sam em icr opr ocessor .

D o cu me n ta ti o n
A l l co st sp e n t i n d evelopingthe user manuals,pr oduction
d o cu me n ts,re fe re n ce specificationsr dod other documents
e sse n ti a l to co n ve rting a wor king lab pr oiect into a viable
p ro d u ct. T h i s co st should not be under estimated. Thor ough
d o cu me n ta ti o nw i l l pr obably consume20- 25 per cent of your
d e ve l o p me nbt u d g e t. However ,it will be m oneywell spent as
yo u r p ro d u ct ma tu re sand r equir es changes.

Marketinq
T h i s i s th e co st i n cur r ed in taking your finished pr oduct
fro m th e l a b a n d p resenting it to the wor ld. This is not
u su a l l y a n e n g i n e e ringactivity.

6 . 3 . 2 Mo d i fi ca ti o n C o sts
0 n c e yo u h a ve a w o rki n g p r oduct, ther e is always the possibil ity th at y ou
w i l l w a n t to i ssu e a n e h ,' impr ovedver sion. T,lis is one ar ea where a
m i c r o p ro ce sso rb a se dsystemcan r eally save you time and money. In a
t o t a l h a rd w a resyste m,a design extension or r e- design will usually m ean
costs. How ev er '
a n a l mo st to ta l re -i n ve stm entof the initial development
with a microprocessorbased systemyou may be able to make substantial
6- 13
f u n c ti o n a l ch a n g e sw i th l ittle or no changesto the har dwar e. This i s
b e c au sea so ftw a re syste mcan be r e- configur ed by changingthe pr ogr am .
Be a ri n g i n mi n d th a t a l l the softwar e cost r ules still applJ, this i s
s t i l l u su a l l y a ve ry e ffe ctive technique. Expandingor changingan ex i s t-
i n g syste mi s o n e a re a w her eyou will find that the m oneyspent on d oc u-
m e n ta ti o nw a s w e l l sp e n t. It can often makethe differ ence betweena
s u c ce ssfu l a n d co st e ffe ctive design m odification or a com pleter e- des i gn.

Pr o g ra mch a n g e sw i 'l l o fte n not be effective in pr oducts which wer e o pti m i z ed


s o c omp l e te i y i n i ti a l l y that ther e is not m uchextr a har dwar eleft t o w or k
w i t h . T h e p ro g ra mca n , a fter all, only per for m functions which use av ai l -
a b l e h a rd w a re . N o ma tte r howclever your pr ogr amner ,if ther e isn' t
e n o u g hme mo ryo r I/0 p o rts, somethings just won' t be feasible. If y ou
h a v e a p ro d u ct w h i ch l o o ks like it is a candidate for later expans i on,y ou
m a yw i sh to i n cu r a l i ttl e higher pr oduction cost initially by addi ng s om e
h a r d wa refo r 'l a te r u se .

5 . 3 . 3 Ma i n te n a n ceC o sts
An y c ost yo u i n cu r w h e nyour pr oduct fails in the field comesunder thi s
h e a d in g . A l l th o se fi e l d ser vicemen,r etur n cler ks, r ewor k lines, a nd
o t h e r su p p o rt a re e xp e n sive. Her e too, the m icr opr ocessorcan save y ou
m o n e y. A l mo st b y d e fi n i ti on, the m icr opr ocessormust cor municatewith
t h e e nti re syste m. T h i s meansthat with the addition of som epr ogr a m m i ng,
memory,and sornesmall amountsof hardwareyou can convert your micropro-
c e s s or b a se dsyste mi n to i ts owndiagnostic tester . Youmaynot need to
p r o v i d e th o ro u g h te sts, b ut even som esimple tests can maketr oubleshooti ng
a l o t e a si e r. A n yth i n g yo u can do to maketesting and ser vicing eas i er
w i l l lo w e r yo u r ma i n te n a ncecosts.

N a t u r a l l y, yo u mu st w e i g h the benefits of self- testing against the cos t


i t w i l l a d d . Ofte n , h o w ever ,you will discover at the end of the pr oj ec t
t h a t yo u h a ve so mee xtra I/0 lines or a par tially full ROl{ . Since thes e
a r e g o i n g to b e th e re a n yhow,you mayas we' ll use them if you can. S i nc e
t h i s t yp e o f th i n g i s n o t usually discover eduntil wel' l into the pr oj ec t,
t h e a dd i ti o n o f se l f te st featur es at that point is one of the few ti m es

*14
w h e ni t ma y b e d e sir able to add featur es after the design has s tar ted.
H o w e ve r,i f yo u w a nt to be sur e you have self- testing you shoul d nev er
w a i t to se e w h a t i s left over . In that case, the self- testing featur es
sh o u l d b e d e si g n e din like any other systemfeatur e.

6 .4 A P e rsp e cti ve0n Costs


N o wth a t w e h a ve e xam inedthe var ious component costs, let' s s ee howthey
re l a te to th e to ta l cost per unit of our pr oposedpr oduct. bv er the total
l i fe o f a p ro d u ct, the cost can be r epr esentedby the following gener ai
e q u a ti o n :

1 g=.f+vc wher e TC is the total cost per unit'


FC is the fixed cost r equir ed to dev el op
and m aintain the. pr oduct,
VC is the var iable cost associat edw i th
pr oducingeach unit, and
N is the num berof units.

T h e te rms i n th i s e quation can now be fur ther br okendowninto thos e c os t


a re a s w e d i scu sse di n the pr evious sections. Thus the fixed c os t por ti ons
costs of the har d-
o f th e e q u a ti o n w o uld tur n out to be the development
w a re a n d so ftw a re , the docum entation,the modification costs t o the l i ne
o f p ro d u cts, ma rke ting, and all other cost which is incur r ed r egar dl es s
o f th e vo l u meo f p roduct pr oduced. Thesecosts ar e amor tizedov er the
n u mb e ro f u n i ts p ro duced; the lar ger the num berof units pr oduc ed,the
l o w e r th e fi xe d co st per unit.

T h e va ri a b l e co sts would be the cost of all the har dwar ecomponentspr , oduc -
ti o n l a b o r, fi e l d ser vice for the per centageof units which pr ov e defec ti v e,
a n d a l l th o se o th e r costs which var y basedupon the num berof uni ts pr o-
duced

It i s c l ear fromi thi s e q u a t io nt h a t t h e a r e awh e r ewe will wan tto d i r e ct


our cost reductlon..effortis dependent uponthe quantity of units produced.
For s mal l ql anti ti es o f u n it s , we will wa n tt o m in im iz et h e f ixe d co sts.

6-15
I n p r acti ca l te rms th i s meansusing higher level languages( whenavai l abl e) ,
h a r d w a reth a t i s d e si g n e dfor ease of debuggingand high r eliability, and
a g e n e ra l e mp h a si so n d e veloilnentspeedr ather than low cost pr oducti on.
C o n v erse l y,fo r h i g h vo l u mepr oduction we wi' ll want to absolutely min i m r 'z e
p r o d u cti o n co sts. T h i s me anshighly optim ized pr ogr amsto minimize mem or y
u s e , ma xi mu m u se o f p ro g ramcontr olled inter faces to eliminate unnee ded
h a r d w a re ,me ch a n i cadl e si g ns for easy pr oductionand any other techn i ques
w h i c h c a n b e u se d to h o l d the cost down.

T h e e xa ct p o i n t a t w h i ch th e em phasisshifts fr om fixed cost r eduction to


v a r i a b l e co st re d u cti o n n a tur ally changesfor ever y pr oduct. In gener al ,
t h e m o re e xp e n si veth e fi n a l pr oduct, the lower the em phasison the v ar i abl e
costs.

6.5 T ra d i n q Off S o ftw a reand Har dwar e


N o wt h a t w e h a ve d i scu sse dthe m ain factor s affecting systemper for m anc e
a n d c o st, w e ca n d i scu sSth e ar eas wher e systempr oblemswill for ce us to
trade off hardwareand software to modify systemperformanceand cost.
A s w e me n ti o n e de a rl i e r, h i gh speed( pr ogr amm ed, har dwar e,or whatev er ) ,
' l a r g e n u mb e rso f p a :'cs, a n d com plexsoftwar e ar e all expensive. t{ e wi l l
b e t r y i n g to i mp l e me nat l l requir ed systemfunctions using the minimum
c o s t c o mb i n a ti o no f th e se i tems

6 . 5 . 1 C o n d j ti o n stJh i chL e ad to DesignTr adeOffs


I n t h e co u rse o f th e d e si g n we will be faced with sever al possible proj ec t
c o n d i t io n s, so meo f w h i ch w ill r equir e us to consider the var ious pos s i bl e
s y s t e mtra d e o ffs. as follows:
T h e seco nditions can be summ ar ized

1. syste msp e e dto o l ow, syster ncost too high,


2. syste msp e e dto o l ow, systemcost acceptable,
3. syste msp e e da cce ptable, systemcost too high,
4. syste msp e e da cce ptable, systemcost acceptable,
5. syste msp e e de xce s sive, systemcost too high,
6. syste msp e e de xce s sive, systemcost acceptable.

6-t6
C l e a r ' l y, e a ch o f th e se co n ditions r equir es differ ent r em edial action.
C o n d i t i o n o n e i s a n o b vi o u s cr isis situation. Unless som em ajor br eak -
t h r o u g h ca n b e d i sco ve re d , the pr oject is pr obab' lydoom ed. Condition
t w o i s al so fa i rl y cri ti ca l . It can be wor kedon only if the necessar y
s p e e dc a n b e a cq u i re d w i th o ut dr iving cost into the unacceptabler ange.
V e r y c are fu l a n a l ysi s w i l l be r equir ed. Conditions thr ee and five ar e
p r o b a b l y b o th so l va b l e b y a pplication of som ehar dwar e/softwar tre ade offs .
C o n d i t io n s fo u r a n d si x ca n be' left alone. Theym ayalso be exam inedto
s e e i f e xtra fe a tu re s mi g h t be addedto utilize the excesssystemspeed
w i t h o u t i n cre a si n g th e co st to an unacceptablelevel. If you elect to
t r y t h i s, b e ve ry ca re fu l n ot to go over boar d. Any additions ar e best
m a d ei n ve ry sma l l co n tro l l e d incr em ents. Avoid "cr eeping featur es"
( s e e L e sso n2 ). If yo u a re n' t sur e what to add, don' t. Be happyyou
b r o u g h t th i s o n e i n u n d e r b udgetand saveyour m oneyfor next time.

A f t e r y ou fi g u re o u t w h i ch condition your pr oject is in, yoU have thr ee


a l t e r n a ti ve s: b u i l t i t, ch angeit, or cancel it. Building it or canc el -
i n g i t a re d e ci si o n s th a t yo u have to makeon a situation by situation
b a s i s . C h a n g i n gi t ma y h e l p you postponethat decision for awhile,but
u l t i m a t e l y yo u w i l l sti l l h a ve to decide. t,lecan nowexaminehowto
c h a n g ei t so th a t h o p e fu l l y y ou can decide to build it.

6 . 5 . 2 S yste mS p e e dP ro b l e ms
As w e h ave e mp h a si zeadl l a l ong, speedusually costs m oney. Ther e ar e
v e r y f e w si tu a ti o n s w h e re i n c r easing systemspeedlower s the cost. If y ou
h a v e a pro j e ct w h i ch h a S to have incr easedspeed,you might consider the
title o f th i s se cti o n to b e " Tr adeOffs that Incr easeCost". l.lith that
i n m i n d , h ,eca n e xa mi n ew h e r eto look to incr ease systemspeed.

Sy s t e ms pe e dp ro b l e msca n b e br oadly divided into data tr ansfer r ate


p r o b l e m sa n d d a ta ma n i p u l a ti onr ate pr oblem s. In systemoper ation these
t w o t y p e s o f p ro b l e msw i l 'l requir e distinctly differ ent solutions. Howev er ,
t h e s a m eg e n e ra l te ch n i q u e swill apply to cor r ecting both.

6-17
6 . 5 . 2 .1 D a ta fra n sfe r R a te Pr oblem s
D a t a t ra n sfe r p ro b l e msa re encounter ed whentr ant' er r ing data betweenthe
c o m p ute ra n d syste mI/0 d e vices. This class of speedpr oblsn can be fur -
t h e r s u b d i vi d e di n to p ro ce ssorr ate. limited pr oblem sand per ipher al rate
l i m i t e d p ro b l e ms. P ro ce ss orr ate ' limited pr oblem sar ise whenthe compu-
t e r i s tra n sfe rri n g d a ta to a device which must have a high, non- vary i ng
t r a n s f er ra te . T h i s i s ch ar acter istic of m anyr eal time inter faces, di s k
d r i v e s, a n d h i g h sp e e db u ffer ed l/0 devices. In the case of the disk
d r i v e , fo r e xa mp l e ,i t i s not pr actical for the com puterto var y the s peed
o f d i s k ro ta ti o n . T h e re fo re, the pr ocessormust be able to r ead the data
a s f a s t a s th e ro ta ti n g d i sk pr esents it to the r ead head. Data tr ans fer
r a t e p ro b l e mso f th i s typ e will r esult in lost or er r oneousdata. Th ey
represent the rnost serious system speedprob'lemsand they must be detected
a n d c o rre cte d b e fo re th e systemwill function pr oper ' ly.

C u r i n g p ro ce sso r.ra te i i mi ted pr oblemswher ethe speeddiffer ential is


e x c e s si vere q u i re s th e a d d i tion of har dwar e' totr ansfer som eof the speed
b u r d e nfro m th e C P U . If th e speeddiffer ential is close, r estr uctur ing
t h e p r o g ra mse cti o n s w h i ch per for m the actual data tr ansfer s m ay pr ovi de
t h e s p e e dma rg i n syo u n e e d . However since
, instr uctions execute in fi x ed
m u l t i p le s o f syste mcycl e ti mes, it will be impossibleto adjust the sy s -
t e m s p e e da n y mo re a ccu ra tely than the executiontim e of the fastest
i n s t r u cti o n s. F o r th i s typ e of pr oblem,adjusting systemspeedby var y i ng
t h e p r o g ra mstru ctu re w i l l only be effective over a fair ly nar r owr ange
o f t i m in g .

U n l i k e p ro ce sso rra te p ro b l ems,per ipher al r ate lim ited pr oblem stur n up


w h e nt h e co mp u te ri s a b l e to pr ocessthe data at a m uchhigher r ate th an
t h e I / 0 d e vi ce s ca n su p p 'l yor accept it. This pr obiemis m ost conr no nl y
e n c o u nte re dw h e nth e mi cro com puter is comm unicatingwith per ipher als w hi c h
a r e m e ch a n i caol r w h i ch re q uir e user inter action, i.e. pr inter s, tape
r e a d e r s, te l e typ e g rri te rs, e tc. For exam ple,manysmall m icr ocompute r
s y s t e msre l y o n th e T e l e type Cor por ation' sm odelASR33 teletype as th e
m a i n s yste rnp e ri p h e ra 'l. It ser ves as the keyboar d,display, punchand
r e a d e r fo r a l l p ro g ra mI/0 oper ations. Nowthe teletype can only tr an s fer

6- 18
d a t a a t th e ra te o f te n c har acter s per second,or one data byte ever y 100
m i l l i se co n d s. P ri n ti n g 2500char acter s ( a snr all pr ogr amlisting) w i l l
t a k e o ve r fo u r mi n u te s. In this case, the com puterwill be spendi ngm os t
o f i ts ti me w a i ti n g fo r the teletype to finish pr inting.

P e r ip h e ra l ra te p ro b l e msar e pr obabty the most comm only


encounter eds y s tem
s p e edp ro b l e ms. F o rtu n ately, they seldompr esent a cr itica] design pr o-
b l e m . T h e cu re i s u su a l ly to add a faster I/0 device. Even this s ol uti on
h a s l i mi ta ti o n s. Mo st com puterper ipher als involve mechanicaldev i c es ,
a n d th e se w j l l a l mo st a l ways be slower than the computer . You m ust tr ade
o f f th e co st o f th e fa ster per ipher al against the tjme saved. If y ou
d i s c o ve r yo u h a ve a systemwhich spendsmost of its tjm e waiting for I/0
t r a n sfe rs (a co n d j ti o n re fer r ed to as I/0 boun- d)you
, maywant tb s ee i f
y o u ca n co meu p w i th so m efeatur es to utilize what js essential]y fr ee
p r o c e sso rti me . E ve nb e tter , you m ay be able to use someof that ti m e to
r e p l a ce so meh a rd w a rea n d fur ther lower systemcost. 0n the other hand,
i f t h e syste mca n d o e ve r ything it needsto at a cost you can affor d, w ho
c a r e s i f i t sp e n d s9 5 %o f its tim e waiting for the user to pr ess a k ey ?
M i c r o p ro ce sso rh a rd w a rei s going to becomeso inexpensivethat it w i l l
p r o b ab ]y b e co mefa r mo reeconom icalto under r .ltiI i ze sever al micr opr oc es s Or s
t h a n to sp e n dth e d e ve l o pment
cost to optim izethe use of one.

6 . 5 . 2 .2 D a ta Ma n i p u fg ti onRate Pr bblem s
W h e red a ta tra n sfe r ra te pr oblem swer e r elated to howfast we can get data
i n a n d o u t o f th e co mp u ter ,the data m anipu' lationr ate pr oblem sar e c on-
c e r n e d w i th h o wfa st th e data is pr ocessedonce the com puterhas it.
W h e r ed a ta tra n sfe r ra te pr ob' lemswill be solved mainly be adding or
c h a n g i n gsyste mh a rd w a re ,data manipulation r ate pr oblem swill be s ol v ed
m a i n l y b y re stru ctu ri n g the system ' s softwar e.

T h e t yp i ca l d a ta ma n i p u l ationpr oblemar ises whensomesection ( or s ec ti ons )


o f t h e syste mp ro g ra mta kes an excessiveam ountof time to execute. T he
m o r e c o rmo n l yu se d th a t p or tion of the pr ogr am ,the wor se the pr obl em .
T h i s typ e o f p ro b l e mi s char acter ized by your pushinga button and wai ti ng
f o r f ifte e n se co n d su n ti l the teletypewr iter pr ints the ten digit ans w er

6.L9
t o y o u r e q u a ti o n . U si n g so mehandheld scientific calculator s for com pi ex
c a l c u l ati o n s (try S IN 8 9 o ) pr ovides someexcellent exam plesof data m an'i -
p u l a t i o n ra te 1i mi ta ti o n s.

S o m ep r o b l e mso f th i s typ e ar e unavoidablein m icr opr ocessorsystem s .


T h e i r l ow sp e e d (re l a ti ve to minicomputer sand lar ge com puter s) ,modes t
i n s t r u cti o n se ts, a n d sma l l data elementsize limit the efficiency wit h
w h i c h an y p ro g ra mw i l l ru n . Theyar e simply not designedfor complexdata
p r o c e s si n ga p p l i ca ti o n s. N o matter howgood the algor ithm , cer tain cl as s es
o f o p e r a ti o n s a re g o i n g to take up significant am ountsof com putingtime.
So m ee x a mp l e so f th i s g ro u p ar e complexm athem at.ics
r outines ( anything
m o r e c o mp l i ca te dth a n a sfxteen- bit integer divide can safely be consi der ed
c o m p J ex),l a rg e me mo ryse a rches,ar r ay oper ations, and movingblocks of
d a t a a r ou n d i n me mo ry. In the lar ge and minicomputerwor Jd, another
p r i m a r y ca u seo f th i s p ro b l emis m ultiple user system s. For tunately, to
d a t e t h e mi cro p ro ce sso w r o rl d has been spar ed this par ticular pr oblem.
I f y o u r syste mre q u i re s a n y of these types of oper atiohs, you will end up
p a y i n g so mesp e e dp e n a l ty. You will be able to m inimize it to som eex tent,
b u t i t wi Il b e th e re . F o rtunately, the types of applications which wi l l
u s e m i c ro p ro ce sso rsd o n o t n or m al' lyr equir e lar ge num ber sof complexoper a'
t i o n s . If yo u h a ve o n e th a t does, you m ight ser iously consider one of the
s i x t e e n -b i t mi cro p ro ce sso rsor a low end m in' icom puter .

6 . 5 . 3 . S yste mC o st_P l o b l e ms
Sy s t e mco st p ro b l e msb e co mes ignificant whenyou havea wor king system
w h i c h mu st b e ma d emo re e co nom icalfor pr actical pr oduction. The ter m
"p r o b l e ms"i n th i s co n te xt i s pr obablymisleading. Vir tually all system s
i n t e n d e dfo r h i g h vo l u mep ro ductionwill go thr ough som ecost optim izati on
p r o c e d ureb e tw e e np ro to typ e and final pr oduction. Usualiy you witl hav e
d e c i d e d th a t th e co st ra n g e for the pr oduct is acceptablebefor e pr oceedi ng
w ' i t h t h e d e ve l o p me n t. T h i s decision is basedon m ar ket studies, com par i -
s o n w i t h e xi sti n g p ro d u cts, and other evaluations of what is a r easona bl e
f i n a l s e l l i n g p ri ce o f th e p r oduct. This num bercan then be pr oiected
b a c k t o a rri ve a t a co st ra n ge for the pr oduct.

6-20
I n ge n e ra l , th e te ch n i q uesfor lower ing pr oduct cost will be the r ev er s e
o f te ch n i q u e sto i n cre a se speed. Youwill want to r em oveextr aneoushar d-
w a r e ' co mp a cta l l p ro g ram sinto m inimum menor yspace, and in gene r al ,
m a k eth e ma xi mu m u se o f the pr ocessorand softwar e to im plementsy s tem
f u n c ti o n s. T h i s mu st a l l be done without cr eating any systemspeedpr o-
b l e ms. T h e re fo re , th e p r oceedur eis best car r ied out in discr ete s teps .
Y o u re fi n e o n e se cti o n o f the system,m akesur e the systemstill wor k s ,
a n d mo veo n to th e n e xt section. Ultim ately you will r each a point w her e
n o f u rth e r co st e co n o mies sys tem
can be achievedwithout compr om ising
performance.

C o s t o p ti mi za ti o n sh o u l d always be under takenwith the fir m r ealizati on


t h a t th e e n d mu st j u sti fy the means. It is an expensivepr ocessthat i s
u s u a l l y o n l y vi g o ro u sl y applied to pr oductswhosehigh volum ewi' 11j us ti fy
t h e e xp e n se . 0 th e rw i se the cost of the optim ization will over shadow
any
s a v i n g sma d ei n p ro d u cti on.

6.6 HardwgreSpeedTrade 0ffs


W h enyo u mu st mo d i fy systemspeedusing har dwar e,you will be tr yin g to
e i t h e r i n cre a seo r d e cre asethe am ountof wor k done by the pr ocess or . In
t h e fi rst ca se yo u w i l l be tr ying to simplify the systemhar dwar eor r e-
p l a ce mu cho f i t w i th so ftwar e. This r esults in decr easedhar dwa r ec os t
a n d lo w e r syste msp e e d . In the secondcase you will be tr ying to tr ans -
fer someof the work being performedby the software out to the hardware.
T h i s w i l l re su l t i n h i g h er systemcost. tJithin this fr am ewor klet' s
e x a mi n eso meo f th e a l te rnatives available.

6 . 5 . 1 P ro ce sso rsa n d Mem or ie:


A s i mp l e so l u ti o n to so mesystemspeedpr oble{ nsmay be to changepr oc es s or s
w i t h i n th e sa mefa mi l y. Somemanufactur er spr ovide micr opr ocesso r sw hi c h
a r e gra d e d b y sp e e d . If the nominalpr ocessorspeedis 2 M Hz,somedev i c es
m a y be 'a va i l a b l e i n se l e cted speedr anges fr om 1 to 4 MHz. Since t he
p r o c e sso rco st g o e s u p w j th the speedrus' ing thjs methodyou only h av e to
pay for the speedyou require.

6-21
I f y o u a re co n si d e ri n ga faster ( or slower ) pr ocessor ,you m ust also
c o n s i d e r th e e ffe ct th a t mem or yspeedhas on pr ogr amexecution. The
c o m p ute rmu st g e t a l l i n structions and data fr om memor y. If the m emor y
i s n o t a t l e a st a s fa st a s the pr ocessor , ther e is no point in incr ea s i ng
p r o c e sso rsp e e d . S i mi l a rl y , you may be able to incr ease systemspee dby
u s i n g th e sa mep ro ce sso rw i th faster memor ies.

6 . 5 . 2 D e co d eL o q i c
D e c o d e 'l o g i ci s re g u i re d fo r a var iety of pur posesin a m icr ocomputer
s y s t e m. Mo st d e co d i n gi s d one to deter m ineI/0 dev' iceaddr essesand
m e m o rya d d re sse s. T h i s'l o g ic is alm ost all done with har dwar e,and it
c a n u su a l l y b e mi n i mi ze di n a dedicated system . For example,manymi c r o-
p r o c e sso rsca n a d d re ss6 5 K bytes of m emor using y 16 addr esslines. Ver y
f e w a p p l i ca ti o n s w i l l re q u i r e this muchm emor y,so after you deter m in e
h o wm u chme mo ryth e syste mr equir es, you can elim inate the excessdec od-
i n g . F o r e xa mp l e ,i f yo u o nly need 4096 bytes of m emor y,you need onl y
d e c o d e1 2 a d d re ssl i n e s to accessali valid m emor yaddr essesin your
s y s t e m. S i mi l a r mi n i mi za ti on can be applied to the I/0 device addr es s es .

O n ea d d e db e n e fi t o f re d u ci ng the decodingis that the undecoded lines


c a n b e u se d a s e xtra co n trol lines in the system. Usually the fult
a d d r e ssb u s ru n s e ve ryw h e rein the system. If systemspeedper mits, t he
u n d e c od e ad d d re ss'l i n e s ma y be used to el iminate fur ther har dwar econtr ol
l o g i c . In th e ca se o f th e systemwith 4096 bytes of m emor we y mentioned
e a r l i € F, th e fo u r u n u se da d dr esslines could be used individually ( or
e v e n d eco d e d )to p ro vfd e systemcontr oi signals. Similar tr ade offs c an
b e p e r fo rme di n systsn s w h i ch r equir e fewer I/0 devices than the maxi m um
a v a i l a bl e .

6. 9. 3 l'lemoryBuJfers
M e m o r yb u ffe rs a re u se d to collect or hold data that is in tr ansit betw een
t h e C PUa n d syste mp e ri p h e ral devices. The addition of a high speedbuffer
d e d i c a te d to a sp e ci fi c p e ripher al can be used to solve pr ocessordata
t r a n s f er.ra te p ro b 'l e ms. T h is is par ticular ly effective if the per jpher al
h a s a l ow a ve ra g ed a ta ra te with high speedbur st tr ansfer s of data. A

6-22
b u ffe r ca n b e u se d to collect the data dur ing the bur st tr ansm i s s i on,
w i th th e C P Ure a d i n g the individual data elem entsfr om the buffer after
th e tra n smi ssi o ni s complete. This type of buffer ing can also be us ed i n
co n i u n cti o n w i th th e computer ' sDl' 1A
faci I i ty. In thi s case, the buffer
a ccu mu l a te sth e d a ta and tr ansfer s it into the main computermem or yi n a
si n g 'l e b l o ck tra n sfer

B u ffe rs ca n a 'l so b e used to solve per ipher al data r ate pr oblems . In thj s
ca se , th e C P Utra n sfer s the data out to the per ipher al buffer . T he per j -
p h e ra l ca n th e n ta ke the char acter s at its own r ate with no fur ther pr oc es s or
i n te rve n tio n.

A d d i ti o n o f b u ffe rs to the systemr eguir es the addition of con s i der abl e


h a rd w a ree xp e n se . A ccor dingly, they should only be addedif th e s y s tem
re a l l y n e e d sth e m. As long as speed is not a pr oblem,m ost mi c r opr oc es s or s
ca n d o a g o o d j o b o f implementingbuffer s. They can do this u s i ng al r eady
p re se n t ma i n me mo ryand som epr ogr anming. Data,is tr ansfer r ed i nto and
o u t o f th i s typ e o f buffer using an inter r upt. The device inter r upts
w h e ni t i s re a d y fo r a tr ansfer and the CPUper for msa single t r ans fer .
Wh e nth e b u ffe r b e comes full or empty, the data is then pr oces s ed,i us t
a s w i th a d e d i ca te d buffer . This is alwaysm uchcheaperthan a n ex ter nal
b u ffe r syste m. In the cour seof the design, if you think you n eeddata
b u ffe ri n g , l o o k ve ry car efully to see if it can be done using softw ar e.
E ve na fte r th e d e si g n is doneyou maydiscover that a har dwarebuffer
th o u g h t n e c essar ycan actually be done in this way. It m ay be
i n i ti a l l y
wo rth th e re d e si g n cost to save the har dwar ecost, par ticular ly i f pr o-
du cti o n vo 'l u mew i l l be high

6 .6 .4 S p e ci a l i ze d Inter face Devices


A sp e ci a l i ze d i n te rface device is designedto per for m somedefi ned func ti on
in th e syste m. U su ally the function to be per for m edcould be per for m ed
usi n g e i th e r so ftw a re or the specialized device. You will con s i der a tr ade
o ff w h e nyo u e i th e r find your self with a.speedpr oblemand no inter fac e
d e vi ce o r th e i n te rface device and lots of pr ogr amtime availabl e. i n the
fi rst ca se l i o u d e si g n in the device to fr ee up the pr ogr amtime that

6-23
p e r f o r mi n gth e fu n cti o n i s tying up. In the secondcase you take ou t
t h e d e v'i cea n d re p l a ce th e function with softwar e.

A c o r mo ne xa mp l eo f th i s type of device is the UART( Univer sal Async hr onous


R e c e i v e rT ra n smi tte r). T h is device accepts par allel data and converts i t
t o a s e ri a l b i t stre a mco n for m ingto the EIA RS232C data tr ansm issions tan-
d a r d . T h e fu n cti o n ca n e a s' ily be per for m edunder pr ogr amcontr ol, but as
m e n t i o n e de a rl i € F , e d ch ch ar acter sent or r eceived will take up 100 m i l l i -
s e c o n d so f co mp u te rti me . Dur ing this tim e the softwar e must convert a
c h a r a c te r fro m p a ra l l e l to ser ial, add star t and stop bits and generate
a l l t i mi n g a n d co n tro l si g nals r equir ed to per for m the tr ansfer . If y our
s y s t e mh a s th e ti me , fi n e . If it doesn' t, you add a UART. The on' ly ti m e
r e q u i r ed n o w i s th e ti me requir ed to wr ite one par allel byte out to th e
U AR T . A fte r th a t, th e U A RTgener atesall those functions that wer e d one
b y t h e so ftw a re , fre e i n g your pr ocessorto do other things. Similar tr ade
o f f s c an b e ma d eu si n g o th er pr e- definedfunctional devices.

6 . 6 . 5 In te rru p ts
I n m a nysyste msth e co mp u termust spendconsider abletime r espondingto
i n t e r r up ts. If th e re i s mor e than one possible inter r upting device, the
p r o c e sso rmu st d e te rmi n ew hich device gener atedthe inter r upt befor e i t
c a n p r oce ssa n y d a ta . T h i s identification can be done in a combinati on
of hardwareand software ;hat can be varied to meet systemspeed/cost
requi rements .

For maximum system speedyou design the hardwareso that each interrupting
d e v i c e re sp o n d sto C P Ua cknowledgem ent with the addr essof its ownde di -
c a t e d se rvi ce ro u ti n e . T h i s gives maximumr esponsespeed, since no ti m e
i s s p e n t d e co d i n ga n y d e vi ce identification codes. In som epr ocessor s
t h i s c an b e re d u ce dto th e inter r upting device pr oviding an actual sub-
r o u t i n e ca l l i n stru cti o n , makingthe inter r upt alm ost tr anspar ent in t er m s
o f o v e r h e a dti me l o ss.

T o l o w e r h a rd w a ree xp e n se ,the device identification can be movedinto


t h e s e rvi ce ro u ti n e s. In this case, the inter r upting devices al' l pr ov i de

6-24
th e sa mero u ti n e a ddr ess. The softwar e m ust then poll all de v i c es i n the
syste rnto se e w h ogener atedthe inter r upt. This adds a signi fi c ant am ount
o f o ve rh e a dti me to the r outine, and will pr obably not be sat i s fac tor y for
fa ste r d e vi ce s.

A s a co mp ro mi seth as a com binatj onof di r ec t


, e systemcan be im plemented
a n d i n d i re ct i n te rrupt decoding. In this caser lou assign your hi ghes t
p ri o ri ty o r fa ste st ( usually the sam e)devices their own identi fi c ati on
a d d re ss. T h e yw i l l then inter r upt dir ect' ly to their r outines w i th m i ni -
mu mti me l o ss. T h e lower pr ior ity devices can then be assign edto a c om m on
a d d re ssa n d th e se can be decodedunder slower , cheapersoftwar e c ontr ol .

6 .7 S o ftw a reT ra d e Offs


Software trade offs are madefor the samereason as hardwaretrade offs,
n a me l ymo d i fi ca ti o n s of systemcost and speed. W her ewe tr aded off har d-
ware for differ'ent hardwareor a combinationof less hardwareand some
so ftw a re , w i th so ftwar e we will usually be tr ading off pt' ogr a ms peedf,or
me mo rysi ze . In cre asesin pr ogr amspeedwill often take mor em em or y '
th e re b y co sti n g mo r emoney. Conver sely,if speedis not a pr o bl em ,c er tai n
p ro g ra mtyp e s ca n b e r eplaced by mar kedlyless code, with a su bs equent
l o w e ri n g o f me mo rys ize and cost. It must be kept in m ind, how ev er ,that
n o t a l l d e cre a se si n pr ogr amsize' lower memor ycost nor do all i nc r eas es
i n p ro g ra msi ze i n crease cost. The only tim e changesin pr ogr ams i z e
a ffe ct me mo ryco st at all is whenthe changer esults in the sa v i ng or us e
o f a n e n ti re me mo ry . For example,if your pr ogr amis to be lo c ated i n
2 K x8 ma skp ro g ra rm edROMs,the only time that your cost will c hangei s
w h e nyo u r p ro g ra msi ze exceedsm ultiples of 2048bytes. Up to that poi nt,
th e me mo ryi s e sse ntially fr ee. Similar ly, if you discover your new ' i m -
proved, programis now 2A75bytes long, Jou maywant to expendsometjme
e l i mi n a ti n g th o se 2 7 extr a bytes. ( The ter ms and techniquesd i s c us s edi n
th e n e xt fe w se cti o ns ar e cover edin gr eater detail in the softw ar e l es s ons .)

6 .7 .1 P ro g ra mL o o p sand Subr outines


P ro g ra ml o o p s a n d subr outinesar e used to m inimize pr ogr amsize and c ontr ol
e xe cu ti o n . A se q u enceof oper ations which is to be executeda fi x ed num ber

6-28,
o f t j m e s ca n b e p l a ce d i n a loop. A section of code comm on to sever al
p o r t i o n s o f th e p ro g ra mca n be placed in a subr outine. The actual codi ng
i s t h e r eb y o n l y mi tte n o n e time no matter howm anytimes the' toop is
e x e c u t edo r th e su b ro u ti n e i s called. Loopsand subr outinesminimize
p r o g r a msi ze a t th e e xp e n seof somepr ogr amspeed.

T h e i n s tru cti o n s w h i ch mu st be executedto contr ol executionof the loop


o r t h e c a l l i n g o f th e su b ro utine take a cer tain amountof time that is
n o t r e q ui re d fo r th e a ctu a l function being per for med. In speedcr itical
s i t u a t i o n s th e e ffe ct o f th e se over headinstr uctions can be e]iminated or
m o d i f i e d to i n cre a se e xe cu ti on speed. This is done by r eplacing the lo op
o r s u b r ou ti n e w i th th e a ctu a l str aight line code that was or iginally ther e.
T h i s e l i mi n a te s th e o ve rh e a dinstr uctions com pletely. Alter natively, a
l o o p m a y b e mo d i fi e d to u se a lower per centageof its tim e for over head.
T h i s i s d o n e b y p a rti a l l y re placing the loop with the str aight line code
a n d l o w eri n g th e n u mb e ro f ti m es thr ough the loop. For exam ple,say a
c e r t a i n fu n cti o n i s to b e p e r for m ed10 times, once for each executionof
t h e l o o p . In th i s ca se , sa y loop over headis 20%. By duplicating the
f u n c t i o n a n d l o w e ri n g th e l o op count to five we wouid do the sam epr oce s s -
i n g w i t h o n l y 1 0 %o ve rh e a d . The pr ice nould be a doubling of the amou nt
o f m e m ory
o ccu p i e db y th e fu nction.

6 . 7 . 2 F u n cti .g n g9-lo mp u ta ti o ns
T h r o u g h o uyo
t u r p ro g ra myo u will use functional computationsto evaluat e
d a t a a n d d e ci d e o n p ro g ra mre sponsesto input conditions. Youwill be
able to vary the execution speedand memoryusage of manyof these blocks
b a s e do n h o wyo u e va l u a te th e data. For example,let' s say we have an
a p p l i c a t i o n w h e rew e n e e d to multiply two eight- bit integer s. One soluti on
i s t o w r ite a n a l g o ri ttm w h i ch will multiply the tun number s. If for som e
r e a s o n t he sp e e do f th e a l g o rithm executionwas not adequatefor our app'l i -
c a t i o n , w e mi g h t co n sfd e r sto ring ali possible r esults in a ROM( or part
of a R0l'l). l,levould then use our two numbersto computethe address of
t h e p r o d u ct, th u s re mo v'i n g
most of the ccxnputations.This methodshoul d
e x e c u t ec o n si d e ra b l y fa ste r. Again, the pr ice is mor em emor yusage.

6-26
I n p r a cti ce , n o t ma n yma thematicalfunctions can be pr oducedin the m anner
j u s t d e scri b e d , H o w e ve r,the techniqueis ver y often applicable to m em or y
a d d r esse s,.A re q u i re d a d dr esscan often be computed as par t of the pr o-
g r a m e xe cu ti o no r sto re d as fixed data. Computation by algor itlr n ismor e
e f f i c ie n t,
b u t fe tch i n g d efined data is faster . Thesetypes of a' lte r nati v es
c a n be tra d e d o ff th ro u g h outthe cour se of systemsoftwar e design.

6 . 7 . 3 R e p e a te dC o mp u ta tions
R e l a te d to fu n cti o n a l co m putationsis the class of pr ogr amoper ation s
c a l l e d re p e a te dco mp u ta tions. Analys' isof pr ogr amsover the year s h as
s h o wnth a t i n mo st p ro g ra ms90%of the executiontjme is spent executi ng
7 0 %o f th e p ro g ra m. T h e s esoftwar e "cr itical paths" ar e what we cal l
r e p e a te dco mp u ta ti o n s. If your systemhas a speedpr oblem , the fir st
t h i n g to d o i s to se e i f you have any r epeatedcom putations. You ca n then
d e v o te ,yo u r'o p ti mi za ti o ne ffor t in those ar eas wher e it wjl' l do the m os t
good. Somecommon t.ypesof repeated computationsare common mathematical
f u n c t i o n s, ta b l e se a rch e s ,data m ovement
r outines, and data sor ts.

I f . y o ufi n d .yo u h a ve a cl e ar l.y defined r epeatedcom putatiofi,you m ay fi nd


i t w o rth w h i l e to stu d y i t. See if you can find a better algor ithm in the
d a t a pro ce ssi n gl i te ra tu re . If you can' t find one, do your best to dev i s e
o n e . T i me sp e n t th o ro u g h ly optim izing a r epeatedcalculation can be far
m o r e va l u a b l e th a n p a rti a l l y optim izing sever al sections of less fr equentl y
executedcode.

6.8 Sunmar.v
T h e h ard w a re /so ftw a re d e si gn pr ocedur eis somethingthat you only le ar n
b y p r acti ce . Y o umu st g a i n fir st handexper iencein the r eal wor ld. It
i s a p ro ce ssw h i ch b e co mes mor e than designing the har dwar eand then de-
s i g n i n g th e so ftw a re . It is an integr ated pr oceedur ewhich will allow y ou
t meo f th e m ost cr eative digital system sever im agined. l r l e
t o i m p l e me n so
h a v e o n l y scra tch e dth e su rface of what is available, and what is av ai l -
a b l e i s j u st th e b e g i n n i n g.

6-27
vrvo AuvNf
g gNt_LNitsifudlt-u
REPRESENTING
BINARY
DATA

Wh e nw o rki n g w i th digital computer sit is necessar yto r vorkw i th bi nar y


d a ta . C o mp u tecromponents ar e built up fr om electr onic dev i c es w hi c h c an
o n l y re p re se n td ata as 0' s and l' s. This nr eansyou will ha v e to us e
b i n a ry to re p re s entnum ber s. In spite of this, it is im po s s i bl eto
e sca p efro m th e fact that binar y data is not over ly conven i entto us e.
l{e'have all used base 10 numbersfor years and the base 2 numbersystem
se e msq u 'i te i n e fficient by com par ison. It takes 6 binar y di gi ts to r ep-
re se n t th e n u mb er50r O ( 1100102) ,and it gets wor se. In th i s s ec ti on w e
w i l l d i scu ss h o wthe individua' l binar y data e' lgnentsar e r epr es entedand
h o w th e y ca n b e g r oupedtogether for m or econvenientuse. Bi nar y ar i th-
ma ti c a n d l o g i c ar e discussedin the following supplementar sy ec ti on.

7 .1 - B i n a ry D a ta Elements
A co mp u te rd a ta e lementof ar bitr ar y length N is shownbelow .

FT- ll
T h e ri g h t mo st b i t ( bit 0) is consider edto be the least siq ni fi c ant bi t.
"%
Y" B i t N , a t th e l e ft m ost position, is consider edto be the m os t s i gni fi -
ca n t b i t. T h u sa com puterwith a 16- bit data elem entwould hav edata i n
b i t p o si ti o n s 0 -1 5:

15 L4 13 t2 11 10 9 8 7 6 5 4 3 2 1 0

16-Bit Datat'lord

S i mi l arl y , an 8-bit m ic r o c o m p u two


e r u ldh a v ed a t a in b it p o si ti o n s0 - 7 :

7 5 5 4 3 2 1 0

8-Bit Datat{ord

Thuswhenwe speakof Ioading one' s into bits five and seve nof an ei ght-
bi t regi s ter, w ew ill be loading the following patter n.

7-L
Bit Position
1 0 I
I 0 0 0 0 0

R e f e r e n c esto th e b i t p o si ti o n s of a r egister or memor y' location r ather


th a n t o t h e b i n a ry n u mb e ri n a register or m emor ylocation ar e cor monin
c o n t r o l a n d l o g i c a p p l i ca ti o n s.

? . 2 - Bi n ary N u mb e rs
A l l n u m b e rsyste ms(i n cl u d i n g b inar y) r epr esent num ber sas a function of
t h e r a d i x ( n u mb e rb a se ) a n d th e position of the individual digits. Any
n u m b e rc o mp o seodf d i g i ts A H -AO in a r adix R can be r epr esentedas
fol I ows:

A I t A H -t .A tA o =A N R N +AN- txRN- l+ + AlxR1+ A0xR0

w h e r eA i s a n y d i g l t i n th e ra n ge 0 to R- l and N is the digit position.


F o r e x a m p le ,co n si d e r th e n u mb er136 in base 10. hle havedigits in posi-
ti o n s 0 , 1 a n d 2 . In th i s ca se , all values of A must be in the r ange
0 - 9 , a n d R = 1 0 . l ,l eth u s h a ve a num berr epr esentedas

t
13610=1x R' + 3 x Rl* 6 r Ro
\s ubs c r ip t t o identify nurnber
base.)
=1x(to)z* 3 x ( 1 0 ) + ' 6 x 1
=100+ 3 0 + 6
= 136 1 0

B i n a r y n u mb e rsca n b e si mi l a rl y repr esented. The differ ence is that wher e


in d e c i m a l we h a ve te n p o ssi b l e number s( 0- 9) , in binar y we only have tr r o
(0 a n d 1 ) . T h i s me a n sth a t re p r esentinga given num berin binar y wil' l r e-
q u i r e m o r edi g i t p o si ti o n s th a n r epr esentingthe sam enum berin decimal.
T h u s t h e b i na ry n u mb e r1 0 1 1 0i s r epr esentedas

= L x 24+ o x 2 3 , L x z Z * I x Z L + L x z 0
1 0 1 1z0 ^.
'= 1x 16+0+4+2 + 0
2?to

7-2
sNotsur^Noc
tutls^sussnnN
NI'MBERSXSTiff COUVERStrONS

DECII'IAI ?0 Bn{lRy

To convert any decirnal nrmber to a bi.nary nrrmbere take the decimal

number and successively divide by n2n and, nrite dcnm ttre remainde,:r (1

or 0) as you continue divi{,ing until the nr:mber becores trOft.

ETI}IPI,E:

Convert b3ZrO to a bjnary number.

2 ) b lz

) 1oB /a
) itl
)zz
)r: /t
t 6/t
)t /o
)1 /r-l I

)0 /t-, I
tl
b3ero
v*
ErNAnI T,OpEqrUAr

As ln the deci:nal nunber systeu, the least signiJicant dlgtt ls on


the rlght and the most sigrrlficant digit ls on the left and each diglt
Ls a nultiple of a certeln poner of 10.

L3zro b x mA + ) x l0l + 2 x lO0

8-t
firis is 'a1so true for a binary nurnber, except that it is a nultiple
of a certain power of trZn,

IOIIA = f x 23 + o x 22 + 1 x ZI + 1 x 2A

So to eonvert a binary number to a decimal nrurberr take each power

of nzil and change lt to its respective decimal nunber.

2 0 =f

2 L =Q

2 ? =L

23 = 8

,lt = 16

ar6 = 6r rg36
etc.

EXA}IPI,E:

Take the number 101101

1 OL 1 O1 2= 1 x 2 5 + O * 2L * Ix 23 + I x 22 + A x 2L +1x 2O

= 1x 3 2 +Ox16+1 x8+ Ixb+ 0 xZ+1 x1

- 3 2 +0 +B +b+ 0+ 1
1011012 = h51o

8-2
COI{YERTINGDECI},I.AL11] OCTAJ,

Use t'tre sane nethod as to convert decinal to bJ.ary except dlvide

by ttre base of n8n i-nstead of n2r.

EXAIIIPLE:

Convert 13110 to Octa1

) 131
)re /3
/o
o /z
Btao = e3g

CCIIVEBT
II{G_oCTAL_ g.II.{At
TPJDE

To convert from octal to decLnal use the same nettrod as for

b:inery to declmal converslon, except use the poners of n|n lnstead ef ttltt.

EKAI{PI"E3

f:f
81 =,8
82 s d+
d=5L2
* r bo96
85 , 32T(i8
66 . 262]|o
etc.

8-3
EXA!{PIE:

Convert 2O3U to decimal

2o3^ = 2 x B2+ox81*3*80
o
2 x( il+Ox8+ 3x1
= 1 2 8+ O+ l

= 131

c0livERTINGpECII.{ALTO.HEJilpECn{AI,

Agajnr use the sane nethod for decinal to biaary convErsion, except
use the base x16rt jastead and replace the renalnders of n10r to iltr5tr by

the letters A to F respectively.

1 0 =A

U =B

J2 =C

13 a D

U =f ,
$=f

EXAI"IPIE:

Convert 9L92n to hexadeclnal

) 3 5 /r Jt =;;l
)
)
2 /3
o/z
9192ro :'ill,
colwERTIllG IIEX4)EC"I1{.qLT0. DECI]4AL

lgain, use the sane nethod fcr binary to decima-l conversiooe

except use the polters of 16 lnstead, and convert the letters A thrcrugb

F to 1O ttrough 1l respectively.

160= l

161 - 16
:162 = 256
L63 - ba96
1* - 65536

EXIIMPI.E:

Convert 23881d to decirnal

2 3 8 \6 = 2xLO+3xt62+ Ex161 + 8x160


= 2 xt63 + 3 x t62+ ].|r x t61 + B x t6o
s 2 xbO96 + 3 x 256 + ll+ x 16 + I x I

- 8192+ 768+ zLt+ 8

2388:]6 a 9L92Lo

COT{VERTItrKI
OCUL TO BIXANf,. EEtrIDECII.{AIfO BIr.ONr.

OCT.[I.TO IGX'jDLCIMAI:ANDBACK

Convert to blnary firste tlren tl oeadrd' regroqp the bfuary nunbers

into the desj.red goqps of three c four btnary dlglts, (three for octaL

or fqrr for hexadeclnal). lnhese translate dlrectly to tbe deslrad nunber

sr5rsten. Alrays start tbe regrorrytng rlth the ISB.

8-5
0ctaI Bi-nary llexadeciraal
BinarY

000 o oooo o

001 1 0001 I

o10 2 0010 2

olJ 3 oo11 3

100 b 0100 b

101 5 0101 5
110 6 OILO 6

111 7 o111 7
1000 I

100r I
1010 A

1011 B
. c
ILOO

Ito1 D

1ILO E

Ltu F

E]NAMPT.q:

1) convertbnzncaato octal

btcncr, = orco 10100010 1011 1100


= ovoo VoLo/oovo L1/LI V10o
' 01 OO1010 001 010 111 100
= 112l.27b

hmncr, = ltzl2?bg

8-6
2) Convert U35S to Hexadeci:nal

rI35S = oO1 loo 011 101


= 0Ol VQo 01/1 101
= 0O11 0001 1101

= 31D

!+358 = 3St6

B-7
ocg
sutSl,[nN
-/a
BCD }TIJI,IBERS

In some applicaLions it is desirable to be able to directly rep-

resent decinal nurnbers in the binary computer. Th.is is done using

Binarv CociedDecimaL, BCD. Whenusing BCDwe do not use all possible

data values that the binary data element can represent. Instead, we

1!nit ourselves to the followirrg fou: bit patternsl

Decimal BCD

0 oooo
1 0001

I 0010

0011

L o100
5 0101

6 UJ.l-U

1
I 0111

B 1000

9 1001

The o',her sj.x four bit combinations (1C10-111tr) are not used in BCD.

An eight-bit data element can hold two BCDdigifs. This means it can

represent decirnal nunbers from 0-99. BCD is very cornmonlyencoultered in

control and instrLment interface applications. As a resulte many computers

provide instructions to a1low direet arithmeric with BCDnwrbers.

e - 'l
sl{ott3vHs
AuvNts
/ /'
BINARYFRACTIONS

Binary numbers are generally considered as shole i.ntegers (i.e., 1,


2, 3, ..-). Hcrcever,it often becornesnecessary to represent nu-nbers

other then whole nurnbers. Binary fraction representation is an3.lagous to

cecimal fraction representati.on. In decimal nwrbers a fractlon consists

of digits to the right of a declmal. point; in biaar;y r we consider the bits

to the right of the binary point to be a fracticn. In a bilary fraction

the bits represent 2-N, where l,l = the bit posi.tion to the right of the

binary point. The powers of 2-N are shonn in the nunber tables. Con-

sider the following binary nrunber?

Binary Poj-nt

1101.1101

ltris binary nr:nber representation means

Z3 + 22 + O + ZO . Z-l * Z-2 + O + 2-3


=B +lr+1+.5r.25 + . 0 6 2 5

= I3.B].,Z5

Numbers can be converted to and from binary fractions using the

techniques already shorn fe converting whcle binary nunbers. Unfortunately,

not all fractj-ons are as well behaved as the above exanple. Consi<ier the

decimal number 3 L/3. Whenwe try to convert j.t we end up with -

3 L /3IO = 3.3333......3r O
ir/-

) V 3LO = 11.01010101......01-
2

The fracti,on repeats and there is obviously no exact result. We


ri1l have to choose a bit posi.tion where re tnurcate the value. For
example, j.f we choose bit position sixl we end up with dn approximation.

) L /3n N 1 1 . 0 10 10 1

10-1
The rouadlng errol introduced by ttris tnuncatio, can be coputed by

courerting the tnrncated fraction.

1 1 . O 1 O I 0 10 1 = 2 + I + .25 + .e62i + .OLS6ZS


=3.328L29

Tbe error is about .1t. lbe possibility of tJrls type of rounding

error must alrays be taken into cqrsideratLon when using binary .fractioas,

partlcularly ln dlvision operations. Very fen nunbens result tn eract

binary flacttons, so the possibility of erqr wlIL be ever lresent.


sNotrcnursNt
3t901oNVctr3utHrruv
AuvNts
BINARY
ARITHMETIC
AtfpLgcrc rNSTRucTroNs

All computers provide a nr"rnber


of instructions whichare usedto perform
arithmetic and log'ic operationson data. As discussedelsewherercoCIput€r
data consists of patterns of bits in registers and memorylocations. How-
ever' there is a fundamental difference betweenthe way the arithmetic
instructionsand logic instructionstreat this binary data. Thearithmetic
instructions interpret the data as numbers.The logic instructions, on
the other hand,interpret the data as a collection of individual bits.

'11.1 Computer
Arithmetic Instructi.ons
Themostbasic computer arithmetic instruction is additlon. This instruction
and the logic complement instruction can be used to lmplementany known
n6thematicalfunction. As a result, manycomputers offer addition as
their only arlthrnetic instruction, After additlon, the next mostcoflilnon
arithrntic instruction is subtraction. This is becausesubtraction can
be perfomndusing the samebasic hard*areas addition. After addition
and subtractionyou haveto go to a considerablymorecomplexcomputer
to get mul ti pl i c ati on a n dd iv is io n a s b u ilt - in f u n c t io n s . T h eh a r d w a r e
required for these operationsis conslderablymorecomplexthan that used
for addition and subtraction. As of this writing (July L976)there are
no microprocessors with built-in multiply and divide hardware.Thls wlll
certainly change. All of theseoperationsuse the contentsof the computer's
accumulator(s) and anotherdata sourceas operandswith the result endlng
up in the accumulator.

3I;X.l TnosComplement ilotatlg


Themostcormonway of representingnumbersfor arlthmetic operatlons in
the computeris twos complement notation. To understandtwos complernent
notation let's considerthe binary nurnbersthat can be representedby an
8-bit data element. lrleknowthat an 8-bit data elernentcan represent256
individual values. Whenwe use a reglster as a counter, we can count up
to 256dlfferent values. The binary numbercountlngmethodfollows,

Lt-1
Binary Count
00000000 0
00000001 1
00000010 2
00000011 3
00000100 4

::
1 1111110 254
1 1111111 255

This is an example of using the data elementas an unsignednumber. The


numbersin the register are interpreted as being in the range+0 to +255.
Nowthis methodis convenientfor counting,but awkward for arithmetic
becausethere is no wayto representnegat_ive numbers.To circumvent
this'problemwe changethe way in whichwe interpret the 256 possible,
numbers in the registers so that we will be able to representboth posi-
tive and negativenumbers.This revised scheme will be called g.igned-
twos complement

Any binary numberis convertedto its negativeby complementing'it,


addingone, and ignoringany carry out causdbJ the addition. For example,
considerthe binary number +5 in an 8-bit microcomputer; 00000101.To
co n ve rt+5 to -5 w e fi rs t c o m p le m e1n1t 1 1 1 0 1 0a,n dt h e n a d d 1 ; 1 1 1 11 0 1 1 .

If we performthe procedureon the result we get backour original number.


The256 possiblenumbers in an 8-bit register nowrepresentpositive and
negativenumbersin the range-128 to +127as follows:

IL.2
0 0 000 000=0
0 0 000 001=1

:
01 111 1 ll' ' + 1 2 7
11 111 111= -1
ll 1 ll 110--2
11 111 101=-3

::
10000000'-128

t{obhowbit 7 (the mostsignificant blt) is alwaysa zero for all positive


numbers and alwaysa one for negatlvenumbers. Thenpst slgniflcant bit
in a irl,oscomplementnumberis called the siqn bi3, becauseby testing
it you can deterrnineif a numberis positive or negative.

tL. 1.2 BinarYAri thmtlc


Blnary arithmetic is perforrnd uslng the ALUand two operands' The
operation can be perfonnedusing either unsignednr,mbersor slgned tms
complement numbers,dependinguponthe operation being perforrned' ibst
computers performaddition and subtractionas unsignedoperations. They
do provlde flags to indicate the result ln signed tms complement,but
it ls up to you to keeptrack of the slgn and magnltude.

Addltion is perfonnedby addlngthe contents of an operandto the contents


of the accumulator. If the result ls greater than the largest number
whichcan be representedin the accumrlator,a flag rill be set to indl-
cate a carry out has Occurred. For example,conslder the operatlon of
addlng the number15rOto an 8-blt accu,rulatorwhlch contalns 25LO' The
operatlon would be performedas follows.

IL.3
A c c u m u la t o r 0 0 0 1 1 0 0 1
+0perand 0000I111
Re s u lt 0 0 1 0 1 0 0 0 = 4 0 , ^

Nowc ons i derthe add it io n o f lllr ' t o 1 4 5 1 0in t h e a c c u m u la t or .

Ac c u m u la t o r 1 0 0 1 0 0 0 1
+Operand 01101111
u00000000
carry out

T h e re su l t o f th i s o per ation is 25510. It causesa car y out to i ndi c ate


that the accumulatoroverflowed.

Subtraction is performedby taking the twos complement of the subtrahend


an d a d d i n g i t to th e minuendin the accum ulator . Thus to subtrac t 10r O
from 25rOwe urouldperform the following operation

Subtrahend00001010
FormTwosComplementI 1 1 1 0 1 I 0
AddTo Accumulator 0 0 0 I 1 0 0 I
4000011 11=1510
carry out

Ignoringthe camy out, we havea result of 1510. Nowconsiderthe


subtractionof 35 from 15.

S u b t r a h e n d0 0 1 0 0 0 1 1
FormTwosComplement 1 1 0 1 1 1 0 1
AddTo Accumulator 0 0 0 0 I I I 1
!/11101100
no carry

Nocarry lndicatesa negativeresult. If we convertthe number


using our
twosc6mplementrules, we obtain the correct result, -20.

11-ir
A n'.wr'^^Ir*d"
b g*b*re-Iv,*A

K w-*+

Re s u lt 1 1 1 0 1 1 0 0
C omp le m e n0t 0 0 1 0 0 1 1
Addl 00010100=2010

Notice that the sense of the carry after a subtraction is reversed from
th a t o f a d d i ti o n . A car r y out indicites that the subtr ahendw as s m al l er
than the minuend 1nd the result of the subtractionwaspositive. &gry
indicates that the subtrahend was larqer than the minuend qnCthat
-out
the resutt rvls nega This is called a borrpwcondit'ion,and it is
analagous to overflowin an addition operation. To avoid confusionabout
the reversal of the state of the carry flag, manycomputer ALU'Sauto-
matically complement the carry flag after a subtraction. This makesits
state after a subtractionmatchmoreclosely lts state after an addition
(i .e. c amy s et i f re s u lt c a u s ea b o r r o w,c le a r if t h e r e s u lt di d n o t
causea borrow),

lL2 Computer Loqic Instructions


In contrast to the arithmetic instructions, the logic instructions perform
their operationswith no regard for the numberrepresentationbeing used.
The numbers being operateduponare simply treated as strings of bits.
That is why,theseoperationsare often refemed to as bit by bit opera-
tions. The operationperformedon one bit in no wayaffects the operation
uponadjacentbits.

The four most cormoncomputerlogic instructions are Complement,AND'0R'


and Exclusive0R. Theseoperations(exceptcomplement) use the contents
of the accumulatorand anotherdata sourceas operands,with the result
endingup in the accumulator.

9.2. I Loeic Conlplement


Thecomplement instruction replaceseachbit in the accumulatorwith its
l ogi c c ompl ement.Th u sif t h e a c c u m u la t o r c o n t a in s1 0 l 0 1 I 0 1 , th e
complernent operationyields the following result. ,r

u-5
Accumulator r 0 1 0 1 1 0 1
Complement0 1 0 1 0 0 1 0

11.2.2 Loqic AND


The Logic ANDoperations (SymbolA) operatesuponthe bits of the accumulator
and an operandaccordingto the folloring truth table.

AccumrlatorBit 0011
it
ResultBit

Thusgnly those bit positions whichare logic ones in both the accumulator
and the operandwill be logic ones ln the accunnrlatorafter a Logic Al{D
operationhas beenperfonned. For example,considerthe following Logic
At{Doperation.

A c c u m u la t o r0 1 1 0 1 1 0 1
A0perand 11011011
Re s u lt 0 1 0 0 1 0 0 1

Only those bits whichwereonesin both operandsare in the result.

L t.2.3 Looi c ,0R

The Loglc 0R operation (symbolV) operatesuponthe bfts of the


accumulatorand an operandaccordingto the folloring truth table.

Accumulator B it 001
nd B it 0
R e s u ltB it

Bit positionswhichare logic onesin either the accunulatonor the operand


will be Logic onesin the accumulatorafter a Logic 0R operationhas been
performed. For example,consider the following Logic0R operation.

II-O
B i t p o si ti o n s w h i ch a re L o gic ones in either the accumulatoror the o per and
w i l l b e L o g i c o n e s i n th e accum ulatorafter a Logic 0R oper ation has been
p e r f o r me d . F o r e xa mp l e ,consider the following Logic 0R oper ation.

Accumulator 1 0 1 1 0 1 1 0
V Operand 0 0 1 1 0 0 1 1
It
Resu 11110111

All bits whichwereonesin bcth operands


are onesin the results.

q.2.4 XOR
-Loqic
TheLogic Exclusive0R operation(symbolA, o-ten called XOR)is not
foundin all computers.It operatesuponthe bits of the accumulator
and an operandaccordingto the following truth tabSL

Accumulator
Bit 0011
a nd Bit
R es u ltB it 0110

Bit positionswhichare a Logicone in either the accumulator


or the
after a logic
operandbut not both will be Logiconesin the accumulator
XORoperation has beenperformed. For exanple,considerthe following
Exclusve0R operation.

A c c umu la t o0r 1 1 0 0 1 0 1
.lf 0perand I 0 I l gJ I 0
R es u lt I 1 0 I 0 0 I I

are onesin the


Thosebits whichwereonesin only oneof the operands
result.

u-7
APPENDIX
A

MODIFIED
6500OPCODETABLE
MODIFIED 6500 oP coDETABLE

0
8 B
0 8RK OR$(t * * ORAz ASLz * PHP ORA# ASLa * * ORA@ ASI€ *'
I BPLr ORAIy * * ORAzx ASLzx * cIf oRlGy * * :r ORAGX ASIGx *
2 JSNG ANDxt * BITz, ANDz ROLz * PLP A"llD# ROLa * BIIG AND@ ROIS * r
3 EMIr ANDiy * * ANDzx *
ROLzx sEc ANDCy * * * ANDGx ROIGx *
4 RTI EORxi * tt EORs LSRz * PHA EOR# LSRa * JMF@ EORG LSR@ *
5 BVCr EORIy * * EORzx LSRzx * CLI EORey * * * EOR@x LSRGx *
6 RTS ADCxI * * ADCz RORa * PIA ADC# RORa * JlrPt ADC@ RORG| *
7 E4rSr ADCIy * * ADCzx RORzx * *
SEI AD@y * AD@x RORgn *
't
8 * STAr(I *. STYz *
STAz STXz DET * TXA * STTG STAG *
ST)@
9 BCCr STAty * STYzx STAzx STXzy * TYA sTAGy T)(S rb * STA@x * *
A LDT# LDAxl IDX# LDYa LDAz I"DXz * TAY *
I.DA# TN( u)YG I.DAG tDX@ *
i

I BCSr LDAIy * IDYzx LDAzx *


LDXzy cLv IJeGy TSX * IDI@x LDAGx LDXGy *
c CPYf CMP!(I * CPYz CMPz DECz * INY CMP# DEX * CPYG CMF@ DEOG *
D BNEr CMPIy * * CMPzx DECzx * * *
CI.D c[@y * a"tG* DECGx *
B cPx* SBCII * CPXz SBCa INCz * INX SBC# NOP * cP)(G 88C@ IN@ *
F BEQr SBCIy * * SBCzx INCzx * SED * *
SB@y * SB@x INCGr *
0 l2 I 9A B

K ey to addressl ng el dol e:

t lnnrediate &t, Gy absolute tndexed


@ abeol ute N*,, zV Eero page tndexed
t 8ccumulatot rl lndercd lndtrect
r rel ati ve ty lndlrcct lndexod
a tero PagG
APPENDIX
B

KIM INFORMATTON
KIM PROGRA}MING
DATA SHEET

.5500
OP CODETAELE

4567 6 9At C D EF

o 8RK oR$(l t r * oRAz ASLz * * * i


PHP ORA* ASIJ ORI{ ASI€

I BPLr oRAly * r i otu{zx ASLzx * cLc ORnGy * * * OR{}x ASICI * I

2 JSRG ANDX, * t BITt A.liDz ROLz * t *


PLP AND' ROL. BITE ANDG ROItr

3 Bltlr ANDIy t * * t * *
AJ{Dzx ROLil sEc AND@y * * AN[ax ROLG! i

4 RTI EoRr( * r * EORZ IJRz * r * 4


PiIA EOR# ISRa JlaG Eo8€ tsR€

5 BfCr EoRfy t * * EORzx LSRzx * * * * t 5


cLt EO@y ECRj-ex f-sRLlr

6 R?S A.DCxi * r * ADCZ RORZ t RORs * *


PIA ADC# .JnPt ADC.a RORG 6

7 BVSr ADCty * * r ADCzx RORzr * cFt * * * *


l\D@Y ADC(ax RORGI

S rS T A xttt STYZ SI.tz STXz * DEY * T XA* sTr€ sTr@ sr:@ * I

BCCr STAIy I * * *
9 STl:r STArr STXzy TfA STAGy fXS * sTAGx * * 9
A LDY+ .tDAxl lrxt . l.J)Yz ItAa lJXz t TAY * rcl€ LD& r A
I.DA# TA,\ LDr&
B BCSr IDAIy * i U)Y?r lJAzx L}Xzy i * *
cLv I,l@y TsX IrlG* LDA(?x LDX?y t
c cPIf cMht * * CPY8 CltPz DEC: * * *
INY cMPrr D!!{ cI'rG cliRd DE@ c
D BNE! C!{Ply ) * t CliPzx DECzx t ct * * *
CilrGy ' C.'{I?x Df,CGr
E CEK' SBGxt r . CEX8 SBC? lNc" * I 5UW lH€g *
I:!X 60nf NoF €8&r E
F BEQr sBcty r t * SBCzr * SED t * * *
INCa SB@y SB@x fNO!fu
ol2t 6567 8 9i {8 CDEI

STASUSREGISTER

P : NV B DI Z C TABLE
ASCII/HEXCONVERSION
76543210 t.&t 7.8'r 7 '8'r ,.9n
i
cu
..i Ch, 8o. Chr No. CDt !a..

I}IPORTAI{T

00EF PCL
ADDRSSSES

17rA t&tI-L ss=00


DECIT.{AL iTA( BII{ARY M

0
NUL
sox
slx
EIX
0t

03
@ I

i
I :?f,
I a
e12
4l r6l
b6?
? 6:t
0 0000 F
00F0 PCH
OOF1 P
17FB NUI-H ss=1c
ITFC RST-L
1
2 2
1 0001
0010
E
D
EOr
EflO
ACK
v\

06
I i24
a?5
e26
o{
E4!
F4
d&
.65
r66
seL ,21 ca1 €t
o0F2 s 17m RsT-H 3 3 0011 c as
t
00 {?E Ba8 h6€
OOF3 A 17FE IRQ/BRK-L 4 4 0100 B HT 09 t29 t49 .69
OOF4 Y ITFF IRQ/BRK.H ) 5 0101 A LF OA .?a r6a
oa +29 K48 r5a
00F5 X 5 6 0110 9 oc Lac r6c
w.i1, 0OF1- 00 (LD) 7 7 0111 6 oo Mao m60
Fi.1 ". -: ,-1700 pAD 17F5 SAL 8 8 1000 7
so o€
OF
,2e
i2F
I t.€
O4F
n6€
o6F
... LTOL PADD I7F5 SAIT 9 9 1001 6 OL€ t0 I P5q FrA
-rr.i, , 4L702 PBD L7F7 EAr+l l0 a 1010 5 tl r3l o5r c?l
r2 232 R52 .t2
1703 PBDD 17F8 EAII l1 B 1011 4 oc3 ?f, 33:l s53 rt3
' ,4 ,4 - 17F9 rBlt L2 c 1100 3 Oc. la a34 74 r?a
i;t11s..t l5 535 u55 r75
,:,!;'
,/' aAJ'' 1g0O DUMPI 13 D 1101 2 SYN r 6 i3a v16 r7g
t11' / =,.,, ". ;, L873 LOADT 14 E 1110 1 €ta l 7 ,37 w5t r17
gl
-i ,
'
i .:..r+-

IMERVAL TIT'{ER
15 F 1111 0 cAr{
Et1 '|l
t9 I 83i
93!}
'x
Y!9
r7E
rE

pRT to @: /ll
L704 1
INT
D
DISPIAY OI'TPI.TT:

)g )0(
sua tA
E5C
FS 'E

is
rc

IE
I .38

.3o
z5a
!58

150
!tA

AL'
EsC
?D
76

1705 8 D xx US !F rlF ..5F 'E


0eL. tt
00FB 00rA 0oF9 e.0 \eo EUBOUI
L706 64 D
L707 LO24 D
170c JSRG grFlF
I E
170D 8 E I {UL NULL sHrFt Out
170E 64 KEYBOARD
INPIIT:
E I soH s7anr oF H€aorr{c. AtSo 6TAFT sHrtt rx
I OF MESSAGE
l70F t024 E srx START aF r€Xlj ALSO €OA. E(O
OLE OATA LINX €SCAT€
JSRG $1F6A OF AOORESS 'rC1 DgvrcE coN?roL t
oEvrcE coitleoL 2
€TX eND OF lgxt; also €oM, Eil, oF
READ G I}N MESSAOE cEv'cE coNTBor 3

L7O7 STA?US OTTTPUT


TO IIY: EHO OF ?FANSMr39tC{ tENOt oc4 :tEvrCe CONIPCL a
ENO ENOUIRY I€NORYI- ALSO V'FU i/EcAttv€ Acracfvtlocc
L7O6 COUNT D ACK ACXNO4LEOCE, NU sYU 3YIJCHHONOU' IALE ISYfVC'

17OE COTJIfI E char ln A t€L RINGS TH€ A€LL ^LsO €r8 €NO CF rnANSVrSSrON TLOCX
ss CAN SArrCEL lCALCLl
Jsn@ 91EA0 BACKSPAC€
€tl EwO Of storur,
HT HOAI2OiIIAL TA'
LINE FEED OR LIN€ SPACE{il€W su8 3Utg?rrutg
II{PTIT FROMITY: LTNEI AOVANCES?A?'A fO €scAtE. Pil€Ftx
ft€xr Lril€ a€GttNrNG oF Lttr€ FILE SEPAiATOI
VFRTICAL TA8 (VTAAI GFOU' SEPAFATOR
JSR@ $1E5A FORM :EED TO
PAG€ iPAGE} 'OP
OF NEX' RS R€COFIOSEPARATOR
US UTITS€PARATON
char lntoA o .'1 CABRIAG€ R€TUNN
rII't Brocr Dr.0oniM

6530-
oo2
I.K ROM

TII,IER Kf,YBOARD/
.J
DISST.AY
648 RI{U
PAO . PA7
15 PIO 7
TTYITAPE
TNTERFACE
gBO . PB7

6s30-
003

-1K ROt'{

TIMEF.

648 RI{U
PAO - P.A,7
15 PIO

PBO. PB7

DBO - DB7 -rRQ NlIr R/W RAM R/W ABO- AB15


KII"I INTERFACIY DATA SITEET

APPLICATIONCONNECTOR
PLUG
TTY BAT'DRATECONTROL
TUNCTION PIN # FUNCTION PI N I
BAUD I1O 300 600 1200 2400 4800 9600
PBO I PA7 l6
PBl 2 PA6 15 l7F1 79 EA 75 38 18 OA 02
PB2 3 PA5 r4 l7r3 02 00 00 00 00 00 00
P B3 . 4 PA4 l3
PB4 5 PA3 t2
PB5 6 PA2 l1
INT(orange) 7 PAT IO
PB7* 8 PAO 9
M tc
*6e e p . H-7 fo r det ait s about t his Itne -J;)
REMOTE

FI'NCTION
EKPANSIONCONNECTOR

PIN #
PLUG

FIJNCTION
o
PIN # E A RP H ON E

480 I DB7 16
A8l 2 DB6 l5
AB2 3 DB5 L4
F'
AB3 4 DB4 13
I
t, K (g ree n) 5 DB3 t2
EIF 6 DB2 11
027 DBI 10
RAMR/r{ 8 DBO 9 __l
(A

-o
PR.GRAHMABLE
I/O LINES 7
TTY
PA DATA RECISTER 17OO PA DIRECTIONREGISTER 1?OI. (0=lnput, OATA 6 7
1=output ) -o c
PB DATA REGISTER 1702 PB DIRECTIONREGISTER 1703 ouT
TAPE RECORDER
CONNECTIONS K E Y B OA R O R €TU R N
-o G
FIJNCTl,ON PIN f COLORCODE NOTES 3
;;)
TTY <H
GND K GREY GND OATA 4 6
AI'DIO IN L IN
-o o
BLUE FROMEARPITONEOUTPUT
AUDIO OTIT l.{ RED TO MIC INPUT

TTY/CRT CONNECTIONS

FT'NCTION PIN # COLORCODE NOTES

KEYBDRET. R BRO{rtN (+)


PRINTERRET. s {_--- KtM --:j
tsR(NN (+) E X TE R N A L S W ITC H IO S E LE C I
KEYBOARI) t VIOI.ET 20 nA current E ITH E R MOD €
Loop
PRINTER u YULLCH 20 nA current loop
I
L J U MP f R FOR TTY OP E N A TION
K IM MO NI T O R I MP O RT A NTA DDRE S S E S

OOE F US E R P C L O W B Y T E
OOFO US E R P C HI G H B Y T E
OOFl US E R S TA T US RE G I S T E R
OOF2 US E R S TA CK P O I NT E R
OOF] US E R A CCUMUL A T O R
OOF4 US E R Y R E G I S T E R
OOF5 US E R X R E G I S T E R
OOF6 CHE CK SUM
OOFT CHE CK S UM

OOF9 S TORA G EF O R RI G HT HA NDDI S P L A Y DI G I T P A I R


OOFA S TORA GEF O R CE NT E RDI S P L A Y DI G I T P A I R
OOFB S TORA GEF . O RL E F T HA NDDI S P L A Y DI G I T P A I R

17OO P ORT A .DA T A


LTOT P ORT A D I RE CT I O N CO NT RO LRE G I S T E R
I7O2 P ORT B D A T A
L7O' P ORT B DI RE CT I O N CO NT RO LRE G I S T E R
L7O4-L707 INTE RV AL T I ME R # 1
LTOC-L7OF INTE RV AL T . I ME R # T

L744-I747 INTE RV A L T I ME R # 2
L74C-I74T INTE RV A L T I ME R # 2
I7F2-T7F3 S E RIA L T/ O B A UD RA T E CO NT RO L
I7F5 TA P E DUMPS T A RT I NG A DDRE S SL O W B Y T E
L7F6 TA P E DUMPS T A RT I NG A DDRE S SHI G H B Y T E
I7F7 TA P E DUMP E NDI NG A DDRE S S + I L O W B Y T E
17F8 TA P E DUMP E NDI NG A DDRE S S + I HI G H B Y T E
L7F9 TA P E FILE I NDE NT I F I CA T I O N NUMB E R

ITFA NMI V E CT O RL O W B Y T E
17FB NMI V E CT O RHI G H B Y T E

LTFE rRQ V E CT O RL O W B Y T E
LTFF IRQ V E CT O RHI G H B Y T E

18OO E NTRY P O I NT F O R T A P E DUMP RO UT I NE

1873 E NTRY P OI NT F O R T A P E L O A D RO UT I NE

ICOO NONDE S T RUCT I VMO


E NI T O R E NT RY P O I NT

lC+F DE S TRUCT I V EMO NI T O R E NT RY P O I NT

IE A O S E RIA L OUT P UTE NT RY P O I NT

1E 5A S E RIA L IN P UT E NT RY P O I NT

l F lF E NTRY P O I NT F O R DI G I T DI S P L A Y RO UT I NE

IF 6A E NTRY P OI NT F O R K E Y B O A RDRE A D RO UT I NE

B- 4
APPENDTX
c

C. KTM SOFTWARE COLLECTTON


KIM User Notes vl- /13

Cass R. Lewart
HoI"mde1,N. J.
DISPI,AY ROUTINE
This routine will display any program showing each successive
location and the contents of that location. The routine is fu1lv
relocatabLe. By storing in the 17FA and LTFB l-ocations the
starting address of this routine one can use the ST key to start
the program. The display can be stopped by pressing RS and continued
by pressing ST again. The program starts dispLaying consecutive
locations starting with the location shown in the displ-ay by
pressing ST. The second prograrn MULT controls the displa.v time.
With val-ue 04 it is 0.4 sec per Location.

OO A2 04 THREE LDX/I MULT


02 8A TWO T)(A
03 48 PHA
04 A9 62 LDAIf $62 .1 sec/cycle
06 8D 47 L7 STAG $L7 47 Load timer
09 20 L9 \F ONE JSRG SCANDS Display
0C 2C 47 17 BITG $L747 Check timer
0F 10 F8 BlLr ONE
11 68 PtA
T2 AA TAX
13 CA DEX
L4 D0 EC BNEr TI^IO
L6 E6 FA INCz $FA
18 D0 E6 BNEr THREE
1A E6 FB INCz $FB
1C D0 E2 BNEr TI'IO

e.g. to start displayipg at. 2LO: AD,O,2,1r0,ST


if the DISPLAYstarts at 300: AD, L,7,F,A,DA,0,0,+,0,3,AD,go
to desired location,ST,.,. .

ll ql l+i i't"",.*-
*11r.*'L.vs$d*f-

c-1
KIM User Notes vL l/t4

Jim Butterfield
Toronto
DIRECTORY:A KIM-I UTILITY PROGMI'I

Program DIRECTORYaLlows you 254 program IDs to choose from ... enough
for most program libraries with some to spare. The program is fu1ly
reLocatabl-e, so put it anlnohere convenient. Start at the first instruction
(0000 in the listing). IncidentaLly, 000L to 001D of this program are
functionaLly identical to the KIM monitor L88C to 18CL.
After you start the program, start your audio tape input. When
DIRECTORYfinds a prograu, it will display the Start Address (first
four digits) and the Program ID. Hit any key and it wiLl scan for
the next prograu.

0000 D8 CLD
0001 A9 o7 LDA# $OZ Directional reg
0003 8D 42 L7 STAG SBD
0006 20 4t 1A JSRG RDBIT Scan thru bits..,
0009 46 F9 LSRz INH ..shifting new bit
0008 05 E 9 ORAz INH . . into left of
000D 85 F9 STAz INH ..byte INH
000F c9 L6 cMHl $le SYNCcharacter?
0011 D0 F3 BNEr SYN no, back to bits
0013 20 24 LL JSRG RDCHT get a character
00L6 c6 F9 DECz INH count 22 SYNC's
00t8 L0 F5 BPLT TST
00LA c9 2A cu"tt $2A then test astk
001c D0 F1 BNET TST ,.or SYNC
0018 A2 FD LDXtI $rD if asterisk,
oo20 20 F3 19 JSRG RDBYT stack 3 bytes
oo239s FC STAzx POINTII+I into display
0025 E 8 INX atea
0026 3A F8 BMIT RD
0028 20 lF lF JSRG SCANDS .,.and shine
0028 D0 D3 BNEr GO until keyed
002D F0 F9 BEQr SHOI{ atf s all fol,ks

c-2
K IM U ser N otes vl l t2

VU TAPE Ji m B utterfi el d
Toronto

Program VUTAPElets you actual-1y see the contents of a KIM format tape
as it's going by. It shows the data going by very qrrickly, because of the
taPe speed .. but you can at least 'sense' the kind of material on the tape.
In case of tape troubles, this should give you a hint as to the area of
your problem: nothing? noi se? dropouts? And you can prepare a test tape
(see beLow) to check out the tape quality and your recorder, The test
tape will also help you establish the best settings for your volume and
tone controls.
Perhaps VUTAPE's most useful function,though, is to give you a
tfeeling' for how data is stored on tape. You can actually watch the
Processor trying to synchronLze into the bit stream. Once itrs synched,
you'll see the characters rolling off the tape until an END or illegal
character drops you back into the sync mode agaLn. Itrs educational to
watch. And since the program is fairly short, you should be able to trace
out just how the processor tracks the input tape.
VUTAPEstarts at location 0000 and is fu1-J-yrelocatable (so you can
load it anyplace it fits).

OOOOD8 START CLD


0001 A9 7F LDAI| $7r
0003 BD 4L L7 STA@ PADD set display dir reg
0006 A9 13 SYN LDA/f $13 ..window 6 and tape in
0008 85 E0 STAz POINT and keep pointer
OOOA8D 42 17 STA@ SBD
000D 20 41 1A JSRG RDBIT get a bit and
0010 46 F9 LSRz INH ..sLip it into
0012 05 F9 ORAz INH . . the right-hand
00L4 85 F9 STAz INH ..side;
0016 8D 40 17 STA@ SAD show bit flag on display
0019 C9 16 TST CMIVf $16 ..is it a SYNC?
0018 D0 E9 BNEr SYN nope, keep 'em rolling
001D 20 24 LA JSRG RDCHT yup, start grabbing...
OO2OC9 2A CMH| $2A .8 bits at a time and..
0022 D0 F5 BNEr TST ..if it's not an r*r."
0024 49 00 STREAM In.Ait $OO ..then start showing
0026 8D E9 L7 STA@ SAVX ..characters 1 at a tim e
OO29 20 24 LA JSRG RDCHT
002C 20 00 LA JSRG PACKT ..converting to hexadec..
002F D0 D5 BNEr SYN . . if legal
0031 A6 E0 LDXz POINT
OO33E8 INX
0034 EB INX Move al-ong to next. .
0035 E0 1-5 c?x/f $15 ..display position
0037 D0 02 BNEr OVER (if last digit,..
0039 A2 09 LDX/F $09 ..reset to first)
0038 86 E0 OVER STKz POINT
OO3D8E 42 T7 SD(@ SBD
0040 AA TAX change character read
0041 BD E7 \F LDAGx TABLE . . to segments and. .
0044 8D 40 17 STA@ SAD send to the dLapLay
0047 D0 DB BNEr STREAM unconditlonal jurnp

c- 3
PROGRAMTO CHECK OUT TAPES/RECORDERS

Make a test taPe contal.ning an endless stream of SYNC characters


with the folLowlng program:

0000 A0 BF cO LDy# $Br directionaL..


0002 8C 43 L7 STlf@ PBDD .,regtsrers
0005 A9 16 LP LDA/I $rO SYNC
oooT 20 7A 19 JSR@ OUTCH ..our to rape
0O0A D0 F9 BNEr Lp

Now use program WTAPE. The display should show a steady synchronizatLoa
pattern. Tty praying with your controls and see over !f,hat range the
Pattern stays l-ocked in. The wider the range, the better your cassettel
recorder.

c-4
KIM User Notes v1/12

Jim Butterfield
Toronto
SUPERTAPE

0100 A9 AD DIIMPT LDA# $AO op code LDA


O1O2 8D EC L7 STAG VEB
0105 20 32 L9 JSRG INTVEB ser up subrtn
oL08 A9 27 LDAIF 527
0104 85 El STAz GANG fl-ag to go to SBD
010c 49 BF LDA/I $sr
010E 8D 43 L7 STAG PBDD open the channels
OLLL A2 64 LDx/f $64 send 100...
0113 A9 16 LDA/I $16 ..SYNC chars
0115 20 61 01 JSRG rrrc
011-8A9 6- tDA/f S2A send asterisk
011A 20 88 0l_ JSRG OUTCHT
011D AD F9 n LDA@ ID then the ID
OI2O 20 70 01 JSRG OUTBIT
0123 AD F5 L7 LDAG SAL followed by
0L26 20 6D 01 JSRG OUTBTC rhe srarr address
OLzg AD E6 L7 IDAG SAH (1ow and hieh)
OLaC 20 6D 01 JSR@ OUTBI'C
OL2E 20 EC L7 DIMPT4 JSRG VEB get memory word
OL32 20 6D 01 JSRG ouTBTc and send it
0135 20 EA l.9 JSRG rNcvEB on to next address
O].38 AD ED 17 LDAG VEB+I
0138 CD E7 17 CMP@ EAL is the address..
013E AD EE L7 LDAG VEB+z ..at the end?
0141 8D F8 17 SBC@ EAH
0L44 90 E9 BCCr DUMPT4 no, go back;
0146 A9 2F LDA/F $2F Yes: send end-data
0L48 20 88 01 JSRG OUTCITT
0148 AD W T7 LDAG CIIKL . . and checksum
OL4E 20 70 01. JSR@ OUTBT
0L51 AD E8 17 LDAG CHKII . .hi and Low. .
OL54 20 70 O]. JSRG OUTBT
0L57 A2 02 LDKIF $OZ send two..
0159 A9 04 LDA/,[ $O+ EOT characters
0158 20 61 0l- JSRG HrC
015E 4C 5C 18 JI4FG DISPZ and werre finished
; subroutines foll-ow here
0161 86 E0 HIC Sfiz TIC count
0163 48 HrCl PHA
0L64 20 88 01 JSRG oUTcHT send character
0167 68 PLA ..and bring it back
0168 C6 E0 DECz TIC
016A D0 F7 BNEr HICL do it again
016C 60 RTS

c-5
016D 20 4C L9 OUTBTC JSRG CHKT compute checksum
0L70 48 OUTBT PHA save the character
0l_71-4A LSRa
oL72 4L LSRa ..and take its
oL73 4A LSRa four left bits..
oL74 4A. LSRa
0L75 20 7p 01 JSNG r,frite rem...
0 178 68 PLA now the 4 right bits..
oL79 2A 7D 01 JSNG HHKOUT
01.7c60 RTS

0LTD 29 OF IID(OUT AND/T $0F remove unwanted bits


017F C9 OA CMI{I $oe change to ASCII by..
0181 18 c16 adding:
0 L82 30 02 BMlr HH(T.
oL84 69 07 ADCI| $oz $ :z ifAtoF
0L86 59 30 ITH(I ADC'T $go $ 3 0 if numeric
0188 A0 08 OUTCIIT I.D'TII $08 for the eight bits,.
018A 84 E 2 STtz conNT
018CA0 o2 lRY T.NYNI. $oz send 3 units
0188 84 E3 STYz TRIB starting at 3600 hertz
0190 BE BE 01 ZON T,DXGY NPUL number of half cycl.es
0193 48 PHA keep the character
oL94 2C 47 L7 ZON1 BII'G CLKRDI wait for the previous,.
0197 L0 FB BPLT z0N1 cycle to complete
0L99 89 BF 01 LDAay TIMG get the time to the..
019C 8D T+T7 STAG CLKlT ..next pulse ($78 or C3)
019F A5 E1. LDAz GAIIG
01A1 49 80 EOR/I $80 flip between 1 and 0
0143 8D 42 t7 STAG SBD
01A6 85 E 1 STA.z GANG
0LA8 cA Dm( have we sent all the cycles?
0l_A9D0 E9 BNEr zoN1 nope, aend another one
OI.AB68 PT.A get back the character
01Ac c6 E 3 DECz TRIB one less unit to send
ol.AE r0 05 BEQr stv, and the last oners here
0180 30 o 7 BMIr ROUl none teft? quit
0LB2 4A LSRa take next bit
0183 90 DB BCCr zoN ..and lf ltfs a one..
0185 A0 00 SETZ TNYII $oo switch to 24AA cycLes/sec
0187 F0 D7 BEQr z0N unconditionat return
0189 C6 E 2 ROUT DECz COT'NT one less bit
O1BBDO CF BNEr TRY any more? go back
01BD60 ' RTS
I frequency/density controls
01BE02 NPUL .BYTE $OZ two pulses; one cycl.e!
01BFC3 03 7E TrMG .BYTE $C3,$03,$78
end

Sp eed Tining Data: $01BE $01"c0


X3 04 06
X6 02 05

c-6
KIM- 1 User Note s vl lf4

TAPE DUPLICATIONPROGRAM Jim Butterfield

L78O L9 27 START LDA/f $27 SBD value


1782 A2 3F GO LDX/f $3F set directional register to
1784 8E 43 17 STX@ PBDD input
L787 A2 07 LDX/I $07 PB5 (cont) set for input
1789 8E 42 L7 STXG SBD
17BC A0 5E LDY/f 94 high frequency
l78E 2C 42 L7 BITG SBD zero or one?
L79L lO 02 BPLr OVER
1793 A0 A3 tDY/l L63 low frequency
L795 A2 BF OVER LDX// $BF set directional register to
L797 8E 43 L7 STX@ PBDD output
L79L 49 80 EORif $80 reverse output bit
L79C 8D 42 L7 STAG SBD and send it
L79F 8C 44 L7 STYG CLKIT set timer
LTLZ 2C 47 17 WAIT BITG CLKSTAT and wait
1745 10 FB BPLr WAIT
I7L7 30 D9 BMIr cO

Connect your two cassette recorders in the usual way at the AIIDIO IN

and AIJDIOOUT points. With the program running, start the recorders.

A11 programs will be copied from one tape to the other. This program

works on speeds up to 3X. If bad copies are obtained, try reducing

the volume on the playback machine.

c-7
KIM User Notes vL lf4

MOVE-A.BLOCK Edward J. BechteL, M.D.


Nerrport Beach, Calif .

The MovE-A-BLocK program wilL move a block of bytes up to 256 bytes


Long forewards or bachwards any distance. The bI-ock can be across page
boundaries -- it does not have to reside in one page. The starting
address and ending address of the block is entered in 00E0 - 00E3. The
NEII starting address of the moved block (i.e., where you want to move
it) is entered at 00E4 - 0085. r located it in 1780 ro be generally
out of the way, but lf you wish, you can use it to reLocate itself anlmhere.
lhe program calculates whether the move is forewards or backwards,
then moves from the top up, or from the bottom down. The number of spaces
the block is moved (in signed notation) is stored by the program in
0086 - 00E7' and the number of bytes that nere moved is stored in 00E8.
Also, the new ending address of the moved block is automaticall-y placed
in 0082 - 0083, for subsequent use.

1780 38 SEC
L78L A5 E4 LDA.z $W+
1783 E5 E0 sBCz $ro
1785 85 E6 srAz $ro
L787 A5 E5 wilz $gs
1798 E5 EL SBCZ $Er
L78B 85 E7 STAz $rZ
178D 90 18 BCCr MOVEB
178F 38 MOVEF SEC
L79OA5 E2 IJi.AZ $82
1792 E5 EO SBCz $rO
L794 L8 TAY
1795 84 E8 slYz $ng
L797 E6 E8 INCZ $Eg
L799 BL EO LooPl- LDAiy $80
L79B 9L E4 srAiy $84
179D 88 DEY
T79E DO t^9 BNEr L00p1
17A0 81 E0 LDAiy $80
L7A2 9L E4 srAiy $sa
L7A4 88 DEY
L7A5 30 L4 BMIr END
L7A7 38 MOVEB SEC
17A8 A5 E2 LDAZ $NZ
17AAE5 E0 SBCz $rO
17Ac 85 E8 STAz $ee
17AE E6 E8 INCz $ee
1780 A0 00 rDYtt $OO
l7B2 81 EO LOOP? LDAiy $nO
L7B4 9L E4 SIAIy $ra
1786 C8 INY
L 7B 7C4 E 8 c wz $ rg
t7B9 D0 F7 BNEr LOOP2
17BB 18 END CI.E
LTBOA5 EZ LDAz $82
LTBE65 E6 A,DCz $UO
L7c0 85 E2 STAz $pZ
L7C2A5 E3 LDAz $Ug
L7c4 65 9,7 ADCz $E7
17c6 85 E3 STAz $83
L7C8 4C 4F I.C JMPG START
c-8
0OEO= SAL)
00E1 = SAH) Original
) block of
00E2 = EAL) bytes
00E3 = EAH)

00E4 = SAL) New location


O0E5 = SAH)

00E6 = difL) Number of spaces


00E7 = difH) block is moved
(signed notation)
00EB = Number of bytes in block

c-9
IiEX DI]MP

b y J.B . R oss

Here is a program to print out machine language programs in


hex a d e c i m e l fo rma t. T o use the P rogram' l oad the starti ng address
of th e d u m p i n $ 1 7 F 5 (S AL) and $17F6 (S A H ), the endi ng address * 1
in $17F7 (EAt+l) and $17F8 (EAH), then run IIEX DUMP starting at
$01 0 0 . H EX D U M P i s re l o cateabLe so you can nove' i t to other memor y
loc a ti o n s as needed. A s w ri tcen, IIE X D U MP centers the pri nt-out on
an 8 0 c h a ra c te r l i n e w i e h 11 spaces on the l eft. The pri nt-out i tself
r equ i re s 53 spaces. T o modi fy the l eft margi n, change the data i n
loc a ti o n s $ 0 1 1 3 a n d $ 0 1 3 7.

EsI BITIP

1OO AD P5 17 SfBt LDA€I S17Fg gct lor startiag eddress


103 85 FA ,SfAU POINTIT save it in POINTL
1O5 AD r'6 17 LDA@ $17r'6 get high startiag address
108 85 FB STAZ POINTS save it in POINTH
104 20 2F tE JsR@ CRLF print Cn/Lr
lOD A9 0A LDA# 'LF' prlnt another LF
1SF 20 AO LE .rSR@ OUTCTT
LI,z AZ OF LDX# $Of print 15 spaces on lett
114 SO 9E 1E IOOP1 JSR@ OUTSP
117 CA DEX
118 DO FA BNEA LOOP1
114 A2 10 L$Xll $10 print headlng:
11C A9 FF LDA# $ff start wlth A at -1
1lE 48 PEA save A
11F 20 9E 1E JSR@ OttTSP print 1 space
t22 2A 9E 1E LOOP2 JSR@ OUTSP priot 1 space
125 68 PLA restore A
126 18 CLC
127 69 01 ADC# $01 add 1 to A
I29 48 PFA save A
12A 2A 38 lE JSll@ pRTgYT prlnt A as bex nunber
12D CA DEX
12S DO F2 BNER LOOP?
130 20 2F 1E JsR@ CRLF prlnt CR/LF
133 20 2F lE LOOpS JSR@ CRLF print CR/LF
136 A2 0B l,DX# $OB print 11 spaces oa left
138 20 9E 1E IOOP3 JSR@ OUTSp
1.38 CA DEX
13C DO lA BI\'ER L0OP3
138 AZ 10 LDX# $10 set up data counter
L4O 20 1E 1E JSR@ pBfP$? print address
143 20 9E 1E .tSR@ OUTSP space
146 20 9E lE LOOP4 JSR@ OUTSP space
149 A0 0O LDY# $OO zero Y
148 81 FA LDAIY F,OINTI get data from address
t4D 20 38 1E JSR@ PRTBYT print data
150 20 63 1F JSn@ INCPT increnent address pointer
153 A5 FB LDAZ POIN'fg test for maximum address
1s5 CD F8 1_7 CMp@ $17F8
158 90 09 BCCR MORE
15A A5 TA LDAZ POINTL
15C CD F7 L7 C',lP@ $17F7
15F 90 02 BCCR MORE
161. BO 06 BCSts DGNE
163 CA MORE DEX decrement data counter
164 D0 E0 BNHR LOOP4 repeat if counter not uero
166 18 CtC go to I.OOPS
16? 90 CA BCCIT LOOPS
169 20 2f 18 DONE JSR@ CRLF priat two blank lines
16C 20 ?F 1E J$&@ CRLF
16f 4C 4F 1C JtrP@ KIU return to monitor

tr*10
KIM-1 User Notes v1 #3
Joe Laughter
Memphis, Tenn.
FREQUENCY
COI'NTERROUTINE

This routine counts frequency using input PBO at a maximum rate


of 2O KHz. It counts DATA for I second. To count'for 10 seconds
load $29 into address 60. It uses PB7 for int. req. (connect PB7
to IRQ. ).

0000 A9 01 r_DNt $or


0002 85 65 STAz lUECNT
OOO4F8 SED
0005 A9 36 LDA/f INTLOW set int. vector
OOOT8D FE L7 STAG $17FE
000A 49 00 LDA/r INTHIGH
OOOC8D FF 17 STAG $17FF
000F 58 cl,r
0010 00 BRK
OO11EA NOP
OO12AD 02 L7 CKL6^I LDAG PB check for input lotr
0015 29 01 ANdt $or
0017 D0 F9 BNEr CKLCff
OO].9AD 02 T7 CKHIGH LDAG PB check for input high
001c 29 01 AND/r $01
0OLE F0 F9 BEQr CKHIGH
0020 18 crc add count to total
0021 A9 01 LDNI $or
OO23 65 F9 ADCz $F9
0025 85 F9 STAz $re
0027 A9 00 LDLI1 $oo
0029 65 FA ADCz $ra
0028 85 FA STAz $FA
002D A9 00 Trlill $00
002F 65 FB ADCz $FB
0031 85 FB STAz $FB
0033 4c 12 00 JMP@ CKLCI^I
0036 48 INT PHA check time
0037 49 90 LDAii $eo
OO39 BD 04 L7 STAG $r.704
003c 2c 07 L7 BrT@ $L704
003F 10 FB BPLr DEI,AY
0041 A9 F4 LDA/F $f+ set timer for another int.
0043 BD 0F 17 SrA@ $170r
0046 c6 65 DECz II'{ECNT check remaining time
0048 F0 02 BEQr DISP Lf zero disPlaY counts
004A 68 PtA
OO4B40 RTI
OO4CA9 FF DISP LDAif $FF set dispLay loop count
0048 85 66 STAz SCANCT
OO5O20 lF lF OUT JSRG SCANDS output data
0053 C6 66 DECz SCANCT dee. loop count
0055 D0 F9 BNEr OUT rept. display till looP
0057 49 00 Tr}ilt $00 count Ls zeto

c- 11
0059 85 F9 STAz $rg set total counts to zero
0058 85 rA STAz $m
o05D 85 FB STAz $TB
0o5F A9 05 rDAtl $OS reset I see timer
0061 85 6s STAz T'{BCNT
0063 68 PI,A
0064 40 RTI
0065 05 *DATA (${ECNT)
0066 rF *DATA (SCANCT)

c-12
ANALOGTO DIGITAL CONVERSION
DEMONSTMTIONPROGRAI-T

Display ADC Output in HEX Format

0000 A9 FF START LDA/I $ff set PA port to output


0002 8D ol 17 srAG $1701
0005 AD 03 17 LDAG $1703 set PB4 to be input
0008 29 sF AND/f $EF
000A 8D 03 17 SrAG $1703
000D 20 B0 00 LOOP JSRG ADC call ADC subroutine
0010 85 F9 STAz $fg store ADC output in right display
0012 20 lF 1F JSRG SCANDS dispLay data
0015 4C 0D 00 JMP@ L0OP loop back for more data

Display ADC Output in BCD Formrt

0020 A9 FF START LDA/f $ff set PA port to output


0022 8D 01 17 STAG PADD
0025 AD 03 17 LDAG PBDD set PB4 to be input
0028 29 EF AND/} $nr
002A 8D 03 17 STA@ PBDD
O02D 20 80 00 READ JSRG ADC read ADC
0030 85 E7 STAz HEDEC-L set up data for binary to BCD conversion
0032 !,2 00 r.Dxlt $00
OO34 86 E6 STXz HEDEC.H
0036 20 00 02 JSRG HEDEC call binary to BCD converslon routlne
0039 46 Ei IDXz $ff get BCD result high
0038 86 FB STXz $FB store result in left display
003D 46 E2 LDXz $82 get BCD resul-t Iow
003F 86 FA STXz $fe store result in niddle dllsplay
0041 A2 00 IJX/i $OO zero the right display
0043 86 F9 STXz $rg :
OO45 20 lF lF JSRG SCANDS display final BCD value
0048 4C 2D 00 Jl€@ READ loop back for more data

note: In order to perforrn the binary to BCD conversion, you nust load
the IIEDECprogram into the memory starting at address $0200.

c- 13
REAL.TIHE CLOCK
REAL-TIME CLOCK. INTERRI'FTROUTINE

Kllt-l Ueer Notee v.l f4 03A5 48 RTCLK PHA aave A


Charlee H. parsone 03A6 8A Tt(A
80 Longview Rd. 03A7 48 PHA gave X
Monroe, CT 06469 03A8 98 TYA
This progran utilizes 03A9 48 PE[ Save Y
the interval tr'er to produce an NHr rnterrupt 03AA49 83 .
every 249,856 mlcroseconds, A fine r.DA{f $83 ftne adJust tiuring
adjustment to L/4 second is done wlth 03Ac 8D 04 L7 STAG
the sane tlme In th€ interuppt ptogr.ri--This TIME4
flne adjustn€nt can b€ vrrled 03AF 2C 07 L7 TM BIIG TI}TES te8t tlnler status
by.changlng the nuqber fn focation-$OSAS.
A dtsplay routine is lncluded 0382 10 rB BPLR TM loop untll tine out
whlcb shous rhe t*oe on-the KrM-1 di;;t;i. you can exlt rhis rourrnc
and get back to the Bonltor Uy pressfnt 0384 E6 80 INCZ qSEC count 1/4 seconds
ih. ,,I,, k"y. 0386 A9 04 r.DA# do four tines before updating lccondl
$04
To run the clock program you Duat conoect pB7 0388 C5 80 CMPZ QSEC
to expanaron connecEor 038A D0 38 BNER RTN
lll 9 "19_l"t up Ehe r{!rl interiupt vector by storing $eS'i"-Siirl 03BC49 00 u)A# $oo zero QSECand update clock
903 in $17F8. The cloci< la set iy KIl, nonltor to ent€r "oa
current ttlre lnto the HR, MIN, ani ""i"g-tte thc 03BE85 80 S1AZ QSEC
SEC Iocatlone glven below. 03c0 18 cLc
1/4 SEC 03c1 F8 SED change to decirnal node
- $0080 l/4 second counrer 03c2 45 8l
SEC gecond counter I.DAZ SEC increuent seconds
- $00E1 03c4 69 01
MIN = ADC{I $Or
$0092 minute counter 03c6 85 81
IiR . STAZ SEC
. $0093 hour counter o3c8 c9 60
Llz DAI cMP# 60 untll eeconds = 60
- $0084 day counter for am-pm 03cA D0 28 BNER RTN
03cc 49 00 I.DA# OO reset seconds to 00
once starring ar g0370 to set the interrupr
o *:.:I 11:t1.V.proglan
ioutlne going, then re-enter the disflay routine
03cE 85 8l STAZ SEC
, yo$ want to rho{ th. ttDc. $OfZg I,henever 03D0A5 82 I"DAZ MIN lncreroent..mlnutes
F "i 03D2 18
tb
cIc
0tD3 59 01 toGt 0l
O3D5E5 E? stlz xtx
03D7c9 60 ctot 60 untll tlhnter . 60
IIAI,-TIII CITCK - DIs?IAY ROUTIIII 03E9 D0 19 trat lu
03Dl r.9 00 IDA' @ rcrot Elnutcr to (b
0370 A9 00 START IDA# $00 zeto Ll4 second neryry 03DDE5 82 sttz tEr
0372 p5 80 STAZ QSEC 03DF45 83 I.DAZ HR lncrenent houra
0374 A9 F4 IDA# $F4 eet tlEer 03El 18 cLc
to lntelrupt in 1/4 rcc.
0376 8D 0F 1? STAG TIMEF 0382 69 01 ADC# 01
0379 A5 81 D$PLY I.DAZ SEC get aeconds 0384 85 E3 STAZ H8,
0378 85 19 STAZ $Pg 03E6c9 12 cMP# 12 untll hours 12
eend to rlght dlsplay palr -
037DA5 82 LDAZ MIN get rnloutes 03E8D0 02 BNER TH
0371 85 FA STAZ $FA 03EAE6 84 INCZ DAY lnc!€nent L/2 day
cend to rolddle dlsplay patr
0381 A5 83 I.DAZ HR get houre
03ECC9 13 TH CMP# 13 check for 13 houre
0383 85 FB STAZ $FB sent to left dlsplsy patr
03BED0 04 BNER RTN
0385 20 6A lF 0310 A9 01 r.DA#
JSR,@ GETIGY check for r'1r key pressed 01 statt agalo rlth one
0388 c9 or CMP# $01 0312 85 83 STAZ HR
038A D0 0D BNER ENDR 03F4 D8 RTN CI.D teturn to blnary Eode
038c 20 lp lF JSRG SCAMS dlsplay tlue and delay 03F5A9 rA LDA# $rl set tlne! to lnterrupt Ln 24grg56 .Gc
038F 20 6A 1r JSRG GETKEY check for "Iil key preised agatn 03178D 0F 17 STA@ TI,}MF
0 3 9 2 c9 01 cl{P# $0r 03rA68 FI.4 reetole Y
0394 D0 03 BNER ENDR O3FB A8 TAY
0396 4C .4F tC JUPG 03rc 68 PIA restore X
YOXTR Junp back to oonitor if 'r1r' prcrred
0399 20 lF lE JSRG SCAI{DS dtaplay time agaln O3TD AA TA:(
0t9c ll GTf 03F! 68 PIA re8tore 4
tr0p b{dL to DSpLy te coatlrxl.
0t9D 90 br BGM DSPLT otrt 40 TTI raturn fron lnttrrupt
TIMER (STOPWATCH)

Klm-l User Notes Joel Swank/1186


v, L ll2 4 6 5 5 S . W. l 4 2 n d
Beaverton, 0R 97005

TIMER turns KIM-I lnEo a digital stopwatch showing up to 99 mi.nutes 0342 c9 02 NoPRT cw# $02 k ey 2
a nd 5 9.9 9 e econds . I t ls des igned t o be a c c u r a t e t o 5 0 u r i c r o s e c o n d s p e r 0344 F0 C4 BEQR RESET bac k to z ero
aecon d. Th e KL M - I lnt er v al t iur er ls us ed t o c o u n t 9 9 8 4 n a c h i n e c y c l e s 0346 c9 0r nMDJI (111
Yvr key 1
and the instructlons between time-out and the reset of the timer make 0348 D0 C8 BNER HOLD
up the ren aln lng 16 c y c les needed t o pr odu c e a t i m e d e l a y o f 0 . 0 1 0 0 s e c . 034A A9 9C r,DA# $9c
The keybo ard cont r ols t he r out ine as f ollow s : 034c 8D 06 17 STA@ TIMSET s et ti ner
O34F 20 IF IF DISPL JSRG SCANDS dl s pl ay v al ue
KET FI.'NCTION 0352 AD 07 17 D(PCK I.DAG TIMCET c hec k ti ner
0 Bt op 0355 F0 FB BEQR D(PCK w ai t l oop
1 s t ar t 0357 8D 00 1C STAG ROM del ay 4 us ec .
2 r es et 035A A9 9c I.DA/I $9c s et ti mer
3 ptlnt tine on terainal 035c 8D 06 t7 STAG TIMSET
4 return to KIM monitor 335F 18 cLc 8et fl ags
1360 F8 SED dec i mal node
STOPI,IATCH 3361 A5 F9 LDAZ INH
c) 0363 69 01 ADCII $01 l nc rement hundredths
I
H
0300 A9 79 BAUDR r.DA# 979 set baud rate to 110 for printer 0365 85 F9 STAZ INH
LN 0302 8D F2 17 srA@ $ r 7F2 0367 A5 rA LDAZ POINTL
0305 A9 02 I.DA# $02 G369 69 00 ADC# $00 tnc rement s ec onds
0307 8D F3 17 STAG $ 17F3 0368 85 FA STAZ POINTL
O3OA49 OO RESET 900 zero display 036D C9 60 cMPit $60 s top at 60
030c 85 F9 STAZ INH 036F D0 0B BNER CKEY
0308 85 FA STAZ POINTL 0371 A9 00 LDA# $00
0310 85 FB STAZ POINTH 0373 85 FA STAZ POINTL z ero s ec onds
0312 20 lF lF Hor,D JSRG SCANDS light dlsplay G375 45 rB LDAZ POINTH
0315 20 6A lF JSRG GETKEY read keyboard C'37718 cLc
0318 C9 04 CMP/I $04 key 4 0378 69 01 ADC{it $01 lncreroent mlnutes
031AD0 03 BNER NOQUIT a37A 85 rB STAZ POINTH
031C4C 64 lC JMPG CLEAR return to KIM Sonitor C37CDB CKEY CIID
031r c9 03 NoQUIT CMP# $03 key 3 c 3 7 D 2 0 6A l F JSR@ GETKEY read k ey board
0321 D0 lF BNER NOPRT 0380 c9 00 cMP/f $00 k ey 0
0323 A5 rB I.DAZ POINTH 0382 D0 cB BNER DISPL
0325 20 38 lE JSRG PRTBYT print tiroe on terminal 0384 F0 8c BEQR Hor.D 6toP
0328 A9 3A I.DA{I t:t
032A 20 A0 lE JSR@ OUTCH
O32DA5 FA I.DAZ ?OINTL
032F 20 38 lE JSRG PRTBYT
0332 A9 2E LDA# t.t
0334 20 A0 lE JSR@ OUTCH
0337 A5 19 LDAZ INH
0339 20 38 I E JSRG PRTBYT
033C20 2F rE JSR@ CRLF end of prlnt routine
033F 38 sEc Jurnp to HOLD
0340 B0 D0 BCS HOI.D
KIM User Notes vl /f 1

H. T. Gordon
Berkeley, Calif.
HEDEC

HEDECconverts a 4-digit hex number in 00 E6 (hi byte) and 00 E7


(Lo byte) into a decimal equivalent stored in 00 80, 00 El, and 00 E2.
It uses 00 E3, 00 E4, and 00 E5 to store calculated conversion factors
for each of L6 binary bits. Length: 67 bytes, Conversion times: 0.7
millisec for hex 0000, 1.5 ms for hex 1LL1", 1".4 ms for hex 8080, and
2.L2 ms for hex FFFF. Times are proportionaL to the number of binary
1 bits, not to the numericaL val-ue.

0200 F8 (sets decirnal mode)


98 (pushes Y, then X index into stack)
48
8A
48
0205 A9 00 (zeros 00 E0 to 00 E5 in a Loop)
A2 06 (sets X-lndex for 6 operations)
95 DF (zero-page, X storing)
CA
020c D0 FB
E6 E5 (increments 00 E5 to 01, to be fLrst conversion factor)
02L0 A5 E7 (accumulator pick-up of Lo hex byte)
02L2 48 (stored in stack)
A0 08 (sets Y-lndex for testing of 8 bits)
0215 68 (pulls hex byte fron stack)
4A (one logical shift rLght, lowest bit in carry)
48 (stores shifted hex byte in stack)
0218 90 0C (if carry cl.ear, bit was a zero. skip to O226)
42 03 (if not, do tripl-e-precision add of conversion factor
18 to the decimal Locatlons)
OZTD 85 E2
75 DF.
95 DF
CA
0224 DO F7
0226 A2 03 (next conversion factor atways calculated, doubLing
L8 previous factor by adding it to itseLf' gi-ving a
85 E2 sequence 1, 2, 4, 8, to final 65536 (not used))
75 E2
95 E2
CA
0230 D0 17
88 (DEY)
0233 D0 E0 (if not zero, back to 02L5 for next bit)
0235 68 (this PLA stack pu1l needed to equallze PIIAe and PLAs)
A5 E3 (LDA highest converslon factot location)
0238 D0 04 (if not zeto, Job ts finlshed, eo exit)
A5 E6 (Lf zero, Load hl hex byte)
023C D0 D4 (tf not zero, back to 02L2 for blt testlng)
0238 68 (restore X, then Y, lndexes)
AA
68
A8
0242 D8 (clear decimal node)
0243 60 (RrS)

c-15
BINARY MATH ROUTINES KIl4-1 User Notes vl /f3
Ii. T, Gordon
Berke1ey, Calif
MULTIA SUBROUTINE

Program MULTIA (second, revised version) does binary multipl-ication


of tswo8-bit numbers that have been stored (before the JSR to MULTIA)
in 0083 and 00E4 and are destroyed by the operation of the subroutine.
The hi 8 bits of the product are stored in 00E0 and the low I bits in
00E1; the subroutine initiaLLy zeras these locations, and aLso 00E2.
Operations use LSRs on the mul.tiplier i.n 00E4 to move up to B bits in
sequence into the carry flag. If the carry is set, the multiplicand
(in 00E2 and 00E3) is double-p::ecision added to the product locations.
If bits remain in the multiplier (00E4 not zero), the multiplicand is
shifted left in the 16 birs of 0082-00E3; crherwise rhe subrourine
exits. Program length: 36 bytes. Maximun product (FF X fF) is FE01
or decimaL 65025, with execution time about 380 rnicroseconds. Time
declines ta 240 microseconds for 80 X 80" 160 microseconds for 10 X 10,
70 microseconds for 01 X 0l-" 40 microseconds for 00 X 00.

000A A9 00 (zeros locations 00E0 to 0082)


85 E2
85 El
85 E0
OOL2 46 E4 (LSR 00E4, lowest bit into carry)
0014 90 0D (if carry clear, skip the addition, go to 0023)
0016 18 (CLC starts double-precision add)
45 E].
65 E3 (running totals stored in 00E0-0081)
85 El
001D A5 E0
65 E2
85 E0
0023 A5 E4 (LDA of 00E4, zero fLag set if zero)
F0 06 (exit to 002D if zero)
0027 06 E3 (ASL shifts highesr biE of 00E3 into carry,
26 E2 ROL shifts carry intc, loisest bit of 00E2)
0028 90 E5 (carry is always ctear, so baek to 0012)
002D 60 (RTS exit)

NOTE: This subroutine assumes that the processor is in the binary


(not the decimal rnode)! It should not be necessary lor subroutines
to protect themselves (by a CLD) from this problem.

c- r 7
H, T. Gordor:
Berkeley, Callf.
SUBROUTINEDIVIDA

Ttris software gives the quotient, to t6-bit or better precision,


from division of, any hex number from 0001 to FFFF by any hex number
from 0L to FF. It uses 10 Locations from 00E0 to 00E9, The quotient
appears in the lowest 5, with a fixed decinal igfi"d. betlseen EL and
Er. The raage of quotlents is from $ 0000,0fffi11@o* division of
0001/Ff) to $ FFFF.000000 (from division of FFFF/OI). Quotient Locations
are initiai.ly zeroed by a JSR. to SUBROUTINE ZEROER,which must also be
in memory and is coded separateLy for use in other programs. Before
the JSR DMDA, 4 locations must be fiLLed by the calLing program. Ttre
dividend high byte is set in-E6l the lshr bytl in 87, and-the Jivisor in
88. The'rprecision byte'!, with a vaLne from 01 to 05, is sec in
location E9; it is not altered by the programrbut the other 3 bytes
usualLy are. The purpose of the precision byte i.s to alloqz the user to
control the number of quotient Xocatl.ous to be calculated by DIVIDA.
A value of 01 causes exit after the proper quotient value in Location
E0 (which may be 00) has been calculated" A vaLue of 02 limlts the
caLculation Co quotient trocations E0 and 8L, and gives frinteger
arithmetic". A val-ue of 03 aLLows only one Locatlon to the right of
the inpl-ied decimal, etc.. The chief, use is to shorten the execution
time, wirich caa approach 2000 mie.roseconds at a preclsion of 05.
However, DMDA aL',tays exlts when the calcuLated remainder is zeto, since
calculation of higher-precislon locations ls then unnecessary. No
"rounding-off!' operations are included. 8.g., the quotlent of FEFE/FF
is 00FF.FD0000 at a preci.sion of 03, although tt should be 00FF.FE
since the quotient is 00tr'F.I'DFDFDat a preclsi.on of 05.

DIVIDA exits in Less than i.50 uicroseconds if the dividend is 0000.


It provides uo protection agalnst a dlvisor of 00, so the caL!.ing
program shouLd guard against thts! A guard could be i"neerted ln
DIVIDA, but I feel it is better for the cal-ling program to decide
what should be done lf such an error occura,
Operation of DIVIDA invol"ves addltl^on of a ehiftlng elngle-btt
"Bit-Bytef in locatLon 05, to the quotient location controLted by the
X-register, whenever a positive remainder is obtalned. The X-register
is not protected by DIVIDA, so it is better to use Y-indexed Loops in
the calLing program (that othenrise wilL have to store and restore the
X vaLue). T'tte final renainder is i.n location E6 when DMDA exirs.
ltre divisor vaLue is not altered if it is $ 80 or rnore; otherwise
lt ls left shi.fted by DMDA.
DMDA is very Long (70 bytes, or 78 Lf one includes ZEROER;tf
the zeroing operation were made an integral part of DMDA the length
would be 74 bytes and execution a strade faster). It Ls also sLor^l
compared to hardware arithsretic" but retratlveLy inexpenslve. It ls
meant to handle data, that are never precise, and not the kind of
eomplex math for which cai.cul.ators are designed, Since the ROR
instruction is not used, it wi.L1 run in any 6502 system.
Much of the Length of DIVIDA ls caused by speclal. Logic designed
to reduce the execution tirne---a deli.berate trade-off of rnore program
bytes for a Lower average time, that has the effect cf proloflgtng the
tlme of divisions wher no eaxL,g exit is posslble.

c*l_8
Execution time depends both on the number of quotient locations
to
be filLed and on the number of l-bits to be inserteci. Thus FFF,F/gl runs
slowly because it requires insertion of 16 l-bits into Lwo locations.
The rrhi/l-o exchange" operation at 022g speeds up many operations
with
a dividend of 00xx. rn general, higher speed will require
sacrificing
precisi on, and a precision-byte of 04 will be arlequate"
My reason for
fimiting the dividend to L6 bits and the divisor to 8 birs was that data
more Precise than 1 part Ln 256 wil-l be rare, so that most data
will be
singl-e-byte, and data sets with more than 256 items wiLl
be uneoflnnon.
calculation of the average of 255 one-byte data items is within the
capacity of DIVIDA. When there are more, they can be divided
into subsets
of 255 or ferter' the averages for aL1 subsets acided, and the
average of the
set of subsets calculated. we are now in the time range of seconds!
with more bits, it would be minutes. people who neeci arithmetic speed
had better get a 16-bit microprocessor (oi better stili, she1l out for
hardware multiply-divide) .
Those who want integer arithrnetic operations wilt do betcer using
a_dividend of type D(00 and precision-uyte of 01, However, simir.ar
effects can usually be obtained more quickLy an<i by other Logic,
not
division. The number of poesible ways of doing di-vision is irrcredibly
large, but I wi1"1-be surprised if an operation lilce that
of DIVIDA can
be done with many fewer bytes or much r,ign"" speerl alfhough using
, the
ROR instruction rnight help.

c- 19
SUBROUTINEZEROER

0200 A9 00 (rDA/i 00)


95 DF (STA zero-page, X)
0204 cA (DH()
D0 FB (BMo if * 0, back to 0202)
o2a7 60 (Rrs)

SUBROUTIM DIVIDA
(Note that 3 Locations are unused between the end of ZEROERand the
start of DIVIDA. This is to aLl.ow users (if the subroutines are in
RAM) to insert 3 instructions folLowing the LDA divisor instruction
ax O2L3. If the divisor is 0G, DIVIDA is wrong. The instructi.ons
D0 01 00 substltute for this a BREAKto 1C00. If something more
complex is needed, the 3 ins'tructions can be a Jl'lP or JSR to a
longer sequence of instructiorts.)

o2oB L2 06 (I,DA/I 06)


20 00 02 (JSR ZEROER, Eo zero 00E0 to 00E5)

021_038 (sEc)
26 E5 (ROL sets Blt-Byte to 01 and clears carry)
02L3 A5 E8 (LDA dtvisor byte)
30 05 (8M1, if blt 7 = L, skip to 021C)
o2L7 26 E5 (ROL Blr-Byre)
0A (ASL, Left-shtft divlsor Ln accumulator)
021A D0 F9 (BNE, Lf. * 0n back ro BMI ar O2L5)
85 E8 (STA bit-pattern L)C0( XruO( into dlvlsor locatlon)

021-EA5 E6 (tDA dividend-hi)


B0 0F (BCS, if carry set, go to subtraction at O23L)
0222 D0 09 (BNE, lf * 0, go to CMP at 022D)
A5 E7 (LDA dividend-lo)
0226 FO 28 (BEQ, dlvldend = 0 so exit to 0250)
85 E6 (STA dtvidend-lo into dlvidend-hi l-ocatlon)
O22L 86 EV (STK zeros dfvldend-lo)
E8 (INX to shift to next higher quotient Locatlon)

022D C5 E8 (CMP dividend-hi with dfvisor)


90 0B (BCC, dl.vlsor too large, bypass to 023C)
0231 E5 E8 (SBC, subtract divlsor frorn divldend-hl)
85 E6 (STA renainder Lnto dlvidend-hi)
0235 L8 (CLC for addltion)
85 E0 (LDA zero-pager X the proper quotl.ent byte)
0238 65 E5 (ADC the nit-Byte)
95 E0 (STA zero-pager X back lnto quotient locatlon)

023C 46 E5 (LSR the ntt-nyte)


D0 09 (BM, if * 0, bypass resetting)
O24O Eg (INI( to shift to next higher quotient locatl.on)
E4 E9 (CPt( to preeision-byte)
0243 I'0 0B (BEQ, lf equal exLt to 0250)
A9 80 (LDAtf 80 to reser)
0247 85 E5 (STA inro E5 reeers ntt-nyte)

c-2 0
T Z -3
(sru) 09 AEZO
( ae ua nb as Ssaf fxau JoJ gTZ0 of dl^If) ZO H\ 3V qrzo
(l3;;r{s eqt sa}aTduroc1q-puap}^Tp rox) 9s. 9Z
( r J;qs*+laT pu ap TATp slraf,s oT-prrapT^TpTSV) Ls, 90 6rz0
15 BIT SQUAREROOT SQUAREROOTSIDROIITINE

0100 A9 00 SQRT LDA/I $00 lnltiallze extended ergunent


0102 85 82 STAZ $82
Ilere te a progrsrn which takee the square root of a 16 bit blnary 0104 85 E3 STAZ $E3
0106 49 Fr' I.DA# $rF loltiallze cooplenented result
ouder aod ylelda a! elght blt lnteger plus elght blt blnary fractlon 0108 85 E4 STAZ $84
010A 85 E5 STAZ $ns
result. Thlg routlne nas tra$alated by J.B. Rosg frou an g0g0 progrrn 010c A'9 10 I,DA# $10 tnltlstlze loop count
0l0E 85 E8 STAZ colrNl
rrttteo by B.E. DuPuy. The prograo is rrlltten as a subroutlne and 0110A2 02 LOOP I.DXii $02 double lefr shifr of E2-E3-80-81
0112 06 E r SI{FT ASLZ 9El
coMlnl'cates rtth other programs vta rnemory locstlone. Alt cpu .reglatctr 0114 26 E0 ROLZ $no
0116 26 E3 ROLZ $E3
are changed by thls routlne. tnput and output data are located as 0118 26 E2 ROLZ 982
0114 cA DEtr
f o llowe: 0118 D0 F5 BNER SHTT
011D06 E5 ASLZ $85 shift partlat result left
8 blt taput (high) 90080 011F 26 g+ ROLZ )e4
o 8 btt tnput (1ov) 9O0Sl 0121 E6 E5 INCZ $a: ehlft ln a one on tbe right
I 0123A5 E4 I.DAZ
N) 8 blt output (tnteger)
$84 make a eopy of shlfted partial rcrult
N 900E0 0125 85 E5 STAZ $uo
8 blt output (factlon) 90081 0127 A5 E5 I,DAZ $Es
oL29 85 E7 STAZ $87
otlter locatioue ueed are : $0082 - 900E8 0t2B 06 E7 ASLZ 987 sh i ft co p y o f p a r tl a l r e e u l t l e ft
0t2D 26 E6 ROLZ 986
012F 86 E7 INCZ $87 shlft ln 8 one on the right
0131 18 cLc subtract ehtfted partial result fron
0132 A5 E7 wAz $87 hlgh L6 of curreot renainder (by
0134 65 E3 ADCZ $nr adding conplernent)
0136 85 E7 STAZ $87
0138 A5 E6 IDAZ $so
013A 65 E2 ADCZ 9E2
013c 85 E6 STAZ $86
0138 90 0A BCCR NOGO te st 8 u b tr a cti o n r e su l t
0140 c6 E5 DECZ 985 tack a zrto onto complenented rerult
oL42 L5 E7 LDAZ $87 replace hlgh order 16 of current
0144 85 E3 STAZ $83 renainder wlth subtractlon rerult
0146 A5 E6 wAz $86
0148 85 E2 STAZ $az
0t4A c6 E8 NOGO DECZ cilnn decresent and test loop count
014c F0 03 BEQR DONE
0l4E 18 cIt Juop to loop
014F 90 Br BCCR LOOP
0151 A5 E4 DONE I-DAZ $E/t conpleloent result and store ln E0-81
0153 49 FF EORf $Fr
0155 85 E0 STAZ 9so
0157 A5 E5 I.DAZ $85
0159 49 FF 808# $rr
0t5B 85 El
ouD 60
8TAZ err
ft8 rcturn
BYTE Aprit l9??

EfffI Gses tCI rt F


r; tt
ll

[,il u
l;
+\
lj jtv-u;'(,
14.,ft |.q!
il il

Figure l: A generalblock Jim Butterfield


diagram of a simple lunar 14 ErooklynAv
NT, FUEL fander progrom. tt can be Toronro Ontariofol4M?XSCANADA
seen thot a tunar londer
program bosicolly breaks
dawn into o number of
There are quite a few lunar landingprc-
updating rautines. Thse
gramsavailablenowadays:some for pocket
updating routines ore con-
calculators,others using graphic displays.
tinuously repeated until
The one I wrote for my KlM.l, basedon the
the lunor lander has
ftfOSTechnology 65A2 microprocessor,illus-
reachedthe surface.
trates many of the techniques needed to
developthe program.
The KIM-I comes with a six digit LED
display, which can be accessedby the user.I
used ihe first fbur digits to representthe
craft's altitude, and optionally, the fuet
remaining.The last two digits, rvhich are
slightly separated from the rest of the
display, are used for rate of descent. Both
valueschangecontinuallyas the craft moves.
F;;,:E;;.,i;l
ois
The KIM-l keyboardis usedas rhe pilot's
iEu E R y I control panel. Thrusr is set by pressing
controls 1 to 9. A value of 1 is minimurn
thrust, and the craft's rate of descent will
increasedue to gravity. Nine is maximum
thrust, which slows the rate of descent
sharply. ln addition to power control. the
pilot can elect to view either current alri-
tude,. by pressingA, or remaining fuel, by
pressingF.

The Equationsof Motion


The craft, of course,movesin accordance
with the .forces acting upon it: thrust and
graVity'."A physics textbook shows some
rathe;"'forrmidableequations. However, they
cari"beboited down to rhe following simple
grocedure:

c-.23
Listing t: Atr example luns lander proqran writt€n for the Klfrt-l
micropracessar thot uses the flowchart af l'igure I ss s bsse" The input ond
Every0.01second, outpat o{ this pragram is handled by rautines thot src inherent to the KIM-l
add 0.01 of the accelerationto the systcm. The dota display is seenon the keypad ond LED dispfay of the KIM-I
veloe lty; assembly" This disploy continuously shows the rate of descent, und on
add 0-01 of the veiocity to the alti- tornman,l will display either the qmaufit of fuet left, ar the altitade of the
tude; croft. Keys I through 9 are used t# !ftput thrust commands, while key A
subtract0.01 of the thrust frorn the c*ssses the altitude disploy mode and the F hey choases the fuel disploy
fuel. tnsde. A!! the numbes in this listing arc in hexadecimal unles otherwise
stsfe#.
The accelerationis set equal io thrust minus
gravity, and gravity is set at the constant Addrcs 0p Optrad L.bcl Mnwmonie Gorm*tary
value 5.
The time period of S.01 s is arbitrary" $s$o A2 0e GO l-Dx sSC
*fi42 85 B8 LPl tSA trutT,x
Since KIM can op€rate in decimal mode, 0004 95 E2 5TA ALT,X init,sliee veldGs;
dividing by 100 becon'resan elementary 0s06 eA EEX
000? 'r0 ,
operation. Everything would work iust as Ftt 8FL LPT
00{rg A? 0s CALC LDX *SF X:*O5;
well if it were done in.any other srnalltime 0s0s 4,0 ol RECAL LSY.,*S1 Y:*Ol;
incrernent. $#dn F8 *gn ser d€cir:al ma&;
00$E '!E cr,g clear carry;
Figure 1 shows an elementary block 0fl0F 85 €2 DIGIT LDA AI.T"X l
diagram of tfie program" After setting rhe 00r1 75 E4 AFE ALT+?,X )' add each digir;
we settl€into three main
initial flight valuesu $sT3 95 €2 gTA ALT,X l

jobs: updating the flight, lighting the dis- 0s15 eA D€X I


ss'r6 8g 0€Y ) set up nert digit;
play, and detectinginput from the pilot" 00'!? 10 ro BP[-BISIT I

00rs 85 F6 LSA ALT+3.X


ffixg "!o a2 $FL INCR
Sctting lnitial Values EStS rqg 99 [-sA #sg
s01F ?5 E2 INCR ADS ALT,X
An interestingflight ean be obtained by s0?1 95 F", STA ALT,X
starting the lunar rnodule at a height of c023 cA D€X eounter:*counter - l;
0c?.4 x0 E5 EPL R€gI{L il counter pgitirr€ go ta
4,500 feet with 800 pounds of fuel. That's R€CAL;
rnore than rufficient fuel for a safe landing, ss?s ,q5 E2 LDA ALT elsc check it altiarde ir
but not enough to allow for prclonged $'6ititG;
G0?8 10 o8 8FL UF it altiwde positilr{ go to UP;
hovering so?A .49 oo I,.DA ffiO elr€ sltitude:*q);
It's not difficult to 5et all the inirial s02c A2 a2 LDX *S2 X:*O?
0$28 gs E2 DD STii.&Lf"X
values by programmingthern individually.
fi030 95 E8 STA TF|?,X l els* turn off$!gino;
Howerrer,a faster method is to set them all ss32 cA ogx II
togethe!' in rnemory and use a loop to 0fi33 10 FC Bp[ s&
initialize ali of them" Thls is what I did as **35 3S UP C€C 3et e8r{'y;
f;836 A5 €D
.l
shown in lisring on hexadecimallines 0000 smSs E5 EA
LSA FTJEL+z
sse TF{flLrsT tI uodoto fuel;
ro 0007. s$3.4 85 EO $!.A FU€L+2
0s3c A? ol LSX.#*1 $
ss3tr Es e8 LF2 L*A F{,I*L,X i
Updatingthe Flight s0,40 E9 o0 $80 **S I
fii84? 95 EB si'A F{J#L.X i check if fuel left;
Every0.0i s we must updaleour rateof s$li4 eA
'r0
il€x l

descent,altitude and fuel. As previously 0s45 F7 BPL LF? I


6Sd7 S0 0e geg TAr{K -if fuel left
9o to TAI$K;
indicated,we have tc add 0"01 of various 0{J49 A9 oo LS4 #0 I
valuesinto the totals.lVe can accornpllsh fls4B Alt 03 LSX *SS
004D 95 EA LP3 I9TA THSUST,X else turn off engine;
this quiteeasilyby usinga gimmick.lnstead 0s4F cA DEX I
of holdingthe allirude,for exarnple, in feet, 0050
s0$2
r0
?0
F8
AA OO
BPL O-F3
J5FI?HfiSET
I
'ea to THflSET;
let's ute two n'lore digits arid store it as o$gs A5 EE TANK LSA futI)OE A:*display rlrods;
multiplesof 0"{}.1feet"f,lowwe can add rhe $s6? n0 OA Si\{ES}'{GFL il rnode not 0O go to
rate of ascentdirectly into the six digit SFiSFL;
0c5g A5 €? tDA A{,'1"
number;and the divisionby 100 happens 01158 46 E3 LOX AL,T+i
AX :-locaticn of eltituda;
automatically,For dispiay purposcs,of 005n Fi) 08 sEs $'f" go to $T;
course,we drop the lastlwo digits,so that OfisF D0 06 stvtr $f
6061 F0 ,4€ LINK gg0 EALO
we'rebackto heightin fcet, Usingthes;rrne &s63 A5 EB SHOFL I"CIAFU€L A:*F[.i€L;
ga<
techniqueon the otherparameters, we find 00€s A6 tS X FU €t+ 1 X ;TFU E L+; l
that the updatingjoLi becomesrelatively ss6? sii F8 ST $TA POIru?H i
CI*69 8S FA sTX p8iiitTL I dlrrlovvaluce;
easy. s0s8 .A5 E5 . LSA X,1&L A:welocityslgn;
During the updaringtask,we must also s060 30 06 Bf,{i sffl /F{ if *ignn*grtlvc0o to DOWN;
ilSSF rx5 CD LFA 1l€€-+X A;./wlociry/;
detecI two specialconditions;touchdown 6)07! F0 07 E#fl FLY
and oul of fuai. T'hiss*effisfairly simnle ss?s o0 ne gfl,g€FLY I so te FLY:
&8?5 3g DOWN Sge b
0s7s A9 80 'r-p& #{ffi 1 vst@city:*Amto€ity/;
0*?s Hs c!' s8* vsL+x a

f-e 4
(0.01 of units, rcmember?)and to riegatelhe
ratc of dcsccnt.wherc'nccessaiy,so that it
Listing l, continued: showsas a positivenumbcr.

Address Op Operand Label Mnemonic Cornmlntary Detecting Input


007A 85 F9 FLY STA I NH Tl rr K IM-l moni to r subr out inet hat iight s
ooTc A9 02 LDA =O2 !
DEcK:=o2; lcounterl rhe display givesus a frec bonus: lt also tells
007E 85 E1 STA DECK l
o080 20 t F r F FLITE JSR SCANDS look for depressed key; us whcther or not a kcy ir dcpresscdcfl the
oo83 F0 06 8EO NO K E Y i f n o i n p u tg o r o N O K E Y : keyboard. To find out which key, we murt
oo85 20 6A tF JSR GETKEY elsego to GETKEY; cali another subroutine in the monitor pro-
0088 20 91 00 JSR DOKEY go to DOKEY;
oo88 c6 El NO KEY DEC DE C K DECK:-DECK-I: gram.
ooSD DO FI BNE F LITE i{ DECK not egualro 0 go to lf we discover thet the uscr has input a
FLITE;
008F FO DO BEO LI N K elrego to LINK; thrust command. buttons I to 9, we firsl
0091 c9 15 DO KEY CM P = 15 A:=fuel mode?; check to see that tlrc motor is on and that
0093 DO 03 BNE NAL T it not fuel mode go to we have fuel. Then we set the thrust, and
NALT;
(X)gs 85 EE STA MODE elseMODE:= fuel mode; also calculate the acceleration as thrust
0097 60 RTS return; rninus 5, where 5 repretents the force of
(X)98 C9 ro NALT CM P: 10 A:raltitude mcdre?; gravity.
oo9A DO o5 BNE NALz if not go ro NAL2;
o09c A9 o0 LDA =OO elsemode:=altitudemode: The two orher legal keys, A and F,set the
009e 85 EE STA MOOE MODE:-A; display mode to altitude or fuel. The pro-
00A o. 60 BET1 BTS return;
00Ar 10 FO NAL2 BPL RET1 return; fillegalmodel grarn sets a memory location whiEh will bc
OOA3 AA TAX €lseX:-A; testedby the displayroutine.
ooA4 A5 EA LDA THRUST A:-THRUST; The program doesn't need to worry about
00A6 FO F8 8EQ RET l if thru:t:=0 go ro RETl;
ooAS 86 €A STX THRUST elseTFIRUST:*X; vrhen a button is released. Although the
OOAA A5 EA THRSET LDATHRUST A:.THRUST; gucstion can be quite important foi' pro-
ooAc 38 sEc 3et carry; grams that must distinguish between, say, 9
OOAD E9 o5 SgC;{)5 THRUST:*THRUST- O5;
00AF 85 FO STA TH2+1 TH2+1:.THRUST; and99 on the input, lhe lunar landerdoesn't
0081 A9 00 LOA C)O I
really care. lf you leaveyour finger on the
0083 E9 00 sBcso I A:'00; butron, it will keep on setting the thru$r
00Bs 85 EE STA TH2 TH2:-OO;
0087 60 RTS raturn; over and over to the same value, without
0088 45 I NI T ) affecting the fligfit.
(n89 00 [inatiatheishrl
)
ooEA @ ,
ooBB
ooBc
99
8[)
I Coming Down
) [initial-soeedl
00BD 00 I The programdoesn'tstop. lf you run out
ooBE 99 I

00BF 98 | [initi"t acceleration] of fuel, you will wateh yourself freefall to


00c! 02 iinitial thrustl the surface.When you land,with or without
00c1 08 ) fuel, your rate of descentfreezes50 that you
ooc2 00 ) [initial fuell
ooc3 00 I can seehow hard you landed.
00qr 00 tmoacl It would be easy to have the display
change after you land, to show words such
as " S A FE " or " D E A D. " The KI M - I dispiay
untif we realizethat both the altitudeand is segment driven so that you can easily
the fuel gaugewill probablygo right pastthe producespecialcombinations.
zero mark,jumpingdirectlyfrom a positive The novice astronautwho would like to
to a negativevalue;so a zero test is out. 'try his or her hand at flying this, or other,
Instead, we take action the instant the craft should keep the following rules in
number goesnegative,restoringit to zero mind:
and then taking whateverother action is
1. Always conservefuel at the beginning
calledfor.
by reducingpower to minimum tl:rust-
2. Don't let your rate of descent get
Lightingthe Display excessivelyhigh;with my piogram' it's
The display is quite straightforward;in wise to steady up with a thrust value
fact, the KIM-I monitor program has a of 5 when your speedgetsover 90 feet
subroutine to do thejob. per second.
Depending on the displaymodeflag,all 3. As you get to lower altitudes' try to
we needto do is to movealtitudeor fuelto balanceyour altitudeagainstyour rate
the display area, togetherwith rate of of descent. At 1000 feet, a rate of
per second will
dcscent.Then we call the slbi2rllins 1t ' descent of 500 feet
transferit to the LEDs. bring you down in 20 seconds,whiclt
Of course,we mustremember to drop the is reasonable. KeeP that sort of
last two digits from the displayedvalues balance.r

c-25
HORSERACE K I M-1 Us e r No t e s v 1 # 3
Ch a rle s K . Eaton
1 9 6 0 6 G a ry Ave.
Sunnyvale, CA 94086

E ight 1ap hor s e ra e e a n d y o u e a n b e t h e jo c k e y and

whip your horse to g o f a s t e r. Warni.ng--whip the horse

too much and he probably poops o u t .

Horse Track Wh ip p in g b u t to n

Prince Charming top PC


Colorado Cowboy mid d le c
Irish Rai-r bottom 4

S tart program at A2 7 F . B a c e is e ig h t la p s .

HORSE RACE

00 01 02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F

0270 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D8
0280 A2 L3 B D 7C 07 9 5 7 C CA 10 F8 A9 7F 8D 41 t7 A0
0290 00 A 2 0g 89 7c 00 84 FC 20 4E lF C8 C0 05 90 F3
0240 20 5D 1F A5 8F Et A2 03 CA 3A DE D6 86 D0 F9
0280 85 99 A 4 99 86 '803 8 9 9 0 03 35 7C EA EA EA EA EA
02cg 95 7C E 8 96 8l 89 90 03 49 FF 15 7C 95 7C E0 05
02D0 50 t8 D0 0b A5 8F F0 28 D0 30 A2 02 l8 85 83 E9
02E 0 06 95 83 CA 10 F6 A2 06 85 7C 95 76 A9 80 95 7C
OTFO CA DO F5 EA EA EA EA EA EA EA EA EA EA EA EA EA
OS OO C6 8F DO 06 45 8T 09 05 85 81 EA EA EA EA EA EA
0110 89 89 00 F0 0B 20 68 03 29 tC D0 18 99 89 00 EA
g32A 20 68 03 29 t8 85 94 89 8C 00 30 0B 29 t8 C5 9A
0330 B0 05 A 9 FF 99 86 00 2A 5D 1F A0 FF 46 99 3D 93
05+0 03 F0 0i 88 98 55 89 85 9A EA EA 2D 68 0t 38 29
O55O 01 65 9A 18 A6 99 75 8C EA EA EA EA EA EA EA EA
0160 95 8c 95 86 4c A9 02 t8 18 A5 92 65 95 65 96 85
0370 91 A 2 04 85 91 9 5 9 2 CA 10 F9 50 80 80 80 80 80
0580 80 80 80 FF FF FF 80 80 80 00 00 00 80 80 80 08
0t90 FE B F F7 01 0i 04

c-26
ONE.ARMEDBANDI,T J. Butterfleld Start progrsm er $0200
ToronSo Press any key t o s p i n w h e e l s
0200 A9 25 co rDA# $25
0202 85 05 STAa Al'ff
0204 20 BA 02 JSRG CVA}ff CHANGETO DISP
0207 A9 00 LDA# $0O
0209 85 06 STAz ARRCI,J
: HAII.I DISPLAY LooP ; A !{INI PAY AI'toUM. TN :T
0208 20 8D 02 LPl JSRG NISPLY 0258 86 07 , lfrp"aX SUBII0UTINfl
FAY STXz RWD
020s D0 FB EIIEr LPI 0260 A9 B0 ;
PAx rrA# $80 0288 A5 06 DISPIJ LoXz AARsd
021.0E6 09 ROIL lNCz TLI},IBLE 0?62 B5 08 STAZ STALLI
0212 20 8D 02 JSRG DISPIAY 028f 1$ 02 BPLr INB1S
0?64 20 8t] c2 T,P9 JSR@ DISPIY 029!, F6 02
02tr5 F0 r'9 BEqr I{OLL OVfiR lttCzx WINDtlir+?.
c267 c6 08 DgCz STALLtr,
02],7 A9 03 LDAII 0293 CA INB15 DAX
$03 0269 s0 F9 BNEU tl'9 0294 l0 Fb
0219 8 s 0 6 STAa .qRRCt"t BPLr OVEa_
0?68 c6 0.r DECg RIJD s296 i.9 7F
0218 F8 SED LDA# $7F
0268 FO 9C EDQr Lpl 0298 &D 4l J.? pr.DD
0?1C38 sEC $TA0
026F 18 cLc 0298 A0 CB gilB
021DA5 05 LDAz AMI r.Drdi
0270 F8 SED O29D A2 At+
02tF E9 0t SBC# $01. - LIX/I ${)rr
CHAR.6E A BTJCK s27t A5 Crs LDAz AMT 0291' 85 00 LITE
0221 8 5 0 5 ,iTAz At-fT LDAzx it')tirx$
0?73 $9 0i , Alcf $01 02Al 8{ /+? l?
02?3 20 BA 0? s't'\ig SBri
-TSRG C'VAHT 0275 s0 94 BCgr Lpi- 02A4 BD 40 1? s?AG SAt
0226 26 09 ROLZ TL&$TJ8 02?7 B5 05 STAZ Alff
0223 20 8D 02 LP2 JSFLG DISPLY O2A7 D8 CLD
02?9-20B A 02 JSRG CVA.}ffi O2A8 49 7F
0??Bc6 08 OECz STALLI ilAIT 02?c Ds S2 T"DA# 9?r
022DD0 19 B}q$r PAX 02AA E9 0t ztrP stsrii
Bi{Er l,Pz $01
02?F A{i 06 : WllEEl-$ NOf .d]^,t$Al4E " enEffK FOFir3lti,i,t $iIS 02AC F0 ir{l
Lily;n An-R.CSf 4?T,Fifi: $l] Bttpjr. i:i}}
i{0i'l,tT Lc$# $*3 02Ai; 8* 42 L?
0?3t. 15 09 IDAZ TI,JlIEL4 il?fl,j CP 4d,
s?,a/i Siii-..
s233 :,9 $6 CltPi? $45 CEERRY 02Bi Cg ItL1:
tu\D# *36 O?S? F$ DA sEqr FAy O2B? CE
03:i5 fi9 4ii $R.e.{l $40 ,cF.!-L\}
rtil$rJL'i &3,i!4 1{! 8D u; II.iY
L#li JSRG nlsFr."f 0283 CA
0237 95 01 STAZ:- irilr.ilst=-1..1 ?i3 FegFi,p^'i +3Ei ,;J 0S onx
LDAa Slfi' 028{,. 1S g;{,
c?39 45 09 [.SBa ?]ttl'i&LE {r?89 s0 {i0 Fpt r' 1"llt.t
bt{Er t,tri" 0286 2S 40 lF"
0?3s 45 09 L$Ra ?UMBLS t2sil $Ll F? JS!{r-g fr-hrijt:-li
EEtlu ItJ$. O2I]9 6G
0l3D C5 06 , EEC3 4,RRC+i RT$
O??FDOE7 $Nnr LPz I
; S?.L i*llin$L5 *q'IOPPSD- Cei;l?LrygpAy0?t : At'tflUNT C8trVtii{il iCH
0241 A5 04 L0eu ilINDoJ+q
0243 c5 03 {:t'tPe }III.ID@{+3 02BAt5 05 iueo*r I.DAz A|$
0245 DC 37 8)inr NOMAT 02BC29 0F .A,ND/i $0F
0247 C5 02 CtlPz SLND{nf+g 0?8s &{ TAX
0249 D0 33 ENEr NOitfAt OzBFBD E7 },F Illd0x TAt]1.8
o24B A2 10 rDx+ $10 02c2 85 00 STAa tlINDS,.;
024D C9 4C cr'tr# $40 gr5 rp 3 $Aes 02c4 45 05 !,DAz AKI'
024F F0 0D BEqr pAy 02C6 /rA i,$Ra
0?5t A2 0B ilJlx* $08
02c7 44 I^SRe
0253 c9 42 cliP# 02c8 4A LSR4
$42 $10 rF 3 uPs
0255 F0 C7 DEQT PAY 02c9 4A LSRa
0257 A2 06 rsx# $06 O2CAAA TAX
a?59 c9 44 cllP* O?CBBD E7 l"F I^DA{9x TABLI
$44 $5 rF 3 D&'NS
0258 F0 01 BEQT PAY
02c0,s5 01 STAz rriINDCfi+l
025D CA DEI( 02D060 &TS
KIM-I User Notes v1{f4
Stan Ockers
Jim Butterfield
KIMMAZE

Find your way out of the maze. Yourre the fl-ashing f.ight in the
center of the display. As you move up (key 9), dorm (key 1), left
(key 4), or right (key 6), KIM wiLl keep you in the central display;
you'11 see the walls of the maae moving by as you travel.. Like walking
through a real- maze, yourLl only see a smalt part of the maze as you
pass through it. If you can get out, your 11 find yourself in a large
open area; that means youfve won.
Program starts at address 0200.

O2OODB START CI,D


OaOLL2 OZ LDX{f 2 3 values
0203 BD 85 02 SETUP LDA@x INIT from init
0206 95 D2 STAzx |"LZPT. , . to maze ptr
O2O3 CA DEX
0209 10 rB BPLr SEfitP
;--pick out specifLc part of maze
O2OBAO OB MAP lDYii 1.1
020D B1 D2 GEXI,IOR r.DAiy YEPT 6 rows X 2
O2W 99 D8 00 sTAay WORK
o2l2 88 DSY
0213 10 FB BPLr GEAnOR
;--shift to position vertically
O2L5 A2 0A T-DXlt 10 for each of 6 ro'ws, .
O2L7 A4 D4 NXDIG LDYz POSIT shtft Y positions
0219 A9 FF I,DA{i $ff filling with rwalls'
0218 38 REROL S0C ..on both sides
Ozl.C 36 D9 ROLzx I{ORK+i.
02LE 36 D8 ROLzx WORK ro11 'em
O22O 2A ROLa
O22L 88 DEY
0222 DA E7 BNEr REROL
;--calculate segments
0224 29 07 AbIrHi 7 take 3 birs
0226 A8 TAY & change to
0227 89 A0 02 LDAGy T48L segnent pattern
022A 95 DB STAzx WORK ,.and store
O22C CA DE'X
022D CA DD(
O22E LO E7 BPLr }IXDIG
;--test f!"asher
0230 C6 D5 LIGHT DECz PLUG time out?
0232 L0 0A BPLr MUG ,.no
0234 Ag 05 LDA{I 5 . ,!e8 e reset
0236 85 D5 STAz PLUG
0233 A5 DE LDAz WORK{6 ..and..
023h49 40 EOtVl $40 .,fLLp.,
023C85 DE STAz WORK{6 . ,. flasher..

c-28
;--light display
023E'A9 7F MUG LDA/f $Zr open the gare
0240 8D 41 17 STA@ SADD
0243 A0 09 r.DYlt $Og
o245 A2 OA LDXit 10
o247 85 DB SHOI,{ LDAzx I,JORK tiptoe thru. .
o249 8D 40 17 STAG SAD . . the seguenrs
024c 8C 42 L7 STY@ SBD
o24F c6 D6 STL DECz STALL ...pausing
o25L DO FC BN T ST1
0253 CB INY
0254 CB INY
0255 CA DEX
0256 CA DEX
0257 10 EE BPLr SHCff
;--test new key depression
0259 20 40 lF JSRG KEYIN ser dir reg
o25C 20 6A ].F JSRG GETKEY key?
o25F c5 D7 CMPz SOK ,.same as l"ast?
026L FO CD BEQT LIGHT
0263 85 D7 STAz SOK no, record it
;--test which key
02.65A ? a4 LDX/I 4 5 items in tahle
0267 DD A 8 02 SCAN CMFGx TAB2
026A F0 05 BEQr FOIIND
026CCA DEX
o26D LO F8 BPLT SCAN
026F 30 BC BMIT LIGHT
027L CA FOI]ND DD(
0272 30 BMIr START go key?
;--test if wall
0274 BC AD o2 LDY@x TAB3
0277 B 9 DB 00 tDAGy WORK
O27A3D BL o2 AND@x TAB4
027DD0 81 BNET LIGIIT
; --move
o27F CA DEX
0280 10 04 BPLT NOTUP
0282 C6 D4 DECz POSIT upr4Tardmove
0284 D0 85 MLINK BNEr MAP l-o-n-g branch!
0286 D0 04 NOTUP BNEr SIDEI^IY
0288 E6 D4 INCz POSIT dormward move
028A D0 F8 BMT MLINK
028C CA SIDEWY DEX
02BDD0 06 BMT LEFT
o28F c6 D2 DECz MZPT right move
029L C6 D2 DECz MZPT
0293 D0 EF BN T MLINK
0295 E6 D2 LEFT INCz WW left nove
0297 E6 D2 INCz NIZPT
0299 DO E9 BN T MLINK

;--tabL e s (h e x L is t e d )
TAB1 O2AO 00 08 40 48 01 09 4L 49
TAB2 O2A8 13 09 01 06 04
TAB3 O2AD 06 06 04 08
TAB4 O2BL 0r. 08 40 40

c- 29
;--sampLe maze follolrs
;--first 3 bytes are initial cursor pointer
INIT O2B5 84 02 08
MAZE O2B8 FF FF 04 08 F5 7E 15 OO 41 FE 5F 04
51 7D 5D 04 51 86 54 L4 F7 D5 04 54
7F 5E 01 00 FD FF 00 00 00 00 00 00
00 00 00 00 00 00

Maze construction: every two bytes, starting at MITZE,represents a


complete cross section of the mazei a one bit in any position represents
a wa11.
In the example above, the first cross sectioa is FF FF (a11 one
bits) - this would be an inpassable section of watL. The next cross
section (04 03) has only rwo pieces of waL1 in it, at positions 6 and
13. The zeros at the end represent the topen spacet.

c-30
MUS IC MACHINE F. J. Butterfield
Descr iptio n Toronto

T his p rog ran pla y s one or s ev er al t unes v i a t h e r A u d i o O u t r T h e p r o g r a n ca n b e e a si l y co n ve r te d to a su b r o u ti n e by


int etface o f KIM - 1. Us e t he s ane c onne c t i o n as that for replacing t h e BR K i n str u cti o n w i th R TS. Th i s a l l o w s th e
rocor din g o n ca s s et t e t ape. I f y our t a p e r e c o r d e r has a prograaner t o p l a y va r i o u s r p h r a se sr o f m u si c to p r o d u ce
t nonito rt fe atu re, I ou c an lis t en to the tune as well as quite c o n p l e x tu n e s.
recor d it. Alte r nat iv ely , an anplif ier can be used to play
t hs tun e thro ug h a s peak er . T h o l o w e s t n o te yo u ca n p l a y i s A b e l o s n i d d l e C. Yo u ca n
p l s y s h o r t n o tcs a n d l o n g n o te s ( a l o n g n o te i s tw i ce a s
How to Run l o n g a s a s h o r t n o te ) . If yo u n a n t to str e tch o u t a n o te
e v c n l o n g e r th a n a l o n g n o te a 1 1 o w s, p u t a r p a u se t n o te
Load th e pro gra m. Load t he t une( s ) f r om c a s s e t t e or from it. So n e o f th e n o te s a xe a s fo l l o w s:
after
t he ke yb oa rd. T unes s t ar t at loc at ion$00 0 0 . Be sure to
st ore the valu e $FA at t he end of eac h t u n e , and behind the N o te Sh o r t Long
last tu ne , store : $FF, $00. Sinc e t his progran uses the A --- F9
-- 79 - -----
B reak instruction t o t r ans f er c ont r ol back to the nonitor Af 72 F2
after ea ch tu ne is play ed, I ou nus t s et u p t h e s o f t w a r e B ----- 6C ------ EC
int errup t vector by s t ox ing 900 in g17F E , a n d g l C i n g 1 7 F F . niddle C 66 E6
c# - - - - - 60 ------ E0
T he startin g ad dr es s f or t he pr ogaan is 90200. To play the D 5 AD A
next tun e, p ress G 0. D#--- D6
-- 56 ------
E 51 Dl
How to Write yo ur own Tune F ---- 4C ------ CC
) 48 c8
E ach n ote go es i nt o a by t e of s t or age, starting at location 44 c4
J
------
$0000 of me rno ry. Eac h t une s hould end w i t h t h e value $FA 40 c0
which sto ps th e pr ogr am unt il G O is pr e s s e d . 3D ------ BD
39 B9
S pec ial co de s a r e inc or por at ed in t he p ! o g r a m t o a 1 l o w 36 ------ B6
cert ain e ffects - adjus t nent of s peed, t o n e , etc. The codes 33 B3
arc follo weil b y a v alue whic h s et s t he p a r t i c u l a r effect. 30 ------ BO
T he cod es a re list ed below: 2D AD
28 ------ A8
Cod e E f f ec t I - nit ially Exanpl.es- 26 A6
00 ------ 80
FB sets s p6ed of t une $30 18 is quick;60 is slow
FC sets lengt h of $0? 2 neans tlongrnote lasts
rlongr not es twice as longras I short I Sanple Tgnqq
FD se t s pit c h $01 2 is bass; 4 is deep bass
FE sets ins t r ur nent $FF FF is piano, 00 is clarinet 0000 FB 18 FE FF 44 51 E6 E6 66 5A sl 4C C4 C4 C4 Dl
FF sets addTes s f or $00 00 will take you back to 0 010 BD BD BD O O 44 BD 00 44 3D 36 33 2D A8 80 80 33
tu ne first tune; like a tjunpt 0020 14 B5 B0 80 44 51 c4 80 80 5A 51 E6 EO 80 FA FE
00 30 00 FB 28 SA 5A 51 48 5A 48 Dl 5A 5A 51 48 DA EO
F or e xa mple , a t any t ine dur ing a t une, you nay insert the 0040 5A 5A st 48 44 48 5l sA 60 7e 6C 60 DA DA FA FE
seque nce $ FB $1 8 and t he t une will begi n t o p l a y a t a f a s t 0050 iF 5A 5A 5A 5A 5A JA 66 72 79 E6 E6 80 00 s6 s6
speed . Insertin g $FF $45 will c aus e a s w i t c h to the tune at 0060 56 56 56 56 5A 66 tt 80 80 4C 48 4C 4C 4C 4C 56
zero p ag e a dd ress $0045. The init ial values shown can be 00 70 5A 56 4C 00 C4 44 4 C 56 5A 5A s6 5A 66 56 5A 66
reset a t an y tim e by s t ar t ing at addr es s $ 0 2 0 0 . 0080 80 FE 00 00 72 5 A cc 72 5A cc 72 5L cc 80 BB
0090 80 4C 56 5A s6 5A E6 F2 80 FA FF O O
N o tu ne sh ou ld ex t c nd bc y ond addr es s $00DF, rlnce prog!an
valuc s arc store d at $00E0 and up.
HUSIC M A CHI NE
F. J. B utterfi el d
; lnit ializ c Toront o
t
0200 A2 05 S T AR T !D X# $os 0252 A6 EA [D Xf vAtl
0202 BD 86 02 LP I L D A@ X I NI T 0254 A9 27 L D A# $27
0205 9s E0 S T AZ X W O RK 02s6 20 5D vz JSR O SOU N D
0207 cA DEX 02s9 30 AF BM IR GO
0208 l0 F8 B PL R LPI 0258 10 E2 BPL R H U SH
,
, n a i n ro u ti n e h e re - W OR Knot resot
; s u br o u ti n e to se n d a b i t
t
020A A9 BF GO tD A# $BF
t

0 2 0 c 8D 025D A 4 E 2 S O U ND L D YZ WOR K+2 o cta ve fl e g


43 L7 ST A E PBDD open o u t p u t c h a n n e l 025F 84 E B
020F A0 00 STYZ TIM ER
L D Y# $00 0261 86 EIJ .
0211 B1 E4 L D AIY W O RK+ 4 ge t n e x t n o t e
sTxz xsAv
0 2 1 3 E6 E4 IN C Z
0263 E 0 00 s lo oP c P x # $ o o
W O RK+ 4 0265 D 0 08
0215 C9 FA BN ER C ON T
C MP # $FA t os t for halt 0267 A6 EC
0217 D0 04 L D XZ ISAV
BN ER NEXT 0259 C 6 E I D EC Z TIXER ,
,0219 00 BRK ( or R T S i f u s o d a s s u b r o u t i n o ) 0e6B D 0 F6 B}IER SLOOP
I 0e1A EA N OP 026D F0 16 tEq R g Er
I 0 2 rD F0 ED B EQR G0 los une w h e n G 0 p r e s s e d 026F 8D 42 L7 C O I {T STAO
j0 2 1 0 s 0 0B NEX T BCCR SBD
NoTE is it a n o t e ? 4272 C A D8X
O O2 1 F E9 FB s Bc# $FB if not, d e c o d e i n s t r u c t i o n 0273 C 6 E 8 D EC Z L IM IT+2
, 1.oI z z r r n T AX and pu t i n t o X 0275 D 0 IL . BN ER SL OOP
t I o z2 2 81 E4 L D AIY W O RK+ 4 ge t p a r a n e t e r 0277 C 6 E 7 D EC Z L IM IT+1
;0 2 2 4 E6 E4 IN C Z W O RK+ 4 an d 0279 D 0 E 8 BN ER SL OOP
10 2 2 6 es Eo ST A Z X W O RK store in work table 0278 FN
LD'TZ WORK
, t0 2 2 8 B0 E0 B CSR GO 027D ^4
J un p t o G 0 84 STYZ L IM IT+ 1
027F C 6 E 6 D EC Z L IM IT
! , "t up t inlng f or not e 028r D 0 E O BN ER SL OOP
0283 A 9 F F LDA# $rr
022A A6 E0 NOTE LDXZ W O RK t ining 0285 60
a22C 86 E7 SEX RTS
STXZ LI M I T+ l
022E A6 El LDXZ W O RK+ I lon g n o t e f a c t o !
0230 A8 ; i n i ti a l co n sta o ts
TAY t es t aicuraulator
o23L 30 02 - BM I R O VER long n o t e ? 0286 30
t

0233 A2 01 LDX# $O f nope, g e t s h o r t n o t e 0287


- 02
0235 86 E6 0 VER STXZ LI M I T stoie length 0288
factor 01
o 2 s7 2 9 7F $z r r enov € s h o r t / t o n g 0289
1I 9t ftag FF
0 2 3 9 '85 E9 STAZ VALz 026A 00
0 2 3 8 F0 02 BEQ R HUSH is it a p a u s e ? 0288 00
023D 85 EA STAZ VALI no, s e t p i t c h
023F As E9 i
HU SH LDAZ VAt 2 get t ir n i n g a n d
024L 25 Es I work areas r e se r ve d
ANDZ W O RK+ 5 by p a s s i f n u t , e d
0243 F0 04 BEQ R ON 00E 0 *e*
0245 E6 lfORK +6 sp e e d /l e n g th r a ti o /o cta ve /to n e
EA I NCZ VALl els e f a d e t h e 0 0E 6 * =*
LIMIT +3 ti n i n g o f n o te
_ 0 2 4 7 C6 E9 DECZ VALZ not e 0 0E 9 * =*
VALZ *1 n a r ki n g a n d sp a ci n g
0249 A6 E9 ON LDX# V AL2 OOE A * =*
VAtl +1 d u r a ti o n s
0248 A9 47 LDA# $A7 OOE B * =*
TIMER rl o cta ve co u n te r
0 2 4 D 20 5D 02 J SRO SO UND 00E c rrr
XSAV tl
0250 30 88 BM I N, GO
Klm- 1 Us er Notes v. 1 #2

EUNT THE WUMPUS

Game by Gregory Yob S tan Ockers


Ad apt ed f or t h e KIM-1 b y S ta n O c k e rs R .R . #4 B ox 209
tockport, I11 6044L
I first ran across the 1WMPUSin TI{E BEST OF CREATIVE
COMPUTING_ where it is programmed in ba@is CAVE ITAP
EAGI on- t his pr o g ra m w i tn m o d i f i c a ti o n s so I coul d f i t i he
progratn and messages in the KIM-1 memory. The messages appear
o n the dis play i.n s c a n n j .n g fo rm rv i th " s o rt-of" al phanumeri c
l e tte rs .

l i v e s l n a c a v e o f 1 6 rooms (l abel ed p - f).


T he I I I I I M P U S
Ea ch r oom has f ou r tu n n e l s l e a d i n g to o ther rooms (see the
n ra p b elow) . W he n th e p ro g ra m i s s ta rte d , you and the
WU UP US ar e p! - ac e d a t ra n d o m. AIs o p l a c ed at random are tw o
b o tto mles s pit s (th e y d o n rt b o th e r tb e W U MP U She , has sucker-
O , typ e f eet ) and t w o ro o ms w i th S U p E R B ATS ,(a1so no troubl e to
. 1. ,WUMP US ,he' s t oo h e a v y ). If y o u e n te r a room w i th a pi t, you
)l fa l l in and los e. If y o u e n te r a BA T ' S room you are pi cked
u p a nd f lown at ra n d o m to a n o th e r ro o m. Y ou w i l l be w arned
wh e n B A T S , P I T S , o r th e WU M PU S a re n e a r by. If you enter the
ro o m wit h \ r y I t M PU S, h e w a k e s a n d e i th e r m oves to an adj acent
ro o & or J us t eat s y o u u p (y o u l o s e ). In order to capture the
1YUMPUS and wln, you must use "MOODCIIANGE"gas. When thrown
l n to a r oom c ont a l n i n g th e IYU I,{ PU S, th e gas causes hi m to turn
fro m a v ic ious s n a rl i n g b e a s t i n to a meek and l oveabl e creature.
Ee w ill ev en c on e o u t a n d g i v e y o u a h u g. B ew are though, you
have only three cans of gas and once you toss a can of gas j,rti)
a room it is contaminated and you cannot enter or you wil-1 be
tu rn ed lnt o beas t (y o u l o s e ) !

T he pr ogr ar n s ta rts a t $ 0 3 0 0 . If you l ose and w ant every-


th i n g t o r em aln th e s a m e , (e x c e p t th e rocm you are i n), resart
a t $ 0316. Us e tb e re s e t k e y to s to p th e program because about
h a l "f of page one l s u s e d a n d i f y o u j u st use the S T key the
sta ck wlLl ev entu a l l y w o rk i ts w a y d o w n i nto the progri l n. The
'b yte at $0229 c o n tro l s th e s p e e d o f th e di spl a;r. Once you get
u se d t o t he c hara c te rs y o u c a n s p e e d th i ngs up by putti ng i n a
lower number. The message normally given te1ls you what roon
yo u ar e ln and w h a t th e c h o i c e s a re fo r the next roorn. In order
ts flr e t he m oo d g a s , p re s s PC (p i tc h c an) w hen tbe rooms to be
se l e ct ed ar e df s p l " a y e d . T h e n i n d i c a te the room l nto w hl ch you
wa n t t o pit c h t h e c a n . It ta k e s a fre sh can of gas to get tbe
WUMPUS(he may move into a room already gassed). COODHUNTING:
APPENDIXD,

KIM DEMONSTRATION
TAPE
KII{. 1 DEMONSTMTIONTAPE

Index ID'/l Name Entry Point Address Range

01 DIRECTORY $1780 $1780-$17AF

02 VU TAPE $0000 $0000-$oo4e

03 SITPERTAPE (3X speed) $0100 $oloo-$01c2

04 MOVEA BLOCK $1780 $1780-$17cB

05 HmEC $o2oo $o2oo-$0244

06 ADC DEMONSTRATION
- BINARY $oooo $oooo-$ooA4
- BCD $0020

07 FREQUENCYCOLNTER $0000 $0000-$0067

08 TAPE DIIPE $1780 $ 1 7 8 0 -$ 1 7 A e

09 REAL TIME CLOCK $0370 $0370-$o4oo

OA STOP WATCH $o3oo $o3oo-$0386

10 LI'NAR I.AI{DER $oooo $oooo-$ooc6


11 TIORSERACE $027F $027r-$0396

L2 ONE ARMEDBANDIT $0200 $ 0 2 0 0 -$0 2 D 1

13 KIMAZE $0200 $0200-$0210

T4 MUSIC MACHINE $o2oo $oooo-$028c


15 IIT'NI THE WIffPUS $0300 $0000-$0400

Notes:
Supertape is set for 3X speed. To obtain the 6X speed change
location $Ofnr to $02 and $01C0 to $03.

l.love A Block uses data stored in memory as follows:


$OOro SAL old $0081 SAH old
$OOrZ EAL old $0083 EAH old
$0084 SAL new $0OnS SAL new

Frequency Counter: Connect IRQ to PB7. Signal input is PB0.

Mrslc lGchine: Be sure to set up the BRK vector by stortng


$00 ln $17rE and $lC ln $17FF.

Real Tlne Clock: Connect NMI to PB7, Btore $A5 ln $17FA and
$03 in $17F8. Restart display program at $0379. Iteas rtlr'
to return to the KIM monltor.

D-1
DI RE CTORY

0 0 0 1 0 2 0t 04 05 06 07 08 09 0A 0B 0c 0D 0E 0 F
1780 D8 A 9 07 8D 4 2 L 7 2 A 4 1 1 A 4 6 F 9 0 5 F 9 8 5 F 9 C 9
1790 16 D0 F3 20 2 4 1 A C6 F 9 1 0 F 5 C9 2 A DO F l A 2 F D
l7A 0 20 F3 19 95 F C E 8 3 0 F 8 2 0 L F lF DO D5 F O F 9

V U TA P E

0 0 0 1 a 2 0 5 04 05 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0F

0000 D8 A9 7F 8D 41 L7 A9 L3 8 5 E 0 8 D 4 2 1 7 2 A 4 1 1A
0010 46 F9 05 F9 85 F9 8D 40 t 7 c 9 1 6 D0 E 9 2 0 2 4 1 A
0 0 2 0 c9 2A DO F5 A9 00 8D Eg 17 20 2 4 L A ' 2 0 0 0 1 A D 0
0050 D5 46 EO E8 E8 E0 15 D0 02 A2 0 9 8 6 E 0 8 E 4 2 L 7
0 0 +0 A A BD E7 lF 8D 40 17 D0 DB

S UP E R TA P E ('X )

00 01 02 05 0 r+ 0 5 06 07 08 09 O A O B O C O D O E OF

0 1 00 4 9 A D 8 D E C L7 20 32 19 A9 27 8 5 El A9 BF 8D 43
0 rl 0 1 7 A 2 6 4 A 9 16 20 61 01 A9 2A 2 A 88 01 AD F9 L7
0 1 2 0 2 0 7 0 0 1 A D F5 L7 2A 6D 01 AD F 6 L7 20 6D 01 20
0 r r 0 E c t7 2 0 6 D 01 20 EA 19 AD ED 1 7 CD F7 L7 AD EE
0140 L7 E D F 8 T 7 90 E9 A9 2F 20 88 0 1 AD E7 L7 20 70
0150 01 A D E 8 L 7 20 70 01 A2 02 49 0 4 20 61 01 4C 5C
0160 18 8 6 E 0 4 8 20 88 0r . 58 c5 E0 D0 F7 60 20 4c 19
9170 48 4A 4A 4A 4A 20 7D 01 68 2A 7 D 01 60 29 0F C9
0 r80 0A 1 8 3 0 0 2 69 A7 69 30 A0 08 8 4 E2 A0 a2 84 Et
0190 B E B E 0 1 4 8 2C 47 L7 r 0 FB 89 B F 01. 8D 44 L7 A5
01A 0 E 1 +9 8 0 8 D 42 L7 85 El CA DO E 9 58 C6 E1 F0 05
0180 30 0 7 4 A 9 0 DB AO 00 F0 D7 C6 E 2 DO CF 60 04 c3
0 1c0 06 7 E

MOV EA B LOCK

00 01 02 0l 0 4 0 5 06 07 08 09 0A 0B 0c 0D 0E 0F

t7 8 0 58 A5 E4 E5 E0 85 E6 45 E5 E5 El 85 E7 90 18 38
1790 A5 E2 E5 EO A8 84 E8 E6 E8 B1 EO 91 E4 88 D0 F9
17A0 BI E0 91 E4 88 30 1 t + l8 A 5 E 2 E5 EO 85 E8 E6 E8
1780 A0 00 B1 E0 91 E4 c 8 c 4 E 8 DO F7 18 45 E2 65 E5
L7C0 85 E2 A5 E3 65 E7 85 E3 4C 4F lC

HEDEC

0 0 0 1 0 2 0 t 04 05 06 07 08 09 0A 0B 0c 0D OE OF

0200 F8 9 8 4 8 8 A q8 A9 00 A2 06 95 DF CA D0 FB E6 E5
02r0 45 E 7 4 8 A 0 08 68 4A 48 90 0c A2 0t 18 85 E2 75
0220 DF 9 5 D F C A D0 F7 A2 A3 18 85 E2 7' E2 95 E2 CA
02ta D 0 F 7 8 8 D 0 E0 68 A5 E5 D0 04 A5 E5 D0 Dt+ 68 AA
02q0 6B A 8 D 8 6 0
D- 2
ADC DEMONSTRATION

0 0 0 1 0 2 03 04 05 06 07 08 09 0A 0B 0c 0D 0 E 0F
0000 A9 FF 8D 01 17 AD 03 77 29 EF 8D 03 L7 20 80 00
0010 85 F9 20 1F 1F 4C 0D 00 00 00 00 00 00 00 00 00
0020 Ag FF 8D 01 17 AD 03 L7 29 EF 8D 03 t7 20 80 00
00 t0 85 E7 A2 00 86 E6 20 00 02 46 El 86 FB A6 E2 86
0040 FA A2 00 86 F9 2A 1F 1F 4C 2D 00 00 00 00 00 00
0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0080 A9 80 85 EE A9 00 18 65 EE 8D 00 t7 AD 02 17 29
0090 10 DO 09 AD 00 17 38 E5 EE 4C 9F 00 AD 00 17 46
OOA O EE 90 E3 60

FRE QUE NCY


COU NT E R

0 0 0 1 0 2 0t 04 05 05 07 08 09 O A O B O C O D O E O F

0000 A9 01 85 65 F8 A9 36 8D FE t7 A9 OO 8D FF L7 58
0010 00 EA AD 02 L7 29 01 D0 F9 AD 02 L7 29 01 FO F9
0020 18 A9 01 65 F9 85 F9 49 00 65 FA 85 FA A9 00 65
00t0 FB 85 FB t+C L2 00 +8 A9 90 8D 04 L7 2C 07 L7 10
OO4O FB A9 F4 8D 0F t7 c6 65 F0 02 58 40 A9 FF 85 65
0050 20 lF lF C6 6 6 D0 F9 A9 00 85 F9 85 FA 85 FB A9
0060 05 85 55 68 40 03 00

TA P E DUP E

00 01 02 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F

1780 A 9 27 A 2 3 F 8 E 4 3 L 7 A 2 a 7 8E 42 17 A0 5E 2C 42
1790 17 10 02 A 0 A 3 A 2 B F 8 E 43 L7 49 80 8D 42 t7 8C
r7A 0 4t+ L7 2C 4 7 1 7 1 0 F B 3 A D9

RE A L.TIME CLOCK

0 0 0 r 0 2 05 04 05 06 07 08 09 0A 0B 0c 0D 0E 0F

0370 A9 00 85 80 A9 F4 8D OF L7 45 81 85 F9 A5 82 85
0380 FA A5 83 85 FB 20 64 lF C9 01 D0 0D 20 lF 1F 20
0390 6A lF Cg 01 D0 03 4C 4F lC 20 1F r .F 18 90 DA OO
03A0 00 00 00 00 00 48 8A 48 98 48 A9 83 8D 04 L7 2C
0 tB 0 0 7 L 7 10 FB E6 80 A9 04 C5 80 D0 58 A9 00 85 80
0 3 c0 1 8 F 8 A5 81 69 01 85 81 C9 60 D0 28 A9 00 85 81
0lDo A5 82 18 69 01 85 82 C9 60 D0 1g A9 00 85 82 A5
0 tE 0 8 5 1 8 69 01 85 83 c9 L2 D0 02 E6 84 C9 L3 D0 04
03F0 A9 01 85 83 D8 A9 F4 8D OF L7 68 A8 68 AA 68 40

D- 3
STOP WATCH

0 0 0 1 0 2 03 04 05 06 g7 08 09 0A 0B 0c 0D 0E 0F

0500 49 75 8D F2 t7 A9 0 2 8D F3 17 A9 00 85 F9 85 FA
0310 85 FB 20 7F 1F 20 6 A lF Cg 04 D0 st 4c 64 lC c9
0 t2 0 at DO lF 45 FB 20 lE A 9 3A 20 AO lE 45 FA 20
0350 38 IE A 9 2E 20 AO '1BE A 5 F 9 20 3B ].E 20 2F lE
0340 B0 D0 c9 02 FO c4 c 9 0 1 D0 c8 A9 9C 8D 06 t7 2
' 80
0150 lF IF A D 07 T7 FO F B 8 D 0 0 lC Ag 9C 8D 06 t7 18
0560 F8 A 5 F9 69 01 85 r 9 A5 FA 69 00 85 FA C9 60 D0
0170 0B A 9 00 85 FA A5 F B 1 8 6 9 01 85 FB D8 20 6A lF
d:so c9 00 D0 cB FO 8C

LUNAR LANDER

00 01 02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F

0000 A2 0c 85 88 95 E2 CA 10 F9 A2 05 A0 01 F8 18 85
0010 E2 75 E4 95 E 2 CA 88 10 F6 85 E5 10 02 A9 99 75
0020 E2 95 E2 CA r0 E 5 45 E2 10 0B A9 00 A2 02 95 E2
OO'O 95 E8 CA 10 F9 A5 ED E5 EA 85 ED A2 01 85 EB
0040 E9 00 95 EB CA '180 F7 B0 0C 49 00 A2 A3 95 EA CA
OO5O 10 FB 2O AA OO 45 EE DO O A 45 E2 A6 E3 FO 08 DO
0060 06 F0 A5 A5 EB 46 EC 85 FB 85 FA 45 E5 30 06 A5
0070 E5 F0 07 D0 05 38 A9 00 E5 E6 85 F9 A9 02 85 El
0080 20 lF lF F0 06 20 6A lF 2 0 91 00 C5 El D0 Fl F0
0090 D0 c9 15 D0 03 85 EE 6 0 C9 10 D0 05 A9 00 85 EE
OOA O 50 10 FD AA A5 EA FO F8 85 EA A5 EA 38 E9 05 85
0080 E9 A9 00 E9 00 85 E8 60 45 00 00 99 80 00 99 98
00c0 02 08 00 00 00 00

D-$.
HORSE RACE

0 0 0 1 02 0 3 0 I + 0 5 0 6 0 7 08 09 0A 0B 0c 0D 0 E 0F

0270 0 0 0 0 00 0 0 0 0 0 0 00 00 00 00 00 00 00 00 00 D 8
0280 A 2 t3 B D 7 C 0 5 9 5 7C cA 10 F8 A9 7F 8D 41 17 A 0
0290 0 0 A 2 09 8 9 7 C 0 0 84 FC 20 4 E lF c 8 c 0 06 90 F3
02A0 2 0 3 D lF A 5 8 F 3 0 E3 A2 03 CA l0 DE D6 86 DO F9
0280 86 99 A4 99 86 85 89 90 03 35 VC EA EA EA EA EA
0 2 c0 9 5 7 C E8 9 6 8 3 8 9 90 03 49 FF L5 7C 95 7C E0 05
02D0 30 18 D0 06 A5 8F FO 28 D0 30 A2 02 38 85 83 E9
02E0 0 6 9 5 83 CA 1 0 F 6 A2 06 85 7C 95 76 A9 80 95 7C
02F0 cA D 0 F5 E A E A E A EA EA EA EA EA EA EA EA EA EA
0 r0 0 c6 8 F D0 0 5 A 5 8 1 0g 06 85 81 EA EA EA EA EA EA
0310 8 9 8 9 00 F 0 0 B 2 0 68 0t 29 3 C D0 1 8 9 9 89 00 E A
0320 2 0 6 8 03 2 9 3 8 8 5 9A 89 8C 00 t0 0B 29 t8 C5 9A
0530 B0 05 A9 FF 99 86 00 20 tD lF A 0 F F 4 6 99 1D 93
0540 0 3 F 0 01 8 8 9 8 5 5 89 85 9A EA EA 20 68 03 18 29
0350 0 1 6 5 9A 1 8 4 6 9 9 75 8C EA EA EA EA EA EA EA E A
0 t6 0 9 5 8 C 95 8 6 4 C A 9 02 38 l8 A5 92 65 95 55 95 85
0370 9 1 A 2 04 8 5 9 1 9 5 92 cA r. 0 F9 60 80 80 80 80 80
0 r8 0 8 0 8 0 8O F F F F F F 80 80 80 00 00 00 80 80 80 0 8
O3 9 O F E B F F7 0 1 0 2 0 4

ONE A RME DB A N DI T

00 01 02 0 3 0 4 0 5 06 07 08 09 O A O B O C O D OE O F

0200 A9 25 8 5 05 20 B A 0 2 A9 0085 06 20 8D O2 DO F B
0210 E6 09 2 A 8D 02 F O F 9 A9 0385 06 F8 38 A5 05 E9
022A 01 85 0 5 20 BA 0 2 2 6 09 208D 02 c6 08 DO F9 A6
0230 06 A5 0 9 29 06 0 9 4 0 95 0146 09 46 09 c6 06 D 0
0240 E7 A5 0 4 c5 03 D0 3 7 c5 02D0 33 A2 10 c9 40 F 0
0250 0D A2 OB c9 42 F 0 0 7 A2 06c9 44 F0 01 cA 86 07
0260 A9 80 8 5 08 20 8 D 0 2 c6 08DO F9 c6 07 F0 9C 18
0270 F8 A5 0 5 69 01 B 0 9 4 85 0520 BA 02 D0 E2 A2 01
0280 c9 4 6 F 0 DA 20 8 D 0 2 A5 05D0 80 FO F7 46 06 r 0
0290 02 F6 0 2 cA 10 F B A 9 7F 8D4L L7 AO OB A2 04 85
02A0 00 8C 4 2 17 8D f + 0 L 7 D8 A97F E9 01 D0 FC 8D 42
0280 1 .7 c8 c8 cA 10 E 9 2 0 40 1F60 45 c5 29 OF AA BD
0 2 c0 E7 1F 8 5 00 A5 0 5 4 A tlA 4A 4A AA BD E7 lF 85 01
02D0 50

D-5
K I MAZE

00'0t 02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 C 0 D 0 E 0F

0200 D8 A2 02 BD 85 02 9 5 D2 CA 1 0 F8 AO OB B1 D2 99
0210 D8 00 88 L0 F8 A2 0A Ah Dr+ A9 FF 38 16 D9 56 D8
0220 2A 88 D0 17 29 A7 A8 89 AO 02 95 D8 CA CA 10 E7
a2t0 c6 D5 10 0A A9 05 8 5 D5 A 5 DE 49 40 85 DE A9 7F
0240 8D 41 17 A0 09 A2 O A 8 5 D8 8 D +0 t7 8c 42 t7 c6
0250 D6 D0 FC C8 C8 CA CA 1 0 E E 2 0 40 lF 20 6A lF C5
0260 D7 F0 CD 85 D7 A2 0 4 DD A 8 a 2 F0 05 cA 10 F8 t0
027A BC CA 30 8C BC AD O ? 8 9 D8 0 0 5D 81 02 DO BI CA
0280 l0 04 c6 D4 D0 85 D0 0 4 E 6 D4 DO F8 CA DO 06 c6
0290 D2 C6 D2 D0 EF E6 D2 E 6 D2 DO E9 00 00 00 00 00
02A 0 00 08 40 48 01 09 41 r+9 L3 0 9 01 06 04 06 06 04
0280 08 01 08 40 40 84 02 08 FF FF 0,+ 08 F5 7E 15 00
02c0 41 FE 5F 04 51 7D 5D 04 51 B5 5+ 14 F7 D5 04 54
02D0 71 5E 01 00 FD FF o CI 0 0 0 0 0 0 00 00 00 00 00 00
ozE A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

MUS IC MA CHINE

0 0 0 1 s2 0 5 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

OOOO FB 18 FE FF r + 4 51 trb E5 65 5A 5r 4C .C4 c4 c4 Dl


OO1O BD BD BD 00 44 BD 00 44 5D 36 3t 2D A8 80 80 33
0020 44 83 80 80 ttq 51 c4 80 80 5A 5T E6 80 80 FA FE
0010 00 FB 28 5A 5A 51 48 54 tl8 D1 5A 54 5T 48 DA EO
0040 5A 5A 51 48 44 48 5'1 5A 60 79 6C 60 DA DA FA FE
OO5O FF 5A 5A 5A 5A 5A 5A 65 72 79 E6 E6 80 56 56 56
0060 56 56 56 56 5A 66 D9 80 80 4C 48 4C 4C 4C 4C 56
007CI 5A -56 4c 00 c4 44 4C 56 5A 5A 56 5A 66 56 5A 66
OOS O F2 B O FE 00 00 72 5A cc 7 2 5A CC 72 54 cc 80 88
0090 80 4C 56 5A 56 5A E6 F2 80 FA FF 00

0 0 0 1 a 2 0 3 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

0200 A2 05 BD 86 02 95 E0 CA r . 0 1 8 A 9 BF 8D 43 L 7 AO
0210 00 81 E r+E 6 E4 C9 FA DO 0tr 00 E A FO ED 90 O B E9
O2 2 A FB AA 81 E4 E6 E4 95 H0 BO EO A 5 EO 86 E7 A 5 El
0 2 t0 A8 ,0 02 A2 01 86 E6 29 7F 85 E 9 FO 02 85 E A A5
0240 E9 25 E3 F0 04 E6 EA C5 H9 46 E 9 A9 A7 20 5 D 02
0250 30 88 46 EA A9 27 20 5D 02 30 A F 10 E2 A4 E 2 84
0250 EB 86 EC E0 00 D0 08 A5 EC C6 E B DO F6 FO r 6 8D
0270 42 t7 cA c6 E8 D0 EC C6 E7 DO E 8 A4 E0 84 E 7 C6
0280 E6 D0 EO A9 FF 60 50 02 O1 FF 0 0 00

D- 5
HUNT THE WUMP US

00 01 02 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0E 0 F

0000 80 EE DC B E 80 F7 DO F 9 80 84 Dt + 8 0 DE 85 C0 80
0010 F8 BE D4 D4 F9 BB ED 80 B8 F9 F 7 DE 8 0 F8 DC 85
0020 F7 89 F9 F1 80 00 8 0 Dc DC F 3 ED 80 c0 80 Fc BE
00 t0 87 F3 F 9 DE 80 F7 80 9C BE 87 F3 BE ED 80 80 OO
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0050 02 02 00 0 1 01 00 03 04 00 06 07 00 09 0A 01 04
0060 05 03 01 0 2 03 02 05 06 05 08 09 08 0B 0c 0B 07
0070 08 04 03 0 4 07 06 07 0A 09 0A 0F 0c 0D 0E 0c 0A
0080 0B 0E 05 0 6 0F 08 09 0F 0B 0c 0D OE OE OF OD OD
0090 80 87 84 E D ED F9 DE 8 0 c0 80 Dc D4 8 8 EE 80 DB
00A 0 80 89 F 7 D4 ED 80 88 Fg Fl F8 80 OO 80 EE DC BE
0 080 80 B8 DC E D F9 80 00 80 DO DC DC 8 7 D3 80 00 00

0 0 0 1 0 2 05 04 05 0 6 0 7 08 09 0A O B O C O D OE O F

0100 80 9C BE 87 T' BE ED 85 B9 B8 DC ED F9 00 80 r3
0110 84 F8 80 89 88 DC ED F9 OO 80 FC F7 F8 ED 80 89
0120 D0 lE DO lE DO ].E 48 22 0 F tro 63 lE 6C tC 0F E6
0 110 63 1E 6C lC BD DC F8 80 E E DC BE 8O OO 80 ED BE
0140 F3 F9 DO FC F7 F8 80 ED D4 F 7 F8 89 F5 80 00 80
0150 EE EE 84 84 Fg F9 F9 80 Fl F9 88 88 80 84 D4 80
0160 F3 84 FB 80 00 80 BD F7 ED 80 84 D4 8 0 D0 DC DC
at70 87 80 00 80 DC BE F8 80 DC F 1 8O BD F7 ED 80 00

0 0 0 1 0 2 03 04 0 5 0 6 a 7 0 8 0 9 O A O B O C O D O E O F

0200 8 tr DE 8 5 DD A 9 0 7 85 DF A0 05 A2 0 5 B1 DD c 9 0 0
0210 D0 01 60 95 E8 88 cA 10 F3 D8 18 9 8 65 DF 8 5 D C
0220 2 0 2 8 0 2 A 4 DC 4 C 0A 02 A2 06 86 DB A9 52 8 D 0 7
0230 t7 2 0 1 E 0 2 2 C 0 7 t7 10 F8 C6 DB DO EF 60 A 9 7 F
0240 8 D 4 1 I7 A 0 0 0 A 2 09 89 E8 00 84 F C 20 4E L F C 8
9250 c0 0 6 9 0 F 3 2 0 3 D lF 60 20 8C tE 20 02 D O F 8
0260 20 02 FO FB 20 3E 02 FO F6 20 E c9 1 5 1 0
6 A '1F
4270 E7 5 'E0 A 5 c 0 D0 0 4 E6 C0 DO F8 29 8 E FO 0 5 0 A 9 0
0280 FD FO 05 06 c0 A5 C0 60 05 c0 E6 C0 A5 c 0 6 0 A 2
0290 04 D5 CB F0 01 cA 10 F9 60 2s 72 0 2 29 OF c9 0 4
02 A 0 3 0 OD 2 0 8 2 0 2 A D 06 17 29 0t AA 8 5 c6 85 C B A 5
0280 cB 6 0 A 6 CA 8 5 5 0 85 C6 B5 60 85 C7 B5 70 85 C 8
0 2 c0 B5 80 85 c9 60 A2 03 D5 c6 F0 03 CA 10 F9 6 0 A 0
02D0 01 20 00 02 A0 00 A9 AC 20 00 02 4 C D4 02 BD D O
02 E 0 F9 F7 F8 c0 80 EE DC BE 8O BD F9 F 8 80 F7 8 0 F 6
O? F O B E BD 8 0 F l DO DC 87 80 9C BE 87 F 3 BE ED 80 0 0

D-7
HUNT THE W UMP USCCO NT . )

0 0 '0 r 0 2 0 1 04 05 06 07 08 09 0A 0B 0c 0D 0E 0 F

1 7 8 5 C0 A9 F F A2 O E 9 5 CI CA IO FB A9 g3
0500 AD 06
0310 85 E0 A 0 0 5 10 02 A 0 00 A2 05 2A 72 02 29 0F D5
0320 cA F 0 F 5 C A 10 F9 9 9 CA 00 88 10 EC 20 82 02 A0
0 tt0 0t 84 E l 8 9 C6 00 2 0 8F 02 8A 30 t7 E0 03 30 04
0540 A9 19 1 0 0 A E0 0 I 30 04 A9 0E 10 02 A9 00 A0 01
0 t5 0 20 00 0 2 c6 El A4 E l 10 DA A r+ CA 89 El 1F 85 0C
0 t6 0 A2 03 8 4 C 6 89 E7 lF 95 2 0 c A l0 F6 A0 0o 98 20
o t7 0 00 02 2 0 5 8 02 C9 1 4 F0 4 8 2 0 C5 02 85 CA 8A 70
0180 EB A5 C A A 2 04 D5 c l. F0 tt cA 10 F9 20 8F 02 8A
30 9A E 0 0 5 10 L7 E 0 01 10 LD A0 00 A9 26 20 q0
0390
0lA0 02 20 9 9 0 2 C5 CA D0 84 A9 26 20 CF 02 A0 01 A9
0 tB 0 3D 20 00 02 +c 16 0 5 A9 4 F 2 0 CF 02 A9 65 20 CF
0 tc0 02 A0 0 0 A 9 87 20 0 0 02 20 58 02 20 C5 02 85 Dl
OS D O 8A 30 E E A 5 Dl 46 E 0 95 C0 C5 CB F0 L5 C6 E0 F0
O3 E O 1A A4 E O 8 9 E7 lF 8 5 9F A0 00 A9 90 20 00 02 4c
05F0 5C 0' A 0 0 2 A9 DE 2 0 00 02 F0 F7 A9 73 2A CF 02

D- 8
APPENDIXE.

APPLICATIONS
SPECIAL
Si n g l e C hannel A nal og to D i gi tal C onversi on

SUBROTITINE
ADC - 8 Bit Analog to DigltaL Comrersion

0080 49 80 ADC LDAti s80 eoter trlal Bo.


00E2 85 EE STAZ TRIAL save it
0084 A9 00 r.DAJt $00 clear A
OOE6lE MCTBIT CLC clear carry before add
0087 65 EE ADCz TRIAL add tlial to A
0089 8D 00 17 STd@ PAD outPut to DAC
OOECAD 02 17 I.DJG PBD check cooparator
0088 29 10 allDit $10 oask all. but bit 4
0091 D0 09 BNEr SAVE if conP. = 1, save result
0093 aD 00 17 r,Da@ PAD too big, get no. fronr DAC
0096 38 s8c set carry before subtract
0097 E5 EE SBCz TRIAT subtract trial no.
0099 4c 9F 00 JlcG S H IF1.
OO9CAD OO 17 SAVE I,DAG PAD load DAC loto A
OO9F45 EE SHIFT I,SRZ TRIA]. dlvide trlaL by 2
0041 90 E3 BCCr lDffBIT done 1f tlial less thao 1
00a3 60 RTs retura with final no. la A

Hardware:

'"40 - PA7 are out to DAC


PB4 is to froo conparator

+15 V
Ref. input
-1 0 v

PA7
PA6
PA5 V output
PA4
PA3 -15 V
Pta
PAl
PAO

+uv 2.2 K
+ 5V

w4
V lnput C@parator output

100 K

r l - 'l
AMLOG TO DIGITAL CONVERSION
DEMONSTRATION
PROGRAM

Display ADC Output in HEX Fornat

0000 A9 FF START LDA/i $ff' set PA port to output


0002 8D oL L7 STAG $1701
0005 AD A3 L7 LDA@ $1703 set Pts4 to be input
0008 29 EF AND/f $EF
000A BD 03 L7 srA@ $1703
000D 20 B0 00 LOOP JSRG ADC call ADC subroutine
0010 85 I'9 STAz $F9 store ADC output in right display
O0L2 20 lF lF JSRG SC^ANDS dispLay data
0015 4C OD 00 JMPG LOOP Loop back for more data

Display ADC Output in BCD Format

0020 A9 FF START LDAit $ff' set PA port to output


oo22 8D 01 17 STA@ PADD
0025 AD 03 L7 LDA@ PBDD set PB4 to be input
0028 29 EF AND/f $EF
OO2A 8D 03 L7 STA@ PBDD
O02D 20 80 O0 READ JSR@ ADC read ADC
0030 85 E7 STAz HEDEC-L set up data for binary to BCD converslo
0032 A2 00 r,Dxit $oo
0034 86 E6 STXz IIEDEC-H
0036 20 O0 02 JSRG HEDEC call blnary to BCD conversion routlne
0039 A6 El LDXz $81 get BCD result high
0038 86 FB STIk $fB store result in left display
003D 4'6 E2 LDXz 982 get BCD result Low
O03F 86 F'A STXz $fA store result in middle display
0041 42 00 LDX/I $00 zero the right display
0043 86 19 STKz $rg
OO45 20 1F 1F JSRG SCANDS display final BCD value
0048 4C 2D 00 Jl@G READ loop back for more data

note: In order to perform the binary to BCD conversion, you nnrst load
the HEDECprogram into the memory starting at address $0200.

This program uses.,:.t'h€-eircuit and ADC subroutine phown on page E-1.


MULTICHANNELANALOGINPUT/OUTPUTSYSTEMFOR KII"I.1

by J.B. Ross

A multichannel analog I/O system whlch is ideally suited to the

KIM-I system was developed by Douglas R. Ikaul (BYTE June 1977, pP. L8-23).

This system (see diagram on p.E-7) provides B channels of analog input

and output. The circuit uses standard conponents and can be constructed

using wire-wrap techniques for less than $50.00.

The ruultichannel I/O system is interfaced to KIM-1 via the

progragmabLe I/O lines as follows:

Counect the 8 data lines driving the DAC to port PA--

DAC 0 tn PAO
DAC I to PAI

:::
DAC 7 to PA7

Connect the remaining control lines to port PB--

SELECT0 to PBO
SELECT1 to PBl
SELECT 2 to PB2
STROBE to PB3
SIGN BIT to PB4

The cornplete driver software is given on the following Pages.

The interface driver uses the KIM-I.interval timer to trigger an NMI

interrupt to update the inputs and outputs every 50 rnSec so you must

also connect PB7 to pin 6 of the expansion connector. The NMI interrupt

vector is set up by the initializing routine starting at $0380.

To make the interface system operate, load the Analog Interface Driver

Routine, the Analog to Digital Conversion Subroutlne, and the Initialization

Routine. Start the program at $0380. Control w111 be transferred inrnediately

back to the KIM monitor. If the display begins to flicker, the program

ls operating properly. Eight bit data to be sent to output channels 0

through 7 is stored ln locations $00C0 through $OOCZ,elght bit lnput

E-j
data from channels 0 through 7 is written into tocations $00C8 through

$oocr. when the interface driver is operating, the keyboard monitor

can be used to enter data for the analog outputs and to examine data

from the analog inputs. This feature rnrkes calibration of the Lnterface

very convenient.

Since the analog data is transferred to and from the rerrory table

by the interface driver software, users need concern themselves only

with the details of how to use the dlgital data contained in the table.

Programs can readily be written to examine input data and generate output

data. If a user program does any critical tlnlng,.there is a posalbility

of lnterference by the interface driver. A complete update of all inputs

and outputs reguires about 5 n^Secand takes place automatLcally every

50 nSec. If a timing loop is used, it nay be lengthened by 5 n^Sec.

Ttre lnterface driver uses the interval timer located at $L704 - $170tr'

so this souLd not be used'by another program. the other timer at

$L744 - $L74F is available for general tlnlng use,. but has no eignal

output for lnteruppting the ptocessor,,

The driver software also includes an elght bit counter in location

$OOOOwhich increments by one each time the interface is serviced, and

a four digit BCD I'clockr' in locations $OOnf and $00D2 which is incremented

oace'each 0. 1 Sec (approxirnately).

E -4
ANALOGINTERFACEDRIVER ROUTINE

0300 48 START PHA 6ave A


O3O1 8A TXA
0302 48 PHA save X
0303 A2 0O LDX/f $00 clear X
0305 BA OUTPUT TXA get channel number
0306 09 0B OM/f $08 disable output multiplexer
0308 8D OZ 17 STA@ $L7AZ select output channel
0308 85 C0 LDAzx $C0 get nunber from memory table
030D 8D 00 17 STAG $1700 send it to DAC
0310 AD 02 17 LDAG $1702 enable output multiplexer
o3L3 29 F7 ANDdI Sr7
0315 8D 02 L7 STA@ $L702
0318 49 64 DELAY LDA/f $64 set up time delay for charging
031A BD 04 17 STAG $1704 use microsecond timer
031D AD 07 L7 WAIT LDAG $1707 get status
0320 F0 FB BEQr WAIT wait until timer is done
0322 ID OZ L7 LDAG $L7OZ disable outPut multiplexer
032s 09 0B oRA# $08
0327 BD 02 L7 SrAG $1702
032A E8 INX increment channel in X
0328 E0 08 CPX/I $Oa check for maximum X=8
032D D0 D6 BNEr OUTPUT if less than rnaximum, rePeat output
032F BE OZ L7 INPUT STXG $1702 select input channel
0332 20 58 03 JSRG ADC convert analog V to binary
0335 95 C0 STAzx $CO save number in memory table
0337 EB INX increment channel.in X
0338 E0 l0 CPX/I $10 check for naximu* 11=$10
033A D0 F3 BNEr itlpUf if less than maximum, repeat input
033C A9 30 EXIT LDA/I $30 reload interval timer with refresh
033E BD 0F 17 STA@ $170F value (rnsec)
0341 E6 D0 fNCz COUNT increment sample count
0343 18 CLOCK CLC clear caxry before addition
0344 F8 SED switch to BCD mode
0345 A'5 D0 LDAz COUNT get count number
0347 29 0I AMif $01 ur.askall buc low bit
0349 65 Dl ADCz TIME-L add bit to low order time
0349 85 Dl STAz TIlm-L save result
034D A9 00 LDA/I $00 clear A
O34F 65 D2 ADCz TII'{E-}I add carry to high order time
0351 85 D2 STAz TIME-H save result
0353 D8 CLD return to binary mode
0354 68 PLA restore X
0355 AA TAX
0356 68 PLA restore A
0357 40 RTI return from interrupt

E -5 .
ANALOC TO DIGITAL CONVERSIONSTEROUTINE

0358 A9 80 ADC LDA# $80 enter trial number


0354 85 EE STAz TRIAL save it
035C 49 00 lDA/l $OO clear A
0358 18 MCIBIT CtC clear carry before addition
035F 65 EE ADCz TRIAL add trial value to A
0361 8D 00 17 STA@ DAC send trtal value to DAC
0364 C6 E3 DECz $fS naste 5 microseconds
0366 AD AZ L7 IJA@ COMP get comparator status
0369 29 LO ANDii $fO mask to recover bit 4
0368 D0 09 BNEr SAVE save result if comparator = I
036D AD 00 17 LDAG DAC too big, get number from DAC
0370 38 SEC set carry before subtraction
0371 E5 EE SBCz TRIAL subtract trlal nurnber
0373 18 CLC
0374 90 03 BCCr SIIIFT Jr.mp to shift
0376 AD 00 17 SAVE l,DA@ DAC get nuober from DAC
0379 46 EE SHIFT LSRz TRIAL divlde trial number by 2
0378 90 El BCCr NXIBIT done if carry is 1
O37D 60 RTS return wlth finaL valud in A

INITIALIZATION ROUTINE FOR INTERFACEDRIVER

0380 A9 FF INTLZ LDA# $FF set PA port to output


0382 8D OL t7 STA,G $1701
0385 49 0F LDAtf $0f set PBO - PB3 to output
0387 8D 03 17 STAe $1703 ,
038A' 49 00 IJA/F $00 clear A
038C 85 D0 STAz COUNT clear COIJNT
0388 85 Dl STAz TIUE-L cLear TIME-L
0390 85 D2 STAz TIME-H clear TIME-II
0392 8D gA L7 STA@ NMI-L set up NMI interrupt vector
0395 A9 03 tDAilf $Or
0397 8D FB 17 STAG NMI-H,
0394 AD 0E 17 LDAG $170E enable tlmer lnterrupt
039D 4C 4F IC JIC@ $1C4F jtrnp. to monitor (or user program)

E -6
MULTICHANNEL ANALOG INTERFACE

t
n
6l
5l
4 \ourPr,rr
3 f Foflr
aI
rl
IC4 o)
IPF

IC t2
IC5 LM 3II

IO
tc? PORT
\ 6 ro o o p F
h
|t,
rt

./tt * r ooopF
-' T
IC I TO8
ca3r30
-3y

-r5Y

Number T yp e + 5V GND - 15 V +1 5 V -5V


1 ro8 cA3 130 4
I cD4051 16. I 1

10 cD4051 't6 a
1l MCt408L-8 13 2
12 LM 311 I
4 8
13 LM 318 4 B

E -7
APPEI{BtTiF.

KIr{16500 TNFORI\4AfIONSOURCES
KIM SOFII^IARE
SOURCES

KIM-1/650X User Nores


109 Centre Ave.
West Norriton, PA 19401
Published every 5 to B weeks. Subscription: $5.00 for
six issues. Back issues may be available. Highly
recoumended.

ARESCO
314 Second Ave.
Haddon Heights, NJ 08035
4K version of FOCALfor $40, 2.5K assesrbler (nonstapdard
mnemonics) for $30, 6K assembler/text editor (standard
mnemonics) for $60. Send 92.00 for literature.

6502 PROGRAMEXCHANGE
2920 l{oana
Reno, Nevada 89509
4K FOCAL (FCL-65),. scientific routine package (writren in
FOCAL), games and general software for 6500 systems using
the KIM and TIM monitors. Send $0.50 for program list.

THE COMPUTERIST
P.O. Box 3
S. Chelmsford, MA OL824
High quality software. PLEASEgame package fot KIM-I:
$10.00 (cassette). HELP text editors and word processing
programs-send for description-$15.00 per cassette. MICRO-
CHESSChess playing program for KIM-L: $15.00.

PYRAMID DATA SYSTEMS


6 Terrace Avenue
New Egypt, NJ 08533
rrXIMil extended I/O nonitor package
for KIM (requires more
than lK of memory) $12 for manual and cassette.

MICRO-h7ARE LTD.
27 Firstbrooke Road
Toronto, Ontario
Canada M4E 2L2
Assembler, dissassembler, and text editor for 6502 with
4K memory. Manual and KIM cassette: $25, source listing:
$eS. Well documented.

IGnneth I.l. Ensele


1337 Foster Rd.
Napa, CA 94558
Source for Tom Pittnans 2K TINY BASIC on KIM cagsette.
Specify st,artlng address $0200 or $2000. $9.50 for
tape plus $1.00 handltng and postage.

F-1
oPa
P .O. B o x 3 1 1
Argonne, IL 60439
THE FIRST BOOKOF KIM by Stan Ockers, Jim Butterfield, and
Eric Rehnke. The book includes a beginners guide to KIM,
several tutorials on hooking things up to KIM, and a large
number of game and utility type programs. 180 pages,
8 Ll2 X 11 fornat: $9.00 plus $0.50 postage.

Johnson Comput.er
P.O. Box 523
DIedlna, Ohio 44258
4.5K assembler/text editor and other 65O2 sof&rare. I,Irite
for current information.

T- 2
6500 MICROPROCESSOR
SUPPLIERS

MOSTechnology
950 Rittenhouse Rd.
Norristown, pA 19401 (2L5) 666_1950

Rockwell Microelectronic Devices


P. O. Box 3669
Anaheim, CA 92903 632_3729
eL4)
Synertek
3050 Coronado Dr.
Santa C1ara, CA 95051 (40g) 9g4_g900

6500 BASEDMICROCOMPTIfER
SIIPPLIERS

Apple Computer Inc.


20863 Stevens Creek Blvd.
Bldg. B3-C
Cupertino, CA 950L4 (40g) 996_1010

Coumodore Business Machines


901 California Ave.
Palo Alto, CA 94304 (4L5) 326-4000

ECD Corp.
196 Broadway
Cambridge, I,rA A2L39 (6tt1 66L-440O
Ohio Scientific
LI679 Hayden
Hiram, Ohio 44234

F -3
NorJ\fwrro,{ldrtrcldtrLlgJsurvdsNnS'o
0 xtoNlrddv
6530 TIi'J E R T L ' NCT I O I . I SA ND P RO F E RT I E S

A . T I }'IE -OUT FLA G A ND i NT f RRUF T E } { A B L E RE GI S T E R,

t. A LL I^JRITE0P E RA T I O I . I 9T D T HE CO ' J NT E RT 0 UCH T HE I NT E R R U P T


E NA B LE RT$1S TE R (A L ' T T RE S tSs iT 3 , T HE , 8 , B I T , I S CO PI E D I N T O
THE I NTF-'II?LJPETNA B L . ERE GI S T E R) .

?. : : . i T HE CO UNT E R(E V E H A DDRE S S E S iT O U C H


A LL RE A D T}P E RA T I O |" ICI
TI{E I NTE RRUP TE I.. iT iB i-E RE Gi S T E R.

3. A LL RE A D OP E RA T I S I { SO N T HE T I |, 1 E -O UTF L A G (O DD A DDRES S E S }
LE A V E THE lI.{TE FT RUPETI . { A g L ERE G I S T E R UNT O UCHE D.

4. A FTE R COI'IP LEiTOii O F T I I . { E _ O UT .F L A G RE A D O P E RA TI O NS O O H O T


CLE A R THE TiI'iE _OU' TF L A G .

5, A FTE R COh,IFLEi Oi'


T ; A F T i I ' ! E -I J UT , C{ J L J I . I T EERE A D O P E R* Ti O N S C L E A R T H E
T I bIE -OUT FLA G.

6. A LL COUI..ITEUR
R I TE O P E Rf iTI O HS CL E f iR T HE T I ME -O UT F L A G .

B. PRE -S CA LE R B IT$'

1. P |?E -S CA LE RB ITS A RE T 0 UCHE Do t ' lL Y E Y I I RI T E O P E RA T I 0 I ' | g


(A DDI?E S StsITS @ A NO I , T HE ' T ' A T J D' Z ' B I T S , A RE CO P i E D I N T O
THE P RE -S CiILE RRE G I S T E R).

?. THE C0UNTE RCA I'{ EE L O A I , E D A T A L L A DDRE S S E SF RO t t L 7 @ 4 - L 7 A V A N D


FROM T7T\C.T76F, B UT I T CA |. {B E RE A ' I O I . ' I -YA T T HE E V E H A S O R E S S E.S

3. THE TIME -OUT FLA G C, I F I B E RE A F O I . I L -/A T $ 0 9 f , X DE E S 1 J ESS


; UCH
RE A D 0P E HA TIC'NSAL I ^ lf t Y SRE T URI ' E
I I ' |HE R 3 6 0 R A A t HE X ).

C 0NSEGUE NCE2S |

1. S E TTII'{G TljE P RE -S CA L E RE iT S RE 0 UI RE S A o P E li: A T i 0 H .


' rrRI T E
?. i P E S f 1 ld RI T E 0 P E RRTi 0 N A T A D i l R E S S E S
E NA B LI NG THE I HTE RP ' " I P TP E CI U
L7OC,_1.7@F, OH A F E A ' , { T E I T HE R L 7 A C, O R t , 7 b E .
O P E F : A T I O IA

3. DIS A B LJNG THT II{T E RP UP T RE A UI RE $ A I ^ I RI T E O F E I ? A T I O I .AT


I ABDRESSES
t7a4-i7a7, 0R A R E A ! 0 F E RA T i0 N A 1 ' T I T HE R r7 ' , + 4 0 R t 7 6 8 .

4. S E a { RT HE T I h I E -0 U T F L A G
A LL TRA |.I;:A CTI0N SA T E V E t . lT I DDRE S S E CL
IF IT HA P P E I.{IDTO g E r-I E T .

G -1
(\.) rl

EXPER
I NTERRUPT IT4ENT

@a 6 0 A9 4g L DA# g40
@A O E 8D FE L7 S TAE fi1"7F8
ooo5 A9 oo LDA* g.CIo .
6 @0 7 8D FF 1 .7 S TA@FLTFF" --.) IRO VECTORINSTALLED
g , @O A 8D C I3 1"7 J
S TAS fiX.703 PORTB INPUT }
OOOD Ag FF L DA* $FF , t^,,t'',s
0o6F 8D 6t L7 , S TA@#1.7OtJ poRt A oUTPUT
* '* i '
A @f t . 8D 6F L7 S TAB *DAF ' e*- - *' *9TARTUP TIMER 1pi{ i"'r n
OO15 58 C LI ENABLEINTERRUFTS
@0 1 6 F8 sED DECIMALM ODE
@o 7 ? A9 0g L DA{ I $00
aa19 85 F9 S THZ $F9
OO1B 85 FA S TAZ SFA
OO1D 85 FB S TAZ $FB. ZEROOUT DISFLAY DIGITS
AO1F 38 S TC USE CARRYTO DO THE IN C R EM EN T
6IA?A AA FD L DX$ $FD NOTEIIRAP- AROUND INDE XIN G
bq?? 85 I--C L DAZX $FC TO GET TO LOEATI ON F9 F I R ST
g @? 4 69 00 A DCS*AO
80A6 95 FC S TqZY,$FC I,JRITEBACK UPDATED DIG IT PAIR
OOE8 90 03 B CC SO3 FALL OUT IF NO CARRY - OU T
807.f1 E8 I NX IJPDATEI NDEX I F NEEDBE
OO?B DO F5 S NE $F5 FALL OUT IF ALL DIGIT S D ON E
eo?D A9 ?0 L DA' $' $e6
Oq?F 85 80 S TAZ #BA USE LOC. 8CI AS DISFLAY LOOPC T R ,
@9 3 1 EO 1F LF JSR@$lF1F EALL TO DISPLAY DITIITS
QO34 C6 80 trfcz SB0 CoUNTD0tdt'DISpLAY
t CA LLS
@0 3 6 DA F9 E NE $F9 DO ANOTHER DISPLAY CA LL
OO38 FO E5 E EO f E5 UPDATEDI SPLAY CONTEI'IT S
N O t dT H E I N T E R R U F T -D
IV ,
RE N P R' ) GRAhl

@O 4 O 48 F HA SAVE ACCUIdULNTOR
a6+1 nD 02 t7 L DAo #t702 GET Sh|ITCHES
O @4 4 OA A SL A SHIFT UF
OO 4 5 AA A gL A TIdICE
OO 4 6 DA OA B NE $OA iF fiLL $I^' ITUHES
ARE ZE R O
CI048 A9 FF L D AS $FF USE $FF FOR DEFAULT
OO 4 A 8D q F fi 5 T NE $X7OF RESTARTTIM ER
Ot ) 4 0 EE Oq T ,7 I N ';@#i7A@ UPDATEPORTA
O O SO 68 PLA RITRI EVE ACCUbIULATOR
-fJO51 40 R TI RETURNFRO} ' I NTENRUF T

N O T ES :

1. S IAITf C H E SLr ILL SPEEDUP THE UPDATES0N P0RT A.


GR 0 U N D IN G

?, L OC A T IONOOA EC OI,{ TROLS


THE COUNTING
RATE ON THE DIGIT D ISPLAY.

G-2
I.]ON CiIART
CODECO|'IPAN
DECII-{AL ,+-BIT SIGN AI'ID 5-BIT ls COl,lPL.2s COF{P. 5-BIT
I]INARX I"L\GNI'I'UDB
OFF'SET I]INAITY BINARY GRAY
(*=o BINARY
_ = 1)

T5 I 111 o 1111 1 1 1 1 1. O 1111 o 1111 o1000


14 1 110 o 1110 1 1 r. 1 0 0 1110 o 1110 o1001
r) 1101 o 1101 1 1101 0 1101 o 1101 o1011
L2- 1100 o '1 1 0 0 1 1100 0 1100 o 1100 o1010
11 1011 o 1011 1 L011 0 1011 o 1011 01110
10 101o o 1010 1 1010 0 1010 o r,o10 01111.
9 1001 o 1001 1 1001 0 1001 o 1001 olto1
I 1000 o 1000 1 1000 0 10oo o 1000 01100
7 0111 o 0111 1 0111 0 0111 o 0111 00100
6 0110 o 0110 1 0110 0 0110 0 0110 00101
, 0101 0 0101 1 010r. 0 0101 0 0L01 00111
I+ o100 o 0100 1 0100 0 0100 0 0100 00110.
3 oo11 o ool_t L 001L 0 0011 o oo11 00010
2 oo10 o oo10 t 0010 0 @10 o oo10 ooo11
1 oool o oool 1 0001 0 0@1 o oool ooool
o oooo o ooco loooo?ffi o oooo ooooo
-1 1 0co1 o 1111 1 11tO 1'11L1 10000
-?. 1 0010 o 1110 1 1101 L 1110 10001
-3 L 0011" 0 1101 1 1100 1 1101 10011
-l+ 1 0100 0 1100 1 L011 L 1100 10010
-5 1 0101 o 1011 1 1010 1 1011 10110
-6 1 0110 0 1010 I 1001 r 1010 10111
-7 1 0111 0 1001 1 1000 1 1001 10101
-B 1 1000 0 1000 1 0111 I 1000 10100
-9 1 1001 0 0111 1 0110 L 0111 11100
-10 1 1010 0 0110 1 0101 1 01.10 11101
-1 1 1 1011 o 0101 L 0100 1 0L01 11111
-12 1 1100 o 0100 1 0011 1 0100 11 1 1 0
-1,3 1 1101 0 0011 1 0010 1 0011 11010
- 1l} 1 1L10 0 00to I 0001 1 0010 11011
-1 5 1111.1 o 0001 1 0000 1 0001 11001
-1 6 o 0000 1 0000 11000

Offsct blnary and 2s corngrlement dlffer only ln the slafc of ihe slgn blt,.
Cray code ls not vrclght,t:c1;it can only be converLed info a binary blf s[ring,
whlch must Lhen be fur.t,hcr lnternrcLed.
OVBRFLOI{AND I.NDER}'Lo}Il'tITI{ SIGIIUDARITill'tL'tIC

For the purpose at hand wc w-i}l use a 3-bit binary adder which rvill
accept a pair of 3-bit lnputs (the addends) to fornr a i,-bit output by
the rules of strai6ht ("unsi-gncd't) bj.nary addition. In additlon to the
1O bits nnaking up the inputs and the output, we uiIl define one more.
signal, v;hich is the carry lnto the leftnost bit position of the addends:

Az
+2L=+2 +2o=+L

Bz
+20
+

ilHH EH i l i l
To keep a running count of overflow and underflor.l el.ents rve ui1l need
one more reglster, here also shown as 3 bits vride. Because spill-ouL from
the adder may have a ueight of +l+ or -4 (overflow or underflpw), it vrill.
be convenient to assign a weight of lr to M2r a;:d to treat the contents
of l'l as another sigtred nunber which may 'oe i-ncremented or decrernented
by the sar:readd/subtract strate$r we ti-I} devclop for A, B, and S. The
bit welghts for all bits are shovn Ln the diagran; they corlespond to
the standard convention for tvro's conplenent signed integers. In the
exarnples be3-ow,the bit locations and fonnats rti.ll be as shovm above,
but the bit weights r,,'i11 not be shown,

Two factors may be held accountable for most of the confuslon around
signed arithmeti,c:
1. The term l.'lSB(rnost significant b'it) is often used rn{.th an irnpliclt
convention which may assign the name l,tSBto either bit O or bit 1 of
a h'ord. fn recognitlon of this, we will noL use the term l{SB here.
2. The signals Ln the o corunn may have either a positive rvei6ht (c.-)
or a neEativc weight (Aor Bo). Thc adder nakes no such airiir.iill;
the lnterpretation of bits as weighted nurnhorsfs stri"cLly ourBr

6 -{
sig,rredaritltnctic p. 2
Having recognized fhc sources of confusion, lef us attennpt to create
some order by inspecting all possible conbinations of sign bits and
carry-in signals:

A. Cir,=O; A o=Oi Bo =Q

o
O 1 O +2 Addition of tr,'o snalL posiii_ve
O01 +1 n u mb e rs .
OOO O O11 +3 No o v e rf lo lt , n o u n d e rf lo w

B. Cirr=O; A o -0; Bo=1 (o rA o = 1 ; Bo=O)


o
O 1 0 +2 Addition of a rosi-tive and a
1 O 1 '3 ne3ati're number, result negative.
000 O 111 -1 lilo o v e rf lo x , n o u n c ie rf lo ri

C. C.-=O; A o=1; Bo=1


Lno

1 O 1 -3 Acid:ition of tuo negative nuslbers.


11O -2 Un d e rf lo w
000 1 011 -5 Co h a s a we ig h t o f 2 x -l+ , rr' hi c h
111 is reCistributed Lo 14, a,rd So
111 111 -L + -1

D. Cirr=1; A o=O; Bo=0


1
0 1 1 +3 Addition of tuo positive nunbers.
OO1 +1 O v e rf lo w
000 O 100 +t+ S o a s f o rme d . h a s a rie ig h t o f + !. ,
0 01 000 +4+0 v rh j-c h is mo v e d t o M,

B. Cin=1; A o=O; Bo=1 (o rA o = 1 ; Bo=O)


1
O 1 O t'?. Adrji.l;lon of a positj-ve ancl a negaLive
110 -2 nurnber.
0 00 1 OOO O llo o v e rf lo ' , v , n o u n d e rf lo w
llote that the weigtrt of Co is zeroi
Co is pro<iucr:dby t'addllion" of C.r,
.!_q
signed arithmetic p. 3

l,i.th rveight +lr and Bo tdt'h weight -4.

F. Cir, = 1; Ao = 1i Bo = 1
L
1 i. O -2 AdCition of ti*o small negative
111 -1 n u , ' n b e rs .
0OO 1 101 -3 No u n d e rf lo v t rn o o v e rf lo w
Again Cr* neutralizes one of the
sign bits. The o+,her sign bit
re:pPears as 5o.

fn sumnary:
1. If carry-in is produced, but no carry-out 1s generated, theri
overflotv has occurred.
2. If a carry-out is procluced 'vrithout help from a carry-in, then
underfLow occurred.
3. If no earries are generated, neit,her overilool nor underflot* occurred.
l+. ff a carry-in produces a carry-out, this annountsto neutralization
of the posj-tive lveight of the carry-in by the negative i+eight of
one of the si-gn bits, I{either overflow nor urjderflou has occurred.
5. l.lhenever overflovl or underflor.r oecus, So must be compLernented,
to ma}:e S suitable as input to the adder for further arifhmetic
operations. If Cooi=l, l4 must be decrenented; if Co,rr=0, M must
be incremented.

fn logical terms, spill-out can be deteeted as Crr, 0 Corrt, The slgn of


the spilI-ouf is given b/ Co,rt,

l'ihen all additions have been rnade, we should combine the spill-out
counter with the S legister to make a double-length bit string renresenting
the. end result in tr.rors conplernen| format" llorv there are !t,,'o bit positions
with an acsolute treight of 4; the lor,r-oz'der sign bit, So, and the LSB
of the spll1-oub counter, l'{r. These tvro bits rnust be cornblned, and then
the vacafed bit position must be climinated to shift ihe high order bits
into posifions corresponcling to their assigned weight,
slrll{s 3cNlrulrJlu
lu.
H Xl0NSddv
TTL REFEREI'ICESHXET #1
7402 7474
!!t lcx :rF 2q 2!

FUI\ICTIONTABLE
!Bl i€l G"I Gi' 1-r5 .j r-

INPUTS OUTPU'S
PR ESET C LEAR C LO C X D oo
LH XX HL
H LXX LH
LLXX
H H T II HL
H H IL LH
H H LX ooq
7t+04 7408

ill
lr! i
7490 DECADECOT'NTER
lf\ |

lr u i I
hh t..-
ilil
I i

7432

II I J _ r l-
'.I_
---.
t7
lL
I
I
6CD COUNT SEOU€NCE
(S.. t{otc Al FESE',/COUN''RUTH IASLE
OUTPU' R ES€TT N PU T S i O U rp U r
COUIYT
8095 TRI-STATE BUFFER Oo Qc Oa Oa R0(il Ror2l R9{',il F9{21 Q6 Q6 06 Oa

Gz 16 ya 15
0 LLLL H H \ LLLI
I LLLH H H x L LLLL
2 LLHL X x H t{ HLLH
1 LLHH X L COUNT
LHLL L x COUNT
5 LHLH X x L COUNT
6 LHHL X L L x COUNT
LHHI{
8 HLLL
q
r.r L L r,{

74L38 1-OF-8 DECODER

INPUTS
OUTPU'S
EN AELE SELEC T
GI G?' c 8A YO Yl Y2 Y3 Y4 Y5 Y6 Y7

XH xxx HHHHHHI{H
LX xxx HHHHHHHH
| tL LLL LHHI.IHH}IH
INPUTS OUTPUTS HL LI.H HLHHHHHH

OG oo HL LHL HTILHTIHHH

L H Ll{ HL LHH HHHLHIIHH

H H HL HL HLL IIHHHLHHH
HT IILH IIHHHHLHH
X L os 60
HL HHL HHHHHHLH
H' high laval, L - low lavat. X irrrlavrnr
- HL HHH HHHHHHHI
qt
- thr level ol O bato.! th. high-tg.low rr.6.ltion ol G
.Gt- G ?A.G r E
TTL REFERENCE
SHEET#2
74148 PRIORITY E.NCODER
74L53 MUI.TIPI"EXER !trrgtt
stRcgf A DArA lN?lrls
vcc lG stlEcr -^-

sTqoBf :E Gno
IG s€L€ct oa?a rttuts

FUilCTTOil TAALE
SELEC"
OATA I'I?I'TS sTnoSE ouTn r
INPUTS
I A co ct cil c:l o v tatalrtaraa
x x x x x x H L
x $tPt Ts outrur3
L L L x x L
EI 0 2 3 4 5 5 7 A2 AI AO (;:3 €O
L L H x x x L H
L H x L x x L L H xx x x x x x x H H H x t{
L HH tl H H H H H H l"l H ll
L H x H x x L tl
L xx x x x x x L L L H
H L x x L x L L
xx x x x x
L L X L L H L !!
H L x x tl x L H
L xx x x x L H H L H I L x
H H x x x L L L xx x x L t{ l{ H L H H L tl
H *l x x x H I tt L xx x L il t{ H X H L I L x
S.rH idgur! A afrd La c066on lo bolh clisr L xx L |l H t{ H H H H H
H
-
hi$ fi.f, t
-
ld lst, X' i.rdffi I XL H H lt H H x H H t L X
L L ll H H H H H H A H H L H

DUAL PERIPI1ERATDRTVERS 300 trA'' 20 V

rtt tt

7545L 75452 75453 75454

REI"AY DRTVERS RS-232C- rTL CoTWERTERS


+v -v

d r yl d
.d l r r d q a
- r .d 6 r a a -
DC

DS3686 DS36E7 L489 1488


st3ltHsA0010NHc3r
SoH
I xtoNtddv
PRELIifiIIUABY
g OATA
H
moa TE Gf{X OLOOY . t X C.
w SHEET

vAtltv foncE co8ponArECEtrtR {21t|$6.rtt0 MAY. 19?6


pA. t9a0t
950BrTTtlfi0us€R0A0.ftonRtsTowil.

MC$6500
iilCROPF0CE||So
BS

TheMC$6500,Microprocesor
FamilyConcept
---
The l-1CS6500 Series Microprocessors represent the first totally software compatible
r nic r o p ro c e s s o r fa n i l y . T h i s f ani Ty of products i ncl udes a range of softw arL com pat ible
m ic r o p ro c e s s o rs w h i c h p ro v i d e a sel ecti bn of addressabl e nenory range, i nterrupt input
oP t io n s a n d o n -c h i p c l o c k o s s c i l l ators and dri vers. A l l of the mi croprocessors in t he
II{CS6500 grouP are software cornpatibl.e within the group and are bus compatible with the
M 680 0p ro d u c t o ffe ri n g .

T he f a mi l y i n c l u d e s fi v e m i c ro processors w i th on-board cl ock osci l Lators and dri v er s


and f o u r m i c ro p ro c e s s o rs d ri v e n by external cl ocks. The on-chi p cl ock versi ons a r e
ained a t h i g h p e rfo rma n c e , l o w cost appl i cati ons w here si ngl e phase i nputs, crysr al
ur . ' RU rrrp u L s p rl u v i r.-l eL l re L i u re base. The er.ternal cl ocl : versi ons arc geared for the
nult i p ro c e s s o r s y s te m a p p l i c a ti ons w here naxi num ti ni ng control i s mandatory. All
v er s io n s o f th e m i c ro p ro c e s s o rs are avai l abl e i n 1 MH z and 2 MH z (" A t' suffi x
on product numbers) rnaxinun operating frequencies.

of theMCS6500
Features Family
S ingl e fi v e v o l t s u p p l y Instructi on decodi ng and control
N c ha n n e l , s i l i c o n g a te , d e- Addressable memory range of up to
plet io n l o a d te c h n o l o g y 65K bytes
E ight b i t p a ra l 1 e 1 p ro c e s s i ng "Ready" input
56 I n s tru c ti o n s Direct memory. acce.ss capabillty
Deciural and binary arithmetic Bus compatible with MC6800
T hir t e e n a d d re s s i n g m o d e s C hoi ce of external or on-board cl oc ks
True ind€xing capability IJl{dz and 2tl}lz operation
Progranmable stack pointer On-the-chl.p cLock optlcns
V ar lab l e l e n g th s ta c k * External elngle clock input
I nt er r u p t c a p a b l l i ty * RC time base input
Non-maskable interrupt * Cryetal tine base lnput
Use with any type or speed memory 40 and 28 pln, package veraions
B i- dire c ti o n a l D a ta B u s P i pel i ne archi tecture

Members
of the Family

Microprocessors with Microprocessors with


On-BoardClock 0sci1 lator External Two Phase
Clock Input

MCS6s02 I
MCS6s03
|- ucsosrz
l-"rrur*
MCS6s04 I
MCS6505
f-r'rcsosr+
I
l- ucsosrs
MCS6s06

L 1 -l
on the DataSheet
Comments

Th e da ta sheet is c ons t r uc t ed to review first the basic "Comnon Characteristics" - th o se


fea ture s whic h ar e c om m on t o t he g e n e r a l f a m i l y o f m i c r o p r o c e s s o r s . Subsequent to a
review of t he f anily c har ac t er is t ic s wl1l be sections devoted to each member of the group
with sp ecif ic f eat ur es of eac h.

COMMO
N CHAHACTERISTICS

.- RgctsT[RsEcTtoN CONTROL SECTION

Pg rtrq rta

ABO

A8 |

AB2

ABJ

A8,l

AB5
IN5TRUCTION
DECODE
A86

A8?

ADDRESS
BUS

AB'I

A I}.,
grrrrrI
A 810
e r {t n r
I MC S 6512,13,14.15

J
ABI I
aroa* I
rNPr.r MC S 6502,3,4,s ,r
A8t2 J

f1 oUr
ABI]

ABI4
fi:-
ABI 5

DB'
D BI
DA2
oB3 OATA
fl =,,,,,,n, D84 8US
D B'
= r nr r r - r r ir lr86
| D61

No te : l. Clo ck (l enerator i s not i ncl uded on MC S 6512'13'l 4,l S


2 . Ad d r e ssi ngC apabi l i ty and control opl i ons vary w i th each
o f th e Mcs6500 P roducts.

| nternal
MC56500 re
Arehitectu

'1,.1-2
COMMON HISTICS
G}IARACTE

SET_ ATPHABETIC
INSTRUCTION SEOUEHCE

ADC Add HeBrry io Accumulator plr.h Carry DIC Decrenent lretury by Ooe FHA Pusb Acc@ulator on S:ack
AN!) "iL\u" Mcnrrry with Accumulnt(,r oEX Decrehent Index X by one PHP Puah Proceasg! Status on Scack
ASL Slrlf! Ieft On€ B1t (Memort or Accumulstor) DIY D€crenenl lndex Y by One Pull Acc@slator froh stack
?LP Pull Proceesor Status fron Stack
ECC Ilrdurll on Cdrry C I ear UOR "lixc1!sive-or'r Menory rith Accuhulatot
BCS granch 0n C arry set ROL Rotste Otrc Blt L.f! (Ue@ry or Accuelator)
BEQ lirdnch o0 R esui! Zero ln_C Increnent Menory by 01e ROR Rotate Gre Bit Righ? {Venor)' or Accuhulator}
Btl Test IJ.its in }{ercrt wlth Accumulncor Ir_X Incranenc Index X by 0n€ {Tt Retulo floD Inlerrupt
BMI Branch on Result Hlnus Il{Y Incremett Inde}: Y hy One RTS Return fron Subrou!lne
8NF: Br,rDch on R esult not Zero
lrPt. Brailclr oo Result Plus JMP Junp to Neu Locatton s8c Ssbtract Mesory flcm -Accunuletoillth Eorroq
BRK Forcc Break JSR Jump !o Nea Locatlon Savlng Relurn Address set Csrry FIag
BVC Erench on overflou C1(ar set Decl@t Uode
8VS IJLdnch un Overflou S(t LDA Lo6d Accunulator uith Memory set IntefruPt Dl.sable ststs
LDX Load Indea X wlth Mercr)' STA Store Accumulator ln He@rY
CLC Ciear Carry FlaS LDY Load Index Y sith llemort Slore Index X la MehorY
C!-D Clear DeciMl Hode LSR Shift ooe 8ir Rlghr (Itercry or Accwulator) STY Stole lodct Y ln ltemrt
CLI Clear Interrupt D.isable 8i.t
C,,V (llearOverflou llag liOP lio operatlon TAX Transfer Accmulalor !u fndet x
CMP Conpare Hemcrt and AccuDulator TAY trrnafer Accaslator to lndex Y
CPX Conpar(' !lem(,r! rnd lnd€x X oF.A "OR Menory elth Accuulator Tlaasfer Stack Polnter to Index x
CPI Cohpare ilemry and lndex Y rxA fran€fer Index X to AccuNlator
TXS TranEfer Indcx X to Stack Polnter
Trsafer lnd.a Y to Accdqlator

MODES
ADORESSIilG
A u c U ! 4 U L A TUlt
ADDRESSING - lh ls.fo r m o f a ddres6i ng l s repreaenred w l th a one byte l natructl on' l rnpl ytng an
op e r a lio n o n th e a ccu m u la to r ,
IMMEDIATEADDRESSING- In lmredlate sddresslng, the operand 1s confalned ln the second byte of ghe instructloR'
uith n o fu r th e r m e n o r y a d d r e ssl ng requi red.
ABSOLUTE
A DDRESSINC - In a b so lu te a d d r e s si ng, rhe second byte of the l nstruct{on apecl fl es the €l ght 1o* ordc r
blts o f th e e ffe ctlve a d d r e ss nhLl e rhe thl rd byte ep€c{fl ee the el ght hl gh order bl tE . T hus ' th€
eb so lu te a d d r e Be ln g m o d e a 1 lo ws acceeE to the entl re 65K bytee of addreaesbl e nemory.
zERo PACE ADDRESSING- The zero page lnstructlone allord for ehorter code l.ld ex€cstlon tln€s by only fetchtng
th e e e co n d b yte o f th e ln str u ctl on and aseunl ng a zero htgh addreee byte. C areful use of the z ero
pa g e ce n r e e u lt ln slg n iflca n t l ncrease l -n code effi cl ency.
INDEXEDZEROPAGE ADDRESSING- (X, Y indexlng) - Thls forur of addresalng 18 u6€d ln conjunctton ttlth the lndex
re g iste r a n d ls r e fe r r e d to a s "Zei o P age, X " orttzero P age, \". The effectl ve eddrese i s eal c ul ated'
by a d d ln g th e o e co n d b yte to the contenrs of the l ndex t.l l "t"r. S l nce thl e l e a forn of "Zero P age"
ad d r e se in g , th e e o n te n t o f th e second byce references a l ocagi on l n page zero. A ddl tl onal l y due to
che "Zero Page" addreesing nature of this node, no carry la edded to the hlgh order I blts of ntet:ory
. a n d cr o se ln g o f p a g e b o u n d a r le s doe6 not occur.
INDEXEDABSOLUTEADDRESSINC- (X, Y lndexing) - This form of addresslng lB used ln eorijuoction with X end Y
ln d e x r e g le te r a n d ls r e fe r r e d to as rrA bsol ute, X rr, and "A baol ute, Y 'r, ?he effectl ve addre ae l s
formed by addlng the content.s of x or Y to the addrese contalned 1Ir the gecond and thlrd bytes of the
ln str u ce lo n . T h ls m o d e a llo we the i .ndex reg{ster to concai n l he l ndex or count vaX uc and t he l n-
structlon to contaln the base address. Thls type of Lndexlng a1lo!r8 any locetlon ref€f,e$clng and
th e in d e x to m o d i.fy m u ltip le ft el ds resul ti ng In reduced codl ng and executl on tl fte.
I H P L I E D A DDRESSING - In th e lm p lie d a d d r eesl ng mode, the addresB contal nl ng the operand 18 l npl l cl tl y ttl ted
ln th e o p e r a tlo n co d e o f th e ln8tructl on,
R E L A T I V EA DDRESSING - Re la tlve a d d r e sa ln g i s used onl y w i th branch l nstructl ons rnd asrabl l shes a der tl ns t{ on
fo r th e co n d ltlo n a l b r a n ch .
The second byte of the lnetruction [Offlct't sdded !o qhc contentd of
becones the operand rhlch la .n
th e lo we r e lg h t b lts o f th e p r ogran counter w hen the counter l s set at th€ next l ni tructf*fl " The
r a n g e o f th e o ffse t 1 g - 1 2 8 Eo +L27 bytes from the next l nE tructl on,
I N D E X E DI N DIRECTADDRESSINC - In in d e xe d l ndi rect addresei ng (referred to as (Ind{rec!,X )), the geeon d by te of
' th e in str u ctlo n is a d d e d to th e contents of the X l ndex regl ater, dl rcardl ng the earry. Th a re8ul t
o f th ls a d d ltlo n p o ln cs to a h emory l ocal i on on page zero nhose contents l s tha Lol r ordcr el ght bl te
of the effective address. The next menory location in page zero contalns the high order €ltht bltr
o f th e e ffe ctlve a d d r e ss. Bo th nemory l ocatl ons specl fyl ng the hl .gh and l on order bytes of the
e ffe ctlve a d d r e ss m u st b e 1 n p age zero.

I N D I R E C T I NDEXEDADDRESSING - In ln d lr e ct l ndexed addres8tng (referrcd to.. (Indl r€cg)rY ), thc t.coad by t.


of th e ln r tr u ctio n p o ln ts to a $emory l ocatl on l n page zero. thc contcnta of ghl s aql ory l oc atl on
ia a d d e d to th e co n i€ n t8 o f r h e Y l ndex regi srcr, i he rerul t bol ng th6 l ol t order el tht bl tt of tha
effe ctlvc r d d r e ss. T h e ca r r y from thl s addl tl on 1g addrd to thc contcnta of th. naxt prS c ti ro
n.n o r y lo cr tio n , th e r a su lt b e lng the hl gh ordar el ght bl tr of thr rff€ctl vc eddr.l r'
ABSOLUTEINDIRECT - The tccond byce of the inatrucrlon contalna thc low ordrr Gttht bltc of r ttremory locatlon'
Th e h lg h o r d e r e lg h r b its o f r har memory l ocarl on l e contai ned l n the thl rd byte of the l nst ruc tLon'
Th e co n ce n ts o f r f,e fu lly sp e clfl ed mernoryl ocatl on Ls the l ow order byte of the effectl ve addr.ee'
Th e n e xt m e m o r y lo ca tlo n co n ta lns the hl gi order byte of thc cffectl ve rddrcst rhl ch l s l oeded
in to th e slxtce n b ltr o f th e p rogram counter.

1r ,
I c0MM0N UHARACTERTSTTCS
I
PHOGNAMMING
MOOET

PROCESSOASTATTJSf.i€c

r--T-:-_l ACCUMULATOR

r---;------l INDEX REGISIER

I = RESUL; ZEBO
INDEX REGISTER
IRO DIS,ABLE ]=DISASL€
DECIM.AL I!4ODE 1= TRUE
PROGFA[,?COUNTEB
BRK COMMAND
8l
r.r_l+ - .l
lr
I I " Jl s
S-IACK FOJNTER
OV€RFLOW

NTGATIVE

ltusrBusrlslu
sET- sp sODEs,
fxecution
Time"
Mennory
Requlrements
rNSttwTtdE

t
I
t
,t
i
;
t

i
f
TSX
it A
YI S

u) aoo 1 ro N. rr pac6 touN06y : s c F o s s {D


rzr Aoo 1 t c r" r: tFANch occ!nt to tAtuja raa€
Aoo, lo N anANCH OCCUFS ?O OrraiF€!r ri6!
'f
{!r CAir Y NOT, 4 A( r r 'u L ;i ^ i i r e
3OAfiOw

i{ir '' \fi rr, ! Y B'i


. rr ( r l r r \i t !
--*_-J
[ . 1 -8
* 65K Addressable Bytes of Memory
Vaa r 40 RES
e Z(OUTI * mf Interrupr
't IRa Interrupt
RDY
61( OUT) s.o.
I RO, oq(ltr) * On-the-chip Clock
N.C, N.C.
ttMl 6!5 N. C. / TTL Level Single Phase Inpur
s Yl{ c R/W / RC Tlme Base Input
Vcc 0 Bo
480 93? o8r / Crystal Time Base Input
A8l ro 5l o82 ?t SYNC Signal
482. il30 D8 5
(can be used for single instruction
AB3 DB4
484 o B5 executlon)
aa5 DB6 * RDY Signal
A8 6 DA7
a87 t6 2a a 8 t5 (can be used for single cycle
a8s t7 24 ABI4 executlon)
AB rt 2 AAr 3
x Two Phase Output Clock for
AEtO f9 2 ABI 2
ABII 20 2l v3S Tining of Supporr Chips
M CS650 2
Feafiresof il{C$6b02

R-3 t2 O2(a0Tl
Vcr 227 oq( lN)
m6' R /W * 4K Addressable Bytes of
NMI 425 080 Memory (A800-A'811)
Vc c 5?4 DBI
A BO 623 DB2 * On-the-chlp CLock
AB I 722 o B3
AA ? 821 D84 * EQ' tnterrupt
A B3 D85
A B4 rol D86
A B5 ill8 D ts 7 't m Interrupt
A8 6 t2 t7 A BI I
AB 7 t3 16 A B IO * 8 Bit Bi-Dlrectional- Data 8us
A B8 l4 l A B9

MC S 6 5 0 3 Featurss
ot [tCS6503

MGS6504
- 28 PinPackage

RE Ir ?8 o2@UTl
Vss l2 27 O O (lN,
TFT 3 26 R/W
* 8K Addressabl-e Bytes of
Vc c 4 23 080
AB O s 24 DBI Memory (A800-A812)
AB I 6 23 oa2
A82 7 z2 083 * On-the-chip Clock
A B3 I 2ll DB4
AB 4 9 201 DB5 * TEQ.rnterrupt
A8 5 lo rel o86
AB 6 ll r8l oa7 * 8 Btt Bl-Dlrectlonal Data
A B7 12 t7l AB12
A88 t3 16l ABII
A89 t4 t5l ABIO

MC S 6 3 0 4 Featuruof MCS6504
ItlCS6505
- 28 PinPackage

RE bZ@UTl
Vss 0 9 (l N )
RDY R /V t 4K Addressable Bytes of
rm DBO Memory (A800-A811)
Vc c DBI
A BO 082 On-the-chip Clock
A BI D83
A B2 D84
483 085
TQ rnterrupr
A B4 D B6
A85 DB7 RDY Signal
A86 AB II
A B7 A8 to 8 Bit Bi-Directional- Data Bus
A8 8 489

MCS 6505 of &tiG$$505


Features

ryqqq506
- 28 PinFackage

R ES I 28 a2(aUTl
vs5 z 27 9o(lN)
O r (O UT) 3 26 R/w
tRc 4 25 0Bo
Vcc E 24 DBI 4K Addressable Bytes of
AB O 6 23 082 Memory [A800-A811]
ABI 7 22 DB3
A B2 €t 2l D B4 0n-t he-chip Clock
AB 3
AB 4
9 2A
t9
D B5
D86
m0Interrupt
A B5 t8 oa7 Trrrophases off
486 AB II
AB7 t.. AB IO 8 Bit Bi-Directional Data Bus
AB 8 t5 /t B9

MCS 6506 sf MS$6506


Feetuyes

MCS65I1-40 PinPackage

6 5 K Addressa!:1eBytes of Memor,v
TN'E
Interrupt
mnInterrupt
RDY Signal
8 Bit Bi-Directi"onal Dat a Bus
SYNCSignal
Two phase input
Data Bus Enable

of MS$S51f
F*at$res

Lt- 10
MCS65|3
- 28PinPackage

Vss I 28 RES
A1 2 27 A2
rF-o ? 26 R /W
ffii 4 ?5 DBO
Vcc 5 24 DBI 4K Addressable Bytes of
A80 6 23 D82 Menory (A800-AB11l
AB I 7 22 o B3
AB ? I ?l D B4 * Tvo phase clock input
AB 3 9 20 D85
* TRQ Interrupt
A84 ro l9 oB6
A85 tl t8 0 ts 7 * ffi Interrupt
A8 6 t2 t7 A BI I
A A7 ,3 t6 Ats IO * B Bit Bi-Directional Data
A B8 t4 t5 A99

MCS 65 | 3 of lbtCS65f3
Features

ll,lg$0514
- 28 PinPackase

Vsg tza HE3


A1 227 O2
iRE 3 26 R /W
Vc c 425 080 * 8K Addressable Bytes of
ABO 524 DBI Mennory(A800-A812)
ABI 6?3 D82
AAz 722 DB3 * T\+ophase clock input
AB3 azl 084
* IIQ Interrupt
A8 4 920 085
A85 lo 19 D B6 * 8 Bit Bi-DirectionaL Data Bus
AB6 l{ r8 0 ts 7
AB 7 12 t7 AB Iz
A B8 t3 16 AB II
A A9 t4 15 AB IO

M CS 65 t4 of MC$65N4
Fcatures

MCS6515
- 28PinFackage

Vs s 128 RES
RDY 227 6Z
O1 326 R /W
I.FN 425 080
Vcc 524 DBI 4K Addressable Bytes of
A BO 623 DA2 Menory (A800-A811)
ABI 722 D B3 * Troophase cLock input
ABE a2l DB4
A83 920 085 * TIQ Interrupt
AB 4 ro 19 D86
A85 il t8 087 * I Bit Bi*Directional Data Bus
t2 t7
t3 t6
14 t5

MCS 65r 5 of MC$6515


Fosturss

Il -11
TIMEtsASEGEf{EhnTIfiNffiF;ru$}g.r
OLCIrK

trl|CS6502
ry.g$gLff?, MC$6SSS,
ryf;$q504, M$$65SS

sYsTEil{
02
S Y S TF[,IC ,

0o (l N )
fl cnvsrnl 0: (ourl
I r'Rvsrnl

MCS6502 Paralle! Mode Crystal Contrclled'Oscillator


MCS 65 03,4, 5, 6 Parailet Mode Crv stdl
Cont"clleC Osillator

SYST EM O ]

@ ,, ( l N )
O: (OUT)

MCS6502 Series Mode Crystal Contolled


Oscillator
MCS 65 A3_,4,5,6 S eries M ode Crystat
Controlled Oscillator

S Y S TE MOJ SYSTF,M

0,' (l N )
0: (ouT)

MCS6502Time BaseGenerator_ RC Network


MC56503, lttcs6S04, MCS6S0S, M€56506
Time BaseGeneration
RC Network
PROCIUCT

lBl&$
not rtcl tB N o LooY.
v^rtEy FofiGtcoRpoRAT€
tto RrrTtf,flousE
ctxTER(2ll) 6c8.t9t0
R0A0.flonnlsTor,t.pA. t9a0r
tltc.
ANiTOUNCEMETUT

BUU-ETtt

Ig?S
SEPTEMBEB,

MCE652OPERIPHERALADAPTER

9ESCRTPTTON

The MCS6520Peripheral Adapter is designed to solve a broad range of peripheral


control problens in the inplementation of microcomputer systerns. This device allows
a vety effective trade-off between software and hardware by providing significant
capability and flexibility in a low cost chip. l{hen coupled with the power and
speed of the MCS6500family of rnicroprocessors, the MCS6520allows inplementation
of very conplex systems at a nininum overall cost.

Control of peripheral devices is handled prinarily through two 8-bit bi-direc-


tional ports. Each of these lines can be prograrmed to act as either an input or
atr output. ln addition, four peripheral contnol/interrupt input lines are provided.
these lines can be used to interrupt the processor or for rhand-shakingrr data
between the processor and a peripheral device.

High perfornance replacenent for


Mot o ro I a,/AlrlI /liOSTE K/H i t ach i p e ri phe ral
adapter.

N channel, depletion load technology,


single +5V supply. MCS652O
Completely Static and TTL conpatible.

CttllS conqratible peripheral lines.


vss I
4A CA1
control 39
PAg wnL

Fully automatic ?thand-shake'r allows very PAl 3 38 rm,-A


positive control of data transfers between PA2 i RiiB
processor and peripheral devices. PA3 5 36 RSg
PA4 6 RSl
PA5 1
34 RES
PA6 I D9
PA7 9 D1
PB9 l0 31 D2
1t
PBI ll JU D3
72 D4

f",,,
PB2 LJ

PB3 13 28 D5
aa
PB4 14 at D6
I I,ATAlus
MtcnoPnocEssoRs
I
?€TIPIIEn^L
DEVTCES .. P85 15 26 D7
Hcr6snx
1 OAPLAYS.ETC,
'RINTERg.
P86 l6 25 02
.,4
1'7 CSi
P87
|
csz
t
-r.r.o, cBt l8
cB2 TY CSfi
vcc 2A R/ft'
Sosic NC5653o Intcl\<'( Dioglaa
SUMMARYOF MCS652O
OPERATION
See MOS TECHNOLOGY MicrocomputerHardwareManualfor detaileddescriptionof MCS6520operation.

cAl/CBt CONTROT_
cR4 tc_RB)
Act i ve T r a - n si ti o n IRQA (IRQB)
B it I Bi r 0 o f In p u t Sig n a l*
l":s::gPlqgg:E
n e g a tive D i sabl e--renrai n hi gh

0 n e g a tive E nabl e--goes l ow w hen brt 7 i n C R A (C R B ) i s set by,


acti ve t.ransi ti on of si gnal on C A I (C B l l

I 0 p o sitive Oi sabl e--remai n hi gh

I t p o sitive E nabl e--as expl ai ned above

*Note: Bit 7 o f CRA ( CRB) will b e set to a l ogi c i by an acti ve transi ti on of the C A _t
^l tr r dl^-
>r . ^1 T h is is jn d e p e n d e nt of the state of B i t 0 i n C R A (C R B ).

CRA (CRB)
cA2lCBz II\|PUTMODES
Active T r a n siti on rRQA(lRQB)
Bit 5 Bir 4 Bit 3 o f In o u t Sicnal * Interrupt Output

00 0 n e g a tlve i )i sabl e--remai ns hi gh

00 1 n e g a tive E nab1e--goes l ow w hen bi t 6 i n C R -A(C R B ) i s set by


acti ve transi ti on of si gnal on C A 2 (C B 2)

0 t0 p o sitive D i sabl e--renai ns hi gh

0 11 p o sitive E nabl e--as expl ai ned above

* Note : Bit 6 of CRA iCRB) will b e set to a l ogi c 1 by an acri ve transi ti on of the C A 2 (C tsZ)
s ignal. This is in d e p e n d e n t of thc state of B i t 3 i n C R A (C R B ).

CRA CAz OUTPUTMODES


Bit 5 Bit 4 Bit 3 Mo<ie !:-:Jl:1:igl

I 0 0 "ila n d sh a ke " C A 2 i s set hi gh on an acti ve transi ti on oF the C nl tl l rc rrupt


o n Re a d i nput si gnal and set l ow by a mi croorocessor t'R ead A D ata"
operati on. Thi s al l ow s posi ti ve corl trol of data transfers
from the peri pheral devi ce to the mi croprocessor.

I 0 I Pu lse Ou tp u t C A 2 goes l ow for one cycl e after a "R ead A D atari orrerati o n.
Thi s pul se can be used to si gnal the peri .pheral devi ce that
data w as taken.

i I 0 M a n u a l Ou tp u t C A 2 set l ow

I I I M a n u a l Ou tp u t C A 2 set hi gh

CBz OUTPIJTMODES
CRB

Bit 5 Bit 4 Bit 3 Mode Il es cri pt i on

t0 0 ' r Ha n d sh a ke " C B 2 i s set l ow on ni croprocess<.rr "l {ri te B D atai l operati on and


o n Wr itc i s set hi gh by an acti ve transi ti on of the C B I i nterrupt
i nput si gnal . l hi s al i ow s posi ti ve control of data trans fers
from the mi croprocessor to the peri pherai devi ce.

Pu l- se Ou tp u t C B 2 goe.s l ow for one cycl e after a mi croprocessor',Wri te ts


D ata[ opr:rati on. Thi ,s can be used to si gnal the 1;eri pheral
devi ce i hat. data i s avai l abl e.

0 M a n r r a l Ou tp u t C B 2 set l ow

I M a r r u a l Ou tp u t C B 2 set hi gh

tn1
t.L'2
M AXIM UMRAT INGS

Ra tin .g S ymbol V al ue U ni t

su p p ly vo lta g e V cc -0-3 to +7,0 vdc Thi s devi ce contai ns ci rcu i try


to protect l he i nputs aga i ns t
In p u t Vo lta g e Vin -0.3 to +7.0 V d. danage due to hi gh stati c
vol tages, how ever, i t i s
o p e r a tin g T e n Pe r a tu r e Ra tr g e T4 0 to +70 oC advi sed that normal preca uti ons
bc taken to avoi d annl i cati on
Sto r a g e T e m Pe r a tu r e Ra n se Trtg -55 to +l s0 oc of any vol tage hi ghei than
naxi mun rated vol tages to thi s
ci rcui t .
(V C C = 5.0 V + 5%, V S S = 0, TA = 25oC unl ess otherw i se noted)
ST AT IC D.C. CHARACT ERIST ICS

Characteri sti c S ymbol Mi n Typ Max Uni t

In p u t Hig h Vo lta g c ( No r n a l Operati ng Level s) vtH +2.0 - vcc v dc


In p u t L o w Vo lta g e ( No r m a I Operati ng Level s) V IL -0.3 - +.8 V dc
In p u t T h r e sh o ld Vo lta g e V tt 0.8 - 2.0 V dc
In p u t L e a ka g e Cu r r e n t I It't pAdc
vin = o to 5 .0 Vd c .1.0 +2.5
R /l { ,R e s e a ,R S o,R S r,cso,csr,eS Z,cl r,c}t,o2
T h r e e - Sta te ( Off Sr a te In p u t C urrent Irs t
( Vin - .: 0 .4 to 2 .4 Vd c, V6 6 = rnax) D 0-D 7,P B 9-?B 7,C B 2 +2.0 + l0 pA d c
_
In p u t Hig h Cu r r e n t
( .Yy1 = 2 .4 vd c) pA [-pA 7,C A z 'i H
-100 -250 - uA d c
In p u t L o w Cu r r e n t IIL
( vr l = 0 .4 Vd c) P A 1-P A 7,C A } _ _1.0 - 1.6 nA d c
Ou tp u t Hig h Vo lta g e vott
( VCC = m in , IL o a tl = - I0 0 p A dc) 1A
- Vdc
Ou tp u t L o w Vo lta g e Vol
IVCC = n in , llo a d = 1 .6 m Adc) +0.4 Vdc
Ou tp u t Hig h Cu r r e n t ( So u r cin g) IoH
( vo n = 2 .4 Vd c) -100 -t000 - pA d c
( VO = 1 .5 Vd c, th e cu r r e n t for dri vi ng other than -1.0 -2.5 - mAdc
T T L , e .g ., Da r lin g to n B ase) p}g-pB 7.,C B 2
Ou tp u t L o w Cu r r e n t ( Sin kin g .l IoL
( vo L = o - 4 Vd c) 1.6 mA dc
Ou tp u t L e a ka g c Cu r r cn t { Uff Statc.) I& a-A -,InaE l off - 1.0 l0 uAdc
Po wcr Dissip a tio n P9 - 2OO 500 mW
In p u t Ca p a cita n ce ci n PF
( Vin - o , T A = 2 5 o c, f = i.0 Ml .tz)
D9 - D7, PA0 - qA 7,P B 4-P B 7,C A z,C B 2 IU
R/ti,Re sct, kS0,R S l ,C S O,r;S l ,C S 2, 7.0
( ;AI ,CBI , 1A

Ou tp u t Ca p a ci ta n ce '2 C out
( Vin - 0 , T n = 2 5 o C, f = 1 .0 MH z) l0 l)F

N0 T F : Ne g a tive sig n in d ica te s outw ard current fl ow , posi ti ve i ndi catcs.i nw ard fl ow .

FIGU R E 1 _ R EAD TIM IN G C H AR AC TER ISTIC S

o.4 v

2.4 V

Oai6

2.4 V
Ortr Bur
0.4 v

ca2 2,4 v
(Puts Out)

o.a v

z,a v
cal
o.a v

CA? 2,4 V
(ri."d Shrr.)

aav

t.L3
FIGURE 2 - W F IT E T IM T N G C H AF AC T ER IST IC S

Addr€ss

o.4 v

2-a v
R€od/Write
o.4 v

2.4 V
oab Bus
o.4 v
TPDw _ _vcc_ 30%
2.4 V
P€riph6ral Data

o.4 v

2-4 V
cB2
(Pul* Outl
o.4 v

2.4 V
cBl
o.4 V
rnsz
?.1v
cB2
( Hand Shrko)
o.4 v

A . C . C H A M CT ERIST ICS

Read Timing Ch a r a cte r istics ( F ig u r e .1, Lcadi ng f30 pF and one TTL l oad)

Ch a r a cte r r stics Syrnbol M1n Typ Max Unlc

D e l a y T i m e, Ad d r e ss va lid to En a b le p osi ti ve transi ti on TnfW 180 -ns


D e l a y T i n e , En a b le p o sitive tr a n sitio n to D ata val i d on bus TE Oq 395 ns
Peripheral Da ta Se tu p T in e TP D S U 300
D a t a B u s Ho ld T in e TH n l0 -ns
D e L a y T i m e , En a b le n e g a tive tr a n sitio n to C A 2 negati ve transi ti on 'IC A .Z 1.0 us
D e l a y T i n e , En a b le n e g a tive tr a n sitio n to C A 2 posi ti ve transl tl on TnS t 1.0 us
R i s e a n d Fa ll T im e fo r CAI a n d CA2 in p ut si .gnal s tr,tf 1.0 us
D e l a y T i m e fr o n CAI a ctivc tr a n sitio n to C A 2 posi ti .ve transi ti on TR S Z 2.0 us
R i s e a n d Fa ll T iin e fo r En a b le in p u t trE ,tfE 25 us

Write Timing Ch a r a cte r istics ( F ig u r e 2)

Cha r a ct e r i st i cs Synbol M i n 't y p Max Unit

E n a b l e P u l se Wid th TF a.470 25 us
D e l a y T i r n e, Ad d r e ss va lid to En a b le p o si ti ve transi ti on Terw 180 - l t5
D e l a y T i n e , Da ta va lid to En a b le n e g a tive transi ti on Tosu 300 -ns
D e l a y T i m e , Re a d /l{ r ' ite n e g a tive tr a n sition to E nabl e posi ti ve Twe 130
transition
D a t a B u s Ho ld T im e Ttll,l 10 -ns
D e l a y T i r n e , En a b le n e g a tj.ve tr a n sitio n to P eri pherdl D ata valici TpOW I 'o us
D e I a y T i m e , En a b le n e g a tivc tr a n sitj.o n to P eri pheral D ata Valid, TCMOS 2,O us
cMos (vcc - 30e,) PA0- P A 7 ,C A z
Dela y 'lime, Enable pos it iv e t r ans it ion t o C B 2 n c g a t i v e t r a n s i t i o n TCAI I .0 lis
0e iay Tirn e, Per ipher al Dat a v alid t o CB z n e g a t i v e t r a n s i t i o n TOC 1.5 us
Dela y Tine , Enable pos it iv e t r ans it ion t o C B 2 p o s i t i v e t r a n s i t i o n TRSi 1.0 us
Rise a nd Fall Tine f or CB. l and CB2 inpu t s i g n a l 5 t1,tf I .0 lrs
De lay Timc, CBI ac t iv e t r ans it ion r a C8 2 p o s i t i v e t r a n s i t i o n TRSZ 2.0 us

1.2-4
PBELIf,IIIUARY

rB&@ffi
OATA

SHEET
xo a r*c}|i l o l -(D ov, lr c.
vAu.EvfoRG€coffrofiATE ccfirtF (2r51
66c-t9t0 ilARCH,tt73
t50 ElTTfr{}rousE
80A$, r088rsT0!Yfl.PA. rtaSl

(MEMORY,I/0,
MCS653(! TIMERARRAY}

The MCS6530is designed to operate in conjunction with the MCS650XMicroprocessor


Farnily. It is comprised of a mask progranmable L024 x 8 ROM, a 64 x B static Ml"t,
two software controlled B bit bi-directional data ports allowing direct interfacing
between the microprocessor unit and peripheral devices, and a software programmable
interval timer with interrupt, capable of riming in various intervals from
L co 262,L44 cLock periods.

x 8.bit bi*directional D ata Bus for direct communication


with the microprocessor
*1024x8ROM
x 64 x 8 static RAM
* Two 8 bit bi-directj-onal daLa ports for lnterface to peripherals
* Two prograrunable I/O Peripheral Daca Dlrectlon Regist.ers
* Programmable Interval Timer
* Programmable Intervai Timer Interrupt
* TTL & CMOScompatible peripheral lines
* Peripheral pins with Direet TranslsLor Drive Capabillty
* High Impedance Three-StaEe Data Pins
* Allows up to 7K contiguous bytes of ROMwith no external decoding

P AO P47

DATA PERI PHE R A L INTERVAL P E R IP H E R A L


C O NT RO L DATA B U F F E R TI ME R D A TA B U FFE R
R E GI S T E R B
A

OATA A O D R E SS C H IP
BUS D E C OD ER S E LE C T
BUF F E R R /W

A9 CSr CSz 02 R/W R.Fs

Figrrre
1. MCS6530Block0iagranr
MAXIMUMRATINGS

Supply Voltage -. 3 ro + 7 . 0
I nput / O ut pu t Vo l ta g e -.3 to +7.0
O per aLing T e m p e ra tu re Range
S t or age Te m p e ra tu re Range -55 to +150

A11 inputs contain protection circuitry to prevent damage due to high


static charges. Care should be exercised to prevent unnecessary
application
of voltage outside the specification range.

ELECTRICAL (VCC= 5.0v+ b%,VSS= 0v,T4 = 25'Cl


CHARACTERISTICS
CHA RA CT ER IST IC STMBOL MIN . TYP. I'{N(. IJNIT
I nput High VolLage VtH vss+2.4 vcc \/
I nput Low Vo l ta g e vrr. vsr-'3 v s s+ .4 It

rnput Leakage Currenti Vt' = VsS + 5v- rru 1.0 2.5 PA


A0-A9, RS., R/w, m, 02, pB6*, pB5rr
_
Input Leakage Current for High Impedance StatE rrs
t t1 .0 r1 0 . 0 uA
(Three Stare)i VIH = .4v to 2,4v; D0-D7
Input High Currenr; VIN = 2.4v rttt -1 0 0 . -3 0 0 . UA
PA6-PA7, PB6-PB7
Input Low Current; VIN = .4v
rri, -1 . 0 -1.6 MA
PAa-PA7, PBa-PB7
O ut put High Vo l ta g e Vott
vcc = MrN, rroao 1 -rooul(pA0-pL7,pBo-pBT
v
rDa-D7 vss+2.4
ItOnn : -3 I',tA(pA0,pB6) VSS+1.5
O ut puE Low V o l ta g e
V CC = M IN , IIOR O < 1 .6 MA vot v s s + .4 v
Output High Current (Sourcing);
vo[ a 2.4v (PAo-PA7,PB0-PB7,D0-D7) 1ot -100 -1000
I t.5v Available for other rhan TTL UA
-3 . 0 -5 . 0 UA
(Darlingtons) (PL6,PB0)
out,pur LowCurrenr (Sinking); VoL .4vTHll:Eg rot 1.6
' MA
Cloc k I nput C a p a c i ta n c e cctt 30 pf
I nput Capaci ta n c e ctt't 10 pf
O ut put Capa c i ta n c e cout 10 pf
P ower Dis s ip a ti o n Po 500 1000 MW

*W hen pr og ra mme d a s a d d re s s p i n s
A 1l v alue s a re D .C . re a d i n g s

r.3-2
WRITE TIMINGCHARACTER
ISTICS

CHARACTERISTIC SYMBOLMIN. TYP. l,IAt(. I]NIT

Cioc k Pe ri o d Tcvc I 10 uS

Ris e & Fal1 Times TR, TF 25 NS

Cloc k Pu l s e Wi d th T\J 470 NS

R/ W v al i d b e fo re p o s i ti v e tr ansi ti on of cl ock TWCW 180 NS

A ddr es s valid b e fo re p o s i ti v e transi tj -on of cl ock TACW 180 NS

Dat . a B u s v a l i d b e fo re n e g a ti ve transi ti on of cl ock TDCW 300 NS

Data Bus Hold Time THI{ 10 NS

P er iphera l d a ta valid a fte r negati ve transi ti on TCPW I uS


of c l o c k

P er ipher a l d a ta v a l i d a fte r negati ve transi ti on TCMOS uS


of clock dri-ving CMOS (Level=VCC-302)

READTIMINGCHARACTER
ISTICS

CITAMCTERISTIC SYI''IBOL MIN . TYP. MAX" IJNIT

R/ W v ali d b e fo re p o s i -ti v e tra nsi ti on of cl ock TWCR 180 NS

A ddr es s valid b e fo re p o s i ti -v e transj -ti on of cl ock TACR 180 NS

P er iphera l d a ta valid b e fo re posi ti ve transi ti on TPCR 300 NS


of c lo c k

Dat a B u s v a l i d a fte r p o s i ti v e transi ti on of cl ock TCDR 395 NS

Data Bus Hold Tine THR 10 NS

EQ (fttt.rval Timer Interrupt) valid before TIC 200 NS


positive fransition of clock

Loading = 30 pf + 1 TTL load for pAg-PA7, PB'-PB7


=130 pf + 1 TTL load for D0-D7

I.3-3
Tcyc

CL O C K INP UT l*-"
Twcw
2 . 4V
R/W o.8v
o.4v
Tncw
?.4 V
ADDRE
SS
o.4 v
THw
2 . 4V
D ATA BUS
o.4 v
Tcpw Vcc - 3 0 o /"
Tocw
PERIPHE RA L 2.4 V

DATA o.4v
Tcuos
WHITETIMINGCHARACTERISTICS
Figure
2

CL O C K IN PUT

R/W
Twcn
T
AD D RE SS

Tpcn
PE R IPH ERA L
DATA

Tcon
2 .4 V
DATA BUS
o. 4v

PB7(TRO) 2 . 4V

o.4 v

B E A DT I MI NG
CHA RA CT E B I S T I CS
Figure3
t.3-4
INTERFACESIGIVALOESCRIPTION

( BES)
Eeset

During system initialization a Logic "0" on the RES input will cause
a zeroLng of all four IIO registers. This in turn will eause aLJ' I/O
buses to act as inputs Ehus protecting external comPonents from possible damage
and erroneous data while the system i; being configured under software control'
The Data Bus Buffers are puE int-o an OFF-STATEdtttttg Reset' Interrupt
capability is disabled with the REF signal. The RES signal must be held
low for at least one clock Period when reset is required'

Input Clock

The input clock is a system Phase Two clock which can be either a
low level g.lgck (Vtl .0.4. Urr, > 2.4', or high level clock (VtL < 0'2.
Vr H= v " " l ' j ) .

Read/Write ( R /W )

The R/W signal is supplied by the nicroprocessor atray and is used to


control the transfer of data to and from the microProcessor atray and the
MCS6530. A high on Ehe R/I,I pin al1ows the processor to read (with proper
addressing) the data supplied by the MCS6530. A low on the n/W pin allows
a write (with proper addressing) to the MCS6530.

InterruptRequest(lRO)

The IRQ pin is an interrupt pin from the interval timer. This same pin'
if not used as an interrupt, can be used as a peripheral- I/O pin (PB7). When
used as an interrupE, the pin shouLd be set up as an i-nput by the data directlon
register. The pin will be normally high with a low indicating an interrupt from
the MCS6530. An external pull-up device is not required; however, if colleccor-OR'd
with other devices, the internal pullup may be omitted with a mask option'

0ata Bus ( D0-07)

The MCS6530has eighr bi-directional data pins (D0-D7). These pins


connect to the systemt" a"ta lines and allow transfer of data to and from
the microprocessor attay. The output buffers remain in the off state except
when a Read operation occurs.

DataPorts
P_egghelq!

't'l rtrMCS6530lras I6 yrlns av{rllablc for perlpheraL I/A operatlonc. [iaclt


pln is lncllvldually e<.rftwareprogrammable to act as ellher an lnpur or 8n
ourpur. 'l'he 16 plns are divlded lnto 2 B-bit ports' PAO-PA7and PB0-P87.
pB5, PlJ6 and PB7 also have other uses which are dlecussed 1n later aectlone.
The pins are set up as an input by writing a "0" lnto the corresponding blt
of the data direction regi-ster. A rrlrt inEo Che data dlrection reglster w111
cause its corresponding Uit to be an output. Wtren in the input mode, the
r.3-5
per ipher al o u tp u t b u ffe rs a re i n the " 1" state and a pul l -up devi ce acts a s
les s E han o n e T T L l o a d to th e p eri pheral data l i nes. On a R ead operati on,
t he m ic r opro c e s s o r u n i t re a d s the peri pheral pi n. W hen the peri .pheral
dev ic e geL s i n fo rm a ti o n fro m th e MC S 6530 i t recei ves data stored i n the
dat a r egis te r. T h e mj -c ro p ro c e s sor w i l l read correct i nformati on i f the
per ipher al lines a re g re a te r th an 2.0 vol ts for a " 1" and l ess than 0.8
v olt s f or a " 0 " a s th e p e ri p h e ra l - pi ns are al l TTL compati bl e. P i ns P A O
and P B O are a l s o c a p a b l e o f s o urci ng 3 na at 1.5v, thus maki ng then capable
of Dar lingt o n d ri v e .

L ines(A 0- A 9)
Ad d r e ss
T her e a re 1 0 a d d re s s p i n s . In addi ti on to these 10, there i s the
ROM SELECT pin. The above pins, A0-A9 and ROM SELECT, are always used as
addr es s ing pins. T h e re a re 2 a ddi ci onal pi ns w hi ch are mask prograrnmabl e
and c an be u s e d e i th e r individually or together as C H IP S E LE C TS . They are
pins P B 5 a n d P B6 . Wh e n u s e d a s peri pheraL data pi ns they cannor be used a s
c hip s elec ts .

INTERNAIOBGANIZATION

A block diagram of the internal architecture is shorvn in Figure l.


The MCS6530 is divided into four basic sections, RAll, ROl"l, I/O and TII.{ER.
The RAI'Iand ROMinterface directly with the microprocessor through the
system data bus and address lines. The I/O section consists of 2 8-bit
halves. Each half contains a Data Direction Register (DDR) and an I/0
Registe r.

HOMlK Byte(8K Bits)

The BK ROMis in a L024 x 8 configuration. Address lines A0-A9, as


well as RSO are needed to address the entire ROM. With the additlon of CSl
and CS2, seven MCS6530's may be addressed, gi-ving 7168 x 8 bits of
contiguous ROM.

RAM-64 Bytes(512 Bits)

A 64 x 8 static RAM is contained on the MCS6530. It is addressed


by A0-A5 (Byte Select), RS0, A6, A7, A8, A9 and, depending on rhe number
of chips in the system, CSl and CS2.

Registers
InternalPeripheral

There are four internal registers, thro data direction registers and
tvo peripheral r/o data registers. The two data directlon registers
(A side and B slde) conErol the dlrectton of the data into and out of
t lte perlplreral plns. A r'1'r wrl t ten tnto the Data Di rect lon Regl ster sets
up the corr espondlng perlpheral buffer pln as arr output. Therefore, anythlng
then written l-nto the I/O Reglster wl11 appear on ttrat corresponding perlpheral

r.3-6
pin. rr0 rt w ri t.te n i n to the D D R i nhi bi ts
A the output buffer from trans -
r nit t ing d a ta to o r fro m th e I/0 R egi ster. For exampl e, a " 1" l oaded int o
dat a d i re c ti o n re g i -s te r A , posi ti on 3, sets up peri pheral pi n P A 3 as a n
out put . If a " 0 " h a d b e e n l oaded, P A 3 w oul d be confi gured as an i nput
and r e ma i n i n th e h i g h s ta te. The tw o data I/O regi sters are used ro
lat c h d a ta fro m th e D a ta Bus duri ng a W ri te operati on unE i l the peri pher al
dev ic e c a n re a d th e d a ta s uppl i ed by the mi croprocessor array.

D u ri n g a re a d o p e ra ti o n the mi croprocessor i s noE readi ng the I/O


Regis t e rs b u t i n fa c t i s re adi ng the peri pheral data pi ns. For the
per iphe ra l d a ta p i n s w h i c h are programmed as outputs the rni croprocessor
will re a d th e c o rre s p o n d i n g data bi ts of the I10 R egi ster. The onl y way
t he I / 0 R e g i s te r d a ta c a n b e changed i s by a mi croprocessor W ri te oper at ion.
T he I / O R e g i s te r i s n o t a ffe cted by a R ead of the data on the peri pheral pins.

!nleryglljrnet
Th e T i rn r:r r;c c L .i o n o f th e )fC S 65 30 contai nn f h ree bas i c parts :
pr elim in a ry divide d o w n re g ister, programmabl e B -bi t regi ster and
int er r up t 1ogic. T h e s e a re i l l ustrated i n Fi gure 4.

T h e i n te rv a l ti m e r c a n be prograul rned to count up to 255 ti me i nterval s


E ac h t i m e i n l e rv a l c a n b e e ither 1T, B T, 64T or LO24T i ncrements, w here T
i' s t he s y s te m c l o c k p e ri o d . h' hen a fu11 count i s reached, an i nterrupt
f lag is s e t to a l o g i c " 1 ." A fter the i nterrupt fl ag i s set the i ntern al
c loc k b e g i n s c o u n ti n g d o v m to a maxi -mumof -255T. Thus, after: ti te
int er r up t fl a g i s s e t, a R ead of the ti mer w i l l te1l how l ong si nce th e
f lag w a s s e t u p to a ma x i mu m of 255T.

T h e 8 b i t s y s te m D a ta Bus i s used to transfer data to and from the


I nt er v al T i me r. I-f. a c o u n t at 52 ti me i nterval s w ere to be counted, r- he
pat t er n 0 0 1 I C I 0 0 v i o u l d be put on the D ata B us and w ri tten i nto Ehe
I nt er v al T i me re g i s te r.

A t E h e s a me ti m e th a t data i s bei ng w ri tten to the Interval Ti mer, Lhe


c ount ing i n te rv a l s o f 1 , B, 64, 1-024T are decoded from address l i ne:; A0 an<. i
A 1. D u ri n g a R e a d o r Wri te operaE i on address l i ne A 3 conLrol s the i nter r upt
c apabili ty o f P B7 , i .e ., A" = 1 enabl es IR Q on P B 7, A " = 0 dl sabl es IRQ on
P B 7. W h e n P B7 i s to b e u s d d as an i nterrupt fl ag w i td-E he i nterval ti m er
it s hou l d b e p ro g ra mme d a s a n i nput. If P B 7 i s enabl ed by 43 and an
int er r up t o c c u rs P B7 w i l l g o 1ow . W hen the ti mer i s read pri or to the
int er r up t fl a g b e i n g s e t, th e number of ti ure i nterval s remai ni ng w i l .l be
r ead, i .e ., 5 1 , -5 0 , /+ 9 , e tc .

W h e n th e ti m e r h a s r:o u nted dow n to 0 0 0 0 0 0 0 0 on the next count


t im e an i n te rru p t will < -rc r.c urand the < :ounter w i l L read I I I I I I I I
A f t er i n E e rru p t, th e i t.i m e r r egi str:r decrements at a di vi de by " 1" ral c ( ) f
t he s y ste m c l o c k . fJ : a fc e r i nterrupt, the Li mer i s read and a val ue tlf
1 I 1 0 0 I 0 0 i s re a d , ttre ti me si nce i nterrupt i s 28T. l he val ue re ad
is in tw o ts c o m p l e me n c .

Valueread=11100100
Complement=00011011

ADD 1. = 0 0 0 I I r 0 0 = 28.
T hus , Lo a rri v e a t th e to ta l el apsed ti me, merel y do a tw ors compl ement add
t o t he o ri g i n a l ti m e w ri tte n i nto the ti mer. A gai n, assume ti me w ri tten as
0 0 1 I 0 1 0 0 (= 5 2 ;. W i th a di vi de by 8, total ti me to i nterrupt is
( 52 x 8) + 1 = 4 L 7 T . T o ta l el apsed ti me w oul d be 416T + 28T = 444T, ass um -
ing t he v a l u e re a d a fte r i n te r rupt w as I l i l 0 0 1 0 0.

After th e i n te rru p t, w h enever the ti -ngr i s w rl tten or read the i nterr upt
is reset. However, the reading of the timer at the same tirne the interrupt
oc c ur s w i l l n o t re s e t th e i n te rrupt fl ag. W hen the i nterrupt fl ag i s read on
DB 7 aLL o th e r D B o u tp u ts (D BO thru D B 6) go to tr0r' .

F ig u re 5 i l l u s tra te s a n exarpl e of i nt' errupE .

R/W A3 D 7 D6 D5 D4 D 3D 2U DO R/W AI AO

IRQ PR O GR A MMA E LE D IV ID E
R EGIS TE R D OW N

D6 D5 D4 D3 D2 DI DO

B A S IC 0S
E LE ME N T 4
F I NT E RV ATt I ME R- F is u re

02 tN Jt'n-l'- L/-"t--J.'1
WRITET

rRo
5
Figure

1. Data written inEo interval timer ls 0 0 1 1 0 I 0 0 = 5219


2, Data i.n Interval timer is 0 0 0 I 1 0 0 1 = 25to
52-213-l=52-26-7=25
8
3. Data in Interval timer is 0 0 0 0 0 0 0 0 = oro
52-4L5-l=52-51-1=0
8
4. Interrupt has occurred at 0Z puLse ll416
Data in Interval tlmer = I 1 I 1 1 1 1 1
5. Data in Interval timer is 1 0 I 0 1 1 0 0
twots comptement is 0 1 0 I 0 1 0 0 = 84to
84+(SZx8)=5001s

W hen re a d i n g th e ti me r a ft er an i nterrupt, 43 shoul d be l ow so as to


dis able t h e IR Q p i n . T h i s i s done so as to avol d fuE ure Lnterrtrpts unti l
al' t er ano th e r Wri te Ei m r:r tl D e r i rtl -on.

r.3-8
ADI}RESSING

A d d re s s i n g o f th e MC S6 530 offers many vari ati ons to the user for


gr eat er fl e x i b i l i ty . T h e user may confi gure hi s system w i th R A M i n l ower
m em or y , R OM i n h i g h e r m e m o r y, and I/O regi sters w i th i nterval ti mers b et ween
E he ex Ere me s . T h e re a re 1 0 address l i nes (A 0-A 9). In addi ti on, there is
t he po s s i b i l i ty o f 3 a d d i ti o n al address l i nes to be used as chi p-sel ects
and t o d i s ti n g u i s h b e tw e e n R OM, R A M, I/O and i nterval ti mer. Tw o of t he
addit ion a l lines a re c h i p -s e l ects I and 2 (C S 1 and C S 2). The chi p-sel ect
pins ca n a l s o b e PB 5 a n d PB 6. W hether E he pi ns are used as chi p-sel ects or
per iphe ra l f/O p i n s i s a m a sk opti on and must be speci fi ed w hen orderi n g
t he pa rt. B o th p i n s a c t i n dependentl y of each other i n that ei ther or bot h
pi- ns m a y b e d e s i g n a te d a s a chi p-sel ect. The thi rd addi ti onal address line
is RS O . T h e MC S6 5 0 2 a n d MC S 6530 i n a 2-chl p systern w oul d use R S O to d is-
t inguis h b e tw e e n R O M a n d n o n* R OM seC ti urrn of uhe I' {U S 6530. W i th E he
addr es s i n g pins available, a total of.7K conti guous R OM may be addresse d
wit h no e x te rn a l decode. B el ow i s an exampl e of a l -chi p and a 7-chi p
M CS 653 0 A d d re s s i n g Sc -h e i n e .

0ne- C h i pAd d re s s i n g

F ig u re 6 i l l u s L ra te s a l -chi p system decode for the MC S 6530.

s're!-c$p-.1Al!!1esr!s
I n th e 7 -c h i p s y s te m th e obj ecti .ve w oul d be to have 7K of conti guous
ROM, with RAI'I in low order memory. The 7K of ROM could be placed between
addr es s e s 6 5 1 5 3 5 a n d IA2 4 . For E hi s case, assume A 13, A 14 and A 15 are all
1 when addressing ROM, and 0 when addressing RAM or I/0. This would place
t he 7K R O M b e tw e e n Ad d re s s e s 65,535 and 58,367. The 2 pi ns desi gnated
as c hip-s e l e c t o t I/O w o u l d be rnasked programmed as chi p-sel ect pi ns.
P in RSO w o u l d b e c o n n e c te d to address l i ne A 10. P i ns C S l and C S 2 w oul d
be c onn e c te d to a d d re s s l i n e s A l 1 and A 12 respecti vel y. S ee Fi gure 7.

The two examples shown would allow addressing of the ROMand MI"I;
however, once the I/O or timer has been addressed, further decoding is
necessary to select which of the I/O registers are desired, as well as
the coding of the interval timer.

l/0 Register
- TimerAddressing

Figure B illustrates the address decoding for the lnternal


elements and timer programming. Addrese llnes A2 dlatlngulshes L/O
registers from the tinter. l,JhenA2 is high and I/O tlmer select is hlgh, the
l/o registers are addressed. Once the I/O reglsters are addressed, address
lines A1 and A0 decode the desired register.

W he n th e ti me r i s s e l e c te d A 1 and A 0 decode the di vi de by macri x.


T his de c o d i n g i s d e fi n e d i n Fi gure 8. In addi ti on, A ddress 43 i s
us ed t o e n a b l e th e i n te rru p t fl ag E o P B 7.
IN T. T IME R S E L.
A3
IN TE R V A L
AI
TIME R
A9

I/O T IM ER SEL .

r/o sEL.
Al uo
A9

R A M S E L.

rI A5
44
I I
A '3 RAM
I I
A2
I
I AI

I A9

I
I
I
R OM SE L.
I
t
A9

A8

A7

A6
A6

A5
A4

A3
A2

AI

A9

A. X indicatesmaskprogramming
i.e. ROM select= eSloRSO
RAM select = gSloRSObA9.A7.A6
I/O TIMER SELECT = ffi.p5g.A9.A8.A7.A6
B. Noticc that A8 is a d<,rn't
carefor
RAM select
C. CS2can be usedaspB5 in this example.

MCS6530
0neChipAddresEncoding
Diagram
Figure
6
r.3_10
T h e a d d re s s i n g of th e R OM sel ect, R A M sel ect and I/O Ti mer sel ect lines
would b e a s fo l l o w s :

cs2 csl Rso


A72 A11 A10 A9 A8 A7 A6
MCS6530/11, ROM SELECT 0 0 lx XX ]1'

RAM SELECT 0000 00 0


I/O T IM ER 0001 00 0
v1cs6530ll2, ROM SELECT 010x XX x
RA,MSELECT 0000 00 1
I/O TII'fiR 0001 00 I
M C S6 s30
/i3, ROM SELECT 0 1 lx XX X
RAI'{ SELECT 0000 01 0
I/O T Im R 0001 01 0
M CS6s30/t4, ROM SELECT 100x XX X
RAI.{ SELECT 0000 01 1
I/O T IM ER 0001 01 I
MCS6530/15, ROM SELECT 1 0 lx XX X
RAI.{ SELECT 0000 10 0
I/O T IME R 0001 10 0
MCS6530/16, ROM SELECT 110x XX X
RAM SELECT 0000 10 1
I/O T IM ER 0001 10 1
MCS6530//7, ROM SELECT 111X XX X
RAM SELECT 0000 T1 0
I/O T IME R 0001 11 0

* RAMselect for MCS6530lt5 would re a d = A 1 2 . A 1 1 . A 1 0 . e g . e.eN. A 6

MCS6530
Seven
GhipAddressing
Scheme
Figure
7

I.3"1I
AD D R E S S IN G OE C OD E

R O M SE L EC T R A M S E LE C T I/O TIME R S E LE C T w A3 A2 AI AO
RE A D RO M I o o I xxx X
W RI T E RA M o I o o XXX x
RE A D RA M o I o I XXX X
W RI T E O DRA o o o xoo I
RE A D DDRA o o I xoo I
W RI T E DDRB o o o xol I
RE A D DDRB o o I xot I
W RI T E P E R.R EG.A o o o xoo o
RE A O P E R. RE G .A o o I xoo o
W RI T E P E R.R EG.B o o o xol o
RE A D P E R.RE G .B o o I xol o
W RI T E T I M E R
+lr o o o ) ( to o
+87 o o o t (lo I
+ 647 o o o * rl o
+ to24T o o o xrr
READ TIMER o o x X o
READINTERRUPT
FLAG o o x X I

* A s = | E n o b l e s IR Q to P B7 A ddrcrsi ng Occode tor | /O R cA i ster ond Ti mcr


A 3 = O Di s o b l e sIR Q to PB 7
FIGU R E 8

lOomor.
Vss 40 PAI
\
PAO 39 PA2
I
.6OOmox.
(15.24mm)
I
tffi";J
ltrcLrt sss
o2
RSO
38
37
PA3
PA4
-T- td- t A9 36 PA5
A8 35 PA6
M
A7 c34 PA7
,l 55 mox. s
(3 93mm) A6 633 DBO
2 .O 2 O m o x . 6
(5 1 .3 0 m m ) .l 90 mox. l/w 32 D8l
(4.82mm)
5
A5 o 3l o8'2
A4 30 D83
.3lOmor. A3
(7.87mm) t2 29 DB4
A2 f328 DB5
( r .6 5 ).o 6 5
.l OOml n. AI t4 27 DB6
i l .o r ) .o4 0
(2.54mm) AO f326 DB7
( . 551 , O 22
( . 45) . O r 8 .Ol Omi n. FEs f625 PBO
(.25mm)
IRQ/PS7 t7 24 PBI
cst/ PB6 f823 P8?
cs2l PB5 19 ?2 PB3
Vcc 20 2l PB4
P in N o .I i r i n l o w c r l c fl c o rn cr w tcn
s y m b o l l z o ti o n i s i n n o rmo l o rl c n foti on

PA C K AGE O U T L IN E P IN D E S IGN A TION

t.3-12
PROOUCT
fl
m AililOUNCEMENT

ro l T C cl .tH o loov.
w txc.
BULLETIN
vAtrty fonc€ C0Rp0RATICEtrrfs{?r5}6661950
pA t9401
050RrrTtiH0ustRoA0.il0RBtsToryt. SEPTEMEER
, 1976

MCS6532 RAM/IO/INTERVAL TIMER CI.IIP

T h e M CS6 5 3 2 is d e sig n e d to o p e r a te i n conj uncE i on w i th the MC S 650X Mi croprocessor Fami l y. lt is


c o m p r ise d o f a 1 2 8 x 8 sca tic RA.f,l ,rw o soft.w are controLLed 8 bi t bi -di recti onal data ports
a l l o win g d ir e ct in te r fa cin g b e Ew een the mi (:roprocessor uni t and peri pheral devi ces, a sofc w are
p r o g r a r n m a b le in ce r va l tim e r with i nterrupt, capabl e of ci mi ng i n vari ous j .nterval s from I c o 262,
1 4 4 clo ck p e r io d s, a n d a p r o g r a m abl e edge deteci : ci rcui t.

* 8 b it b i- d ir e ccio n a l D aca B us for di rect coruruni caE i on w i th the mi croprocessor

* Ed g e Se n se In te r r u p t (P crsi .ti ve or l .{egati ve E dge: P rogrammabl e)

* I2 8 x I sEa tic Ra m

* T wo 8 b it b i- d ir e ctio n al daca porrs for i ncerface to perl P heral s

* T wo p r o g r a m m a b le I/0 P eri pheral D ata D i recti or R egi srers

* Pr o g r a m m a b le ln te r va l' Ii m(.r

* Pr o g r a m m a b L e ln te r va l Ti mer l nl errupt

* T T L & CM OSco m p a tib le peri pheral l i nes

t Pe r ip h e r a l p in s with D i rect Transi sror D ri ve C apabi l l E y

* HiSh lm p e d a n ce T h r e e - S taLe D ata P i ns

MCS6532INTERFACEDIAGRAM Vss 4U /\o


A5 2 39 62
A4 3 .3 8 CSl
A3 4 37 LJ Z
A2 5 36 F5
I
IRAM
AI 6 55 R/iv
I AO 7 l (l ; )
TO
PROCESSOR
I PAO 8 s3 DBO
TO PAI 9 32 DBl
PIRI PTIERAL PA2 10 3t DB2
DEVICES
PA3 1i 30 I)11.5
PA4 t2 :v UIJ4
PA5 28 Dll5
PA6 14 27 t)l]6
PA7 l5 26 DltT
P87 l(; l5 na
PB(r t7 24 PBO
PB5 t8 Pr]I
PI}4 i9 22 Pt]2
vcc zt) ?l PB3
MCS6522VERSATILEINTERFACEADAPTER

Thc ttl0STcchnology, Inc. lfCS6522is a second-g€neration pcriphcral adapter dcsigned to


bring increased capability to the nicrocouputer systen designer for the solution of pcripheral
control and systen tining problens. It conbines thc gencral purposc pcripheral ports, hand-
shaking, intc"rupt handling, etc. of the !1CS6520 rlth a pair of very flexiblc interval tiaers
and a scrial-out/scrial-in shift rcgister. In addition, thc chip is organized to sirplify the
software involvcd in controlling the nany functions provided by thi.s deyicc.

Sorneof the iuportant fcatures of the MCS6522axe as follows:


r Coupatible uith the MCS650Xand MCS6SlXfamily of nicroprocessors.
r Eight-bit bi-ditcctional data bus for cormunication with the nicroprocessor.
r Tno eight-bit bi-directional ports for interface to peripheral devi.ces.

' Data Direction Registers allou each peripheral pin to act as eithcr an input or an
output.

r Interrupt Flag Register allors the microprocessor to deternine the source of an


intcrrupt vcry conveniently.
r Interrupt Enable Register allows very convenient control of interrupts within the
chip.
r Handshake control logic for input and output peripheral data transfer operntlons.
r CllOS-compatible rrArrand "8" peripheral ports.
r Data latching on pcripheral ports.

r Two fully-programable interval timers.


r Eight-bit Shift Register for serial interface.

' Forty-pin plastic or ceramic DIP package.

t.4-2
Arfdvu0otlsts
ulrndilocou3ru,
r iloNltddu
BU GB OOKrII b o o k $ 1 5. 0 0
by Rony, Larsen, & T it u s
published by X. & L. Instruments

A complete inLroduction to operation, prograrlming and


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the use of the E. & L. IvlD-I microcomputer, but is a very
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BUGBOOKV and BUGBOOKVI books


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A complete and novel treatment of microprocessors and


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CMOS COOKBOOK book $9.95


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Howard W. Sams
I977

HOW TO BUY AND USE MINICOMPUTERS& IvIICROCOMPUTERS


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by W illiam B arden, J r.
Howard W. Sams
I97 6
pp. 240

INTEL EOBOASSEMBLYLANGUAGEPROGRAMMING MANUAL Manuf. Data S5.OO


7975
pp. 75
obtain from--fnteI Corp.
3065 Bowers Avenue
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or
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rNTEL 8O8O I\4ICROCO},IPUTERSYSTEMSUSER'S }IANUAL Manuf . Manual $5.00


obtain from--Intel Co rp .
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AN INTRODUCTIONTO IUICROCOMPUTERS: books $7.50 each


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*Volume I - Basic Concepts #20AL
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J -1
MICROCOMPUTERAPPLICATI0NSHANDBOOK handbook
by David J. Guzeman
Iasis Inc.
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Sunnyvale, CA 94085

A complete deseription of hardware and software for


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M I C R 0 C 0MP UDTEESRIGI,I book $25.00


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7976
pp. 400
Martin Research
3336 Comnerci.al Avenue
' Northbrook, IL 60062

A conprehensive treatment of hardware and software for


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M i C R 0 C 0 MP UATNEDRMIC R 0 P R OCESS0R book


by Hilburn and Julick
Copyrlght 1976 by Prentice Ha11, Inc.
pp. 375

Ttre book ls intended for all persons involved in the


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Topics include: digital 1ogic, nurnber systems and codes,


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'
PPS-8, PACEI design methodology and applications.

MICROPROCESSORS & MICROCOMPUTERS b o o k $ 2 3 . 00


by Branko Soucek
Wiley-Intersc j.ence
1976
pp. 607

A general lntroducclon to digltal systems and mlcroconputers


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J-2
'MICR0PR0CESSORS:NI}'J DIRECTI0NSFOR DESIGNERS collected articles
Edited by Edward A. Torrero $8.95
L97 5
PP. 135

seleeted artlcles reprinted frou @ Design Magazine.

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SCELBI S0FTI,IARE book $1e.e5
Machine Language Prograrnmiag for the 8008
Scelbi Co4uter Consulting Ine.
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pP. 170

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SCELBi S0FTI,IAREMANIjALSB0B0 books


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An 8080 Assembler Program $f7.95 ppd
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SCELBI'S '8080' SOFTWARE GOURMETGUIDE AND COOKBOOK book $9.95


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pP. 170
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HANDBooK
APPLICATI0NS
sc/MPMICRoPR0CESS0R DATAB00K
- I4ANUFACTURER
pubJ-ished by National Serniconductor Corp.
2900 Seulconductor Drive
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available from loca1 National Sernicooductor TechnicaL representative

Hardwane and softward applicatlons of the SC/l@'

SCELBI'S '6800' SOFTWARE GOURMETGUrDE AND COOKBOOK book $9.95


I4achine Language Programming for the 6800
Scelbi Computer Consulting Inc.

J._3
F ORMIC R OP R 0 CESS0R5
S O F i l AR D E S i GN book $12'es
by John G. Wester and Wi11lam D. Simpson
copyright 197.6 by Texas Instrument Inc.
PP. 372
order from: Texas Instruments
P.O. Box 3640, M/S-84
Dal1as, TX 75285

Book was wriiten to assist Eechnical and non-technieal people


in taking their first steps toward designing with mircroprocessors
and related software. Topics range from basic binary numbers Eo
eomplex examples of microcgmputer applications. Book was written
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it conEains excellent application exampl-es which should be of
interest even to seasoned Programmers.

reference book $8.95


TTL C00KB00K
by Don Lancaster
r974
pp. 335
published by Howard W. Sams & Co. r Inc.

r efer ence book s8'9s


T V T YP E b J R ITCE0R0 K B 0 0 K
by Don Lancaster
L976
publlshed by Howard W. Saurs& ConrpanyrInc.

*e"#'*vs"
*r*"'""pe'
* ?'4'+{"l''+
k'f,o* '*-*"gr*-'a
r l'1
0 n \}*
v |
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'j w
11
l/, . L,{J
livl ' t ,i r'*'0"*'
a: l'riv

I '
',t
tll
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r l-.r.r
dr"i|"'
f 1.ru
' .4'

{t-

J-L
B. PERIODICALS

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BYTE
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Dr. DobbsJournal of COMPUTER


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J-6
str'|uil01snAlNom}{oc
J0 Auvssolg
x xtoNsddv
GIISSARY OF COMMONI,Y
USEDI,ECNOPROCESSOR
TER,}4S

ABSOLUTEADDRESSI}Xi - SEE DIREC? ADDRESSING

aBSOLirtE rNDExm TDDRLSSTNG- the effective address is formed by


adding the index regi.ster (x or T) to the second and third byte
of the instruction.

Acctil'ltILATOR - A register that holds one of the operands and the


result of aritbnetic and logic operations that are perforned
by the central processing unit. Also cor'uronly used to hold
data tna.nsfemed to or fron I/O devi.ces.

AccuMUr.lftOn.rDDRESsrNc - ore byte instructioa operating on the


acsuuulator.

ACIA - fs an Asynchronous Corumrnications Interface Adapter. This


is an NMOSI,SI device produced by Motorola for interfa.ciag
Seria-l. ISCII cievices to a micro*processor systen.

ADDRESS- A nunber that designates a memory or T/o rocatj-on.

ADDRESSBUS - A multiple-bit output Bus for transmittir€ an ad.dress


from the CPUto the rest of the system.

AIS0RfT$'I - The sequerEe of operatj.ons which defines the solutj.on


to a problem.

ALFHANID{xnrc - Pertainjng to a character set that contains both


letters a:rd numerals and usually other characters.

AIU (AnIfiS'IETIc/I.r,cTG I'IIIT) - The unit of a computing system that


perfcnms arittrmetic and logic operations.

A^SCII CODE- the America-n Standard Code for Infornati.on Interchange.


.a seven-bi.t character code without the parity bit, or an eight-
bit character code with the parity bit.

.0.ssn'IBLER- a program tha.t traaslates symbolic operation codes into


machine languager syurbolic addresses to memory addresses and
assigns values to all progran symbols. rt translates source
prograns to objeet prograns.

.[9SF.I4BLY
DIRECffgE - A nnenonic that nodifles the assenbler operation
but does not produce an object code (e.g,1 a pseudo instruction).

A.ssn'lBLr tAl[cuAGE - A corlection of symbolic IabeIs, mnemonics, and


data which are to be translated into binary machlne codes by the
assembl-er.

K-1
&SI-NCi{R0N0US- Not occurring at the sane time, or not exhibiting
a constant repetltion rat'e; irregular.

BesE _ 'rsEE R.S,DIX!r.


BCD - Binary Code Decj.nal-. A means by wirich decjma.L nunbers are
represented as binary values, where j-:rtegers i-:r the raage 0-!
are represented by the four-bit binary codes from 0@0-1001,

BIDIRECTIONALDATABUS - A data bus in which digital information can


be transferred in either direction

BIN.C.Hf - The base two nunber systems. All nunbers are eryressed as
polrers of two. ls a consequeneer only two symbols (0 & 1) are
requ,ired to represent any nunber.

BIT - the smallest unit of jrtformation which can be represented.


A bit may be in one of tro states, represented by the binary
digits 0 and 1,

BIOCK DIAOR.AI,I- A diagrarn in rhlch the essential units of any


systen are drawn in the forn of blocks, and thejr relationship
to each other is indicated by appropriately connected lines.

BR.II'ICHINSTRUCTION - i" lnstructi.on that causes a program Jump to a


specified address and execution of the instruction at that address.
During the executicar of the br.neb instruction, the central proces-
sor replaces itre contents of the progran counter with the specified
address.

BREAKP0INT - Pertaining to a type of instruction, i.nstruction digit,


or other condition used to intenupt or stop a computer at a
particular place i-u a prugram. A place in a program where such
an iaterrupticn occurs or can be made to oecur.

BUFTER - .[ noniaverting digital circuj.t elenent that uray be used to


hanile a large fan-out or to invert i-nput and output levels.

A storage derj.ce used to corpensate for a difference irr rate


of flow of data, qr time of occurrence of events, when transraitting
data from one devi.ce to another.

BITE - .{ seqrrence of eight adJacent binary diglts operates upon as a


unit.

Clr.L - A special type of junp il which the central processor is


logical.ly requJred to rrremembernthe contents of the progran
counter at the time that the junp occurs. ltris "]lous the
processor later to res@e execution of. the main program, when
it is flnished rlth the last instruction of the subroutlne.

K-2
:i

l , .,'-'1

--/

- An arra.ngement of two or more similar circuits


CASC.A'TE in uhi-ch
the cutput of one circuit provides the input of ihe next.

CLOCK - A device ctr a part of a device that generates all the timing
pulses for the coorciination of a digital system. System clocks
usually generate i:wo or more clock phases. Each phase is a sep-
arate square wave pulse train output.

CODI}IG - ?he prccess of pnepari;rg a prograln from the flow ehart


defining an algorithm.
COIIPILER - A language translator wh.ich converts individual- source
statements into multipie machine instructions. A compiler
translates the entire progialn before it is executed,

- Re'rerse aIL binary bii


CCMPLII{EbIT values (ones become zerosr zeros
becomeones).

CONDITIONAI- In a. conrputer, subject to tire result of a comparison


made during computation'

coNDITIOltAt BREAKPOINT L{STBUCTION - A conditional jump instructj.on


tha'r, c4tlses a computer to stop if a specified switch is sef,
The routine then mqy be allswed to proceed as coded, or a jump
may be forced.

C0IIDfTIONAIJUI,IP - AIso caLled conditional transfer of control. An


instruction to a computer which will cause the prsper one of
two (or more) addresses to be used ir.r obtaining the next instruc-
ticn, depending on someproperty of one or more nunerical exFres-
sions or other conditions.

CONTAC?tsOmfcE - The unconirolled ma.king and breakirg of a. contact


when the switch or relay contacts are closed. An important
probl-em i:r digi'tal cjrsuits, where bounces can aet as clock pulses.

pR0CE$SINGUNIT) - The r:nit of a. cornputing system that


CPU (3E[,ITRAI,
csrtrols the interpretation and executicn of j:rstructions; lncldes
the AJ,U.

DATABUS - A multi-li,ner para1le1 path over which digital daLa is


transferred, fron any of several destinations. 0n1y one transfer
of infcrmation can take place at any one tine.. While such brans-
.fer is taking p1ace, aIL other sources that are tied to the bus
rmrst be disabled.

DEBUO - Detect, lccate, end correct problens tn a program or hardnare.

DEBOUNCED - Refers to a switeh or relay that longer exhibits con-


tact bor:nce.

K-3
DECODER/DRffER - A code eonversion device that can also has sufficient
voltage or current output to drive an external device such as a
di.splay or a lamp monltor

DE4IILTIPLE$R - A digital device that directs infornation from a s5.ng1e


i.aput to one of several outputs. Information for output-channel
selection us-ually is pesented to the device in binary weigh,ted
forn a.nd is decoded internally. lhe deyice also acts as single-
pole rnrltipositi.on sodtcb that passes digital i-nfca"raation" in a
di.rection opposite to tbat of a rnultiplexer.

DESIINATION - Register, memory location or I/A devlse shich can be


used to recei.ve dat,a during instruciion execution"

DEVICESE[,EC?PUI,SE - A softr+are-generated positlve or negative


clock pulse frora a ccmputer ihat is used to strobe the operation
of one or nore I/0 devices, includirg i-ndividual integrated
circuit chips.

DInEgI ADDRESSISrc- The second and third


byte of the instruction contain the address of operand to be
used.

DD,fA(DI&ECT MW0RI ACCESS) - Suspension of processcrr operatioa to


a'l'low peripheral units exberaal to the CPU to exercise control
of nencry for botlt RE.ADand l,RIlE rithout altering the lnterna1
state of the processor.

DINAMIC8.Al'{ - .d random access nemory that uses a capaciti're element


for storing a data bit. They reqrira REISBSH.

EECDIC - The Extendeo Binary Coded Decirnal Interclusrge Cocie, a


di€itaJ- code prinari.ly used by Sli[. It c]osely resenbles t]re
half-.A,SCII code.

mGE - The transition fror logic 0 to logic 1, or from logic 1


to logic 0, in a cLock pulse.

EDIIOR - A program used foc preparing and modifying a sourc€


progran or other fiJe by additlon, deletion or change.

EflFECTM iDDRESS The actual address of ihe desired location Ln


memory, usually derived by smre forn of calculation.

ilP.tl{SION - The process of inseriing a sequence of operations


representea bI a macro nane when the macro nagre is refereneed
in a trrrogran.

FALL TIME - The tirne requi.red for an output voltage of a digital


clrcult to change from a loglc I to a logic 0 state'

K*ll
FAII-OU? - The nunber of para]le1 loads uifhin a given logic f anily
that caa be drlven fron one output mode of a logic cjrcuit.

FETCH - One of tim twc functional parts of an instruction cycIe.


fhe collectj.ve actions of acquiring a mencry a<idress, and then
an instnuctisn cr data byte from nemory.

FTT:T.D - An area of an instruction mnenonic.

FTr.n A collection of data reeords treated as a single u-nit.

ruFO (I'IRST IN, F'IRSI 0UT) - ?he terrn applies to the sequence of
enteriag data into and retri.eviag dat,a from data storage"
The flrst data entered is the first data obtaiaable wi.th FIFO.

FT,AG - A status bit which indicates that a certaln condition has


arisen during the cource af aritlmetic or logical marriprrlations
or data transmission between a pair of digi.tal. electronj.c
devices" $ome flags uray be tested and thus be used for deter-
mfnlr€ subsequeat, actlons"

ELlo RffiISTER - A reglster consisting of the flag flip-flops.

ELOWCHIRf - A symbolie representation of tbe algorithn required to


solve a problear"

FRQUENCY - fhe rnrnber of recumences of a perlod,ic phenornenonin


a unii of tirne. Electrical frequency is specified as so neny
cycles per second, 3r llertz.

FUIL DUPLEX - A <iata transnission mode which provides simultaneous


and independent transm:i,ssion and reception.

HALF-.ASCfi - A 6l+-character A,SCII code that contalnsttre code rords


for nusleric d5gits, alphabetie characters, and symbols but not
keyboard operatlons"

HAIF DUPLE{ - 4 data tnansnnlsslon mode which provides both trans-


mlsslon and reception but not simultaneously.

zuNDSHAKE - Interactive conmr:nicatlon betrreen two system conponents,


such as betseen the CPU and a peripheral; often required to prevent
loss of data.

HeRDI'tlRE - Physical equS.pmentnechanical, eleetrlcal., or electronic


devices

HH$DECII,IAI - A nunber system based upon the radlx-16, ln whlch the


declmal nunbers 0 ttnough 9 and the letters A through F represent
the slxteen distlnct states ln the code.

K-5
HIGH .ADDRESSBYTE - ?he eight most si.gn-ificant bits in ttre 15-bit
memory address wtrd. *bbreviated H or E.

Ic (wrmaetnn elRcuII) * (f) A conrbination of i:rterconaected


circui.t elements inseparably associated on or rj.t&1n a con-
tjrmous substrate. (a) ^Anyelectronic derrice in which botb
active and passi.ve elements ae contained in a single package.
In di€i.ta: el"e*tronies, tire term ehiefly applies io circuits
c ontaisliag senriconductor eleraents.

IMMEDIJITEADDaESSE'I* - lbe operand is the second byte of Lbe


instruction, rather tha:i its address.

IMPilm .ADDRESSI]&3- A one-byte instruction that stipulates an


operation i:rternal t,o the processor. DOESNOTrequire ary
addltlonal" operand"

INCRET{E$IT- ?o inerease the value of a binary word" Typically,


to iacrease the vaiue by 1,

INDE@ ATDRESS - SJaind*xed address is a m,enory address forned


by adding lmnediaie daia j.ncluded rith the i-nstruction to the
contents of sorqeregister or menory location.

Il$DF:lm) $IDIP,$CT ADDRE*9G{G - The secq:d byte of the inst'ru.ction


is added to the eontents of the rtXrt ind€x register, d.lscardfulg
the earryu tc forrn a aero-Fa€e effectlve address"

INDIRECT AESAIU"IEAIDRESSISIS - ?he secsrd a::d third bytes of the


insirucii"*n con?,ei:l the address for the first of ilro bytes ln
nemor-v tha,t, s*ntsin ihe effective address *

IllDIRneT mFElmD IDDRF"SSfiffi - fhe second byt,e of tluis insiructlon


is a aero-pege adfu*ss. fhe eontents of this a*ro*pege address
are added to the ilYil ind.ex reglster to fcrn the lcr*er I Uits
of the effective acidress. Then the caruy (:f any) is added
to the conteats of the nexi aero-page address to form the
h"lgher I bits of ile effective address"

INDIRECT ADDRE$S - An ad.dress used. rnith an instructlon that indlcates


a nanory locatim or a register that ln turn conta:i.ns the actual
address of an operand" ?he i.ndirect address may be lncluded with
the j-nstruction, contalned ln a register (regl.ster indirect
address) or conta-3::ed ist a memqry locatlon (menory directed
iadj-z'*ct address)

IIITERfAC:IiG - The jot"nSng nf members of a group {suci: ae people,


instn*neats n eac " ) ::l su.cb a ray that they are able ta
fuaction 1n a r:ompat*ble and coordlaated fEnh{ oR,

*-o
INSTRU0TI0$ * A statement t'hat specifies an operation and the values
or locaii"ons of its operaoreis.

INSTRUCTIOHCCSS * A rxri.que binary nus&er that encodes an operation


tha.i a comp:,ter can grerform"

INSTRUC?IO}ICYCLE - A s::ccessive groep of mach:ine cyclese as few


as on€ or as many as sesen, whlch together perforn a single
miers_socess<>:rj.nstruetion lrithjn ilie rnicroprcces$tr chip.

n'lSTAUCfI0l{ FECSDER - A de*oder withi-n a 6?U that deeodes the


lnstrucilorr code rnta a series of actions ihat ihe conputer
performs*

INSTBUffiIG$ f-{SGi$mR - The resister that contaLms the instruction


code.

INTERPRETffi * A language translaior whj.ch converts indieidua1 source


statements ilto mul"tiple machj$e instruetions by translating and
executlag each staieraent as it is encountered. Can not be used
to generate ohje*t code.

INISERUPT - In a compr:.ter, a break in the normal fl"on of a system


or routine such that the flow ca.n be resusred frqrr that polnt
at a ]ater tj"me" ?he soulce of the lnternupt nay 1:e-.internal
cnr external"

I/0 DEVICE - input/output, devi,ce - any *igii.ta-l device, 1-neludiag


a si.lrgle i-ntegrated. circuit chip, ihat transnits data on strobe
prlses i.s 8, *€npuhe:: ar receises ciata or sirabe puSses from a
e cEnpui*r -

JUMP - (1) To cause the next instructioa to be seleesed from a


specified storage location in a computer " (2) A ciev-iation
fron the acrmal $equence of execution of instructions ia a
coraputer

L{FEL - One or more characters that, serve ta define an i.tem of


data or the location of an instructlon or subroutine. A
character is cne symbol of a set of elementary symbols, such
as those corresponding to typewriter keys

I,ATCH - & simple logic st,orage element. A feedback loop used ln


a q'nmnetrical d.igital e!'cu-it, such as a flip*fJ-op, to retai.n
4^ ^+^+^
DU(LUq.

LnaDING mGE - the transi"tion of a oulse ihat oecurs first.

K-7
t@ (LIGIIT-S{ITTEG DIoDE) - A pn junction that ernits light when
biased in the forward direction.

LEVEL-IRIGCERED - The state of the clock inputr bebg either logi.c


O or logie I carries out a transfer of i.nformation or completes
an action.

tffo (UtsT S, FInST oUT) - The latest data entered is the first
data obiainable frcrn a LIFO stach or nemory section.

I.SB (IJ.LST SIGNITIC.ANTBIT) - Tlre digit with the lowest weight,ing


1u a binary nnber.

TISTING - An assenbler output containlng a listing of prograrn


mnemoa-ics, the nachine code produced, and diagnostics, i.f an;r.

ItrfC - (1) The science deal.ing wlth the basic princlples and
applications of truth tables, orltchingl gatlng, etc. (2) See
Icglcal Deslgn. (3) 41so called symbolic logic. A nathenatical
approach to the soluti-on of complex situations by the use of
spnbols to defile basic concepts. The three basic logic syrnbols
are AND, oR, and [gt. l{hen u,sed in Boolean algebrap these synbols
are somewhat analogous to addition.and nultiplication, (L) fn
conrputers and fufornation-processing networks, the systematic
nethod ttrat governs the operati.ons perforned on lnformatlon,
usually with each step influencing the one that follows. (5)
The systenatlc plan that, defines the iateractions of slgnals
in the design of a system fe automatic data processlng.

tGICeI, DECISIOII - The ability of a computer to make a cholce


between tro alternatives; basically, the ability to ansner
yes or no to certain fundanental questions concerrring equality
and relative magnitude.

LOGIC.0LDESEIV ,- fhe syntheslzing of a network of logical elements


to perforrr a specifi.ed fuoction. h digltal electronics, these
logical- elements are digltal electronic devlces, zuch as gates,
flip-flops, decoders, counters, etc.

IOGICAI ELEMENT - Iio a computer cr data-pnocessing system, the


saral'lest buildiag blocks which operators can represent in an
appropriate system of symboJ.ic Iogic. gpical logical. elements
are ttre IND gate ard the nflip-flopn.

IOOP - A sequease of instructlons that is repeated unti-L a ccn-


diticaral exit situatloa is met.

I,0i{ ADDRESS BIYIE - The eight least slgn'l ficant bits ln the 16-blt
memory address rord. Abbreviated L or LO.

K-B
LSI (tAmE scALE tr{TSGe"egIS:{} ..Iategrated circuits tirat perforro
cornplex functions" Such chips usually contain l"0O to 2r0O0
gates "

MACHI$5C0.18 * A binarp c,;de that a computer deco<ies to execute a


specific fu::.*tion"

MACHINECYULE * A subdlv'ision of an instructj.on cycle dr:ring r*hich


ti.rne a relaied gr*up of ac',ions occur nithj-a ttre microprocessor
chlp" In the 8080 ruicroproeessor, t,here exi.st aine different
glacirJ"ne*ycles" .&}tr i-nstructions are combinations of one e
more ef tbese maehi.aecycles.

MACRC,qFSSm'mLffi* rh assembler routi:re capable of assembli-ng


progra&s whj"ch seata*i"n and referen e raaero instructions"

I4ACROINSfRIJC?TO$ - 3 s"ombcl that is used to represent a specifled


seque&ceof sor:rc* instx"uetions.

I,UGNETICC0S,E - .{ iype of eonputer storage whi.ch empl-ays a core of


magnetic unator*aL trj"Lir i*ires threa'Jed Llu.uugh lt. the core can
be magnetized to represent a biaary I or 0.

M.AONETICDRUl,t - A storage device coasisting of a rapidly rotating


cylinder, the su"rface of whieh can be easlly magnetlzed and
strlch tri.Il retain the data. Infornation is stored in the form
of,nagneti"zed spots (or nc spots) on the drugr suface,

M.AOIIETIC
DtrSC - *1 f,lat eircr.[ar plate wittr a magnetic surface on
**hich data can be sterei by selective magneij.zation of portions
of the flat surface"

MIG$EEI0 ?iFH - ,t siorage system based on the" use of magnetic


spots {Ut*s} cn meta: cr coated-plastic tape, The spots are
arranged so that the d,es*red code is rea.d out as the tape
travels past the read-write head.

MA,SKII{$ - A proeess that uses a bit pattern to select bits from


a data byte for use jrr a subseqrrent operation.

I,IEI{0RI - "kry derrice that can store logic 1 and logic C bits ln such
e ma:rner the.t a singj.e bit or group of bits can be accessecl
and retrieved*

M$,{OBI IDDRFSS - A 16-bit bJ"nary number that speclfies the precise


menory location of a nemory wcrd among the 65,536 different
possible memory locations.

MEMORICEIJ. - A singl* storage element of memory, capable of storing


one bi"t of digieal jnformation.

!r _Q
MICROCOI{PUIER - A courputer system based oa a nicroprocessor and
contains al1 the memory and interface hardware necessary to
perforrn calculat,ions and specified j-nformation transformations.

MICROPBOCESSOR - A central processing rrnit fabricated as one


integrated circuit.

MICROP8OGRAM - A cwrputer progran written i^n the most basic


iastructions or subcoumands that can be executed by the
cwrprter. tr?eguently, it is stored in a read-only nenory.

MNEONIC - Syabols representing machine instructions designed


to allcm easy identification of the functions represented.

UODIILO - The nodulo of a counter is simply ne the number of dis-


tinct states the counter goes ttrough before repeatLng. A
fos-611 biaary counter has a rnodulo of 16; a decade counter
has a uodulo of 10; arrd a divide by-? corrnter has a nodrrlo
of 7" In a varia.ble urodulo cor:nter, n can be a-qy value within
a ranae of values

UONIIOR - Sofbcare or hardware that observes, supervises, coatrols,


. or verifies sysLem operation.

UOIIGTABLEMIII,?IVIBRAIOR - AIso called one-shot multivibrator,


single-shot nulti-rribrator, or start-stop multivibrator. A
circuit havfg oaly one stabl'e statel fron whi.ch'it can be
triggered to change the state, but only for a predeternal-aed
interval, after which it returns to the orlgi-aal state.

usl (umui$ scal,E INIERdTIoN) - Iategrated circuits that perfornr


simple, seJf-con1,a'ined logic systemsl such as couaters and
fllp-flops.

llsB (uosr srcNffrc.$rr) * rhe dlglt rith ttre |righest weightlng in a


binary iu:mber.

llutllPlalrER - a dlg:ital devlce that can select one of a nunber of


lnput,s aira pass the logic 1evel of that input on to the output,
Information for iaput-channel selaction usually is presented to
the device in binary weighted forrr and decoded lnternal)y.
The devj.ce acts as a single-pole nrrltiposition $ritch that
passes digital lnfornatlon 1n one direction only.

ilHiA?fYE EDOE - The transLtion froa logic 1 to log:i.c 0 ln a elock


pulse.

NgiATfqE-EDOE ?nl(nEnm - Fansfer of infomation occurs on ttre


negative edge of the clock pulse.

NmATIitE IOOIC - A forn of logic in rltrich the more positive voltage


level represents logic 0 and the more negati.ve ievel rElresents
Ioglc 1..

NESTII\E - .4, sequentiaL calling of srrbroutines wlthout retr:rning


to the main pnogra.un,
K-10
NIBBLE - A sequsr:.ceef fcu:r acija*ent bits, half a byie, is
ribble" *, hex*-decimal- m FCF ciieit can be represented ilr
a s:ibbl"e.

TI{#*FHA$Hel,(]Str *
NON-OVEEI.AFFSIG A, tr.ro*phase cloc}t i-a nh1ch the
clock pulses of *I:e indiv-idual phases do not overlap.

NON-VOLA?II&tffilfiRY - A semieonduc'i;cr nenory devi.ce in wirj.ch the


stored d*glt'*3 data j.s not lost when the power is removed.

OCTAL A nrmber: sysi*m based upon the radix 8, fu which the


decisral snmbers 0 through f represent ihe eight distinet
states "

0IIE-BYTE-INSfffJC?IC31 - An jrstructicn that ccarslsfs of eight


contigu,cus hits oc*upging one successive location.

OPSI-COIJ,ECTOR Ct?fF:JT * *n outlrut, frst an integrated circult


device in r,rirlcS: ihe f*nal ttpu1l-upn resistor in the ou+.put
transi,stor fry the Cesiee is nissing and imsi be provided
by tirc user before the cjrcuit j.s cmiple*"ed.

0PEA.A],ID- Eata wh*eh is, or wllI beo operated upon by an arlthnetic/


logic i:r,structj"on; usually identified by the address portion of
an instruction, explic*tJ"y or implicitly.

OPEAAIIOS - Moving or manS.pulating data ln tbe CPU or betrceen the


CPUand periphe'aJs.

P.AGE - A page consists of aJJ the locations that can be addressed


Uy 8-U1ts (a- total at 256 Locatj.ons) startiag ai 0 and going
through ?55" iix,e address witiein a page is determined by the
lorer 8-Alts of the adCress and the page nunber i0 tiraugh
255) is determined. by ihe higher B-bits of a i5-bit address.

PARITY - "4,metleed.*f checking the accuraey of binary nr-rilbers, tf


even parity is used, the sun of all the 3t s in a nunber and
its cerespondS-ng partty bi-t is always ev€oo If odd parlty.
is used, the sum cf all the lrs alrd the parity bit is always odd.

PiRTITIONII'& - The Froeess of assiguing specified. portions of a


systen respcnsibi.lity for perform:ing specified fi:nctions"

PC - See TTPAGRAM
e0U$?ERtt

PIe

PERIPHER"AI,- A devi*e sr subsystem external to the 0PU rha*" prwldes


additional sysiem capablliti.es.

POLLINC - Pe:'iodlc interrcgation of each of the devices that share


a cormrunications l-i^ne to deternlne r*hether it reqrires servlcirtg.
the mmlttplexer er *ontrol statlon sends a po}l tirat has the
effect of asklng the selected devlce, ttDo you havo anything
to transrlt?fr

POP - Retrieving ciaf."afron a stack.


PORT A device or netnork through wh-ich data raay be transferred
sr where device or network variables may be observe<i or measured.

POSI?fVE EDGE The tnansition fronr logic 0 to logtc 1 in a clock


pulse.

POSfTfqE-mCiE TRIGGERED- I?ansfer of infornation occurs on tbe


positive edge of the clock pulse.

POSITfYE IOOIC - A feur of logic irt rhich the more positlve voltage
level represents logic 1 and the nor€ negative 1evel represents
logic 0.

PRIORIIY - A preferentiaL ratlng. Pertains to operati.ons that are


given trrreferenc otheq system operations.

PROCESSOR- Shorthand word for nicroprocessor

PRqiR.A$ - A group of ilstructdons rhtch causes the compute,r to per-


form a specified furction.

P86R"A!,1O0UIITER - A register contedniry the address of the next


instruetion to be executed. It ls automatically lncrenented
each time progran instructions are executed,

PRGzu!{ ljIBEL - A strrnbol w}tlch is used to repesent a memory address.

Pn@{ (Pn*zu},lM4BLg RE0MNIJr MneBI) .C,read-or'}y..nenortrr,that:.is


fJ.eJ:d:programnable. by, fhe,. lrE€Fr

PROP.{GATION DETAI A measure of t'he tlme required fe a logi.c


slgnal to travel thnough a logic devlce or a seri-es d J.ogic
devices. It occurs as the result of four types of cLrcult
delays - storagep riser fe]], srd turn-gn-delay - and is
the tir:e betseen when the inprrt signal crosses the threshold -
voltage point aad when the responding voltage at the output
crosses the same voltage point.

PSEIIDO-INSTRUCTION A mnemonic that modifies the assenbler opera-


t'j.on but does not produce an object code.

PULL-IIP RESIST0B - A resistor connected to the positlve supply


voltage to the outgut coLJ-ector of open-collector logic. Also
used occaslonally rith nnechanical slriiches to insnre the
voltage of one or more swi.tch positlons.

P{ILSEWIDXtI - .A,lso called pulse length. lhe td.ue lnterval between


tile polnts at whLch the lnstantaneous vslue on the leading and
t'ra"lling edges bears a specifled relatlonship to the peak prrlse
ar:Plltude.

K-T2
Puiii - Fut,t--r:g ia:; j-nlc a st,ec<,
)
eiJIX - Aisc cal-led the base. fire tot,al nwrber of ii.siinct marks
o:" e;'rnbcls usec i-n a n';ilberi-'rg sysiern" For exarple, since the
c.ecirnaL nun'oe:'xlg systen uses ten synbois, *,he raciix j.s lC.
in tne bi-nar-v n';rbe:i-ng systenr the radi.x is 2, because there
a:.e onry iwc na.:'ks cr synboL" (O ana t). In lhe octal number-
llg systen, ihe raiix is 8, anci in the hexaciecimaJ" nunibering
< r r cto n
eJ J ev r .r ,
+v .^vh e f a
! s r dtd :X iS
+J 16.
:v.

R.,U,i(R&\Doi.I ACCESSt{il"{ORY) - A semiconiuctor m€mory inic which


logic 0 anq lesic I srates can be r,ritten (sterei) and ihen
read o:-u agai"n (retrieved).

P.El', - in semiconciuctcrs: To transmit da+.a frcm a semiconductor


memory to sone othe:' digital electronic device" fhe term,
frreaCfl aisc applies lo computers and other types of memory
I
cievices.

REFRESH - The process by which dynamic R.AJtr cells recharge the


ca.pacitive node io r'raintaln the stored j.:rformailon. The
chargeci nodes discharge ciue t,o leakage cwrents and tq'ithout
refresh, Lhe siored data wouici be 1ost. thi.s process must
reoccur every so na-ny microseconCs. Durlng refresh, fhe R4M
car.::ot be accesseci.

REFP.ESH L6IC - The logic required to generate all ihe refresh


signals ano r,ining.

FEGiSTEP - A harciware eleraent used to temporarily store data.

F-Ei,riTM }TDRF^SS - A rela.iive anCness i.s a memory adciress formed


r*'
vJ -;;i--
Gu!i6 :he i"nmeciia.te date. incluCed with the ir:sLrucii"on to
i

the ecntents of ihe prograa counter or some otLrer registei'.

RESET - A conputer system input lha,t j-nitiaLizes and sets up


certa-r regisNers in fhe CPUand throughout the computer
sysiern. One of the i:rj"lializationsl is to load a speciflc
acidress into the Prog:'an Coun,',er. The two bytes of i-nforma.+.ion
L4 that ald the succeeciing a.<ioressis the starting a-ddress
for the systen progran (for the MOSTECIfl0LOGIprocessors) "

PJTUzu{- Aspecial i,ype of jurap in which the central processor


resumes execution of the ma.in progran at, the contents of the
program counter a't ',,he time that the jmp occured.

RIPPLI COUIITER
- A binary caunting systen irr wli:ich flip-flops are
connecteciilt seri-es.

RISE TIl,lE - The t,ime required for an ou.tput voliage of a digital


clrcuit to change frcm a logic 0 io a Loglc I stater

ACM (Rg.AD-OliLY
tfri,loRf) - A ser,rj-conctuctcrmemory from which digital
data can be repeatedly reaci ou'r,, but, earnot be vrritten 1nto,
as is the case for a RA)4.

K- | (
ROIITIIIE - A group od lnstructi-ons that causes tbe courputer to
perforrn a specified frrnction, eogr €Lprogran.

SCRA?CHP.AD- the temr applies to nemory that is used tenporarily


by the CPUto store i.:etermedi.ate results.

SE'IIEII-SEG]{BI?DISPTAI - ln electroni.c display that contains seven


lines ot segnents spati-a.Lly arranged in such a manner that
the digits O through 9 can be represented through tJre selective
laghtiq of certain segnents to form. the diglt.

S${IC0NDUCTOR MEMOFf- A di€ital. eLectronic memory d,evice ln nhich


lrs and Ors are stored, that ls a product of semiconductor
marrufacturlng"

SUIF? RE0ISISR - A digltal storage cjrcuit in which infomatlon is


slui:flted from one f]ip-f1op of a chain to the adjacent flip-flop
rryon appllcation fo each clock puIse. Data may be shtfted
several places to the rigbt or left, depending on addltlonal
gatjlg and the nunber of clock pulses applled to the 3'pgi s!s1'.
Depead:ing oa the nunber of positions shifted, the rightmost
characters are lost ln a right shift, and the lef,tnrost char-
acters are lost i.n a left shifb.

S$flIt.{IOR A progran whicb re,presenbs ttre finctioruing of one


coryuter systern a.rcther coqruter system.
ltilizi-ag
SOflfmRE - fhe means by which any defined grocedure is speclfied
for conputer execution"

SOURCE- Register, memory locatioa or T/O device whtch can be


used to supply data for use by al instruction.

SOURCEPRGR.AI{ .* group of statenents confor&ing to the syntax


requiremrents of a language processor.

SFLIT D^{IA BiF - Is two data buses, one for lncoming commutdca-
tions aBd one for outgoing corrunulrications. An 8-bit data bus
in split data bus system talces 16 llles.

STACK - A speclfied section of sequential neaory Locations used


as a LIFO (fast T.a, !'irst Out) file. The last elenent entered
is the fjrst one agaiLabLe for output,. A stack is used to store
program datae subroutine return arlrt'ess6s, processor statusl etc.

Sti0f POINTER(S) - A register rh-i.ch contains the address of the


system read/write menory used as a stack. It is autoruatlcalty
increnented or decremented as instructions penforrn operations
H:ith tbe stack"

f-Ir
ST.AIEMA{I - An instruction ia source language.

STATIC R"Att - A rqrdom access memory tbat uses a flip-f1op fcn


storlng a binary daia bit. Does not require reibesh.

STRINO A series of values.

$fBBOUTINE - A routine that causes the execution of a specified


firnction and uhJ.ch also provides fc transfer of control back
to the ca-ll5ng routine upon sompletj.on of the function,

SIlBOf, lny character string used to represent a Iabel, menonic,


or data constant"

SYI'lBOtfC ADDRESS - Also caaled floaiing a.ddressn In digita1 co6-


puter prograrndngr a 1abe1 chosen in a routine to ideatify a
particular word, function, or other informatj-on that ls inde-
pendent of the location of the information w'it}.in the routine"

STI,IBOTICCOD8 - A code by which programs are exFressed ln source


language; that is, storage locations and machine operations
are referred to by sprboli"c nanes and addresses that do not
depend upon their hardware-deterzrjned nanee and address€so

S$4BOIJCCODING - In digital conputer programring, aq cod,fng


systen usfug symbolic rather tttan actual conputer addresses"

Sgl{C}lRChlOUS- Operatipn of a s:*itchiag network by a clock pulse


generator" .Lll cjrcuits in the netlrork sritcb sjmuLtaneously,
and all actions take plaee synchronously rdith the clock"

SWT.AXERROR - An occurrence in the source progran of a label


e4pression, or conditj.on that does not meet the .f,orrnat
requirernents of the assembler program.

TABLE A data structure used to contaj.nr sequences of lnstruc-


tions, addresses, or data constants.

TR{IIING EDGE The transition of a pulse that occurs last, such


as the hlgb-to-low transltion of a posi.tive clock pulse.

IAAIISITIOI{ The jrstanee of chang"jng fbon one state to a second


state.

IIiREE-STATE DEVICE or IRI-STATE DEVICE A serricqrductor logic


device j.n wbich there are three possible output, states: (1)
a nlggC.c 0n state, (Z) a ttlog:Lc ltt state, or (3) a state irr
i.n rhicb the ouSut is, jn effect, disconnected frorn the rest
of the circrrlt ard has no j.nfluence upon it.

K-l:5
ITIREE-BEfE INSTRIICTION - An instruction that, conslsts of trenty-
four colrtiguous bits oecupying tbree successive nemory locations.

TBUIU TIBLE A tabulation that shows the relati.on of all output


loglc levels of a *igitaf. circuit to all possible conbinatj.ons
of iaput logi-c levels in such a lray as to charactenize tbe
circuit fi:nctioas c crryletely.

1'IfO-BIITEINSTRUCTION - 4n instructLon that consists of sirtdeti


contlguous bits occupying tro successive nemory locations.

IWO-PHASECLOCtr A tro-outpu'b tinine device that prorides trlo


continuous series of timing pulse from the second serles
alrays foll.ocing a siagle clock pulse frcn the first series.
Depending on the type of two-phase clock, the pulses in the
first and second series nay or nay not orerlap each other.
Usually i.derrbified as Phase'I & Phase 2.

ITNCOMiITIONAI llot srrbject to conditLons external to the speclfic


c ornputer jlstructi-on .

ttilCOl\DIfIONAI CALL - A ca]] Lustructlon that is uncondltional.

ItNcqilErrro$.qr, fiffP I connputer instruction tbat iaterrupts the


normaL process of obtai-njng the inst,ructlons in an ordered.
sequence and specifi.es the address frosr whlch the ne:cb
instruction must be taken. :r
UNCOIIDITIOilALRE'IIAN - A retrrrn instructlon that ls unconditional.

nsl (VERT tAncE-scAla I}IImRATIoN) Monolithlc dlglta-l integrated


circuit chips rith a typtcal conplexJ.ty of tro thousard or nore
gates or gate-equivalent circuits.

VOIATIIE I{El"l0RI A seniconductor memory derrLce ln lrhich t}p stored


digital data is lost when the power is remwed.

IIEIGIITING - ltost corrnters in the 71100serles of integrated cjrcult


chips are weighted counters, that is, re can asslgn a nelghted
value to each of the fl:ip-flop outputs tn the counter. By
nm*ng the product of the logic state times the relghtln-g
value for each of the fllp-flops, re c€ur conpute tlre courter
state. For exanple, the weighting factcs fe a h-bit binary
' cornter are D neight of 8, C = weight of l+,
- B . relght of 2,
=
ard A weight of 1. The binary output, DCBA= 1101A, frm a
lr-Uit binary counter would therefone be 13. - #',

I{IRED-OR CIRCUIT - A clrcuit consistlng of two or more sernlconductor


devlces wittr cpen.colLector outputs ln rhj.ch the outputs are
rlred together. The output frcn tbe circuLt is at a logtc O
if devlce A or device B or derrice C or . . . . " is at a loglc
O state. - :-

K-16
WORD - lre naxilmn ntnber of bjoary dlgits that can be stored ira a
sLngle addressable nemory locatlon of a given conputer system.

fAnS In semiconductors and ot}er types of menory derices - to


transmit data lnto a nrnory device frsr some otlrer digital
electrmtc device. To l{RIlE ls to SICIRE.

ZERO-P{}E The lonest 256 address locations ln neuory. Where


the highest 8-bits of address are alrays Ots and the loner
8-bits identif,y any location flour O to 255. lbereforer onlY
a single byte is needed to address a locatiou in zero-Page.

ZUnO-f.Cg .|DDBEIISING - I.he second byte of the instruction con-


taLns a zero-page address.

ZEnO-P.CCEINDEXEDOnnbSSUqi - The second-byte of the Lnstaruction


is added to ttre index register (X or I) to form a zeto-page
effective address. The carry (i-f is drcpped.
"tqf)

K-I7