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BAND PROFILE OF A METAL AND SEMICONDUCTOR JUNCTION

(a)

n-type semiconductor Contact
n-type
semiconductor
Contact

Metal

Band profiles of disconnected metal and semiconductor

E F m

(b)

 

Work functions of some metals

 

Element

Work function, φ m (volt)

 
 

Ag, silver

4.26

 

Al, aluminum

4.28

 

Au, gold

5.1

 

Cr, chromium

4.5

 

Mo, molybdenum

4.6

 

Ni, nickel

5.15

 

Pd, palladium

5.12

 

Pt, platinum

5.65

 

Ti, titanium

4.33

 

W, tungsten

4.55

Electron affinity of some semiconductors

 

Element

Electron affinity, χ (volt)

 
 

Ge, germanium

 

Si, silicon

 

GaAs, gallium arsenide

 
 

AlAs, aluminum arsenide

 

φ m > φ s

 

4.13

4.01

4.07

3.5

n-type

Vacuum energy
Vacuum energy

Vacuum energy

eφ s

eχ s

c

E c

E F s

 

E v

n-semiconductor

≈
≈ eφ m Metal Vacuum
eφ m
Metal
Vacuum

Formation of a Schottky junction

Energy eχ s + eφ m eφ b eφ m – eφ s = eV bi
Energy
eχ s
+
eφ m
eφ b
eφ m – eφ s = eV bi
+ + + +
E c
E F m
E Fs
E v
W
(c)
METAL-SEMICONDUCTOR JUNCTION AT EQUILIBRIUM

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

SCHOTTKY JUNCTION ON A P -TYPE SEMICONDUCTOR

Metal and semiconductor band profiles

E F m

≈ eφ m Metal
eφ m
Metal

p-type

 
≈ e φ e χ
   

eφ s

 

eχ s

 
≈ e φ e χ
 
 
≈ e φ e χ
  • E vac

  • E cs

E F s

E vs

Semiconductor

Formation of a Schottky junction for p-type materials

(a) Metal + + + eφ b eφ s – eφ m = W (b)
(a)
Metal
+ + +
eφ b
eφ s
eφ m =
W
(b)

p-semiconductor

E c

E Fs

E v

eV bi

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

SCHOTTKY JUNCTION IN REAL SYSTEMS

Semiconductor surfaces have a large number of defect states (from broken bands, impurities, etc.) Defect levels
Semiconductor surfaces
have a large number of
defect states (from broken
bands, impurities, etc.)
Defect levels in the bandgap at the
metal-semiconductor interface
eφ b = E g – eφ ο
E c
eφ ο
E Fm
E Fs
E v

SCHOTTKY METAL

n Si

p Si

n GaAs

Aluminum, Al

0.7

0.8

 

Titanium, Ti

0.5

0.61

 

Tungsten, W

0.67

   

Gold, Au

0.79

0.25

0.9

Silver, Ag

   

0.88

Platinum, Pt

   

0.86

PtSi

0.85

0.2

 

NiSi 2

0.7

0.45

 

Schottky barrier heights are determined by the semiconductor and have a rather weak dependence on the metal.

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

CURRENT FLOW IN A SCHOTTKY DIODE

Metal-to-semiconductor barrier is unchanged by external bias Semiconductor-to-metal barrier is increased (reverse bias) or decreased (forward bias) by an external bias.

+ – V – V + Electron flow e(V bi – V) E c eφ b
+
V
V
+
Electron flow
e(V bi – V)
E c
eφ b = e(φ m – χ)
e(φ m – χ)
E Fs
eV
E Fm
E Fm
e(V bi
+ V)
E v
E c
Forward bias
E Fs
(a)
E v
Reverse bias

(b)

Current dominated by electron flow from the metal to the semiconductor

I

C URRENT FLOW IN A S CHOTTKY DIODE • Metal-to-semiconductor barrier is unchanged by external bias

Current dominated by electron flow from the semiconductor to the metal

V

(c)

Diode with area A:

I = I s ) exp ( eV k B T –1 2 I s =
I = I s
)
exp
( eV
k B T
–1
2
I s = A
(
m*ek B
2π 2 h
)
T
2
exp
3
= A R* T 2 exp (
–eφ b
k B T
)

(

eφ b

k B T

)

Richardson constant: R* = 120

m*

m o

Acm 2 K 2

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

SMALL SIGNAL MODEL OF A SCHOTTKY DIODE

The Schottky diode is a majority carrier device. Unlike a p-n diode, in

forward bias no minority carrier injection occurs. Thus there is no

diffusion capacitance and the device response can be very fast.

Equivalent circuit of a diode in

series with a resistor and inductor

C geom L C R s s d
C
geom
L
C
R s
s
d
Depletion capacitance: C d = A eN d ε 2(V bi –V) Diode resistance: dV eI
Depletion capacitance:
C d = A
eN d ε
2(V bi –V)
Diode resistance:
dV
eI
=
R d =
dI
k B T

R d

1/2

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

A COMPARISON BETWEEN THE PROPERTIES OF A P -N AND A SCHOTTKY DIODE

 

p-n DIODE

SCHOTTKY DIODE

Reverse current due to minority

 

Reverse current due to majority

carriers diffusing to the depletion

carriers that overcome the barrier

layer

layer strong temperature less temperature dependence

strong temperature

layer strong temperature less temperature dependence

less temperature dependence

dependence

 

Forward current due to minority carrier injection from n- and p-sides

Forward current due to majority injection from the semiconductor

Forward bias needed to make the device conducting (the cut-in voltage) is large

The cut-in voltage is quite small

Switching speed controlled by recombination (elimination) of minority injected carriers

Switching speed controlled by thermalization of "hot" injected electrons across the barrier ~ few picoseconds

Ideality factor in I-V characteristics

Essentially no recombination in

~ 1.2-2.0 due to recombination in

depletion region

~ 1.2-2.0 due to recombination in depletion region ideality factor

ideality factor

depletion region

~ 1.0

A COMPARISON BETWEEN THE PROPERTIES OF A P - N AND A S CHOTTKY DIODE p-n

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

METAL -SEMICONDUCTOR JUNCTIONS : OHMIC CONTACT AND SCHOTTKY JUNCTION

OHMIC CONTACT Current is linear in an ohmic contact resistance is very small Schottky barrier VOLTAGE
OHMIC CONTACT
Current is linear in an
ohmic contact
resistance is very small
Schottky
barrier
VOLTAGE
OHMIC CONTACT
C
URRENT

Heavy doping in the semiconductor causes a very thin depletion width and electrons can tunnel across this barrier leading to ohmic behavior

OHMIC CONTACT
OHMIC CONTACT
Electrons tunnel through narrow depletion region e e E c E F n + REGION n-type
Electrons tunnel
through narrow
depletion region
e
e
E c
E F
n +
REGION
n-type
SEMICONDUCTOR
E v
M
ETAL

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh

INTERCONNECT DELAY : GOING FROM AL TO CU

As device dimensions shrink interconnect cross-sections also must shrink. This increases the interconnect resistance and the associated time delay for signal propagation.

TRANSISTOR GATE LENGTHS: 40 1999: 0.2 µm 2003: 0.1 µm 35 Interconnect delay for 30 Al-based
TRANSISTOR GATE LENGTHS:
40
1999: 0.2 µm
2003: 0.1 µm
35
Interconnect delay for
30
Al-based interconnects
25
20
Transistor delay
15
10
Interconnect delay for
Cu-based interconnects
5
0.1
0.2
0.3
0.4
0.5
0.6
0.7
T
IME DELAY
(ps)

GATE LENGTH (µm)

Based on Semiconductor Industry Associates Roadmap.

© Prof. Jasprit Singh

www.eecs.umich.edu/~singh