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Intel 8086
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Intel 8086


From 1978 to 1990s

Common manufacturer(s)

Intel, AMD, NEC, Fujitsu,Harris (Intersil), OKI,Siemens AG, Texas

Instruments, Mitsubishi.

Max. CPU clock rate

5 MHz to 10 MHz

Instruction set



40 pin DIP

The 8086[1] (also called iAPX86) is a 16-bit microprocessor chip designed by Intel, which gave rise to the x86 architecture; development work on the 8086 design started in the spring of 1976 and the chip was introduced to the market in the summer of 1978. The Intel 8088, released in 1979, was a slightly modified chip with an external 8-bit data bus (allowing the use of cheaper and fewer supporting logic chips[2]), and is notable as the processor used in the original IBM PC.

1 History

1.1 Background

The 8080 device. Zilog Z80 (1976).2 Porting older software ○ ○ • 3 Chip versions 2.6 Floating point ○ • • • • 3. Two years later.1 Derivatives and clones 4 Microcomputers using the 8086 5 See also 6 Notes and references 7 External links [edit]History [edit]Background In 1972. often described as the first truly useful microprocessor. in 1974.4.2 Registers and instructions 2.[3] It implemented an instruction set designed by Datapoint corporation with programmable CRT terminals in mind. MOS Technology 6502 (1975). [edit]The first x86 design . Microchip PIC16X (1975).3 Flags 2. and Motorola 6809(1978). Intel launched the 8080. The device needed several additional ICs to produce a functional computer.5 Performance 2.○ • 2 Details 1. that also proved to be fairly general purpose.(not binary-) compatible with the 8008 and also included some 16-bit instructions to make programming easier.1 Buses and operation 2.[5]Other well known 8-bit microprocessors that emerged during these years were Motorola 6800 (1974). as well as others. which ruled out the use of a separate address bus (Intel was primarily a DRAM manufacturer at the time).4. in part due to its small 18-pin "memory-package". was eventually replaced by the depletion-load based 8085 (1977) which could cope with a single 5V power supply instead of the three different operating voltages of earlier chips. the first 8-bit microprocessor.1 Subseque nt expansion  2.2 The first x86 design ○ ○ ○ ○ 2.4 Segmentation  2.[4] employing the new 40-pin DIL packages originally developed for calculator ICs to enable a separate address bus. It had an extended instruction set that was source. Intel launched the 8008.

The legacy of the 8086 is enduring in the basic instruction set of today's personal computers and servers. instead of the fairly basic 16-bit capabilities of the 8080/8085. which became very successful. The programming model and instruction set was (loosely) based on the 8080 in order to make this possible.[7] and as almost no CAD-tools were used. HMOS-III versions.2 μm. and self-repeating operations were akin to the Z80 design[6] but were all made slightly more general in the 8086.The 8086 project started in May 1976 and was originally intended as a temporary substitute for the ambitious and delayed iAPX 432 project. such as the Intel 286 and the Intel 386. According to principal architect Stephen P. or 8085 could be automatically converted into equivalent (sub-optimal) 8086 source code. It was an attempt to draw attention from the less-delayed 16 and 32-bit processors of other manufacturers (such as Motorola. New kinds of instructions were added as well. Instructions directly supporting nested ALGOL-family languages such as Pascal and PL/M were also added. (Another reference is that the PCI Vendor ID for Intel devices is 8086h!) [edit]Details . The first revision of the instruction set and high level architecture was ready after about three months. full support for signed integers.[10] This was followed by HMOS-II. It was soon moved to a new refined nMOS manufacturing process called HMOS (for High performance MOS) that Intel originally developed for manufacturing of fast static RAMproducts. four engineers and 12 layout people were simultaneously working on the chip.000 counting allROM and PLA sites). Logic designer Jim McKevitt and John Bayliss were the lead engineers of the hardware-level development team[12] and William Pohlman the manager for the project. a fully static CMOS version for battery-powered devices. which was considered rather fast for a complex design in 1976-78. the 8086 design was expanded to support full 16-bit processing. However. Morse with some help and assistance by Bruce Ravenel (the architect of the 8087) in refining the final revisions. Zilog. this was a result of a more software centric approach than in the design of earlier Intel processors (the designers had experience working with compiler implementations). and using the same basic microarchitecture elements and physical implementation techniques as employed for the slightly older 8085 (and for which the 8086 also would function as a continuation). Morse. all of which eventually became known as the x86family.[8] The 8086 took a little more than two years from idea to working product.[11] The original chip measured 33 mm² and minimum feature size was 3. and National Semiconductor) and at the same time to counter the threat from the Zilog Z80 (designed by former Intel employees). eventually. Both the architecture and the physical chip were therefore developed rather quickly by a small group of people. The architecture was defined by Stephen P. 8080. with little or no hand-editing. and. manufactured using Intel's CHMOS processes. the 8086 also lent its last two digits to later extended versions of the design. base+offset addressing. the 8086 was designed so that assembly language for the 8008.000 active transistors (29. Other enhancements included microcodedmultiply and divide instructions and a bus-structure better adapted to future co-processors (such as 8087 and 8089) and multiprocessor systems. Marketed as source compatible. The 8086 was sequenced[9] using a mix of random logic and microcode and was implemented using depletion load nMOS circuitry with approximately 20.

C Flags Segment register CS Code Segment DS Data Segment ES ExtraSegment SS Stack Segment Instruction pointer IP Instruction Pointer The 8086 registers [edit]Buses and operation All internal registers as well as internal and external data buses were 16 bits wide..536).048.P .O D I T S Z . Some of the control pins. had more than one function depending upon whether the device was operated in min or max mode. simply because internal registers were only 16 bits wide. A 20-bit external address bus gave an 1 MB (segmented) physical address space (220 = 1. The data bus was multiplexed with the address bus in order to fit a standard 40-pin dual in-line package. 16-bit I/O addresses meant 64 KB of separate I/O space (216 = 65. using more than one processor.. . firmly establishing the "16-bit microprocessor" identity of the 8086. other functions) Source Index Destination Index Base Pointer Stack Pointer Status register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (bit position) ..576).The 8086 pin-assignments in min and max mode. accumulator) CX (counter. The former was intended for small single processor systems whilst the latter was for medium or large systems. accumulator) DX (accumulator.A . Main registers AH BH CH DH Index registers SI DI BP SP AL BL CL DL AX (primary accumulator) BX (base. The maximum linear address space was limited to 64 KB. Programming over 64 KB boundaries involved adjusting segment registers (see below) and was therefore fairly awkward (and remained so until the 80386). which carry essential signals for all external operations.

Interrupt flag . but this memory operand could also be the destination. were 16-bit only. Out of these. 6809. [edit]Flags 8086 has a 16 bit flag register. A single memory location could also often be used as both source and destination which. further contributed to a code density comparable to (often better than) most eight bit machines. Direction flag and Overflow flag. could also be accessed as twice as many 8-bit registers (see figure) while the other four. Compilers for the 8086-family commonly supported two types of pointer. DX. At most one of the operands could be in memory.) It also had a stack-marker mechanism. SI. (Several others. BX. on the other hand. among other factors. .. would be added in the subsequent 80186. While perfectly sensible for the assembly programmer. Although the degree of generality of most registers were much greater than in the 8080 or 8085. this complicated register allocation for compilers compared to more regular 16. CX. with at most 15 bytes of alignment waste. As a result. 80286. using the stack to store the return addresses. Rather than concatenating the segment register with the address register. There are 256 interrupts. avoiding the need for relocation. while pointer arithmetic on a far pointer wrapped around within its 16-bit offset without touching the segment part of the address. Near pointers were 16-bit offsets implicitly associated with the program's code and/or data segment and so made sense only within parts of a program small enough to fit in one segment. Zero flag. Auxiliary flag. most instructions were one-address or two-address operations which means that the result were stored in one of the operands. therefore producing a 20-bit external (or effective or physical) address from the 32-bit segment:offset pair. etc. such as push immed and enter. and registers were also sometimes used implicitly by instructions. the 8086 shifted the 16-bit segment only 4 bits left before adding it to the 16-bit offset (16·segment + offset). The 8086 also featured 64 KB of 8-bit (or alternatively 32 K-word of 16-bit) I/O space. near and far. A 64 KB (one segment) stack growing towards lower addresses is supported by hardware. VAX.and 32-bit processors such as the PDP-11. and indicate the current state of the processor. Although considered complicated and cumbersome by many programmers. some of the more useful ones were push mem-op. [edit]Segmentation There were also four sixteen-bit segment registers (see figure) that allowed the 8086 CPU to access one megabyte of memory in an unusual way. each external address could be referred to by 212 = 4096 different segment:offset pairs.68000. and ret size. it was significantly easier to generate code for the 8086 design. 9 are active. The interrupts can cascade. Sign flag. SP. it was still fairly low compared to the typical contemporaryminicomputer. flag register and segment registers. Parity flag. Four of them. which can be invoked by both hardware and software. or 8085. which were like far pointers except that pointer arithmetic on a huge pointer treated it as a linear 20-bit pointer. The 16-byte separation between segment bases (due to the 4-bit shift) was called a paragraph. supporting the "pascal calling convention" directly. Far pointers were 32-bit segment:offset pairs resolving to 20-bit external addresses. 2-byte words are pushed to the stack and the stack top (bottom) is pointed out by SS:SP. and 80386 designs. These are — Carry flag. but excluding the instruction pointer. The processor had some new instructions (not present in the 8080 and 8085) to better support stack based high level programming languages such as Pascal and PL/M. DI. thesource. as in most processors whose address space exceeded their register size. AX. this scheme also had advantages. compared to semi-contemporary simple (but popular and ubiquitous) 8-bit microprocessors such as the 6502. BP. a small program (less than 64 kilobytes) could be loaded starting at a fixed offset (such as 0) in its own segment. Due to a compact encoding inspired by 8-bit processors. while the other operand.[edit]Registers and instructions The 8086 had eight (more or less general) 16-bit registers including the stack pointer. could be either register or immediate. Some compilers also supported hugepointers. Trap flag .

giving an application full access to a 32-bit flat virtual address space through any segment register. compact (data > 64K). identical to CP/M. and later versions of MS-DOS could use it to increase the available "conventional" memory (i. compilers also supported "memory models" which specified default pointer sizes. far. large (code. Also. The segment system.e. as long as applications obtained their segments from the operating system and did not make assumptions about the equivalence of different segment:offset pairs. the FS segment points to a small data structure. within the first MB). in order to create a 16 MB physical address space. as this would have forced segments to begin on 256 byte boundaries.[14] In practice the use of "huge" pointers and similar mechanisms was widespread and the flat 32-bit addressing made possible with the 32-bit offset registers in the 80386 eventually extended the limited addressing range in a more general way (see below). in x86 versions of Microsoft Windows. but not by adjusting the shift value. greatly easing acceptance of the new platform. data structures. and huge pointers for code and for instance. and functions. which contains information about exception handling.the designers actually contemplated using an 8-bit shift (instead of 4-bit). However. there were not enough pins available on a low-cost 40-pin package. [edit]Porting older software Small programs could ignore the segmentation and just use plain 16-bit addressing. The x86-64 architecture does not use segmentation in long mode (64-bit mode). The x86-64 architecture supports this technique by allowing a nonzero base address for FS & GS. the base addresses in the descriptors were also widened to 32 bits. This was important when the 8086 and MS-DOS was new. According to Morse et al. [edit]Subsequent expansion The 80286's protected mode extended the processor's address space to 224 bytes (16 megabytes). the 16-bit segment registers now contains an index into a table of segment descriptors containing 24-bit base addresses to which the offset is added. Naturally. the idea was dismissed. normal application code does not have to deal with segment registers at all. The tiny (max 64K). because it allowed many existing CP/M (and other) applications to be quickly made available. There was a small difference though: the address was no longer truncated to 20 bits. [13] In > 64K). By this method. just as in most 8-bit based processors. Instead. and other per-thread executable file format. Four of the segment registers: CS. This roughly 64-kilobyte region of memory was known as the High Memory Area. but most 32-bit operating systems uses the paging mechanism introduced with the 80386 for this purpose instead. However. The authors of MS-DOS took advantage of this by providing an Application Programming Interface very similar to CP/M as well as including the simple . Precompiled libraries often came in several versions compiled for different memory models. SS. thread-local variables. medium (code > 64K). can be used to enforce separation of unprivileged processes. The tiny model meant that code and data was shared in a single segment. [edit]Performance . To support old software. present already in the 80286. and huge (individual arrays > 64K) models covered practical combinations of near. DS. different for each thread. so real mode pointers (but not 8086 pointers) could refer to addresses between 100000h and 10FFEFh. and the limit to 264. where address calculation mimicked the 8086. and ES are forced to 0. Such systems set all segment registers to point to a segment descriptor with offset=0 and limit=232. the address space of the x86 series could have been extended in later processors by increasing the shift value. a special "real mode" was introduced.. This was possible because the 80386 widened the general purpose registers (i. the offset registers) to 32 bits. and 1 MB was considered very large for a microprocessor around 1976.small (max 128K). and could be used to build .To avoid the need to specify near and far on numerous pointers. This allowed 8-bit software to be quite easily ported to the 8086.

Execution times for typical instructions. depending on prefetch status. this performance problem was fixed with the 80186 and 80286). Combined with orthogonalizations of operations versus operand-types and addressing modes. and other factors. the full (instead of partial) 16-bit architecture with a full width ALU meant that 16-bit arithmetic instructions could now be performed with a single ALU cycle (instead of two. via carry). As instructions varied from 1 to 6 bytes.16 5  EA: time to compute effective address. However. while memory operations unfortunately became slower (4 years later. ranging from 5 to 12 cycles.ister er. speeding up such instructions considerably. fetch and execution were madeconcurrent (as it remains in today's x86 processors): The bus interface unit fed the instruction stream to the execution unit through a 6 byte prefetch queue (a form of loosely coupled pipelining). transfers of 16-bit or 8-bit quantities were done in a four-clock memory access cycle (which was faster on 16-bit. despite cases where the older chips may be faster (see below). speeding up operations on registers and immediates.Although partly shadowed by other design choices in this particular chip. as well as other enhancements. the multiplexed bus limited performance slightly. .. in clock cycles:[citation needed] Timings are best case. 118 IDI V 101 .ryyInst Re Im Me Re Im ruct gist med mo gist med ion er iate ry er iate MO V 2 4 8+ EA 9+ EA 10+ EA AL U 3 4 9+ 16+ EA. this made the performance gain over the 8080 or 8085 fairly significant. 8086 Execution time for typical instructions Re Re Me Me gist Reg gist mo mor er.. EA. although slower on 8-bit quantities. Jcc lab el: 16 (cc = con diti on cod e) MU L 70. compared to typical contemporary "8-bit" CPUs). 17+ EA JMP 11 labe l: 15. instruction alignment.

memory access performance was drastically enhanced with Intel's next generation chips. operating on 80-bit numbers. and the 8088 (used in the IBM PC) was additionally hampered by its narrower bus. jumps took more cycles than on the simple 8080 and 8085. 9=ALU. [edit]Floating point The 8086/8088 could be connected to a mathematical coprocessor to add hardware/microcode-based floating pointperformance. operations on registers and immediates were fast (between 2 and 4 cycles). 2=segment registers and IP. 5=instruction queue. However. 6=control unit (very simplified!). and the 80286 also had separate (non-multiplexed) address and data buses. Manufacturers like Cyrix (8087-compatible) and Weitek (non 8087-compatible) eventually came up with high performance floating point co-processors that competed with the 8087 as well as with the subsequent.Simplified block diagram over Intel 8088 (a variant of 8086). 8=internal databus. 10/11/12=external address/data/control bus. 1=main registers. saving many cycles.  The address and data buses were multiplexed. The reasons why most memory related instructions were slow were threefold:  Loosely coupled fetch and execution units are efficient for instruction prefetch. higher performing Intel 80387. [edit]Chip versions . the microcode routines had to use the main ALU for this (although there was a dedicated segment + offset adder). while memory-operand instructions and jumps were quite slow. 7=bus interface. but not for jumps and random data access (without special measures). 3=address adder. 4=internal address bus. As can be seen from these tables.  No dedicated address calculation adder was afforded. forcing a slightly longer (33~50%) bus cycle than in typical contemporary 8bit processors. The 80186 and 80286both had dedicated address calculation hardware. The Intel 8087 was the standard math coprocessor for the 8086 and 8088.

GB-A-2211325.514). Mitsubishi. not the Intel 8088) and had the same instruction set. Publication No. Such relatively simple and low-power 8086-compatible processors in CMOS are still used in embedded systems.K1810BM86 was pincompatible with the original Intel 8086 (К1810ВМ86 was a copy of the Intel 8086.77 MHz. but incorporated the instruction set of the 80186 along with some (but not all) of the 80186 speed enhancements. For example. the 80186/80188 (which includes some on-chip peripherals). ES1841 was the first PC compatible computer with dynamic bus sizing (US Pat. The resulting chip.786) and some other machines (UK Patent Application. [edit]Derivatives and clones Soviet clone KP1810BM86. Harris/Intersil. enhanced versions were manufactured by Fujitsu. used the Intel 8088. although its successor.548. respectively.The clock frequency was originally limited to 5 MHz (IBM PC used 4. NEC. However this IC was metric and was not mechanically compatible with the Intel products. 4/3 the standard NTSC color burst frequency). OKI. However. Texas Instruments. the IBM PC. No 4. providing a drop-in capability to upgrade both instruction set and processing speed without manufacturers having to modify their designs. . in many cases. but the last versions in HMOS were specified for 10 MHz. the data/address bus circuitry was designed independently of original Intel products. Siemens AG. [edit]Microcomputers using the 8086  One of the most influential microcomputers of all. Published June. has been more popular for embedded use. the NEC V20 and NEC V30 pair were hardware compatible with the 8088 and 8086. OKI M80C86A QFP-56 Compatible and. 28. these computers had significant hardware differences from their authentic prototypes (respectively PC/XT and PC): ES1840 was Intel 8088 based. The electronics industry of the Soviet Union was able to replicate the 8086 through both industrial espionage and reverse engineering. a version of the 8086 with an eightbit data bus (as mentioned above). The Intel microprocessors I8086 and I8088 were the core of the Soviet block-made PCcompatible ES1840 and ES1841 desktops. 1989).831. andAMD. Also. Later some of the ES1841 principles were adopted in PS2 (US Pat. No 5. ES1841 was Intel 8086 based. HMOS-III andCMOS versions were manufactured for a long time (at least a while into the 1990s) for embedded systems.

achieving TTL-compatibility by having VCC at +5V and VDD at -9V) ^ using non-saturated enhancement load nMOS logic (demanding a higher gate voltage for the load transistor-gates) ^ made possible with depletion load nMOS logic (the 8085 was later made using HMOS processing. 8. 2008 7. Retrieved 2007-08-11. NASA was still using original 8086 CPUs on equipment for ground-based maintenance of the Space Shuttle Discovery. Intel released the 8086 processor. light boards. . member of the 8086 design team. ^ 8086 used less microcode than many competitors designs.0 of the instruction set and architecture was ready in about 3 months. according to Morse. also used the 8086. ^ It also permitted cheap 8080-family chips to be used (such as the 8254 CTC. Mac. The IBM Displaywriter [citation needed] word processing machine and the Wang Professional Computer. or Linux-produced today. introducing the x86 architecture that underlies every PC-Windows.  The first Compaq Deskpro used an 8086 running at 7. ^ using enhancement load pMOS logic (demanding 14V. to prevent software regression that might result from upgrading or from switching to imperfect clones. Intel. June 17. ^ Fast static RAMs in MOS technology (as fast as bipolar RAMs) was an important product for Intel during this period. rulers. ^ "Microprocessor Hall of Fame". just like the 8086) ^ Birth of a Standard: The Intel 8086 Microprocessor. The Amstrad PC1512. in a statement made on Intel's web-page for its 25th birthday).14 MHz. but was capable of running add-in cards designed for the 4. 9. PC1640. PC World. ^ Using rubylith. as well as demanding fewer (1 or 4-bit wide) DRAM chips. and PC2086 all used 8086 CPUs at 8 MHz. electric erasers. Thirty years ago. and 8259 PIC which were used in the IBM PC design). this chip could be found in the AT&T 6300 PC (built by Olivetti). As of 2002. England     [edit]See The IBM PS/2 models 25 and 30 were built with an 8 MHz 8086 The Tandy 1000 SL-series machines used 8086 CPUs. 3. it made PCB layout simpler and boards cheaper. ^ Rev. 8255 PIO. 5. Also. 6. Archived from the original on 2007-07-06.77 MHz IBM PC XT. In addition. 2. manufactured by Wang Laboratories. 4.[15] also   [edit]Notes IBM Personal Computer XT x86 architecture and references 1.  The FLT86 is a well established training system for the 8086 CPU still being manufactured by Flite Electronics International Limited in Southampton. such as the MC68000 and others 10.  The first commercial microcomputer built on the basis of the 8086 was the Mycron 2000. and adigitizer (according to Jenny Hernandez.

on eBay.. 15. ^ For Old Parts. 12.11. ^ Other members of the design team were Peter A. Morse et al.Stoll and Jenny Hernandez.. ^ Intel 8008 to 8086 by Stephen P. 8086 Pinouts [hide] Intel processors pre-x86 4004 · 4040 · 8008 · 8080 · 8085 x86-16 (16 bit) 8086 · 8088 · 80186 · 80188 · 80286 x87 (external FPUs) Discontinued x86-32/IA-32 (32 bit) 8/16-bit databus: 8087 · 16-bit databus: 80287 · 32-bit databus: 80387 · 80487 80386 (SX · 376 · EX) · 80486 (SX · DX2 · DX4 · SL · RapidCAD · OverDrive) · Pentium (Original · OverDrive · Pro · II · II OverDrive · III · 4 · M) · Core · Celeron M · Celeron D ·A100/A110 x86-64/EM64T (64 bit) Pentium 4 · Pentium D · Pentium Extreme Edition · Celeron D · Core 2 Other iAPX 432 — RISC: i860 · i960 · StrongARM · XScale Current x86-32: EP80579 · Intel CE · Atom — x86-64: Atom (some) · Celeron · Pentium (Dual-Core) · Core (i3 · i5 · i7) · Xeon — Other: IOP · Itanium Lists CPU sockets · CPU power dissipation · Chipsets · PCHs · SCHs · ICHs · PIIXs · Microarchitectures · Processors · Future Processors · Codenames · GMA · Atom · Celeron · Core (2 · i3 · i5 · i7) · Itanium · Pentium (Pro · II · III · 4 · D · M · Dual-Core) · Xeon [show] P5 P5 based cores P6 [show] P6 based cores NetBurs t [show] NetBurst based cores Microarchitecture s Core [show] Core based cores [show] Bonnell Bonnell based cores Nehalem [show] Nehalem based cores Future Larrabee · Sandy Bridge (Ivy Bridge) · Haswell (Rockwell) Categories: Intel x86 microprocessors | 1978 introductions . ^ CHMOS is intels name for CMOS circuits manufactured using processing steps very similar to HMOS. May 12. ^ Some 80186 clones did change the shift value. but were never commonly used in desktop computers. 2002 [edit]External links    v•d•e Intel datasheets List of 8086 CPUs and their clones at CPUworld. 14. NASA Boldly Goes .

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