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ABSTRACT

Past models of current-mode control have sufferered from either insufficient accuracy to properly predict the effects of current-mode control, or from analytical complexity that renders them inaccessible to the power supply designer. This paper combines the accuracy of sampled-data modeling with the simplicity of conventional pole-zero representation. As a result, it offers a current-mode control model which is accurate to half the switching frequency, and practical for everyday use. All of the small-signal characteristics of current-mode control are predicted, including low-frequency effects, and high-frequency subharmonic oscillation which can occur even at duty cycles of less than 0.5. In addition to the conventional dominant pole response of other current-mode models, a pair of poles is produced at half the switching frequency, the Q of which determines the amount of subharmonic oscillation.

I. Introduction

Current-mode control has been used in switching power supplies for many years. Numerous attempts have been made to characterize this control system with small-signal models, all with limited degrees of accuracy or usefulness. Some continuous-time models [1-3] provide low-frequency models for the system, but they need to address the well-known phenomenon of current-loop instability as a separate issue. Other models [4] have attempted to explain this instability through a modulator gain model, but predictions are not confirmed by measurements. Conclusions based on this model presented in [5] give misleading information about the design of current-mode systems. Exact discrete-time and sampled-data models [6,7] can accurately predict responses, but they provide very little design insight due to their complex formulations. In this paper, the accuracy of sampled-data modeling is combined with the simplicity of the model of the three-terminal PWM switch [8] to provide a complete model which accurately predicts characteristics from dc to half the switching frequency. It is shown that an approximation to sampled-data results can provide a simple, accurate model with a finite number of poles. Feedforward gain terms from voltages applied across the inductor during on and off times of the power switch are derived to complete the analysis. Experimental results are presented to confirm the validity of the new model.

Current Mode Control Modeling copyright 1999 1

**II. Voltage-Mode Control Modeling
**

Recent advances in analysis [8] have provided a flexible small-signal model which replaces the nonlinear switching action of the converter with a simple equivalent circuit. This small-signal circuit remains invariant in the different PWM converters and is easy to use. Fig. 1 shows the invariant PWM three-terminal switch model developed in [8].

V

^ ap d D ^ i + c c (common) 1 D

a (active) ^ Ic d

Fig. 1. PWM Three-Terminal Small-Signal Switch Model: This model can be used for all two-switch PWM converters operating in the continuous conduction mode. The source quantities are determined by the dc operating conditions of the power stage. The voltage source is determined by the steady-state dc voltage across the active and passive terminals, and by the duty cycle of the power stage. The current source is determined by the steady-state dc current, I c , out of the common terminal of the three-terminal model. These quantities will depend upon the input voltage, output voltage, and steady-state inductor current of the converter in which the model is placed. Fig. 2 shows the PWM switch model configured for the buck, boost, and flyback circuits. Point-by-point substitution of the model of Fig. 1 into the PWM block gives the small-signal model of the power stage. The duty cycle, d, for control of the converter is typically generated with a control voltage and a reference ramp clocked at the desired switching frequency. A naturally-sampled duty cycle modulator is shown in Fig. 3. A sawtooth ramp of slope S e intersects a control voltage, v c , to produce the control parameter duty cycle, d. The small-signal model for this modulator has been found [9] to be

where T s is the switching period. The model in Fig. 2, when combined with the duty-cycle modulator gain, F m , gives small-signal transfer functions which can be shown experimentally to be accurate to half the switching frequency.

_

p (passive)

Fm =

d Vc

=

1 S eT s

(1)

Current Mode Control Modeling

copyright 1999

2

PWM a V g + _ p c L R c R C (a) L c V g + _ a PWM p R c R C (b) PWM a c V g + _ R L c R C p (c) Fig. (b) boost. PWM Converters with Switch Model Inserted: Point-by-point substitution of the model of Fig. 2. consisting of a sawtooth ramp waveform intersecting a voltage reference. Naturally-Sampled Duty-Cycle Modulator: The naturally-sampled modulator for single-loop control.Fm . Current Mode Control Modeling copyright 1999 3 . and (c) flyback converters. 3. 1 gives the complete power stage small-signal model for the (a) buck. Control V c _ Mod d Duty Cycle + Ramp S e T s ^ V c ^ d F m Fig. is modeled with a simple gain block.

and H e (s) will be used to model the sampling action of current-mode control.14] used feedforward from input and output voltages of the converters. provided by the sensed current. proper approximation for this sampling block results in a powerful new small-signal model. Earlier models [1. given by the sum of the external ramp and the current ramp. As will be seen later. The voltages v on and v off are. This can yield Current Mode Control Modeling copyright 1999 4 . 2. of course. 4 shows a current-mode control modulation scheme. respectively. A constant-frequency clock initiates the on time of the switch. The power stage model. is the same as for voltage-mode control. R i is the linear gain of the current-sense network.III. intersects a threshold to turn the switch off. Fig. the slope of which depends upon the voltages applied to the inductor. Gains k Âf and k Âr provide feedforward of voltages across the inductor during the on and off-times of the converter. Current-Mode Control Modulator: The ramp of the sensed current signal is summed with a sawtooth ramp. the modulator gain for current-mode control remains the same as for voltage-mode control. This modulator gain is different from that found in [1] and [4]. 5 shows a complete block diagram for PWM circuits with current-mode control. and compared with a reference voltage to control the duty cycle. linear combinations of other voltages in the circuit. Current-Mode Control Modeling Fig. and gain blocks R i and H e (s) represent the current feedback. Gain terms which model the action of the control circuit only should account for all the phenomena of current-mode control. 4. If the combined modulator slope. and the modulator ramp. is not affected by the presence of a different control circuit. These gain paths are created by feedback of the inductor current. An external ramp is added to the current waveform to provide design flexibility and stabilize the current feedback loop [1-4]. resulting in very significant changes to the models. The power stage model remains the same as that in Fig. The modulator gain of the circuit is then Fm = where (S n +S e )T s 1 = 1 mc S nT s (2) mc = 1 + Se Sn (3) and S n is the on-time slope of the current-sense waveform. V Control c Sensed Current Ramp S n + _ _ d Mod Duty Cycle External Ramp S e T s Fig. in general.

a single circuit model can be used. Only the current-sampling function needs to be modeled. regardless of the control scheme. H e (s) . IV. Sampled-Data Current-Feedback Transfer Function The power stage model of Fig. 6 results for all converters which can be modeled with the PWM switch. For discrete-time analysis. With the inductor voltages fixed. current-mode control exhibits characteristics which can only be explained with discrete-time modeling. and the control-to-inductor current transfer function is derived with the current-feedback loop closed. The method used in this paper produces invariant gains for any converter. R i . Feedback paths k f and k r are created by closing the current feedback path. With no Â current feedback. and the effect of the current loop and gain blocks k Âf and k r are zero. the voltages applied across the inductor are kept constant. but the model then changes for each different topology. (For two-state converters. It is not necessary to attempt to model the complete power stage with discrete-time or sampled-data analysis. the circuit shown in Fig. However. The external ramp added to the circuit only affects the modulator gain. keeping the inductor voltages constant corresponds to fixing the input and output voltages of the converter. 5. Gain block H e (s) represents the sampling action of the converter. 2 is used.) Current Mode Control Modeling copyright 1999 5 . The model of Fig. 5 remains the same for either current-mode control and for voltage-mode control. The purpose of this section is to find the sampling gain.the same results. This transfer function is independent of converter topology. Complete Small-Signal Model for Current-Mode Control: The appropriate power stage model Â Â from Fig. of the model of Fig. 2 provides accurate transfer functions with voltage-mode control without using any discrete-time or sampled-data modeling.F m . This provides great convenience in circuit modeling. ^ Vo ^ V g POWER STAGE MODEL ^ I L ^ d F m + + + _ + H (s) e R i ^ V on k' f k 'r ^ V off ^ V c Fig. and then converted into continuous-time representation and combined with the rest of the power stage and feedback models. 5.

The solid line represents the steady-state condition. with the clock initiating the on-time of the power switch. and the dashed line shows the perturbed waveform. 6. Current Mode Control Modeling copyright 1999 6 .a Vap ^ d D ^ Ic d p + _ 1 D c ^ ic PWM ^ d L F m _ + H (s) e R i ^ Vc Fig. common to all converters which can be modeled with the PWM switch model. Small-Signal Model for all Power Stages with Fixed Voltages: When the voltages applied to the inductor during the on-time and the off-time of the power switch are fixed. the current-mode model reduces to this simple form. scaled by feedback resistor R i . 7 shows the sensed inductor current waveforms. with fixed voltages for constant-frequency control. Fig.

7(c) shows the approximate equivalent sample-and-hold system waveforms. Fig. scaled by the feedback gain . The steady-state current-sense waveform is shown in solid lines. and the constant-frequency current-mode control system can be considered a sample-and-hold system with the sampling instant occurring at the intersection of the current signal and the reference waveform. Current-Mode Control Modulator Waveforms: Conditions for a change in control voltage.R i . These differences are minor. 7(c) shows the equivalent first-order sample-and-hold system. i s . v c .^ V +V c c ^ (k) i s S e S n S f (a) ^ (n) i s (exact) k k+1 (b) t ^ (n) i s (approx) k k+1 (c) t Fig. is equal to the inductor current. and a finite slope in the exact current. The discrete-time equation describing the equivalent sample-and-hold function is iˆL (k + 1) = −aiˆL (k) + 1 Ri (1+a) v c (k + 1 ) ˆ (4) where a= The z-transform of Eq. and Fig. The only difference in the actual perturbation and the equivalent sample-and-hold system is a slight variation in the sampling instant. Fig. The sensed current. 7(b) shows the exact instantaneous perturbation of the inductor current from the steady-state condition. ˆ are shown. and Fig. i L . (4) is given by H(z) = iˆL (z) v c (z) ˆ S f −S e S n +S e (5) = (1+a) Ri z z+a (6) Current Mode Control Modeling copyright 1999 7 . 7(b) plots the exact perturbation from the steady-state current waveform. and the transient response is shown in dashed lines. 7.

5 when feedback compensation is added to the system. This invariant equation can now be approximated to give a simple model. or constant off-time control [15]. constant on-time. and the discrete-time system has a pole outside the unit circle. and the power stage model is the same as for voltage-mode control. 6 are defined. The transformation of a first-order sample-and-hold system from discrete-time into continuous time is analyzed thoroughly in [10]. with S n < S f and no external ramp. All of the other gains of Fig.Notice that.5. 6 to find the open-loop sampling gain H e (s) . (7) is now used with the circuit model of Fig. The analysis results in: H e (s) = sT s e sTs −1 (8) It can be shown that this sampling gain is actually invariant for all converters using constant frequency. The continuous-time representation of Eq. However. the value of a is greater than unity. Current Mode Control Modeling copyright 1999 8 . (6) is then given by: H(s) = iˆL (s) v c (s) ˆ = 1 (1+a) e sTs −1 R i sT s e sTs +a (7) Eq. and this is discussed later. This explains the system instability at duty cycles greater than 0. The continuous-time representation of the sample-and-hold circuit can be found from the 1 z-transform expression by using the substitution z = e sT s . and multiplying by sT s(1−e −sTs ) . the subharmonic instability can occur even at duty cycles lower than 0.

It can be seen that the approximate model is exact at dc and half the switching frequency. but it has never been exploited to its full potential. applications of the sampled-data model have been limited. Current Mode Control Modeling copyright 1999 9 . The exact continuous-time model of Eq.2 dB and 3 degrees at frequencies in between. Since such a representation is not useful for design and analysis. (8) and the approximate second-order model of Eqs. A complex pair of RHP zeros provides an accurate representation of the transfer function H e (s) . (9-11). and deviates by less than 0. Attempts to model all of the poles of the sampled-data model in Eq. This second-order model of the sampled-data system can be chosen to match the exact equation at the lower and upper limits of the frequency range of interest.V. In fact. from dc to half the switching frequency. (8) has an infinite number of poles and zeros [6]. The transfer function of this second-order model is s H e (s) l 1 + z nsQ z + z n 2 2 (9) where Q z = −2 o (10) and zn = Ts o (11) Fig. Continuous-Time Approximation to Sampled-Data Model The sampled-data model has been realized before [6] for the high-frequency portion of the current-loop of just the buck converter. (8) are neither necessary nor useful. it is only necessary to accurately model the sampled-data expression up to half the switching frequency. 8 is a plot of the exact sampled-data model of Eq.

by a transfer function which has a pair of complex RHP zeros at half the switching frequency. leading to the significant differences and usefulness of the new model.5 2 1. in addition to the usual poles and zero of the current loop. If the model is extended to higher frequencies.2 dB and 3 degrees at all frequencies in between. This new model gives the possibility of transfer functions which have more zeros than poles. and differ by less than 0. Current Mode Control Modeling copyright 1999 10 . therefore. more poles will be needed for accurate modeling of H e (s) . as will be seen when the current loop gain is derived.Gain (dB) 4 3.5 1 0.5 0 Fs/200 Phase (deg) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 Fs/200 Fs/20 Frequency Fs/2 Quadratic Exact Fs/20 Fs/2 Quadratic Exact Fig. The extra zeros in the current feedback loop will cause additional poles in the closed-loop transfer functions. The reason for this apparent anomaly is the choice of a model which is good only to half the switching frequency. and the number of zeros will not be greater than the number of poles. The current loop gain is very accurately modeled. Exact Sampled-Data Model and Quadratic Approximation: The exact and approximate expressions match exactly at dc and half the switching frequency.5 3 2. 8.

k fÂ kÂ r Fm H e (s) −DT sR i L D Â2 T s R i 2L 1 − D 2 1 (S n +S e )T s 1+ zn Qz s + s2 2 zn o Q z = −2 z n = T s o Current Mode Control Modeling copyright 1999 11 . used in the modulator. Complete Continuous-Time Model The new current-mode control model of Fig. The feedforward gains. the new current-mode control model is complete. k Âf and k r . The values of both Â k Â and k r are presented in the table below. assuming the off-time inductor voltage is constant. With the derivations of k Âf and k Âr . The average inductor current of the circuit. 5 can then be substituted to give the desired results for the gain k Âf . 5 can then be substituted to give the desired value of k Âr . are used to model this dependence. to obtain the dependence of inductor current on the on-time voltage. to obtain the dependence of inductor current on the off-time voltage. This model can now be used for accurate analysis and design. (12) can also be perturbed. Eq. with the on-time voltage constant. used in the power stage model. The gains of Fig. is related to the instantaneous current. Referring to the steady-state waveforms of Fig. The current ripple is affected by both the voltage applied to the Â inductor during the on-time and the off-time of the circuit. 5 can now be completed with the derivation of gains k Âf and k Âr . This equation can be perturbed. 7. This derivation is performed in detail in [15].VI. through the current ripple. together with a summary of the other parameters of the new f current-mode model. the describing function for the inductor current is given by R i < i L >= V c − DT s S e − 1 S f D Â T s 2 (12) The quantity < i L > denotes the average value of inductor current under steady-state conditions. The gains of Fig.

so this converter was modeled. the gain increases and the system becomes unstable at D=0. (9). For the case with no external ramp (m c = 1 ). and will show the cause of subharmonic oscillation. using the above circuit parameters. This loop gain determines the stability of the current feedback. Current Loop Gain The first transfer function of interest is the current-loop gain measured at the output of the duty-cycle modulator with the current loop feedback closed. and other transfer functions of the converter will be considerably altered from those obtained for voltage-mode control.5lH R c = 14mW V 0 = 5V C = 400lF R i = 0. Even with low current feedback (m c = 8 ). The shape of the gain and phase curves do not change with added external ramp.5. Ignoring these gains.0614 f The small-signal model of Fig.0266 r D = 0. there is significant gain at the filter resonant frequency. 5 was built with a PSpice [13] file (see Appendix A for details). in Eq. The buck converter shows some of the most interesting characteristics with current-mode control.45 k Â = −0. The second-order approximation of the sampling block. B. was easily built in PSpice using a simple operational amplifier network. Buck Converter Example The benefits and features of the new small-signal model are clearly demonstrated with an example. It can be shown that the gain blocks k Âf and k Âr have little effect on the current-loop gain. with the following parameters: V g = 11V L = 37. the approximate current-loop gain of the buck converter is T i (s) l 1+sCR L RD Â T sm c D(s) H e (s) (13) The denominator D(s) is the familiar power stage transfer function denominator given by D(s) = 1 + where Current Mode Control Modeling zo Qp s + s2 z2 o (14) (15) 12 zo = copyright 1999 1 LC .33W R = 1W T s = 20ls The small-signal parameters of the three-terminal switch and current-mode model can be calculated from Ic = Vo R = 5A V ap = V g = 11V k Â = 0. it can be seen that there is very little gain margin or phase margin in this loop. Fig. If the duty cycle increases further. The PSpice model was used to generate all of the transfer functions in this section of the paper.VII. Transfer Functions of New Model A. H e (s) . 9 shows a plot of the current-loop gain with different values of external ramp.

while the phase drops down an additional ninety degrees. If insufficient ramp is added.Qp = 1 zo L R +CR c (16) This current-loop gain expression differs significantly from conventional averaged models [1-4]. Gain (dB) 30 20 Mc=1 10 2 0 -10 -20 -30 10 4 8 100 1k 10k 100k Phase (deg) 100 50 0 -50 -100 -150 -200 -250 10 100 1k Frequency (Hz) 10k 100k Fig. The gain increases after this frequency. there is very little phase margin in this loop gain. The complex RHP zeros give an extra ninety degrees phase delay at half the switching frequency. 9. Furthermore. which is consistent with Nyquist sampling theory. Buck Converter Current-Loop Gain: The two RHP zeros at half the switching frequency are apparent in this figure. it can be seen that the maximum crossover frequency before the system goes unstable is half the switching frequency. Current Mode Control Modeling copyright 1999 13 .

10 shows a plot of this transfer function for a converter with different values of external ramp. but was not quantified.4]. and the high-Q double pole at half the switching frequency is apparent. the significant peaking that can occur at half the switching frequency when no external ramp is used means that the effect of the complex poles needs to be considered even with low crossover-frequency systems. The curve for m c = 1 has no added external ramp. the maximum crossover frequency without instability would be about 3 kHz. 10. and the implications of the new model for current-mode control are profound. This is a significant feature of the new model. but third order. The new model highlights the role of the external ramp. S e . The accurate representation of the system is neither first-order. A small external ramp results in high peaking of the control transfer function. Fig. operating with a 0. or second order. as suggested in [2. Control-to-Output Gain A new control-to-output-voltage transfer function is created when the current loop is closed. and the other moves out beyond half the switching frequency. even at duty cycles of less than 0.C.3].5 2 4 8 -40 -60 16 32 -80 10 100 1k 10k 100k Phase (deg) 0 -50 Mc=1 -100 -150 Mc=32 -200 -250 10 100 1k Frequency (Hz) 10k 100k Fig. Furthermore. 10 with a value of m c = 1 . Gain (dB) 20 0 -20 Mc=1 1.2 1. It clearly shows how subharmonic oscillation can occur. is added. when voltage-loop compensation is added. As more ramp is added. Control-Output Transfer Function for Buck Converter: This plot shows the transition from current-mode control to voltage-mode control as more external ramp.5. as suggested in [1.45 duty cycle. One of these poles then merges with the low-frequency pole to form the LC-filter double pole of voltage-mode control. which is used to control the Q of the second-order pole at half the switching frequency. This effect was noted in [12]. When Current Mode Control Modeling copyright 1999 14 . and eventually splits into two real poles. the double pole is damped. If an integral-and-lead network were added to the system shown in Fig.

The approximate control-to-output transfer function for the buck converter with current-mode control is given by v0 ˆ vc ˆ l R R i 1+ RT s L 1 (m c D Â − 0.5) Fp (s)Fh (s) (17) where Fp (s) = 1+ zs c p 1+sCR (18) where zp = and Fh (s) = 1 s 1+ z nQ + s 2 zn 2 1 CR + Ts LC(m c D Â −0. Current Mode Control Modeling copyright 1999 15 . (21) allows suitable choice of external ramp to prevent peaking at half the switching frequency.compensation is added to the control. this peaking will determine the maximum crossover frequency before subharmonic oscillations occur. (21) makes the choice of external ramp very straightforward for any PWM converter with current-mode control.5) (19) (20) where 1 Q = o(mcD Â −0. (20-21) is common to all converters. Eq.5) (21) It is interesting to note that the transfer function defined by Eqs. The approximate control-output transfer function is very useful for design purposes. The simple form of Eq.

The audio is a very sensitive function of the external ramp around the null value . 11. The approximate audio transfer function for the buck converter is vo ˆ vg ˆ = D m c D Â −(1−D/2) L RT s +(m c D Â −0. S e. (18) and (20) respectively. k Âf . Current Mode Control Modeling copyright 1999 16 . as more external ramp. Fig. Gain (dB) 0 32 8 4 Mc=1 1. This is due to the feedforward Â term. The audio decreases until the null value of external ramp is reached. Audio Susceptibility of the Buck Converter: This plot shows the transition from current-mode control to voltage-mode control. has a negative value.D. Since the gain term.5) Fp (s)Fh (s) (22) where Fp (s) and Fh (s) are given in Eqs. the audio susceptibility is very sensitive to changing values of the external ramp around this null value. The double pole at half the switching frequency is again apparent. However. k f .2 1. The buck converter audio is a special case where the input voltage perturbation can actually be nulled by the addition of the external ramp. The null in audio susceptibility occurs with an external ramp 1 value S e = 2 S f . and it can be difficult obtain a precise null. Choosing the external ramp to null the audio susceptibility can be useful for applications where output noise is extremely critical. then increases with the addition of further ramp. it is possible to completely null the circuit response to input-voltage perturbations with a suitable choice of external ramp. is added. 11 shows a plot of the audio susceptibility of the buck converter as external ramp is added. The theoretical value of this nulling ramp confirms the empirical observations in [3] that the audio susceptibility can be made to be zero.5 -20 -40 -60 -80 -100 10 100 1k Frequency (Hz) 10k 100k Fig. Audio Susceptibility The audio susceptibility of the buck converter shows one of the most interesting properties of current-mode control.

there is a strong effect on the low-frequency output impedance. Gain (dB) 0 2 4 Mc=1 -10 8 16 32 -20 -30 Mc= (No current feedback) -40 10 100 1k Frequency (Hz) 10k 100k Fig. S e .5) Fp (s) (23) For a converter operating deep in the continuous-conduction region. With high current feedback. Fig. The approximate output impedance transfer function for the buck converter is Z(s) l 1+ RTs L R (m cD Â −0. 12. Current Mode Control Modeling copyright 1999 17 . (m c = 32) . Output Impedance Closing the current feedback loop has a strong effect on the output impedance of the converter. Current-mode control gives high output impedance at low frequency. Even with low levels of current feedback.E. Even at very low levels of current feedback. The significant differences from the output impedance of the open-loop converter are the high dc value. is added. but has no peaking at the filter resonant frequency. the first term of this expression reduces to just the load resistor. Output Impedance of the Buck Converter: This plot shows the effect on output impedance as more external ramp. there is a significant effect on the low-frequency asymptote and damping of the LC-filter resonance. and the absence of any resonant peaking. the output impedance of the buck converter looks like the impedance of just the load capacitor and resistor. 12 shows the output impedance of the buck converter with different values of m c .

so the change in input voltage does not introduce discrepancies between measurements and predictions. and that all the feedback paths created by the current loop are measured. Current Mode Control Modeling copyright 1999 18 . All other measurements in this section were performed with conventional analog measurement techniques. accounted for the increased input voltage.VIII. Experimental Verification A converter was built with the same component values as those given for the example in the previous section. The control-to-output-voltage transfer function. The measured and predicted current loop gains for m c = 1 (no external ramp) and m c = 2 are shown in Fig. The gain and phase measurements again show very good correlation with the theoretical results. Gain (dB) 30 20 Mc=1 10 2 0 -10 -20 -30 10 Phase (deg) 100 50 0 -50 -100 -150 -200 -250 10 100 1k 10k 100k 100 1k Frequency (Hz) 10k 100k Fig. This control-to-output measurement allows the voltage feedback compensation to be properly designed. is shown in Fig. It was necessary to increase the input voltage to 14 V to achieve a duty cycle of 0. the theoretical and measured gain agree very well. 13. Circuit inefficiencies and semiconductor voltage drops. not input voltage. Buck Converter Current-Loop Gain Measurements: Except for small discrepancies in the low-frequency gain and a lower Q at the filter resonant frequency. All of the approximate expressions of the previous section are functions of duty cycle. This ensures that the correct sampled-data loop gain is obtained [12]. The measured and predicted phase are also very close. and the onset of subharmonic oscillation can be predicted. 13. It is important to point out that a digital modulator [11] was used to measure the loop gain. The peaking of the gain at half the switching frequency clearly shows the existence of two complex poles.45. measured with the current loop closed. Both the gain and phase measurements agreed very well with predictions up to half the switching frequency. 14. not modeled in the analysis.

The measured and predicted output impedance agreed well with external ramp added to give values of m c from 1 to 4. flipped by -180 degrees as the external ramp increased through its null value. The measurements were extremely sensitive around the value m c = 1. This switch in polarity of the audio is predicted by the audiosusceptibility expression of Eq. The measurements of audio susceptibility are shown in Fig. (22). the nulling effect of the external ramp was experimentally verified. 14. not shown in this figure. with small variations in the ramp causing large changes in the audio susceptibility.5 . However. with the audio susceptibility decreasing to a very low minimum value.Gain (dB) 20 0 Mc=1 -20 Mc=4 -40 -60 -80 10 100 1k 10k 100k Phase (deg) 0 Mc=1 -50 -100 Mc=4 -150 -200 -250 10 100 1k Frequency (Hz) 10k 100k Fig. Current Mode Control Modeling copyright 1999 19 . Higher frequency measurements below -55 dB were unreliable. The phase of the audio measurement. due to noise and grounding problems. Control-Output Transfer Measurements for Buck Converter: The effect of the second-order poles is clearly shown in the experimental measurements when no external ramp is used (m c = 1). The second-order poles at half the switching frequency are not apparent in this measurement. but measurements were difficult to obtain as the audio susceptibility became lower with more external ramp. then increasing again with more external ramp. The theory and experiment agree very well with no external ramp. 15.

5 -60 -80 -100 10 100 1k Frequency (Hz) 10k 100k Fig. 16. then an increase as more than the nulling value is added. and this is the reason for the discrepancies at high frequencies with m c = 1. Output Impedance Measurements of the Buck Converter: Measured and predicted results agree well.5 . Current Mode Control Modeling copyright 1999 20 . 15. showing the first-order response of the output impedance with no resonant peaking. Audio Susceptibility Measurements of the Buck Converter: The experimental results show the reduction in audio as external ramp is increased from zero. Measurements below -55 dB were very difficult to obtain. Gain (dB) 0 Mc=1 Mc=4 -10 -20 -30 -40 10 100 1k 10k 100k Frequency (Hz) Fig.Gain (dB) 0 4 -20 Mc=1 -40 1.

with high Q when no external ramp is used. The peaking at this frequency can be damped with the addition of external ramp. which eventually splits the poles on the real axis. The control-to-output transfer functions of two-state converters are best modeled by a three-pole expression. M. Verghese. Lee. Mahmoud. pp. "Averaged and Sampled-Data Models for Current Mode Control: A Reexamination". and can be used to show the transition from current-mode to voltage-mode control as the external ramp of the system is increased. pp. Appendix C. April. control-to-output. J. IEEE Power Electronics Specialists Conference proceedings. The accuracy of sampled-data modeling is incorporated into the new model by a second-order representation of the sampled-data transfer function which is valid up to half the switching frequency. 2) G. IEEE Power Electronics Specialists Conference proceedings. 1980. "A Unified Analysis and Design Procedure for a Standardized Control Module for DC-DC Switching Regulators". 3) L. Current Mode Control Modeling copyright 1999 21 . Bruzos. The current loop gain has a pair of complex RHP zeros which cause the instability in this loop when the external ramp is too small. Yu. Modeling in this paper concentrates on constant-frequency PWM converters. "Sampled-Data Modeling of Switching Regulators".H. 5) R. Two of these poles are at half the switching frequency. M. 7) Y.C. "Modeling and Analysis of Power Processing Systems". 1981. 6) A. June 29-July 3. B.A.F. C. Dixon. Power Electronics Specialists Conference proceedings. pp. Power Electronics Specialists Conference proceedings. 1989. the model is able to predict subharmonic oscillation without the need for discrete-time z-transform models. "Topics in Multiple-Loop Regulators and Current-Mode Programming". 4) F. F. and audio susceptibility transfer functions were confirmed with measurements on a buck converter. Cho.B. K.284-301. The new model can easily be built into any circuit analysis program such as PSpice. Volume I. 489-498. Brown.C.R.C. pp. F. 11-24. Predictions of current loop gain.F. Yu. 1980. June 26-29.N. Ridley. NASA CR-165172. pp. See also F. Unitrode Power Supply Design Seminar.IX. 1985.D.C. R. Conclusions A new current-mode control model which is accurate at frequencies from dc to half the switching frequency has been described for constant-frequency operation. References 1) R. and discontinuous conduction mode [15]. Middlebrook. Lee. 716-732. June 24-28.H. "Analysis and Interpretation of Loop Gains of Multi-Loop-Controlled Switching Regulators". "Closing the Feedback Loop". Lee. Y. October. 1988. pp. Power Electronics Specialists Conference proceedings.C. The audio susceptibility of the buck converter can be nulled with the appropriate value of external ramp. June 16-20. Yu. "Design Handbook for a Standardized Control Module for DC-to-DC Converters". 484-491. Kolecki. June 18-22. Using simple pole-zero transfer functions. Middlebrook. Y. Lee. IEEE Transactions on Power Electronics.D. Several new observations are shown about converter systems with current-mode control. pp. 349-369. 1983. 1979. Mahabir. output impedance. but the methods can be applied to variable-frequency control. 2C1-2C18. Mahmoud.

April 27-30. F. pp. 455-464. Brown. 13) P. Dissertation. 1981. and Spring 1989 Issues. IEEE Transactions on Aerospace and Electronic Systems. Middlebrook. "A Guide to Circuit Simulation and Analysis Using PSpice". "Predicting Modulator Phase Lag in PWM Converter Feedback Loops". Virginia Polytechnic Institute and State University. 1989. 9) R. Measurement. pp. pp. Fall 1988. Lee. 11) B. 1988.C. Powercon 8. and Design of High-Performance Switching Regulators". 1981. 1990. Paper H-4. California Institute of Technology. Ridley. 10) K. 66-79. November. "A New Continuous-Time Model for Current-Mode Control". May 15. 2. Inc. PhD Dissertation. Prentice-Hall. "Measurement of Loop Gain with the Digital Modulator". IEEE Power Electronics Specialists Conference.B. 15) R. October 16-20. 1984.R. B. "Simplified Analysis of PWM Converters Using the Model of the PWM Switch: Parts I and II".J. PhD. No.D. Virginia Polytechnic Institute and State University.. Astrom. Cho. Inc. 12) A. Power Conversion and Intelligent Motion Conference (PCIM '89). Vorpérian. "A New Small-Signal Model for Current-Mode Control". March 1990.H. Vol. Ridley. 363-373. 26. "Topics in the Analysis.8) V. "Computer Controlled Systems".B. Tuinenga. Prentice-Hall. June 18-21. Wittenmark. Current Mode Control Modeling copyright 1999 22 . See also VPEC Newsletter Current. 1984.W.. 14) R.

Current Mode Control Modeling copyright 1999 23 .

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