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AL – 7 Main Jail Road, Hari Nagar, New Delhi – 110064

DIGITAL SYSTEMS

1. Hardware error can raise Trap. (a) No (b) Yes (c) Not allowed (d) Can be done with parity 2. Flags are implemented through (a) Flip-flops (b) Register (c) AND gates (d) Tri-state devices 3. A tri-state buffer is used to interface ……………….. device. (a) Input (b) Output (c) Memory (d) Programmable 4. When CALL is executed the stack pointer register is decremented by (a) 1 (b) 2 (c) 0 (d) Off set value 5. When PUSH is executed the stack pointer register is decremented by (a) 1 (b) 2 ( c) 0 (d) Off set value 6. The instruction RET transfers the content of the top two locations of the stack to the (a) Accumulator (b) H and L Register (c) B and C registers (d) Program counter 7. The POP transfers the content of the loop two locations of the stack to (a) Accumulator (b) H and L registers (c) Any two register pair (d) Program counter

Ph. 9810455330, 25138338, 25138339

. For 10-bit flash convertor we need ……………………….4% (g) 1/28 % (h) 8% 12. Hari Nagar. the binary inputs 000 and 001 represent …………………………. 9810455330.. For a 8-bit converter we need ……………………………… comparators (a) 8 (b) 255 (c) 2 x 28 (d) 28/2 13. (c)-(D). 25138338. In the above question the binary input 111 represent (a) 1 V (b) ½ V (c) 6/8 V (d) 7/8V 10.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road.3% (f) 0. New Delhi – 110064 8. 25138339 . Match the following : (a) Locator (b) Editor (c) Basic (d) Assembler (a)-(B). respectively. Dual slope ADCs are used mostly in voltmeters because (a) It is of low cost (b) It converts high voltage to low voltage (c) It converts analog to digital (d) It gives large number of bits of resolution. In a 3-input DAC with 1 V as full scale analog input. (a) 0 V and 1 V (b) 1/8 V and ¼ V (c) 0 V and 1/8 V (d) 0 V and ¼ V 9. (b)-(C) . comparators (a) 10 (b) 210 (c) 210-1 (d) 210/10 14. Resolution of 8-bit input DAC is approximately (e) 0. (d)-(A) (A) (B) (C) Symbol Table EXE2BIN EDLIN (D) ROM 11. Ph.

The main disadvantage of slope-type converter is (a) low speed (b) high cost (c) large size (d) complicate to design The SAR is expended as (a) Successive Accession Register (b) Sequential Accession Register (c) Successive Address Register (d) Successive Approximation Register An ADC is called unipolar when (a) Its input are always (+)ve (b) Its input are always (-)ve (c) Its output are always (+)ve (d) Its output are always (-)ve If output of an ADC converter is going to drive a display.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 17. 19. Ph. 20. 22. 25138339 . 18. 9810455330. (a) (b) (c) (d) 21. hen it is convenient to have the output coded in (a) ASCII (b) Gray Code (c) BCD (d) Octal A smart scale device uses (a) ADCs interfaced with computer (b) DACs interfaced with computer (c) Both ADCs and DACs interfaced with computer (d) Computer scaling device Pick up the correct word for the following points: extremely low power dissipation single supply voltage high noise immunity wide operating range with respect to supply voltage and ambient temperature MOS technology TTL Bipolar IC technology Static memory Select correct chip for PLA (Parallel interface Adapters) (a) 8255 (b) 8237 (c) 8087 (d) 8259 The 10’s compliment of 428 is (a) 571 (b) 572 (c) –571 (d) –572 16. Hari Nagar. New Delhi – 110064 15. 25138338.

but power dissipation is critical.75 The Gray code of the Binary number(10110)2 is (a) 01001 (b) 10001 (c) 11101 (d) 10101 The Binary number of the Gray code number 11011 is (a) 11010 (b) 10010 (c) 10110 (d) 00101 In certain application. 25138339 . 28. New Delhi – 110064 23. 25138338.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 9810455330.75 (d) 57. 25.75 (b) 55. The decimal value of (110101. propagation delay is not a consideration. 29. 31. (a) R-S flip flop (b) AND gate (c) RS flip flops in which outputs are connected to inputs (d) J-K flip flops The S and R inputs of S-R flip flops are ………… input (a) Asynchronous (b) Synchronous (c) Any type (d) Synchronous.11) is (a) 53. (a) X = ABC+A’B’C’ (b) X = ABC+A’B’C+AB’C’+A’BC’ (c) X = ABC+A’BC+AB’C+ABC’ (d) X = A’B’C’+A’BC+AB’C+ABC’ Multiplexers are also known as …………………. 26.bounce. 27. Hari Nagar. 30. only for edge. which logic family can be used ? (a) CMOS (b) MOS (c) TT (d) TTY The Boolean function AB + A(B+C)+B(B+C) is equivalent to (a) A+BC (b) B+A (c) AB+BC (d) B+AC The Boolean expression for the following statement is X is a 1 only if A=B=C=1 or if only one of the variable is a Zero.75 (c) 51. selectors (a) Data selectors (b) address (c) control (d) any input One of the following can be used to eliminate key. Ph.triggering flip flops 24..

The register has an initial contents 1110 0100. Hari Nagar.. (c) data cannot be changed while. The major restriction when operating a pulse triggered flip flop is (a) data cannot be changed while. 34. 35. states. (a) 2n (b) 2n -1 (c) 2n-1 (d) 2n +1 The ring counter with n flip flops has ……………. New Delhi – 110064 32. States. (a) 0101 0100 and 0110 0100 (b) 1101 0111 and 1001 0010 (c) 1001 0010 and 1101 1110 (d) 0111 1001 and 0101 1110 The divide-by –10 johnson requires ……………. Ph. A decade counter is a counter that has the property – (a) it has 4 flip flops and 16 possible outputs (b) it has 4 flip flops and 10 possible outputs (c) BCD counters (d) Counters with 3 flip flops and 10 outputs Ripple counters are also called …………………… (a) Synchronous counters (b) Decade counters (c) Flip flop with feedback inputs (d) Asynchronous counters A full counter with n flip flops will have ……………. the clock pulse is in active state.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 37... 25138338. 9810455330. (d) data cannot be changed while. (a)2n (b) 2n (c) 2n -1 (d) 2n-1 The number of clock pulses required to move data into and out of an eight bit serial in and serial out shift register is (a) 15 (b) 17 (c) 16 (d) 9 The binary numbers 1011 0101 is shifted into an eight bit parallel out shift register serially. respectively. The outputs of Q after 2 clock pulses and 4 clock pulses are …………. 36. 38. (b) data cannot be changed while. the clock pulse is in inactive state. flip flop is reset. flip flop is set. flip flops (a) 5 (b) 10 (c) 4 (d) 11 33. 39. 25138339 .

Hari Nagar. 000. 000 (a) Ring counter (b) Serial in serial out BCD counter (c) Ripple counter (d) Johnson counter A toggle flip-flop can be constructed using JK flip-flop by connecting the 41. 1 3 8 256 Which of the following gates recognizes only words that have an odd number of 1s (a) (b) (c) (d) 46. 011. NAND XOR NOR None of these If even parity mechanism is being used in system using ASCII code for data transfer. 9810455330. 100. 111. 110. New Delhi – 110064 40. 25138339 . Any combinational circuit can be implemented by using the following building block a) b) c) d) AND NAND OR None of these Ph. The sum of two Hexadecimal numbers 23D and 9AA gives the hexadecimal number (a) BE7 (b) BE5 (c) BF6 (d) AF7 44. The number of select lines required for a to 1 multiplexer is (a) (b) (c) (d) 45. 001.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. incorrect receipt data byte is (a) (b) (c) (d) B5 1 2 None of these 47. The following is the sequence of states of a 3-bit …………………. Toggle input of J and the inverted form of toggle input to ih Toggle input to J Inverted form of toggle input to K None of the above The sum of two octal numbers 12 and 17 would be in octal as (a) 21 (b) 23 (c) 29 (d) 31 43. (a) (b) (c) (d) 42. 25138338.

25138339 . 25138338.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 9810455330. The number of memory location that a CPU with a 16 bit program counter can address (a) 16k (b) 64k (c ) 256k a) b) c) d) e) (e) 32 k In a J-K flip-flop the function K=J is used to realize T flip – flop S-R flip-flop D flip-flop M/S J-K flip 50) The following logic building block can be used to implement any combinational logic circuit a) Decoder b) Multiplexer c) Ex-Or gate d) Encoder 51) A module 20 counter can be designed using a) 4 flip-flops b) 20 flip-flops c) 5 flip-flops d) None of these 52) A computer stores it’s data in memory a) Decimal form b) Octal form c) Hexadecimal form d) Binary form 53) The least negative valaue that the product of two 8-bit 2’s complement number can take is a) -214 b) -215 c) -216 d) None of these 54) The simplified form of the expression AB+ABC’ is a) AB b) A(B+C) c) A(B+C)’ d) None of these Ph. Hari Nagar. New Delhi – 110064 48.

Hari Nagar. 25138339 . 25138338.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 9810455330. New Delhi – 110064 55) In half subtractor borrow is obtained by (for inputs A & B) a) AB b) A’B c) A’B’ d) None of these 56) The numbers in the range -23 to +31 is represented by minimum number of bits a) 6 b) 8 c) 7 d) 5 57) Which of the following is a unit of measurement with computer systems a) Byte b) Megabyte c) Kilobyte d) All of above 58) The number of select input lines in an 16-to-1 multiplexer is a) 4 b) 8 c) 1 d) None of the above 59) Code segment register is where the microprocessor looks for a) Stack b) Data c) Instruction d) Operand 60) In register addressing mode operands are looked at a) In cache b) In secondary storage c) In cpu d) In primary memory 61) BCD stands for a) Boolean code definition b) Binary coded division c) Binary coded decimal d) None of the above 62) The basic circuit of ECL supports the a) NAND logic b) NOR logic c) EX-OR logic d) OR-NOR logic Ph.

25138338. the representation of such number is called a) Fixed point b) Floating point c) Radix point d) None of these 65) Which of the following memory elements uses an RC circuit as its input? a) Unclocked D latch b) Level-clocked D latch c) Edge – triggered D flip-flop d) None of the above 66) The minimum hardware required to construct a 3-to-8 decoder is using a) Two 2-to-4 decoders b) Two 2-to-4 decoders and a two 1-to-2 decoders c) Depends upon the technology (TTL. etc. CARRY is obtained by using a) OR gate b) NAND gate c) AND gate d) EX-NOR gate 64) If the radix point (binary point) is fixed and assumed to be to on the right of the right most digit. 25138339 .GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. the range of the sum output is a) -128 to +127 b) -256 to +255 c) -512 to + 511 d) -256 to + 256 68) In order to correct a single error. New Delhi – 110064 63) In a half – adder. 9810455330. the minimum number of check bits that must be added to 4 data bits is a) 2 b) 3 c) 4 d) There is insufficient data to answer the question 69) Octal number system is a) A positional system with weights 0 to 9 b) A positional system with weights 0 to 8 c) A positional system with weights 0 to 7 d) A non positional system with weights 0 to 7 Ph. CMOS.) d) None of the above 67) Two 4-bit 2’s compliment numbers are added using a ripple carry adder. Hari Nagar.

(a’+c’) 74) A combinational circuit that converts binary information from n coded inputs to a maximum of 2n unique outputs called as a) Encoder b) Decoder c) Multiplexer d) Demultiplexer 75) Decimal equivalent of the binary number 101001. Minterms a) N2 b) (n-1)2 c) 2n d) 2n-1 72) Which of the following shift operations divide a signed binary number of 2 a) Logical left shift b) Logical right shift c) Arithmetic left shift d) Arithmetic right shift 73) Dual of a+b. New Delhi – 110064 70) A 4 digit BCD number can be represented with the help of a) 10 bits b) 8 bits c) 12 bits d) 16 bits 71) A truth table of the n variables has …………………….06875 c) 416875 d) 40. Hari Nagar.0875 b) 41. 9810455330. 25138339 .1011 is a) 41. 25138338.(b+c) c) a’.0875 76) The half adder performs a) Decimal addition operation for 2 decimal inputs b) Binary addition operation for 2 binary inputs c) Decimal addition operation for 2 binary inputs d) Binary addition operation for 2 decimal inputs Ph.(b’+c’) d) (a’+b’).(a+c) b) a.c is a) (a+b).GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road.

New Delhi – 110064 77) A flip-flop circuit can be used for a) Counting b) Scaling c) Rectification d) Demodulation 78) Normally digital computers are based on a) AND and OR gates b) NAND and NOR gates c) Not gate d) None of these 79) Which one does not change the information content during movement of binary information in registers a) Register transfer micro-operations b) Arithmetic operations c) Logic operations d) None of above 80) Using Binary division.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. a) AND b) NOR c) XOR d) NAND 83) The 9’s complement of 594013 is ………………………. a) 999401 b) 487650 c) 405876 d) None of these Ph. divide 1011011 by 111 a) 101. 9810455330. a) Time b) Transfer c) Toggle d) Trigger 82) ……………………… is a universal logic gate. 25138339 . 25138338.01 b) 1011 c) 011.. Hari Nagar.01 d) 1101 81) The ‘T’ in the flip flop stands for …………………….

9810455330. a) Complex Metal Oxide Semiconductor b) Complementary Metal Oxide Semiconductor c) Combinational Metal Oxide Semiconductor d) Combinational Metal Oxide Semiconductor 88) In the following what are the analog to digital converters? a) ADC b) DAC c) MOS d) TTL 89) The ……………………. New Delhi – 110064 84) A combinational logic circuit must consist of ………………………… a) Input variables b) Logic gates c) Output variables d) Memory elements 85) What is the binary equivalent of the decimal number 10? a) 0010 b) 1110 c) 0110 d) 1010 86) In a decimal number system. Number system contains 16 symbols a) Octal b) Decimal c) Binary d) Hexadecimal 90) The main disadvantage of slop-type converter is a) Low speed b) Large size c) High cost d) Complicate to design Ph.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 25138338. a) 10 b) 8 c) 2 d) 16 87) CMOS is the acronym for …………………………. the weight of each position is a power of the base number ………. 25138339 . Hari Nagar.

27.. Multiplexer are used in digital circuits to control signal and data …………………. Binary equivalent of 13 is ……………………… 10. A flip-flop is an example of ………………….. Even parity is used to transmit 8 bit data. There is a transmission error if the byte received is ………………………… 23. circuit. 25138338. The digits of binary system are called …………………. The hamming distance between 101101 and 110010 is …………………… 7. Logical AND operation on A with mask ……………………… hex is used. 25138339 . Data representation in a computer uses the …………………… number system.. 8. A ……………………. 11. between any two successive number is 1. In half adder circuit SUM is realized using ………………. 16. 19. Decimal number of 127 is equal to the hexadecimal …………………. In a gray code sequence. ……………………………. 6. 22. A ……………… accepts an n-bit binary word as input to convert digital to analog. 5. 9810455330. 15. gate and a bubbled AND gate are equivalent. A bar over a variable is called …………………. 18. Operation. 2. 26. Non numeric data are called …………………………………….GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. In 1s complement representation +0 and -0 are …………………………. 13. J-K flip-flops 25. A ……………… circuit is one whose outputs depends upon the order in which the variables changes and can be affected.. 9. 21. the …………………. Holds the last instruction fetched. Three basics law of Boolean algebra are commutative. New Delhi – 110064 FILL IN THE BLANKS 1.. A ……………………… is a special kind of register designed to count number of clock pulses arriving as its input... 20. associative and ………………………. Sequential logic circuits contain devices called ……………………. 14. 3.. Master slave J-K flip-flop is configured from …………. A latch is a …………………… device. To set the most significant bit of a 8 bit register A to 0. 4. The smallest number of JK flip-flops required. Ph. 17. Nano second is equal to ……………………… of a second. 12. to implement a ring counter is ………………. Hari Nagar. The carry output of a full adder with two inputs A and B with previous carry C is given by ………………………. A decoder can function as a demultiplexer with enable input used as ……………… 24..

3. Ab+cb+ac can be reduced to ab+cb 4. Synchronous data transfer is less expensive than asynchronous data transfer. The Roman number system is a place value number system. 5. BCD code uses only 0s. 10. 9810455330. Hari Nagar. New Delhi – 110064 28. 29. 7. Computers cannot be considered as programmable calculators. 12. A megabyte is about million bytes. Ripple counter is another name for a asynchronous counter. 25138339 . Answers 1)Instruction Register. 2)Counters 3)7F 4)Micro 5)AB+BC+CA. 6)5 7)Same 8)Characters 9)1101 10)7F 11)Billionth 12)Sequential 13)Combinational 14)Binary 15)Bits 16)Storage 17)Flip-flops 18)Ex-or 19)Routing 20)4 21)Hamming distance 22)Odd 23)Data input 24)2 25)DAC 26)Complement 27)Distributive 28)Product of sum 29)Universal 30)Encoder. Demorgan’s theorms are used to represent the function only with ………………………… gates. A finite state machine with 255 states can be implemented by using 13 flipflops 2. There are two basic forms of Boolean expressions : the sum of products and ………………. 13. Flip-flops consist of two cross connected NAND or NOR gates 6. 30.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 1s and 2s. Program counter counts the number of instructions in a computer. A …………………………. True/False 1. A decoder is used for horizontal microinstruction. The basic computing unit in a micro computer is a transistor flip flop. Ph. 25138338. Operates as a decoder in reverse.. 11. Number systems using digits 0 to 5 have a base 5 9. 8.

C and D. 25138339 . In ASCII. The flip-flop has two outputs. 26. 17. The complement of a product form of an expression is not equal to the sum of the complements. There are flip-flops with asynchronous inputs. The Gray code is an unweighted code. The CPU program counter keeps track of the time of the next program instruction to be executed. Registers are addressable by programs 24. 20. In a k. 23.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. Hari Nagar. The flip-flop is a storage device. which are always the complement of each other 25. Multiplexers are also known as data selectors. Ph. 21. 27. 18. 22. B. The serial in parallel out shift register can be used as serial in serial out register. 30. 19. 16. A NAND gate also acts as a negative OR gate. New Delhi – 110064 14. 9810455330. decimal digits are represented by 8421 BCD code preceded by 011. 15. 28.map of four variables A. An inverter changes a LOW level to a HIGH level and vice versa 29. Counters and time delays can be designed using software. A program composed of symbolic statements in sometimes called a source program. During the decoding stage the decoder in the program memory interprets the opcode that currently resides in the instruction register. 25138338. R-2R Ladder DAC is an alternative to the binary-weighted-input DAC. the term AB will cover a strip of 2 squares.

28. 20. 13. 25138338. False False True True True Ph. True False False True True 3. False False False True True 5. True False True True False 6. 9810455330. 11. Hari Nagar. 8. 18. 26. New Delhi – 110064 Answers (True/False) 1. 15. 12. 30. 25138339 . 19. 24.GURU GOBIND SINGH COLLEGE FOR MTMS AL – 7 Main Jail Road. 10. 23. 9. 22. 14. 27. True True True True False 4. 29. 17. 16. 25. True False False True False 2. 21. 7.

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