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PC INTERFACED MISSILE FIRING SYSTEM WITH SONAR

CONTENT 1. ABSTRACT 2.INTRODUCTION. 3.DESIGN PRINCIPLE. 4.CIRCUIT DESCRIPTION.


A. Power Supply. B. Mother Board. C. IR Transmitter. D. IR Receiver. E. Bidirectional motor driver. F. PMDC MOTOR G. Relay Driver H. Signal Conditioning Circuit I. SERIAL INTERFACING UNIT J. BUZZER DRIVER

4.FUTURE EXPANSION. 5.CONCLUSION.

1. ABSTRACT:
The PC based missile firing System with SONAR primarily functions to identify the source of signal. The signal may be of any type and any kind, it automatically identifies the presence of a particular signal and the antenna will remain stationary as long as the signal link is established. Whenever the signal link break between the antenna and the source the antenna revolves continuously in search of the signal. This system also has advance connectivity with the computer to indicate the antenna position on the computer terminal. In this project the source of signal is simulated by a Infrared (IR) source. And a corresponding IR receiver is used for detecting the signal. The receiver part includes one mono-stable that improves the stability of the system, against the transient interruption and momentary absence of the signal. The controller circuit is developed on a MCS 51core micro controller. The controller is designed on the base of embedded technology. This controller mainly search the availability of the signal, when ever the signal found absence at the receiver, the controller drives the dc motor to rotate and goes on till the receiver found the signal. The controller provides necessary signal to the dc motor driver on which the antenna is mounted. The driver circuit provides adequate current and necessary voltage level to drive the motor in turn to move the antenna. Also the controller communicates with the PC through its Serial Port, for indicating the position of the antenna.

The entire system is constructed modularly; there are different sections in this system which are as follows. 1. Power Supply. 2. Receiver. 3. Transmitter 4. Controller. 5. DC Motor. 6. Motor Driver. 7. Computer Interfacing 8. Software

All the above-mentioned sub systems contribute for the better functionality of the entire system. 1. POWER SUPPLY: The Power supply section provides +5V DC and +12 V DC, with a capacity of 1Amp current. This consists of mainly a bridge rectifier and two series regulators 7812 and 7805. This power supply can provide maximum 1 Amp current at + 5volt or +12 volt. How ever the maximum current is limited to 1 amp by each component. Where as our requirement is 750 mA at +5V and +12V. 2. RECEIVER: The receiver consists of two parts such as, sensor and

indicator. The IR sensor used here is a semiconductor device which respond

to IR signal. The sensor is IR detector diode, which is connected; in reverse biased condition so the normal current during the absence of the IR signal is very small. When the IR signal fall on the detector diode then the current in the IR diode increases. The diode is connected in series with a resistor in a voltage divider configuration. This change of voltage drop due to difference of current flow in the resistance is detected by a comparator and the out put is feed to a signal conditioning circuit to convert the out put in to a TTL compatible signal and feed to the microcontroller for further processing.. 3. TRANSMITTER: The transmitter is a simple LED driver which is drives a IR LED This signal is given to a driver section which drives an IR LED to generate IR signal in a continuous or discontinuous mode. 4. CONTROLLER: This is an embedded controller which is configured around 89C51 micro controller. The controller is designed with internal memory and components of the micro controller. The controller unit receives signal from the receiver and commands the driver to run the stepper motor and also communicate with the PC to indicate the position of the antenna. 5. STEPPER MOTOR: The stepper motor is an electro mechanical device

which converts electrical energy into mechanical energy. The specialty of this motor over d.c. motors that, it is a digital motor so moves in steps, so a accurate position control is possible. The stepper motor rotates on rotation of the bit pattern appearing to its coil. The speed of the motor depends on the fastness at which the bit pattern rotates, but the magnitude of the bit voltage

decides the driving torque. The stepper motor holds the rotating antenna, which rotates as per the instruction of the controller. 6. STEPPER MOTOR DRIVER: The stepper motor driver provides adequate

voltage and current to run the stepper. The driver receives control signal from the controller at CMOS logic level, that is at 5 volt and 10 mA. 7. COMPUTER INTERFACE: The computer COM port is used here for

interfacing . This is a RS232 standard port which accepts serial data from the microcontroller. The communication protocol is in the simplex mode. The PC is running with a C++ program to monitor the position of the antenna. This is the concept has been used to interface the controller with PC. 8. SOFTWARE: There are two types of software in this system. The controller designed with MCS-51 Core based micro controller, assembly language programs. Where as the controller interfacing program with PC has been developed on C ++language.

SCOPE: This Automatic Tracking System can be implemented in different ways for different application with slight modification in hard ware and software. 1. The receiver in the antenna can be changed and by that this antenna can track to different signals.

2. This system can further modified and developed for application into radar and chasing a source for its continuous monitoring.

1. INTRODUCTION:
The development of electronically steerable, automatically self-directing, antennas is described here is a small and tiny antenna which is mounted on the missile to guide the missile to the target. This type of antenna is used for guiding the target when the it changes its direction. When a missile or shut is fired to a target object the missile approaches the target, in the mean while if the target changes its direction then the missile should follow the target instead of misfiring. This type of antenna can be used at the boarder areas to detect and enemy planes and track its movement. This antenna can chase the target and acquire information regarding the target. This type of antenna is very useful for application in defense purpose. The target guided Antenna is designed with a microcontroller based system to control a parabolic antenna to observe the movement of the target. This project is designed with the concept of close loop control system and artificial memory. In the real application when a target needs to be chased and tracked this type of antenna may be used. Missile firing system and RADAR system may use this type of antenna for its application

The transmitter and receiver are designed for a particular type of modulated signal having a particular characteristic. In this prototype the receiver is designed to receive IR signal. A IR transmitter is used for transmitting 38KHz modulated signal as a source of signal and an IR receiver is used for receiving the same modulated signal. So the prototype antenna developed here acts as a Infra-Red signal guided Antenna.

2. DESIGN PRINCIPLE
This project is designed on the principle of feedback control system. The control system designed here to control the movement of a DC motor. The receivers / sensors are used in this project is sensitive to Infra- red signal. The parabolic antenna designed here consisting of three sensors arranged as shown in the figure below.

The center, left and right sensors are connected to the micro controller and process the signal after receiving those. The receivers receive infrared signal and feed to the micro

controller after conditioning. In this project on starting condition the antenna remains stationary and wait until the target comes into the proximity of any of the sensor, once the sensor detects the target the target moves until the target is aligned with center. After the target get aligned with center the antenna moves in the same direction as the target moves and the antenna movement continue until the antenna center again aligned with the targeted. The basic principle for designing this project is based on the IR transmitter and receiver. The out put of the sensor is send to the microcontroller and PC. And PC plotted a circular graphics on the Screen to measure the distance of the target. In the C++ programmed threshold limit is fixed for the target. If the target move beyond the minimum proximity level then the microcontroller sends a signal to the missile to destroy the target. In this project the firing system is simulated by a laser light.

3. CIRCUIT DESCRIPTION
A. POWER SUPPLY :-( +ve)
Circuit connection: - In

this we are using Transformer (0-12) VAC/1Amp, IC 7805 &

7812, diodes IN 4007, LED & resistors. Here 230V, 50 Hz ac signal is given as input to the primary of the transformer and the secondary of the transformer is given to the bridge rectification diode. The o/p of the diode is given as i/p to the IC regulator (7805 &7812) through

capacitor (1000uf/35v). The o/p of the IC regulator is given to the LED through resistors. Circuit Explanations: - When ac signal is given to the primary of the transformer, due to the magnetic effect of the coil magnetic flux is induced in the coil (primary) and transfer to the secondary coil of the transformer due to the transformer action. Transformer is an electromechanical static device which transformer electrical energy from one coil to another without changing its frequency. Here the diodes are connected in a bridge fashion. The secondary coil of the transformer is given to the bridge circuit for rectification purposes.

During the +ve cycle of the ac signal the diodes D2 & D4 conduct due to the forward bias of the diodes and diodes D1 & D3 does not conduct due to the reversed bias of the diodes. Similarly during the ve cycle of the ac signal the diodes D1 & D3 conduct due to the forward bias of the diodes and the diodes D2 & D4 does not conduct due to reversed bias of the diodes. The output of the bridge rectifier is not a power dc along with rippled ac is also present. To overcome this effect, a capacitor is connected to the o/p of the diodes (D2 & D3). Which removes the unwanted ac signal and thus a pure dc is obtained. Here we need a fixed voltage, thats for we are using IC regulators (7805 & 7812).Voltage regulation is a circuit that supplies a constant voltage regardless of changes in load current. This ICs are designed as fixed voltage regulators and with adequate heat sinking can deliver output current in excess of 1A. The o/p of the bridge rectifier is given as input to the IC regulator through capacitor with respect

to GND and thus a fixed o/p is obtained. The o/p of the IC regulator (7805 & 7812) is given to the LED for indication purpose through resistor. Due to the forward bias of the LED, the LED glows ON state, and the o/p are obtained from the pin no-3.

P OWER

SUP PLY (+VE )

7812

9-0-9V

2.2K Vout

1 T1 5

7805 IN4007*4
+ 2

LE D

230V 50HZ
4 8

4 -

1K 1000MF/35V
LE D

Vout

B. MOTHER BOARD:
The motherboard of this project is designed with a MSC 51 core compatible micro controller. The motherboard is designed on a printed circuit board, compatible for the micro controller. This board is consisting of a socket for micro controller, input /output pull-up registers; oscillator section and auto reset circuit.
Microcontroller core processor:

Introduction Despite its relatively old age, the 89C51 is one of the most popular Micro controller in use today. Many derivatives Micro controllers have since been developed that are based on--and compatible with--the 8051. Thus, the ability to program an 89C51 is an important skill for anyone who plans to develop products that will take advantage of Micro controller. Many web pages, books, and tools are available for the 89C51 developer. The 89C51 has three very general types of memory. To effectively program the 8051 it is necessary to have a basic understanding of these memory types. The memory types are illustrated in the following graphic. They are: On-Chip Memory, External Code Memory, and External RAM.

On-Chip Memory refers to any memory (Code, RAM, or other) that physically exists on the Microcontroller itself. On-chip memory can be of several types, but we'll get into that shortly. External Code Memory is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. External RAM is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM. Code Memory Code memory is the memory that holds the actual 8051 program that is to be run. This memory is limited to 64K and comes in many shapes and sizes: Code memory may be found on-chip, either burned into the Microcontroller as ROM or EPROM. Code may also be stored completely off-chip in an external ROM or, more commonly, an external EPROM. Flash RAM is also another popular method of storing a program. Various combinations of these memory types may

also be used--that is to say, it is possible to have 4K of code memory on-chip and 64k of code memory off-chip in an EPROM. When the program is stored on-chip the 64K maximum is often reduced to 4k, 8k, or 16k. This varies depending on the version of the chip that is being used. Each version offers specific capabilities and one of the distinguishing factors from chip to chip is how much ROM/EPROM space the chip has. However, code memory is most commonly implemented as off-chip EPROM. This is especially true in low-cost development systems and in systems developed by students. Programming Tip: Since code memory is restricted to 64K, 89C51 programs are limited to 64K. Some assemblers and compilers offer ways to get around this limit when used with specially wired hardware. However, without such special compilers and hardware, programs are limited to 64K.

External RAM As an obvious opposite of Internal RAM, the 89C51 also supports what is called External RAM. As the name suggests, External RAM is any random access memory which is found off-chip. Since the memory is off-chip it is not as flexible in terms of

accessing, and is also slower. For example, to increment an Internal RAM location by 1 requires only 1 instruction and 1 instruction cycle. To increment a 1byte value stored in External RAM requires 4 instructions and 7 instruction cycles. In this case, external memory is 7 times slower! What External RAM loses in speed and flexibility it gains in quantity. While Internal RAM is limited to 128 bytes (256 bytes with an 8052), the 8051 supports External RAM up to 64K. Programming Tip: The 8051 may only address 64k of RAM. To expand RAM beyond this limit requires programming and hardware tricks. You may have to do this "by hand" since many compilers and assemblers, while providing support for programs in excess of 64k, do not support more than 64k of RAM. This is rather strange since it has been my experience that programs can usually fit in 64k but often RAM is what is lacking. Thus if you need more than 64k of RAM, check to see if your compiler supports it-- but if it doesn't, be prepared to do it by hand. On-Chip Memory As mentioned at the beginning of this chapter, the 89C51 includes a certain amount of on-chip memory. On-chip memory is really one of two types: Internal RAM and Special Function Register (SFR) memory. The layout of the 89C51's internal memory is presented in the following memory map:

As is illustrated in this map, the 8051 has a bank of 128 bytes of Internal RAM. This Internal RAM is found on-chip on the 8051 so it is the fastest RAM available, and it is also the most flexible in terms of reading, writing, and modifying its contents. Internal RAM is volatile, so when the 8051 is reset this memory is cleared. The 128 bytes of internal ram is subdivided as shown on the memory map. The first 8 bytes (00h - 07h) are "register bank 0". By manipulating certain SFRs, a program may choose to use register banks 1, 2, or 3. These alternative register banks are located in internal RAM in addresses 08h through 1Fh. We'll discuss "register banks" more in a later chapter. For now it is sufficient to know that they "live" and are part of internal RAM.

Bit Memory also lives and is part of internal RAM. We'll talk more about bit memory very shortly, but for now just keep in mind that bit memory actually resides in internal RAM, from addresses 20h through 2Fh. The 80 bytes remaining of Internal RAM, from addresses 30h through 7Fh, may be used by user variables that need to be accessed frequently or at high-speed. This area is also utilized by the Microcontroller as a storage area for the operating stack. This fact severely limits the 8051s stack since, as illustrated in the memory map, the area reserved for the stack is only 80 bytes--and usually it is less since this 80 bytes has to be shared between the stack and user variables.

SFR Descriptions There are different special function registers (SFR) designed in side the 89C51 micro controller. In this micro controller all the input , output ports, timers

interrupts are controlled by the SFRs. The SFR functionalities are as follows. This section will endeavor to quickly overview each of the standard SFRs found in the above SFR chart map. It is not the intention of this section to fully explain the functionality of each SFR--this information will be covered in separate

chapters of the tutorial. This section is to just give you a general idea of what each SFR does.

P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of this SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and P3), if your hardware uses external RAM or external code memory (i.e., your program is stored in an external ROM or EPROM chip or if you are using external RAM chips) you may not use P0 or P2. This is because the 8051 uses ports P0 and P2 to address the external memory. Thus if you are using external RAM or code memory you may only use ports P1 and P3 for your own use.

SP (Stack Pointer, Address 81h): This is the stack pointer of the Microcontroller. This SFR indicates where the next value to be taken from the stack will be read from in Internal RAM. If you push a value onto the stack, the value will be written to the address of SP + 1. That is to say, if SP holds the value 07h, a PUSH instruction will push the value onto the stack at address 08h. This SFR is modified by all instructions which modify the stack, such as PUSH, POP, LCALL, RET, RETI, and whenever interrupts are provoked by the Microcontroller.

Programming Tip: The SP SFR, on startup, is initialized to 07h. This means the stack will start at 08h and start expanding upward in internal RAM. Since alternate register banks 1, 2, and 3 as well as the user bit variables occupy internal RAM from addresses 08h through 2Fh, it is necessary to initialize SP in your program to some other value if you will be using the alternate register banks and/or bit memory. It's not a bad idea to initialize SP to 2Fh as the first instruction of every one of your programs unless you are 100% sure you will not be using the register banks and bit variables.

DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and DPH work together to represent a 16-bit value called the Data Pointer. The data pointer is used in operations regarding external RAM and some instructions involving code memory. Since it is an unsigned two-byte integer value, it can represent values from 0000h to FFFFh (0 through 65,535 decimal). Programming Tip: DPTR is really DPH and DPL taken together as a 16-bit value. In reality, you almost always have to deal with DPTR one byte at a time. For example, to push DPTR onto the stack you must first push DPL and then DPH. You can't simply plush DPTR onto the stack. Additionally, there is an instruction to "increment DPTR." When you execute this instruction, the two bytes are operated upon as a 16-bit value. However, there is no instruction that decrements DPTR. If you wish to decrement the value of DPTR, you must write your own code to do so.

PCON (Power Control, Addresses 87h): The Power Control SFR is used to control the 8051's power control modes. Certain operation modes of the 8051 allow the 8051 to go

into a type of "sleep" mode, which requires much, less power. These modes of operation are controlled through PCON. Additionally, one of the bits in PCON is used to double the effective baud rate of the 8051's serial port. TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control SFR is used to configure and modify the way in which the 8051's two timers operate. This SFR controls whether each of the two timers is running or stopped and contains a flag to indicate that each timer has overflowed. Additionally, some non-timer related bits are located in the TCON SFR. These bits are used to configure the way in which the external interrupts are activated and also contain the external interrupt flags which are set when an external interrupt has occurred. TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure the mode of operation of each of the two timers. Using this SFR your program may configure each timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or two separate timers. Additionally, you may configure the timers to only count when an external pin is activated or to count "events" that are indicated on an external pin. TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken together, represent timer 0. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value.

TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken together, represent timer 1. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value. P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of this SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR is used to configure the behavior of the 8051's on-board serial port. This SFR controls the baud rate of the serial port, whether the serial port is activated to receive data, and also contains flags that are set when a byte is successfully sent or received. Programming Tip: To use the 8051's on-board serial port, it is generally necessary to initialize the following SFRs: SCON, TCON, and TMOD. This is because SCON controls the serial port. However, in most cases the program will wish to use one of the timers to establish the serial port's baud rate. In this case, it is necessary to configure timer 1 by initializing TCON and TMOD.

SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and receive data via the on-board serial port. Any value written to SBUF will be sent out the

serial port's TXD pin. Likewise, any value which the 8051 receives via the serial port's RXD pin will be delivered to the user program via SBUF. In other words, SBUF serves as the output port when written to and as an input port when read from. P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of this SFR corresponds to one of the pins on the Microcontroller. For example, bit 0 of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and P3), if your hardware uses external RAM or external code memory (i.e., your program is stored in an external ROM or EPROM chip or if you are using external RAM chips) you may not use P0 or P2. This is because the 8051 uses ports P0 and P2 to address the external memory. Thus if you are using external RAM or code memory you may only use ports P1 and P3 for your own use.

IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific interrupts, where as the highest bit is used to enable or disable ALL interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled regardless of whether an individual interrupt is enabled by setting a lower bit. P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of this SFR corresponds to one of the pins on the Micro controller. For example,

bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.

Auto reset Circuit:

MICROCONTROLLER
39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 P P P P P P P P P P P P P P P P 0 .0 /A 0 .1 /A 0 .2 /A 0 .3 /A 0 .4 /A 0 .5 /A 0 .6 /A 0 .7 /A 1 .0 1 .1 1 .2 1 .3 1 .4 1 .5 1 .6 1 .7 D D D D D D D D 0 1 2 3 4 5 6 7 P 2 .0 /A 8 P 2 .1 /A 9 P 2 .2 /A 1 0 P 2 .3 /A 1 1 P 2 .4 /A 1 2 P 2 .5 /A 1 3 P 2 .6 /A 1 4 P 2 .7 /A 1 5 P 3 .0 /R X D P 3 .1 / T X D P 3 . 2 /I N T 0 P 3 . 3 /I N T 1 P 3 .4 /T 0 P 3 .5 /T 1 P 3 .6 /W R P 3 .7 /R D A L E /P R O G P S E N 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29

22pF 4 - 12Mhz

19 18 31 9

X TA L1 X TA L2 E A /V P P RS T

22pF

VC C =+5vdc

A T 89C 51

R ST

10uF

8 .2 k

The auto reset circuit is a RC network as shown in the mother board circuit diagram. A capacitor of 1-10mfd is connected in series with a 8k2 resister the RC junction is connected to the micro controller pin 9 which is reset pin. The reset pin is one when ever kept high( logic 1) the programme counter (PC) content

resets to 0000h so the processor starts executing the programme. from that location. When ever the system is switched ON the mother board gets power and the capacitor acts as short circuit and the entire voltage appears across the resistor, so the reset pin get a logic 1 and the system get reset, whenever it is being switched ON.

Pull-UP Resisters:

VC C =+5V

10k

PORT-0

39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 19 18 31 9

P P P P P P P P P P P P P P P P

0 .0 /A 0 .1 /A 0 .2 /A 0 .3 /A 0 .4 /A 0 .5 /A 0 .6 /A 0 .7 /A 1 .0 1 .1 1 .2 1 .3 1 .4 1 .5 1 .6 1 .7

D D D D D D D D

0 1 2 3 4 5 6 7

P 2 .0 /A 8 P 2 .1 /A 9 P 2 .2 / A 1 0 P 2 .3 / A 1 1 P 2 .4 / A 1 2 P 2 .5 / A 1 3 P 2 .6 / A 1 4 P 2 .7 / A 1 5 P 3 .0 / R X D P 3 .1 / T X D P 3 .2 /IN T 0 P 3 .3 /IN T 1 P 3 .4 /T 0 P 3 .5 /T 1 P 3 .6 / W R P 3 .7 /R D A L E /P R O G P S E N

21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 30 29

X TA L1 X TA L2 E A /V P P RS T

A T 89C 51

The PORT0 and PORT2 of the MCS-51 architecture is of open collector type so on writing logic 0 the pins are providing a perfect ground potential. Where as on writing logic 1 the port pins behaves as high impedance condition so putting a pull-up resister enables the port to provide a +5volt( logic 1). Port1 and Port3 are provided with internal pull-ups. A pull-up resister is normally a 10K resistance connected from the port pin to the Vcc (+5) volt. Crystal Oscillator The 8051 family microcontroller contains an inbuilt crystal oscillator, but the crystal has to be connected externally. This family of microcontroller can support 0 to 24MHz crystal and two numbers of decoupling capacitors are connected as shown in the figure. These capacitors are decouples the charges developed on the crystal surface due to piezoelectric effect. These decoupling capacitors are

normally between 20pf to 30pf. The clock generator section is designed as follows,

The Microcontroller design consist of two parts 1) 2) Hardware. Software.

HARDWARE:

The controller operates on +5 V dc, so the regulated + 5v is

supplied to pin no. 40 and ground at pin no. 20. The controller is used here need not required to handle high frequency signals, so as 4 MHz crystal is used for operating the processor. The pin no. 9 is supplied with a +5V dc through a push switch to reset the processor .As prepare codes are store in the internal flash memory the pin no. 31 is connected to + Vcc Port assignment: P2.0, p2.1, are given to the bidirectional motor driver.

Port-1is used as input port to the motherboard. P1.0 is used for right move. P1. 1 is used for middle move. P1.2 is used for left move.

Software: Algorithm: 1. The controller check for the signal from the three receivers connected at center, left and right of the antenna. 2. As long as the receivers did not get signal the motor continue rotating the antenna. 3. Whenever the signals received by the center receiver then it stops the motor movement. 4. Then The controller scans all the three sensors and take action as per the table given bellow.
Receiver Position Left Rx Center Rx 0 0 x 1 0 1 1 1 Right Rx 0 X 1 0 Motor movement Left mov. Right mov 0 1 0 0 0 1 1 0 Stop 0 1 0 0

5.

The motor again starts moving in the same direction as the target moves in the same plane. The movement of motor decided as per the table given above.

The direction of search and movement remains continuous even if the all the sensors are not receiving the required signal. The motor again stops when ever the center receiver again receive the required signal. i.

M O T H E R

B O A R D

C
C C

C
1

R 8 . 2 K

T O D C M O T O R D R I V E R

3 3 3 3 3 3 3 3 1 2 3 4 5 6 7 8

9 8 7 6 5 4 3 2

31

4 0
DP DP PD PD PD PD PD PD 02 12 22 23 24 25 26 27 . . 2 3 4 5 6 7 2 0 / A2 1 / A2 / A 21 / A 21 / A 21 / A 21 / A 21 / A 1 1 82 93

P P P P P P P P P P P P P P P P

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

. . . . . . . . . . . . . . . .

0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7

/ / / / / / / /

A A A A A A A A

E A /V P P

R S T

. . . . . .

40 51 62 73 84 5

F R O M S I G N A L C O N D .

1 0 P 3 . 0 / R 1X 1D P 3 . 1 / T 1 2 X D P 3 . 2 / I N 1 T3 0 P 3 . 3 / I N 1 T4 1 P 3 . 4 / T1 05 P 3 . 5 / T1 16 P 3 . 6 / W 1 R 7 P 3 . 7 / R D L 2A L 1 L E P 3 0 / P R 2O 9 G S E N

1 8

X T A X T A

2 2 P

1 9

2 2 P

L A

T 8 9 C 25 0 1

C.

IR TRANSMITTER

The IR LED is also light emitting diode but the junction is made out of such material that the transition of electron between the bands emits quanta of energy( E=h ) having a particular frequency which is having a particular characteristic. When a diode emits a particular characteristic signal having frequency in the range of infrared then, that diode is called a infrared emitting diode. The IR data transmitter is a high intensity IR signal transmitter.

In this section our aim is to transmit a continous. For that we have taken elements as IR LED as a source and photo diode as a destination. Generally, we have taken IR because IR is invisible to the eye, where as in case of LASER, which is easily visible to the human eye by which will, alert the unauthorized person. That is why we have taken IR as a transmitter which will transmit a continuously IR signal. At the receiver end the photodiode will receive the IR signal. if somebody tries to interrupt the IR signal at the transmitter end, the receiver will decide the absence of the IR signal at the receiver end.

Operation: Whenever the base voltage (12v) is high which is connected through a base resistance Rb (1k-10k), the transistor (BC547/BC548) comes to saturation condition (ON state) thus emitter current starts flowing towards the collector

junction which is connected through a collector resistance Rc (150E/2) and connected to Vcc. Which makes an IR LED as a forward biased thus transmit a continuous IR signal.

D. IR RECEIVER:
Introduction: A PHOTO DIODE is light sensitive device the junction of the photo diode is such that it generates carriers when the light falls on it. There are different type of diodes, which generates carriers in different magnitudes at different frequency this depends on the nature and doping of the junction. The liberation of carriers are very small in magnitude which is very much dependant on the frequency and intensity of the light signal falling on the junction. In the forward biased condition the majority carrier current is so high that the current generated due to fall of light signal is very negligible. The photon bombardment cause the avalanche break down of the junction and generate current which is in the order of 100s micro ampere to few 10s of mA, due to the above mentioned causes the photo diodes to connected in the reverse biased condition. In the reverse biased condition the normal current is always in the order of few microamperes, the current generated due to fall of light signal on the junction is also in the order of microampere so the net current through the diode is appreciably increased. The same current pass through the resistance connected in series and drop across the resistance is increased. There are two types of arrangements very much widely used in the circuits, as shown in the Fig.1 and Fig.2.

V CC

V CC

D1

D1

V t ou

Vo ut

Fi 1 g.

Fi 2 g.

If the diode junction is exposed with visible light or invisible light like Infrared / Laser in the circuit shown in fig.2, the diode current will rise, possibly to as high as 1mA,producing a significant output across R. In use, the photodiode is reversed biased and the output voltage is taken from across a series-connected load resistor.

Operation: In this project in the data/signal receiving section, the photodiode is used as signal (data) detector purpose to detect the IR signal (data) from the IR transmitter LED section. Whenever the signal is transmitted from the IR transmitter LED, the signal is received at the photodiode receiving section. The receiving signal is very weak in strength, for that we used an amplifier. The output of the photodiode is given as input to the amplifier (Op-amp LM393) which is configured as an Voltage Comparator and the reference voltage is set at noninverting terminal of the operational amplifier. There is a 10K variable resistor which is connected between +12 Volt and Ground and the variable terminal is connected to the OP-AMP (Inverting terminal) for providing the threshold value.

The output of the LM393 swings in between +Vsat and Vsat, even for a small variation of signal across the threshold value. That output signal is not compatible with the Microcontroller because of the high current; that output from the Op-amp is given to the signal conditioning i.e. the signal is given to the base of the transistor through a base resistance between 1K 43K and the collector is connected to Vcc = +5Volt in series with a 10K resistance and the output is taken from the collector. The emitter is grounded. Thus the output signal is compatible with the Microcontroller and that signal is connected to the RxD pin of the Microcontroller. Thus the transmitted data is received at the receiving section. The transmitted signal must fall pin pointed to the photodiode junction in order to receive the correct data at the receiver end without any interference or malflactuation.

Introduction The relays used here having following specifications. Operating voltage = 12V DC Coil resistance = 400 Capacity of contact point = 7A, 230V Type = single contact NO/NC

The relay requires 12 volts and current= 12 volt/400 = 30mA. The driver now require for driving this relay must be designed for translating the TTL logic value into 12 volts and 100mA current. The TTL / CMOS IC cannot provide this much of current. In normal practice, it desirable to draw 60 to 70 A current from the TTL / CMOS IC, as the output to load current requirement is very high a transistor driver is required. This driver circuit is configured with discrete elements. BC547. The common emitter amplification factor is approximately 200 for BC547.If the load current is considered about 40mA then, the base current will be around = 40/200= 40x10 3

/200 = 0.2mA.

In this arrangement the base current is design for 80mA current.

C 3 3 0 E

1 5 0 E / 2 W P H O T O D I O D E L M
3 2

3 9 3
8 + -

1 0 K 6 8 K I R B C L E D 5 4 7

1 5 k I R L E D 1 0 0 k 1 0 K V

O / P

I R

T r a n s m i t t e r

I R

R e c e i v e r

I R

T r a n s m i t t e r

a n d

R e c e i v e r

E.

Bi- directional motor driver:

Here, in this section the Bi-directional DC motor driver is designed by using a relay driver to drive the DC motor in both directions.
INTRODUCTION TO ELECTRO MAGNETIC RELAY

These are very much reliable devices and widely used on field. The operating frequency of these devices are minimum 10-20ms.That is 50Hz 100Hz.The relay which is used here can care 7Amp currents continuously. The electromagnetic relay operates on the principle magnetism. When the base

voltage appears at the relay driver section, the driver transistor will be driver transistor will be driven into saturation and allow to flow current in the coil of the relay, Which in turn create a magnetic field and the magnetic force produced due to that will act against the spring tension and close the contact coil. Whenever the base voltage is withdrawn the transistor goes to cutoff .So no current flow in the coil of the relay. Hence the magnetic field disappears so the contact point breaks automatically due to spring tension. Those contact points are isolated from the low voltage supply, so a high voltage switching is possible by the help of electromagnetic relays. The electromagnetic relays normally having 2 contact points. Named as normally closes (NC) NO normally open (NO). Normally closed points will so a short CKT path when the relay is off. Normally open points will so a short CKT path when the relay is energized.

c c

1 2 v

10uF

1 . 5 k

1N4007

RELAY

5 4 7

+
c c = + 1 2 v

M
-

c c

1 2 v

10uF

1 . 5 k

1N4007 B

RELAY
C 5 4 7

D C

M O T O R

D R I V E

F.PMDC Motor Driver


The D.C. Motor used in this project operates at 12 volt and carries approximately 400mA of current. The motor driver is designed to inter face the motor with micro controller. The micro controller out put is +5volt and can maximum give a current of 5mA. The driver stage changes the current and voltage level suitably to drive the motor. The driver stage not only drives the motor but also helps to control the direction of rotation. As the output current (Ic) is large the driver section requires a Darlington pair to switch the load. The Darlington pair I.C. TIP 122 is used here for designing. There are four ICs used here but two of those switched for one direction and other two will be switched for opposite direction rotation of the D.C. motor. The design principle of the driver section is as follows. The motor takes approximately 400mA at 12 volt D.C., The power transistors can have amplification factor maximum 60 to 70 as per this assumption the base current required to switch on the transistor is approximately Ib= (Ic/beta) =400mA/60 =6.7 mA This current is too high to supply as a base current, more over the Microcontroller can not supply that much current to drive the transistor so, a darling ton pair is required to limit the base current with in 100 micro amp. To 2 mA.

D C
V

M O T O R
c c = + 1 2 V

D R I V E

FILTER

M
1 . 5 k T I P 1 2 2

FROM

PWM

From MC

G.

RELAY DRIVER:

The relay driver is design by using a BC547 transistor .The relay used here having the specification as follows: Coil resistance = 400ohm Coil voltage= 12Vdc Contact capacity= 230V, 7A The above specification indicates that the coil requires 12V dc and 200mA current dc. The TTL/CMOS cant supply more then 50 A current. So driver section is very much required. BC547 has a typical current gain of 200 and maximum current capacity of 1A. So a typical base current of 200 A can trigger to on the relay.

This application is in some ways a continuation of he discussion introduced for diodes how the effects of inductive kick can be minimized through proper design. In the below figure (a), a transistor is used to established the current necessary to energize the relay in the collector circuit. With no input at the base of the transistor, the base current, collector current, and the coil current are essentially 0A, and the relay sits in the un-energized state (normally open, NO).

However when a positive pulse is applied to the base, the transistor turns ON, establishing sufficient current through the coil of the electromagnet to close the relay. Problem can be now develop when the signal is removed from the base to turn OFF the transistor and de-energized the relay. Ideally, the current through he coil and the transistor will quickly drop to zero, the arm of the relay will be released, and the relay will simply remain dormant until the next ON signal. However we know from our basic circuit courses that the current through the coil cannot change instantaneously, and in fact the more quickly changes, greater the induced voltage across the coil as defined by,

VL = L (diL / dt).

In this case, the rapid changing current through the coil will develop a large voltage across the coil with the polarity shown in figure (a), which will appear directly across the output of the transistor. The chances are likely that its magnitude will exceeds the maximum ratings of the transistor, and the semiconductor device will be permanently damaged. The voltage across the coil will not remain at its highest switching level but will oscillate as shown until its level drops to zero as the system settles down.

The destructive action can be subdued by placing a diode across the coil as shown in below figure (b). During the ON state of the transistor, the diode is back biased: it sits like an open circuit and does not affect the thing. However, when the transistor turns OFF, the voltage across the coil will reverse and will forward biased the diode, placing the diode in its ON state. The current through the inductor established during ON state of the transistor can then continue to flow through the diode, eliminating the severe change in current level. Because the inductive current is switched to diode almost instantaneously after the OFF state is established, the diode must have a current rating to match the current through the inductor and the transistor when is in ON state. Eventually, because of the resistive elements in the loop, including the resistance of the coil windings and the diode, the high frequency (quickly oscillating) variation in voltage level across the coil will decay to zero and the system will settle down.

c c N C N O O C M
High voltage spike

At turn-off

Vi VON VOFF Trouble!


R V i b

V L +

VL

+ 1VCE VL At turn OFF

(a)
V c c N C N O O C M

D 1 V L + R V i b Q

When transistor turned OFF 1

(b)

H.

SIGNAL CONDITIONING

The output form the input signal i.e. comparator or any other external circuit must be compatible with the -controller, because the -controller can takes 5V as input voltage and gives a 5V as output voltage. That for we need a signal conditioning circuit as given in the below figure.

SIGNAL CONDITIONING
VC C = +5 v VC C = +5v

INPUT

1 .5 k

10k

OUTPUT
B C 547

B C 547

INPUT

1 .5 k

10k

OUTPUT

(1:1)
fig..1:1

(1:0)

In the fig1: 1, whenever the base voltage is HIGH the transistor comes to saturation condition i.e. the collector current flows to the emitter which gives a high voltage at the output corresponding to Vcc given at the collector. The output is taken from the emitter junction through a current limiting resistance and the output signal is given to the - controller or any other circuit which needs a compatible (5V) voltage. Similarly, whenever the base voltage is LOW the emitter current flows from the emitter junction of the transistor, which gives a low voltage at the output corresponding to GND.

The output is taken from the emitter junction through a current limiting resistance and the output signal is given to the - controller or any other circuit which needs a compatible (5V) voltage.

fig..1:0 In the fig1: 0, whenever the base voltage is HIGH the transistor comes to saturation condition i.e. the emitter current flows to the collector which gives a low voltage at the output corresponding to GND. The output is taken from the collector junction through a current limiting resistance and the output signal is given to the - controller or any other circuit which needs a compatible (5V/0V) voltage. Similarly, whenever the base voltage is LOW the collector current flows from the collector junction of the transistor, which gives a high voltage at the output corresponding to Vcc. The output is taken from the emitter junction through a current limiting resistance and the output signal is given to the controller or any other circuit which needs a compatible (5V/0V) voltage.

S I G N A L

C O N D I T I O N I N G

N O T

C
1 0 K

D A T A I N P U T

1 . 5 K B C 5 4 7

I.
The link

COMPUTER INTERFACING (SIU)

The physical link between computers consists of the wires or other medium that carries information from one computer to another, and the interface that connects the medium to the computers. The requirements of a link help to determine which interface to use and what medium to use to connect the nodes. In the types of systems described in this book, the distance between computers may range from a few feet to a few thousand feet. The time between communications may be shorter than a second, or longer than a week. The number of nodes may range4 from two to over two hundred. Most links use copper wire to connect computers, often inexpensive twisted-pair cable. The path may be a single data wire and a ground return, or a pair of wires that carry differential signals. Other options include fiber-optic cable, which encodes data as the presence of absence of light, and wireless links, which send data as electromagnetic (radio) or infrared signals in the air. For most projects, there is a standard interface that can do the job. Most of the links described in this book use one of two popular interfaces: RS-232 for shorter, slower links between two computers, or RS-485 for longer or faster links with two or more computers. An interface may use existing ports on the computers, or it may

require added ports or adapters. Most PCs have at least one RS-232 interface, and an RS-232 or RS-485 interface is easily added to a PC or microcontroller. Table 1-1 compares RS-232 and RS-485 to other interfaces that a monitoring or control system might use. RS-232 is popular because its widely available, inexpensive, and can use longer cables than many other options. RS-485 is also inexpensive, easy to add to a system, and support even longer distances, higher speeds, and more nodes than RS-23 Interface RS-232 (EIA/TIA232) RS-485 (TAI/EIA485) IrDA Microwire SPI I2C USB Fire wire IEEE-488 (GPIB) Ethernet MIDI Parallel Printer Port Format Asynchronous serial Asynchronous serial infrared Synchronous serial Synchronous serial Synchronous serial Synchronous serial Synchronous serial Serial Parallel Serial Serial loop Parallel Number of Length Devices (maximum, (maximum) feet) 2 50-100 32 unit loads 2 8 8 40 127 64 15 4000 6 10 10 18 16 15 60 1600 15 Speed (maximum, bits/sec.) 20k (115k with some drivers) 10M 115k 2M 2.1M 400K 12M

1024 current 2

2,or 8 with 10-30 daisy-chain support

USB (Universal Serial Bus) and Fire wire (IEEE-1384) are new, highspeed, intelligent interfaces for connecting PCs and other computers to various peripherals. USB is intended to replace the standard RS-232 and Centronics printer ports as the interface of choice for modems and other standard peripherals. Fire wire is faster and designed for quick transferring of video, audio, and other large blocks of data. Ethernet is the familiar network interface used in many PC networks. Its fast and capable, but the hardware and software required are complex and expensive compared to other interfaces. The alternative to serial interfaces is parallel interfaces, which have multiple data lines. Because parallel interfaces transfer multiple bits at once, they can be fast. Usually there is just one set of data lines, so data travels in one direction at a time. Over long distances of with more than two computers in a link, the cabling for parallel interfaces becomes too expensive to be practical. The Centronics parallel printer interface predates the PC and just about every PC has included a Centro-compatible interface. The IEEE-1284 standard defines new connectors, cables, and high-speed protocols for ports 17 lines. Because the interface has been standard on all PCs, its been pressed into service as an interface for scanners, external disk driver, data-acquisition devices, and many other special-purpose peripherals.

IEEE-488, which began life as Hewlett-Packards GPIB (General-purpose Interface Bus) is another parallel interface popular in instrumentation and control applications.

2
3

Formats and Protocols


The computers in a serial link may be of different types, but all must agree on conventions and rules for the data they exchange. This agreement helps to ensure that every transmission reaches its destination and that each computer can understand the messages sent to it.

Sending Serial Data

In a serial link, the transmitter, or driver, sends bits one at a time, in sequence. A link with just two devices may have a dedicated path for each direction or it may have a single path shared by both, with the transmitters taking turns. When there are three or more devices, all usually share a path, and a network protocol determines when each can transmit. One signal required by all serial links is a clock, or timing reference, to control the flow of data. The transmitter and receiver use a clock to decide when to send and read each bit. Two types of serial-data formats are synchronous and asynchronous, and each uses clocks in different ways. Synchronous Format In a synchronous transmission, all devices use a common clock generated by one of the devices or an external source. Figure 2-1A illustrates. The clock may have a fixed frequency or it may toggle at irregular intervals. All transmitted bits

are synchronized to the clock. In other words, each transmitted bit is valid at a defined time after a clock transition (rising or falling edge). The receiver uses the clock transitions to decide when to read each incoming bit. The exact details of the protocol con vary. For example, a receiver may latch incoming data on the rising or falling clock edge, or on detecting a logic high or low level. Synchronous formats use a variety of ways to signal the start and end of a transmission, including Start and Stop bits and dedicated chip-select signals. Synchronous interfaces are useful for short links, with cables of 15 feet or less or even between components on a single circuit board. For longer links, synchronous formats are less practical because of the need to transmit the clock signal, which requires an extra line and is subject to noise.

Asynchronous Format In asynchronous (also called asynchronous and non-synchronous)

transmissions. The link doesnt include a clock line, because each end of the link provides its own clock. Each end must agree on the clocks frequency, and all of the clocks must match within a few percent. Each transmitted byte includes a Start bit to synchronize the clocks, and one or more Stop bits to signal the end of a transmitted word. The RS-232 port on PCs uses asynchronous formats to communicate with modems and other devices. Although an RS-232 interface can also transfer synchronous data, asynchronous links are much lore common. Most RS-485 links also use asynchronous communications.

An asynchronous transmission may use any of several common formats. Probably the most popular is 8-N-1, where the transmitter sends each data byte as 1 Start bit, followed by 8 data bits, beginning with bit 0 (the LSB, or least significant bit), and ending with 1 Stop bit. Figure 2-1B illustrates.

The N in 8-n-1, indicates that the transmissions dont use a parity bit. Other formats include a parity bit as a simple form of error checking. Parity can be Even, Odd, Mark, or Space. Table 2-1 illustrates Even and Odd parity. With Even parity, the parity bit is set or cleared so that the data bits plus the parity bit contain an even number of 1s. With Odd parity, the bit is set or cleared so that these bits contain an odd number of 1s. An example format using parity is 7-E-1. The transmitter sends 1 Start bit, 7 data bits, 1 parity bit, and 1 Stop bit. Here again both ends of the link must agree on the format. Mark and space parity are forms of Stick parity: with Mark parity, the parity bit is always 1, and with Space parity its always 0. These are less useful as error indicators but one use for them is in the 9-bit networks described in chapter 11. These networks use a parity bit to indicate whether a byte contains an address of data. Other, less common format use different numbers of data bits. Many serial ports support anywhere from 5 to 8 data bits, plus a parity bit.

Table 2-1: With Even parity the data bits plus the parity bit contain an even number of 0s. With Odd parity the data bits plus the parity bit contain an odd number of 0s. Data Bits 0000000 0000001 0000010 0000011 0000100 1111110 1111111

Even Parity Bits 0 1 1 0 1 0 1

Odd Parity Bits 1 0 0 1 0 1 0

A links bit rate is the number of bits per second transmitted or received per unit of tome, usually expressed as bits per second (bph). Baud rate is the number of possible events, or data transistors per second. The two values are often identical because in many links, including those described in this book, each transition period represents a new bit. Over phone lines, high-speed modems use phase shifts and other tricks to encode multiple bits in each data period, so the baud rate is actually much lower than the bit rate.

All of the bits required transmitting a value from Start to stop bit form a word. The data bits in a word form a character. In some links, the characters actually do represent text characters (letters or numbers), while in others the characters are binary values that have nothing to do with text. The number of characters transmitted per second equals the bit rate times the number of bits in a word. Adding one SATART AND ONE stop bit to a byte increases the transmission time of each byte by 25 percent (because there are 10 bits per byte instead of

just 8). With 8-N-1 formats a byte transmits at 1/10 the bit rate: a 9600 bits-persecond link transmits 96o bytes per second. If the receiver requires a little extra time to accept received data, the transmitter may stretch the Stop bit to the width of 1.5 or 2 bits. The original purpose of the longer stop bit was to allow tome for mechanical Teletype machines to settle to an idles state. There are other ways to generate Start and Stop bits without using a full bit width. The USB interface uses varying voltages to indicate start and stop. Of course this requires hardware that supports these definitions. System Support Fortunately, the programming required to send and receive data in asynchronous formats is simpler than you might expect. PCs and many micro controllers have a component called a UART (universal asynchronous receiver/transmitter) that handles mast of the details of sending and receiving serial data. In PCs, the operating system and programming languages include support for programming serial links without having to understand ever detail of the UARTs architecture. To open a link the application selects a data rate and other settings and enables communications at the desired port. To send a byte the application writes the byte to the transmit buffer of the selected port and the RART sends the data, bit by bit in the requested format adding the Stop, Start, and parity bits as needed. In a similar way, received bytes are automatically stored in a buffer. The UART can trigger an interrupt to notify the CPU, and thus the application of incoming data and other events.

Some micro controllers dont include a UART and sometimes you need more UARTs than the microcontroller has. In this case there are two options: add an external UART, or simulate a UART in program code. Parallaxs Basic Stamp is an example of a chip with a UART implemented in code. Transmitting a Byte Understanding the details of how a byte transmits isnt strictly necessary in order to design, program, and use a serial link, but the knowledge can be useful in troubleshooting and selecting a protocol and interface for a project. The Bit Format Figure 2-1B showed how a byte transmits in 8-N-1 format. When idle the transmitters output is login 1. To signal the beginning of a transmission, the output sends a logic 0 for the length of one bit. This is the Start bit. At 300 bps a bit is 3.3 milliseconds, while at 9600 bps, its 0.1 millisecond. After the Start bit the transmitter sends the 8 data bits in sequence beginning with bit0, the least-significant bit (LSB). The transmitter then sends a logic 1, which functions as the Stop bit. The output remains at logic 1 for at least the width of one . Each end of the link uses a clock of 16 times the bit rate to determine when to send and read each bit.

bit. Immediately following this, or at any time after the transmitter may send a new Start bit to announce the beginning of a new byte.

At the receiving end the transition from logic 1 to the Start bits logic 0 signals that a byte is arriving and determines the timing for detection the following bits. The receiver measures the logic state of each bit near the middle of the bit. This helps ensure that the receiver reads the bits correctly even if the transmitting and receiving clocks dont match exactly. Some interface, such as RS-232, use inverted voltages from those shown: the Stop bit is a negative voltage and the Start bit is positive. The UART typically uses a receive clock that is 16 times the bit frequency: if the data rate is 300 bits per second, the receive clock must be 4800 bits per second. As Figure 2-2 shows, after detecting the transition that signals a start bit, the UART waits 16 clock cycles for the start bit to end, then waits 8 more cycles to read bit 0in the middle of the bit. It then reads each of the following bits 16 clock cycles after the previous one. If the transmitting and receiving clocks dont match exactly, the receiver will read each successive bit closer and closer to an edge of the bit. To read all of the bits in a 10-bit word correctly, the transmit and receive clocks should vary no more than about three percent. Any more than this and by the time the receiver tries to read the final bits, the timing may be off by so much that it will read the bits either before theyve begun or after theyve finished. However the clocks only need to stay in sync for the length of a word, because each word begging with a new Start bit that resynchronizes the clocks. Because of the need for accurate timing, asynchronous interfaces require a stable timing reference. Most are controlled by a crystal or ceramic resonator.

For best results, the frequency of the reference should allow even division by the frequencies the receive clonks use for standard bit rates. In PCs, the standard UART clock frequency is 1.8432 Mhz. Division by 16 gives 115,200, which is the top bit rate the UART supports.

In a microcontroller, the chips main timing crystal usually serves as a reference for hardware timing that controls the UARTs clock. In the 8051 family, the hard timers run at 1/12 the crystal frequency. With a crystal of 11.0592 Mhz the fastest UART is 921,600Hz,which allows a bit rate of 57,600 bps. As a way of eliminating errors due to noise, some UARTs like the 8051 microcontrollers, take three samples on the middle of each bit, and use the logic level that matches two or more of the samples. Auto detecting the Bit Rate The ultimate in user convenience is a link with auto baud ability, where the two ends automatically configure themselves to the same bit rate. There are two ways to do this. In each, one node (Ill call it the adjustable node) detects the bit rate of the other (the fixed node) and adjusts its bit rate to match.

The first method requires no special hardware or hardware-level programming. When the node wants to establish communications, it repeatedly sends a character, with a pause between each. The character may be a null (Chr (0)), or any ASII character (through Chr (127), as long as the most significant data bit, which is the last one to transmit, is 0.

The adjustable node begins at its highest bit rate. When it detects that a byte has arrived, it waits long enough for a bytes to transmit at the lowest expected bit rate (33 milliseconds at 300 bps), then reads the received byte or bytes. If the receiver detects more than one character, its bit rate doesnt match the transmitters, so it tries again, using the next lower bit rate. When it detects one and only one character, it has the corrects bit rate. As an extra check, it can verify that the received character matches an expected value. The adjustable node then sends an acknowledgment to the fixed node, which stops sending he characters, and communications can begin. Why does this routine work? When the receivers bit rate is faster than the transmitters, the receiver finishes reading the character while the final bits are still arriving. (The character will cause a framing error if the receiver doesnt see a logic 1 where it expects to find the Stop bit, but this is unimportant here.) After the receiver thinks the character has finished transmitting, any received 0 looks like a Data formats The data bits in a serial transmission may represent anything at all, including commands, sensor readings, status information, error codes, or text messages. The information may be encoded as binary or text data. Binary Data With binary data, the receiver interprets a received byte as a binary number with a value from 0to 255. The bits are conventionally numbered 0 through 7, with each bit representation the bits value (0 or 1) multiplied by a power of 2. For example, in Visual-Basic syntax:

Bit 0 = Bit Value * (2^0) Bit 1 = Bit Value * (2^1) Bit 7 = Bit Value * (2^7) A byte of 1111 1111 translates to 255, or FFh, and 0001 0001 translates to 17, or 11h. In asynchronous links, bit 0, the least-significant bit (LSB), arrives first, so if youre looking at the data on an oscilloscope or logic analyzer, remember to reverse the order when translation to conventional notation of most-significant-bit (MSB) first. Text Data Binary data works fine for many links. But some links need to send messages or files containing text. And for various reasons, a link may also send binary data encoded as text. To send text, the program uses a code that assigns a numeric value to each text character. There are several coding conventions. One of the most common is ASCII (American Standard Code for Information Exchange), which consists of 128 codes and requires only seven data bits. An eight bit, if used, may be 0 or a parity bit. ANSI (American National Standards Institute) text uses 256 codes, with the higher codes representing special and accented characters. In the IBM ASCII text used on the original IBM PC, many of the higher codes represented line-and box-drawing characters used by many DOS programs used to add simple graphics to text screens and printouts. Other formats use 16 bits per character, which allows 65.536 different characters. The Unicode standard supports hundreds of additional alphabets.

While DBCS (double-byte character set) is an earlier standard that supports many Asian languages. The examples in this book use ANSI/ASCII text, which is the format used by Visual Basics MSComm control. ASCII Hex Text mode is the obvious choice for transferring string variables of files that contain text. But you can also use text to transfer binary data, by expression the data in ASCII Hex format. Each byte is represented by a pair of ASCII codes that represent the bytes two hexadecimal characters. (Appendix Chas mare on hexadecimal and other number systems.) This format can represent any value using only the ASCII codes 30h through 39h (for 0throuth 9) and 41h to 46h (for A through F). Instead of sending one byte to represent a value from 0 to 255, the sending device sends two, one for each character in the hex number that represents the byte. The receiving computer treats the values like ordinary text. After a computer receives the values, it can process or use the data any way it wants, including converting it back to binary data. For example, consider the decimal number 163 Express as a binary number, its 1010 0011 In hexadecimal, its A3h (or & hA3 in Visual-Basin syntax) The ASCII codes for A and 3 are 41h, 33h

So the binary representation of this value in ASCII hex consists of these tow bytes: 01000001 00110011 A serial link using ASCII Hex format would send the value A3h by transmitting these two bytes. A downside of using ASCII Hex is that each data byte requires tow characters, so data takes twice as long to transfer. Also, in most cases the application at each end will at some point have to convert between ASCII hex and binary. Still, ASCII Hex has its uses. One reason to use it is that it frees all of the other codes for other uses, such as handshaking codes or an end-of-file indicator. It also allows protocols that only support 7 data bits to transmit any numeric value. Other potions are to send values as ASCII decimal, using only the codes for 0 through 9, or ASCII binary, using just 0 and 1. The basic Stamp has built-in support for these as will as for ASCII Hex.

1 0 u

0 u

= +

1 6
0 .1 u F

M A X 2 3 2
M O T H P 3 . 1 ( T x D ) E R 1 0 B O A R D 7

3 2 5

T O 1 5 6
10uF

S E R I A L C O N N E C T O

5
1

4
0 u F

S E R I A L

P O R T

I N T

0-12Vac/1Amp

J. BUZZER DRIVER
This section interfaces one audible piezo electric buzzer with the controller. The controller activates the buzzer whenever there is any fault appears in any of the channel. PIEZO ELECRTIC BUZZER: It is a device that converts electrical signal to an audible signal (sound signal).The Microcontroller cannot drive directly to the buzzer, because the Microcontroller cannot give sufficient current to drive the buzzer for that we need a driver transistor (BC547), which will give sufficient current to the buzzer.Whenever a signal received to the base of the transistor through a base resistance (1.5k) is high, the transistor comes to saturation condition i.e. ON condition thus the buzzer comes to on condition with a audible sound. Similarly, whenever the signal is not received to the base of the transistor, thus the transistor is in cut-off state i.e. is in OFF state thus the buzzer does not gets activated.

BUZZER

DRIVER
V C C

BUZZER

DATA INPUT

1 .5 K B C 5 4 7

K. LED INDICATOR
The indicator section consists of a light emitting diode and its driver circuit is designed on the basis of current required to glow the light emitting diode. Here the driver circuit is required for the following functionality. 1) The Microcontroller cannot provide adequate current for glowing the LED. The LEDs requires a current between 10mA to 20mA of current to glow. 2) The driver circuit provides current to the load from a separate source, so the load current used not pass through the Microcontroller. 3) The driver circuit activates the load on receipt of a logic signal from the Microcontroller and of the load in the absence of the signal as he current

requirement Is very less to glow a LED a single stage driver is sufficient to drive the load. The driver circuit is nothing other than a perfect a transistor switch. The driver transistor goes in to saturation on receipt of base signal and drives into cut-off region, in absence of base signal. The driver designs around a BC548/BC547 transistor and designed for a working voltage of +5 V dc and 10mA current. Rc= Vcc-VCEsat IC = 1.18K Ib=Ic/ =10mA/200=5x10-5 A=50x10-6A =50 A = 12-0.2V 10mA

As per the design a 50 A current is sufficient to trigger the driver circuit. As this current is very small and to avoid mistriggering a base current of 100 A is assumed VB-IBRB-VBE=0 IBRB = 5-0.7 RB = 5-0.7V/100 A = 4.3/100 M = 0.043x10-6 = 43K On approximation 68K is connected by calculating back IB = 4.3/68K = 60 70 A

Which is adequate to avoid mis-triggering level also this amount of current can be drawn from the Microcontroller without any problem. The indicator section consists of 8 no of driver with 8 no of LED as indicator load. The circuit diagram is enclosed.

LED

INDICATOR

V C C
3 3 0 E

L E D

DATA INPUT

6 8 k B C 5 4 7

FUTURE EXPANSION
This project is limited to its scope due to the constraint of time and cost. This project can be developed with more sophistication and advanced facilities as follows, 1. The present algorithm is developed on scanning method there is no procedure to optimize the antenna position for receiving maximum signal. A fuzzy logic algorithm can be implemented for precession control of antenna position. 2. The antenna designed in this project moves in one plane and dont give any information regarding the axial movement of the target and also the distance of the target. A work on that regard can be carried out. 3. The target search and follow up is carried out in one plane but that can be extended in multiple planes. Computer interface also can be implemented to see the position of the target in the computer screen.

CONCLUSION
This project worked satisfactorily in the laboratory condition.The antenna detects an object from a distance of 10 ft. adjusting the transmitter and receiver power can increase range of detection.