The Large-Signal SFG Model for Cascaded

Multilevel Inverters with Experimental

Verification
Li-Chun Liao, Ming-Yu Lin, and Chi-Hung Lin
Department of Computer Science and Information Engineering
Chaoyang University of Technology
lcliao@cyut.edu.tw
Abstract-In this paper, the switching flow-graph (SFG)
modeling technique is used to build the large-signal model of
a cascaded multilevel inverter. With the concept of virtual
switch and virtual switching function proposed in SFG
modeling technique, the large-signal SFG model of a
cascaded multilevel inverter can be derived easily and
without complex mathematic works. The SFG model can
also be implemented in MATLAB/SIMULINK directly and
only 1/9 CPU time is needed as compared with PSPICE
model. Based on the developed SFG model, the behavior of
cascaded multilevel inverters can easily be analyzed. The
experimental examples demonstrate that the simulation
results by using SFG model are closely agreed with the
experimental results.
Keywords: cascaded multilevel inverters, models, PD-PWM,
switching flow-graph, virtual switching functions.
I. INTRODUCTION
In order to minimize the total harmonic distortion
(THD) and reduce the electromagnetic interference (EMI)
emission, the cascaded multilevel inverters have been
broadly used for power applications. However, because
of the nonlinear operation of switching components and
the coupling operations between phase and phase, the
modeling work of a cascaded multilevel inverter becomes
very difficult. In this research, a graphic modeling
technique, switching flow-graph (SFG) modeling
technique, is applied to derive the large-signal model of a
cascaded multilevel inverter. The SFG modeling
technique is first proposed in [1]-[3] to develop the large-
signal, small-signal and steady-state models for DC-DC
converters. Although the modeling process is very easy,
the same technique is hard to be used to model a circuit
with different voltage polarity or current direction, like
inverters or rectifiers [4]. In references [5]-[7], the
concept of virtual switch and virtual switching function is
introduced to overcome the bottleneck. Liao and Pan
used the concept of virtual switch to integrate both
operations of switch and diode. Moreover, the direction
of current is taken into account by defining a virtual
switching function. Based on the concept of virtual
switch and virtual switching function, the SFG modeling
technique can be applied to model the three-phase
inverters and rectifiers straightforwardly. The modeling
process becomes very easy and without complicated
mathematic operations.
In this paper, the SFG modeling technique is applied to
model a cascaded multilevel inverter. Contents of the
following sections are outlined as follows: The large-
signal SFG model of a cascaded multilevel inverter is
developed in section II. In section III, the experimental
results are shown to demonstrate the validity and
applicability of SFG model of cascaded multilevel
inverter. Finally, some conclusions are summarized in the
last section.
II. THE LARGE-SIGNAL SFGMODEL FOR CASCADED
MULTILEVEL INVERTERS
A. Review of SFG Techniques
The modeling procedures for DC-DC converters can be
summarized as follows [2]:
1) Find the sub-circuits corresponding to all the
switching states.
2) Draw the corresponding flow-graphs for all the
sub-circuits with the same node distribution.
3) Combine the flow-graphs with switching branches
to obtain the switching flow-graph.
4) Replace the switching branches by their large-
signal switching branch model (or small-signal
switching branch model, steady-state switching
branch model) to obtain the corresponding large-
signal model (or small-signal model, steady-state
model).
It can be seen that when the number of switch is
increased in circuit, the modeling work becomes
complex. The SFG model is hard to be created by
following the process described above. In order to keep
the merit of easy implementation, the concept of virtual
switch and virtual switching function is used to improve
the SFG modeling technique and is introduced in the
following.
B. Virtual Switch Concept
Consider of a typical single-phase inverter as shown in
Fig. 1, where
jN jP
S S ,
and
jN jP
D D ,
, { } B A j ,
represent controllable switches and diodes respectively
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and a RL impedance load is connected as an example. If
only focus on the operation of one phase, one can
conclude that only six switching states are applicable, as
listed in TABLE I [7].
Fig. 1 Circuit configuration of the single-phase inverter.
TABLE I
SIX QUALIFIED SWITCHING STATES
Value of vjN
State
Number
Switching States
(
jP
S
,
jP
D
,
jN
S
,
jN
D
)
vjN = VD
State 1 (OFF, ON, OFF, OFF)
State 2 (ON, OFF, OFF, OFF)
State 3 (ON, ON, OFF, OFF)
vjN = 0
State 4 (OFF, OFF, OFF, ON)
State 5 (OFF, OFF, ON, OFF)
State 6 (OFF, OFF, ON, ON)
According to TABLE I, one can define a virtual
switching function for state 1 to state 3 as equation (1).
From state 4 to state 6, another virtual switching function
can also be defined as equation (2).
(1)

(2)
(3)
where are switching functions of ,
{ } B A j ,
can be written in the following:
(4)
(5)
(6)
According the definition of virtual switching function,
one can create a virtual switch that integrate
operations of and . Therefore, the j-
phase can be replaced by a virtual switch and the
equivalent circuit of Fig. 1 can be obtained as shown in
the following.
Fig. 2 Equivalent circuit of Fig. 1.
C. The SFG Model of Cascaded Multilevel Inverters
Consider of a cascaded 5-level inverter as shown in
Fig. 3a. By using the concept of virtual switch, the
equivalent circuit can be obtained as plotted in Fig. 3b.
Fig. 3 (a) The circuit of cascaded 5-level inverter; (b) the equivalent
circuit with virtual switches.
( )
( ) ( ) ( ) [ ] ( ) ( ) t F OR i sign AND t F
OFF is S when
ON is S when
t F
jP jP
D j S
j
j
j
=

, 0
, 1
{ } B A j ,
( ) ( ) 1 = + t F t F
j j
( )
( ) ( ) ( ) [ ] ( ) ( ) t F OR i sign AND t F
ON is S when
OFF is S when
t F
jN jN
D j S
j
j
j
=

, 0
, 1
jN jP
D D ,
DjN DjP
F F ,
jp jN jP
D S S , ,
jN
D
j
S
j
S
{ } B A j ,
(a)
(b)
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o
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-8
-4
0
4
8
Time (ms)
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Fig. 4 The large-signal SFG model of cascaded 5-level inverters.
By following the modeling procedure explained in [2]
and [7], the large-signal SFG model of cascaded 5-level
inverter can be implemented easily as depicted in Fig. 4.
III. EXPERIMENT AND SIMULATION
From previous results, one can observe that the
structure of large-signal SFG model is much similar to
the simulation blockset in MATLAB/SIMULINK.
Actually, it is quite easy to develop the model in
MATLAB/SIMULINK environment to get the simulation
results without requiring other extra efforts. A low power
system is temporarily designed and implemented to
verify the vadility of the SFG model. Consider Fig. 3a, a
5-level inverter with PD-PWM control is used as an
example, where the conditions are listed as following:
Power MOS: IFR540(with turn ON resistance 23 . 0 )
Impedance load: = 20 R and mH L 12 = .
Switching frequency:
s
f
= . 6kHz
The input source: V V
D
5 . 2 = .
Blanking-time: s 40 .
Voltage command:
( ) ( ) t t V
control
120 sin 6 . 1 2
*
+ =
.
The simulation PD-PWM waveforms are depicted in
Fig. 5 and Fig. 6 shows the prototype of the experiment.
Fig. 5 The simulation waveforms for PD-PWM control.
Fig. 6 The prototype of experiment.
Fig. 7 The waveforms of output voltage (a) simulated by using SFG
model, (b) simulated by using PSPICE, (c) simulated by using
MATLAB model, (d) from experiment (horizontal 5ms/div, vertical
2V/div).
sign -io
sign io
R pL +
1
o
i
sign io
sign -io

Time s)
V
o
l
t
a
g
e

(
V
)
5.0V
3.0V
1.0V
F1
F2
F3
F4
V
Control

(m
0 1 2 3

4 5
0V
2.0V
4.0V
-1.0V
Cascaded 5-level inverter PD-PWM
Time (ms)

-8.0
-4.0
0
4.0
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o
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a
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(a)
(b)
(c)
(d)
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Time (ms)
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-0.4
-0.2
0
0.2
0.4
C
u
r
r
i
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(
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-0.4
-0.2
0
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0.4
Time (ms)
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C
u
r
r
e
n
t

(
A
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Fig. 8 The waveforms of output current (a) simulated by using PSPICE,
(b) simulated by using SFG model, (c) simulated by using MATLAB
model,(d) from experiment (horizontal 5ms/div, vertical 100mA/div).
The simulation results and experimental results are
compared in Fig. 7 and Fig. 8. The Fig. 7a and 8a are
generated by using SFG model the Fig. 7b and 8b are
generated by using PSPICE and Fig. 7c and 8c are
generated by using MATLAB model. The experimental
results are shown in Fig. 7d and 8d. One can see that the
simulation results by using SFG model are agree with
experimental results. When the simulation time is set to
be 100-ms, the CPU time of using SFG model is only
8secs. However, the CPU time of using PSPICE and
MATLAB model is 70secs and 15sec respectively. Under
the same simulation conditions (the simulation is
executed on a PC with Intel Core2 2.4GHz CPU / 4 GB
RAM and the maximum step size of time-domain
simulation is s 2 ), SFG model only needs 1/9 CPU time
as compared with PSPICE model. Although PSPICE
model can indeed reflect more reality, it need to spent
much more CPU time. Inversely the SFG model is easy
to be derived, has more computational efficient and can
also predict the circuits performance correctly.
IV. CONCLUSIONS
A large-signal SFG model of the cascaded multilevel
inverters is developed and verified in this paper. By
introducing the concept of virtual switch and virtual
switching function, one can easily derive out the SFG
model of a multilevel inverter without complex
mathematic operations. As compare with experimental
results, one can see that the SFG model of multilevel
inverter is valid and applicable. Moreover, the SFG
model can be implemented in MATLAB/SIMULINK
environment straightforwardly that enhances the
computational efficiency and the system level design as
compared with PSPICE model.
REFERENCES
[1] S. Cuk and R. D. Minddlebrook, A General Unified
Approach to Modeling Switching-Converter Power
Stages, IEEE Power Electronics Specialists Conf., 1976.
[2] K. Smedley and S. Cuk, Switching Flow-Graph
Nonlinear Modeling Technique, IEEE Trans. on Power
Electron., vol. 9, No. 4, Jul. 1994, pp. 405-413.
[3] Y. Ma and K. Smedley, Switching Flow-Graph
Nonlinear Modeling Method for Multi-state Switching
Converter, IEEE Trans. on Power Electron., vol. 12,
No. 5, Sep. 1997, pp 854-861.
[4] E. M. Guiotto and K. Smedley, Switching Flow-Graph
Nonlinear Model of Active Power Filters, IECON03.
The 29th Annu. Conf. of the IEEE, vol. 2, Nov. 2003.
[5] Li-Chun Liao, Ching-Tsai Pan, Yu-Ling Juan and Tai-
Lang Jong, The Large-Signal SFG Modeling Technique
for Three-Phase Rectifiers, The 37th IEEE Power
Electronics Specialists Conference, June 18-22, 2006,
Jeju, Korea, pp1372-1377.
[6] Li-Chun Liao, The Large-Signal SFG Model for Single-
Phase PWM Inverters, Workshop on Consumer
Electronics, 2007, pp. 265-268.
[7] Li-Chun Liao, Ching-Tsai Pan, and Tai-Lang Jong,
Switching Flow-Graph Modeling Technique for Three-
Phase Inverts, IEEE Trans. on Ind. Electron., vol 55,
No. 4, Apr. 2008, pp. 1603-1613.
(a)
(b)
(c)
(d)
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0.2
0.4
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