MTI 7604 PSK / QPSK Modulation and Demodulation

Contents
Aims of the Exercise

Learning about the functioning principle of PSK modulation Reconstruction of the transmitted bit pattern by demodulation of the PSK signal Learning about the functioning principle of QPSK modulation Reconstruction of the transmitted bit pattern by demodulation of the QPSK signal

Overview of Exercises
Exercise 1: PSK Modulation/Demodulation

Allocation of the oscillogramme at the measuring points DATA and BITCLOCK to a set bit pattern Allocation of the output voltage U PSK to different bit patterns Effect of different data transmission speeds Demodulation of the PSK signal

Exercise 2: QPSK Modulation/Demodulation

Allocation of the oscillogramme at the measuring points DATA and DIBITCLOCK to a set bit pattern Illustration of the dependency of the signals DIBIT X and DIBIT Y on the respective dibits of the set bit pattern Allocation of the output voltage U QPSK to different bit patterns and dibits Effect of different data transmission speeds Demodulation of the QPSK signal

MTI 7604 PSK / QPSK Modulation and Demodulation

Introduction
PSK (Phase-Shift-Keying), or more precisely 2PSK (PSK with two defined states), and QPSK or 4PSK (PSK with 4 defined states) belong to the group of so-called "digital modulation methods". Their classification in this family is as follows: 1. 1. Digital communications signal, sinewave carrier signal: o Amplitude Shift Keying = ASK o Frequency Shift Keying = FSK o Phase Shift Keying = PSK 2. 2. Analog communications signal, pulse-shaped carrier signal: o Pulse Amplitude Modulation = PAM o Pulse Phase Modulation = PPM o Pulse Width Modulation = PWM 3. 3. Digitised original analog communications signal, pulse-shaped carrier signal: o Pulse Code Modulation = PCM o Delta Modulation = DM In the modulation types ASK, FSK and PSK, digital information is transferred on analog channels with the aid of a sinewave carrier. The signal converter for analog transmission paths consists of a modulator at the send side and a demodulator at the receive end. This form of transmission device is known as a Modem. In the early days of data transmission, ASK (telegraphy) and FSK (acoustic coupler as an interface) were used but due to their susceptibility to interference, they were replaced by the PSK and QPSK methods (for modems up to 2400 bps, V.22) as well as higher quality methods such as 16QAM. Today, QPSK is widely used in satellite transmissions and in radio relay systems. The relationships between the terms "Baud", "bits per second" (bps) and "characters per second" (cps) should become clear with the following example: A (Q)PSK modulator allows one byte consisting of 8 bits, to be set, e.g.:

Fig. 1: Duration of a byte (character) If this signal is transmitted with a bivalent (two-value) method of modulation (e.g. 2PSK), then the modulation rate vS (or Baud rate) is the same as the data transfer rate, vD

At vS = 600 Baud here, vD = 600 BPS, i.e. the time required for transmitting one bit is

From this it follows that the duration of one byte, is

so that

(here, without Start, Stop or check bit) can be transmitted. If now QPSK (4PSK), a quadrivalent (four-valued) method of modulation is used, then the data transfer rate is doubled

where n is the number of significant conditions, here n = 4 This is possible because the coding does not refer to a single bit but rather to a bit-pair, a so-called "Dibit" :

Fig. 2: Formation of a Dibits Providing that the bandwidth for the transmission channel is wide enough,

it follows that,

There are thus 1200/8 cps = 150 cps transmitted. Since apparently, the transmission capacity of a channel with a given bandwidth, is doubled when 4PSK is used instead of 2PSK, it was logical to always use higher valued methods of modulation in the development of modems for analog telephone channels with a limited bandwidth (nowadays, up to vSmax =33600 bps or more, is possible).

The block schematic diagram of a simple 2PSK modulator is shown below:

Fig. 3: 2PSK modulator The 2PSK signal is produced by multiplying (e.g. in a ring modulator) the carrier signal (Carrier) with the serial bit pattern (DATA). The binary value 1 here, is represented by a carrier phase shift of 0 and the binary value 0, by a shift of 180. "Phase-hits" are the result:

Fig. 4: 2PSK-modulated signal In its simplest form, demodulation is achieved as illustrated in the following block diagram:

Fig. 5: 2PSK demodulator Here, the received 2PSK signal is multiplied by the carrier signal of the modulator, so that after filtering and restoring the edges, the original bit pattern (DATA) is recovered. If the carrier signal cannot be transmitted with the data, then it must be re-generated (or restored), in the demodulator with the correct phase. This possibility is not dealt with in the exercise here. The block schematic diagram of a 4PSK modulator is shown below:

Fig. 6: 4PSK modulator In the coder, the signal U DIBITCLOCK, is conditioned, that in the last quarter-period of the current Dibit, the pattern of which is sampled and generated according to the table of the signals U DIBITX and U DIBITY: DATA DIBIT X DIBIT Y Phase relation of U PSK 00 0 0 0 01 0 1 90 10 1 0 270 11 1 1 180

MTI 7604 PSK / QPSK Modulation and Demodulation

Exercise Assembly

Ensure that all voltages are removed from the UNI-TRAIN. Assemble the exercise by inserting the PSK / QPSK modulator in the left and the PSK / QPSK demodulator in the right hand slots of the Experimenter SO4203-2B. Connect the two PCB's with 2mm connection cables, at the sockets "Car" and "(Q)PSK", as shown in the illustration above. The electrical energy for the PCB's is supplied via the internal bus of the UNITRAIN basic unit. After switching on the operating voltage, the exercise assembly for PSK / QPSK modulation and demodulation is ready for use.

Sub-assemblies and Components Required

Qty. 1 2 1 1 1 Description UniTr@in-I Interface with virtual instruments Experimenter PSK /QPSK modulator PSK /QPSK demodulator Measuring line set 2mm UniTr@in I Order No. SO4203-2A SO4103-2B SO4201-9J SO4201-9K SO5146-1L

Operator Elements and Sockets

DATA signal output Basic clock potentiometer Patchboard, Baud rate CLOCK, test signal

K Signal output a L Signal output b M N

Carrier, signal output (Q)PSK, signal output Amplitude potentiometer DIP-switch (8way) 4PSK/2PSK switch Test signal: 0, 90, 180, 270 Phase 0 and 90 potentiometer

B SYNC, test signal C D E

P GND Q R S

F X, test signal G Y, test signal H J

DIBIT-clock, test signal BIT-clock, test signal

T SET button U V

Fig. 2: Front panel of the PSK / QPSK modulator

Signal input, a and b Signal input, (Q)PSK

B Signal input, Car C

H J K L M

Test signal, TP1 Test signal, TP2 Test signal, TP3 Test signal, TP4 Baud rate select switch Test signal, CLOCK

D GND E Test signal, 0 F Test signal, 90 G

Potentiometer, phase 90

N 4PSK/2PSK switch Q

P DATA signal output

Fig. 3: Front panel of the PSK / QPSK demodulator

MTI 7604 PSK / QPSK Modulation and Demodulation

PSK - PSK Modulation / Demodulation
Assigning the oscillograms at the test points DATA and DIBIT-CLOCK, to a set bit pattern
Note: Before commencing the exercise, check the alignment of the PSK modulator, SO42019J, in accordance with the operating instructions! On the PSK / QPSK modulator (SO4201-9J), connect the "Sync" output to the analog test input (channel B) of the UniTr@in-Interface. On channel A measure the signal at

the "Data" output. Trigger on B. For more stable triggering, set the trigger point to 50% of the amplitude of the squarewave signal. Set the following bit pattern (Byte) on the DIP switches:
LSB MSB Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8

Set the switch for the modulation type to "2PSK", the jumper for the transfer rate to "1200" and by pressing the "SET" button, read in the bit pattern. Caution: The "Set" button must be pressed again, after each new change of the settings has been completed! On an oscilloscope, display the voltages at the test points DATA and BITCLOCK. What is the sequence of the bits during transfer? How many bits are transferred for each bitclock ? Result:
X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 1: Data signal

X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 2: Bit-clock

Exercise 2 Assigning the output voltage to various bit patterns

On channel A, measure the signal at the "(Q)PSK" output and determine the assignment of the binary value of the bit pattern (0 and 1) to the phase of the 2PSK signal. For this, compare the 2PSK-modulated signal to the carrier signal at the "Car." output. Result:

X=

1 ms/DIV X/T (B) V/DIV DC V/DIV DC

Chan. A= 0,5 Chan. B= 2

Fig. 3: PSK modulated signal

Exercise 3 Effect of various rates of transfer

Determine the baud rate vS, data transfer rate vD and the number of bytes transferred per second (cps) for the "600" and "1200" settings of jumper D. Compare the appearance of the 2PSK signal at either setting of the switch. Note: For determining the transfer rate, use the time marker on the oscilloscope. In the lower part of the operating bar for the oscilloscope, the button will be seen for cursor functions. Set this for channel A. Also, two amplitude markers are available for measuring voltages and two time markers for measuring time or frequency. The marker can be moved with the mouse to the position required. The values detected are shown at the top right . Result ("600" position):

X=

1 ms/DIV X/T (B) V/DIV DC V/DIV DC

Chan. A= 0,5 Chan. B= 2

Fig. 4: 2PSK signal at 600 Bd

Result ("1200" position ):

X= 1 ms/DIV X/T (B) V/DIV DC V/DIV DC

Chan. A= 0,5 Chan. B= 2

Fig. 5: 2PSK signal at 1200 Bd

Exercise 4 Demodulation of the 2PSK signal

Without changing the setting of the modulation, connect the "(Q)PSK" and "Car." outputs of the QPSK / PSK modulator to the corresponding inputs on the QPSK / PSK demodulator (SO4201-9K). For synchronising, the carrier signal (CAR) must be transferred with the output signal. Set the demodulator according to the conditions for receiving modulated data: - Transfer rate switch: Position "1200", - Type of modulation switch: Position "2PSK" On the PSK / QPSK modulator (SO4201-9J), connect the "Sync" output to the analog test input, channel B, of the UniTr@in-Interface. On channel A, measure the signal at the "Data" output of the QPSK / PSK demodulator (SO4201-9K). Trigger on B. For more stable triggering, set the trigger point to 50% of the amplitude of the squarewave signal. Result:
X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 6: 2PSK demodulation

Set other different bit patterns with the DIP switches and change the data transfer rate (modulator and demodulator settings must be the same). Result:

MTI 7604 PSK / QPSK Modulation and Demodulation

QPSK Modulation/Demodulation
Exercise 1 Assigning the oscillograms at the test points DATA and DIBIT-CLOCK, to a set bit pattern
Note: Before commencing the exercise, check the alignment of the PSK modulator, SO42019J, in accordance with the operating instructions! On the PSK / QPSK modulator (SO4201-9J), connect the "Sync" output to the analog test input (channel B) of the UniTr@in-Interface. On channel A measure the signal at the "Data" output. Trigger on B. For more stable triggering, set the trigger point to 50% of the amplitude of the squarewave signal. Set the following bit pattern (Byte) on the DIP switches:
LSB MSB Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8

Set the switch for the modulation type to "4PSK", the jumper for the transfer rate to "1200" and by pressing the "SET" button, read in the bit pattern. Caution: The "Set" button must be pressed again, after each new change of the settings has been completed!

On an oscilloscope, display the voltages at the test points DATA, BITCLOCK and DIBITCLOCK. What is the sequence of the bits during transfer? How many bits are transferred for each bit-clock and Dibit-clock ? Result:
X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 1: Data signal

X = 1 ms/DIV X/T (B) Kannal A= 2 Kannal B= 2 V/DIV DC V/DIV DC

Fig. 2: Bit-clock

X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 3: Dibit-clock

Exercise 2 Displaying the dependency of the DIBIT X and DIBIT Y signals on the associated Dibits of the selected bit pattern
On an oscilloscope, display the signals at the test points "DIBIT X" and "DIBIT Y" as a function of the bit pattern selected. Result:

X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 4: Dibit formation; Dibit X

X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 5: Dibit formation; Dibit Y DIBIT DIBIT X DIBIT Y 00 01 10 11

Exercise 3 Assigning the output voltage QPSK to various bit patterns or Dibits
Determine the phase relationship of the QPSK signal and the set DATA signal (the Dibits in the signal). For this, compare the phase of the QPSK signal with the signals at the test points T (0, 90, 180, 270). Bear in mind that the QPSK signal compared to the reference signals, exhibits a small but recognisable delay caused by the transit time. Result:
X= 1 ms/DIV X/T (B) V/DIV DC V/DIV DC

Chan. A= 0,5 Chan. B= 2

Fig. 6: Phase relationship of the Dibits DIBIT Phase relationship 00 01 10 11

Exercise 4 Effect of various rates of transfer

Determine the baud rate vS, data transfer rate vD and the number of bytes transferred per second (cps) for the "600" and "1200" transfer rate settings. Compare the appearance of the 4PSK signal at either setting. Note: For determining the transfer rate, use the time marker on the oscilloscope! In the lower part of the operating bar for the oscilloscope, the button will be seen for the cursor function. Set this for channel A. Also, two amplitude markers are available for

measuring voltages and two time markers for measuring time or frequency. The marker can be moved with the mouse to the position required. The values detected are shown at the top right. Result ("600"position)
X = 0,5 ms/DIV X/T (B) Chan. A= 0,5 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 7: 4PSK signal at 600 Bd

Result ("1200" position ):

X=

1 ms/DIV X/T (B) V/DIV DC V/DIV DC

Chan. A= 0,5 Chan. B= 2

Fig. 8: 4PSK signal at 1200 Bd

Exercise 5 Demodulation of the QPSK signal

Without changing the setting of the modulation, connect the "(Q)PSK" and "Car." outputs of the QPSK / PSK modulator to the corresponding inputs on the QPSK / PSK demodulator (SO4201-9K). For synchronising, the carrier signal (CAR) must be transferred with the output signal. Set the demodulator according to the conditions for receiving modulated data: - Transfer rate switch: Position "1200", - Type of modulation switch: Position "4PSK" On the PSK / QPSK modulator (SO4201-9J), connect the "Sync" output to the analog test input, channel B, of the UniTr@in-Interface. On channel A, measure the signal at the "Data" output of the QPSK / PSK demodulator (SO4201-9K). Trigger on B. For more stable triggering, set the trigger point to 50% of the amplitude of the squarewave signal. Result:

X = 1 ms/DIV X/T (B) Chan. A= 2 Chan. B= 2 V/DIV DC V/DIV DC

Fig. 9: 4PSK demodulation

Set other different bit patterns with the DIP switches and change the data transfer rate (modulator and demodulator settings must be the same).