Examination committee

:

Full Name Title Quality University
Dehimi Lakhdar Pr Chairman Biskra
Sengouga Nouredine Pr Supervisor Biskra
Saidane Abdelkader Pr Examiner Oran
Debilou Abderrazak M.C.A Examiner Biskra
Melaab Djamel M.C.A Examiner Batna




by : Khaled BEKHOUCHE

Thesis
Submitted in fulfilment of the requirements of the degree of Doctor of Science in Electronics
Entitled:
Measurement of Charge Transfer Efficiency of a Silicon Particle
Detector Based on a Charge-Coupled Device


Democratic and Popular Republic of Algeria
Ministry of Higher Education and Scientific Research
Mohammed Khider University
Faculty of Sciences and Technology
Department of electrical engineering

November 2010
i
Abstract

The X-ray technique is used to measure the CTI in a CCD. The source is a
55
Fe and the CCD
is a T-type Column Parallel (CPC-T) which has 4 channels, 500 pixels each. The CTI is
measured for one channel since they are identical. A LABVIEW software is used to acquire
data via an ADC converter while a MATLAB code is used to analyse the measured data and
extract the CTI. The CTI is calculated for two number of frames, 1000 and 10000. This
allows the study of the effect of the statistical errors. Smaller statistical errors are obtained
with 10000 frames. For an unirradiated CPC-T, the CTI is only a few 10
-5
. An analytic model
is used to fit the experimental results and found to be in good agreement when a low density
of two electron traps located at 0.37 eV and 0.44 eV below the conduction band is considered.
The measured noise has a parabolic-like shape which indicates that the trap distribution has
the same shape too. Using a simple analytic model, the estimated occupancy is in good
agreement with the measured one except at the edges of the CCD. It was found that for each
clock voltage value there is an operating window where the CTI is low. Beyond this window,
the CTI increases rapidly and the electrons can not reach the sense node. The lower is the
clock voltage the lower is the energy consumption but the narrower is the operating window.
ii

Acknowledgements

All my thanks to Allah my lord

This work was carried out in the Laboratory Particle Physics of the University of Oxford.
Many people have contributed to the work presented in this thesis. I would like to thank them
for their help and support. First, I would like to thank my thesis advisor, Professor Nouredine
Sengouga and my co-advisor Professor André Sopczak from Lancaster University for the
guidance and encouragement. I would like to thank doctors Andrei Nomerotski and Rui Gao
for the great help in carrying out the measurements. I would like to thank Professor Lakhdar
Dehimi and Aoulmit Salim for their invaluable help throughout the study. I would like also to
thank all LCFI members for their critical remarks and suggestions. Lastly but not least I
would like express my sincere appreciations for the Ministry of Higher Education and
Scientific Research and the University of Biskra for providing long term grant to Lancaster
and Oxford University.
iii
CONTENTS

Introduction.....................................................................................................................1
Chapter I Particle Detectors..........................................................................................3
I. 1 Radiations sources ......................................................................................................3
I. 2 Radiation detectors......................................................................................................4
I. 2. 1 Detector operation modes....................................................................................4
I.2.1.1 Current operation mode..................................................................................5
I.2.1.2 Mean Square Voltage operation mode ...........................................................5
I.2.1.3 Pulse operation mode .....................................................................................5
I.2.2 Pulse height spectra and energy resolution............................................................7
I.2.4 Dead time.............................................................................................................10
I.3 Radiation damage in particle detectors ......................................................................11
I.3.1 Surface damage....................................................................................................11
I.3.2 Bulk damage........................................................................................................12
I. 4 Trapping and generation-recombination at deep levels ............................................15
Chapter II Charge Coupled Devices ..........................................................................19
II. 1 CCD operation.........................................................................................................19
II.1.1 Four-phase CCD................................................................................................19
II.1.2 Three-phase CCD ..............................................................................................20
II.1.3 Two-phase CCD ................................................................................................21
II. 2 CCD array architecture...........................................................................................21
II.2.1 Linear arrays ......................................................................................................22
II.2.2 Full frame array .................................................................................................22
II.2.3 Frame transfer ....................................................................................................24
II.3 Readout time requirement for the vertex detector at the Future International Linear
Collider (ILC)..................................................................................................................25
II. 4 Metal-Oxide-Semiconductor capacitor theory ........................................................26
II.4.1 P-MOS capacitor................................................................................................27
II.4.2 N-P MOS capacitor............................................................................................29
II.5 Charge generation.....................................................................................................32
II.6 Charge collection......................................................................................................34
II.7 Charge transfer .........................................................................................................35
iv
II.7.1 Self-induced drift ...............................................................................................37
II.7.2 Fringing field drift .............................................................................................37
II.7.3 Thermal diffusion ..............................................................................................38
II.8 Charge measurement ................................................................................................38
II.8.1 Charge conversion .............................................................................................38
II.8.2 Correlated Double Sampling .............................................................................39
II.9 Noise sources............................................................................................................40
Chapter III Experimental setup and CTI calculation .............................................42
III. 1 Experimental setup.................................................................................................42
III.1.1 Hardware part ...................................................................................................45
III.1.1.1 CPC-T motherboard...................................................................................46
III.1.1.2 Temperature controller ..............................................................................47
III.1.1.3 ICS-554 Analog-To-Digital Converter......................................................48
III.1.2 Software part ....................................................................................................49
III.1.2.1 Bias tab ......................................................................................................50
III.1.2.2 Sequencer tab.............................................................................................51
III.1.2.3 Amplifier tab..............................................................................................52
III.1.2.4 DAQ system tab.........................................................................................52
III.2 Charge Transfer Inefficiency Calculation............................................................55
Chapter IV Charge Transfer Inefficiency results and discussion ..........................58
IV. 1 Introduction............................................................................................................58
IV. 2 Charge transfer inefficiency measurement ............................................................58
IV.2.1 Low statistics....................................................................................................58
IV.2.2 High statistics ...................................................................................................61
III.3 Charge Transfer Inefficiency analysis.....................................................................64
III.4 Distribution of X-ray events....................................................................................66
III.5 Noise effect .............................................................................................................68
III. 6 OFFSET of the pedestal voltage and clock voltage effects ...................................69
Conclusion and Outlook ..............................................................................................70
Bibliography ...................................................................................................................72
Appendix A.....................................................................................................................75

1
Introduction
Over the years, the technologies of optical imaging (still largely based on photographic films)
and particle tracking (increasingly using electronic detectors such as spark chambers and
multi-wire gaseous chambers) drifted apart. However, the invention of the Charge-Coupled
Device (CCD) in 1970 started a revolution which is still having profound effects in the fields
of optical imaging, particle tracking, X-ray detection, analog storage devices, etc [1-3].
Charge coupled devices have been successfully used in several high-energy physics
experiments over the last 20 years. Their small pixel size, excellent precision and high
quantum efficiency (QE) over a wide wavelength range going from the X-rays to the far
infrared [4] provide a superb tool for studying short-lived particles and understanding their
nature at a fundamental level. Over the last few years the Linear Collider Flavour
Identification (LCFI) collaboration has developed Column-Parallel CCDs (CPCCD) and
CMOS readout chips, to be used for the vertex detector at the International Linear Collider
(ILC). The CPCCDs are very fast devices capable of satisfying the challenging requirements
imposed by the beam structure of the superconducting accelerator [5]. Another type of a
CCD-based device is In-Situ Storage Image Sensor (ISIS). In ISIS, each pixel has an internal
memory implemented as a small CCD register. The charge is collected under a photogate and
is transferred to a few-pixel storage CCD inside the same pixel [6].
Physics studies continuously show that extremely precise vertexing will be needed to uncover
the interactions at a future TeV-scale e
+
e
-
linear collider. A very good vertex detector is
crucial for the high quality b and c tagging, required to further explore the physics at high
energies. CCD-based vertex detectors have proven their potential for such studies, which was
shown in the excellent results of the vertex detector VXD3 at the Stanford Large Detector
(SLD). The excellent gain uniformity, high precision and small layer thickness of the CCD
are still difficult to achieve with other semiconductor sensors [7, 8]. The transfer
characteristics of charge-coupled devices have been investigated theoretically and simulated
experimentally since the invention of these devices [9-12].
Using analytic models, the charge transfer inefficiency is determined then compared to TCAD
simulations and/or to experimental results [13, 14].
In this work, the results of the CTI measured at the test stand at Oxford University are
presented. It is an unirradiated Column Parallel CCD (CPCCD) called CPC-T. The setup is
controlled by a Laboratory Virtual Instrumentation Engineering Workbench (LABVIEW)
2
software [15]. The binary file, containing data, generated by the latter is then analysed by a
MATrix LABoratory (MATLAB) code [16] to calculate the CTI.
This thesis is organized as follows:
Chapter I: The general definitions and aspects in particle detectors domain are presented in
some details. This includes radiation sources which have a great effect on the detector
performances depending on their nature. Common operation modes of a particle detector are
explained in brief. Then, the characteristics and performances of the detectors are emphasised
such as the detection efficiency. Finally, the effect of radiation on creating defects in the
detector is studied.
Chapter II: This chapter concentrates on charge-coupled devices. First the three usual
operations of a CCD are explained: two, three and four-phase operation systems. Then, the
different architectures of the CCD are mentioned. As CCDs will be used in the inner vertex
detector of the future ILC, time requirement for this project is given in brief. The theory of P-
MOS and NP-MOS capacitors is given in some details because they are the element cells in
the CCDs. The three processes (charge generation, charge collection, charge measurement)
involved to properly convert the photo-generated electrons to an electric signal are presented.
Finally, we present the theory of the generation-recombination processes resulting from the
presence of the defects.
Chapter III: We present the setup used in this work to measure the CTI. It is composed of two
parts: hardware and software. Then, the method used to analyse data and calculate CTI is
explained.
Chapter IV: This chapter and the previous one are the heart of this work. In this chapter we
present the results obtained after measuring the CTI of an unirradiated CCD. An analytic
model is used to fit the CTI-T characteristics. Some other parameters are estimated such as:
noise and occupancy. The effect of temperature and pixel number on the CTI is also studied.
This thesis terminates by a conclusion in which the results obtained are summarized and a
possible future work is suggested. An appendix for the MATLAB code developed is also
included.
3
Chapter I
Particle Detectors

I.1 Radiations sources
Radiations can be categorized into four general types. Fast electrons and heavy charged
particles are considered as charged particle radiation. Electromagnetic radiation and neutrons
are considered as uncharged radiation. Fast electrons are energetic electrons emitted in
nuclear decays or produced by any other process. Alpha particles, protons, fission products or
the products of many nuclear reactions are parts of heavy charged particles. The
electromagnetic radiation includes X-rays emitted in the rearrangement of electrons shells of
atoms, and gamma rays that originate from transitions within the nucleus itself. Neutrons
generated in various nuclear processes are divided in slow neutrons and fast neutrons
subcategories. Radiations differ in their ability to penetrate into a material. This property is of
considerable concern in determining the physical form of radiation sources or the structure
and the physical parameters of the detector. Soft radiations, such as alpha particles or low-
energy X-rays, penetrate only a few micrometers of depth. Beta particles are generally more
penetrating; up to a few tenths of a millimeter of depth can usually be achieved. Harder
radiations, such as gamma rays or neutrons, can penetrate to a depth in millimetres or
centimetres without seriously affecting its properties [17]. A radiation source is characterized
by its activity which is defined as the source’s rate of decay and is given by:
N
dt
dN
decay
λ − = (I.1)
where N is the number of radioactive nuclei and λ is defined as the decay constant. The SI
unit of activity is the Becquerel (Bq) defined as one disintegration per second. The historical
unit of activity has been the Curie (Ci), defined as
10
10 7 . 3 × disintegrations per second. Thus
Ci 10 703 . 2 Bq 1
11 −
× = (I.2)
The specific activity of a radioisotope source is defined as the activity per unit mass of
radioisotope sample and it is given by
M
A
A NM
N
v
v
λ λ
= = =
/ mass
activity
activity Specific (I.3)
where M is the molecular weight of the sample, A
v
is Avogadro’s number and λ is given by
1/2
T / ) 2 ln( = λ (I.4)
where T
1/2
is the half-life of the radiation source.
4
I.2 Radiation detectors
The net result of the radiation interaction in a wide category of detectors is the appearance of
a given amount of electric charge within the detector active volume. A simplified detector
model assumes that a charge Q appears within the detector at time t = 0 resulting from the
interaction of a single particle or quantum of radiation. Next, this charge must be collected to
form the basic electrical signal. Typically, collection of the charge is accomplished through
the imposition of an electric field within the detector, which causes the positive and negative
charges created by the radiation to flow in opposite directions. The time required to fully
collect the charge varies greatly from one detector to another. The sketch in Fig.I.1 illustrates
one example for the time dependence the detector current might assume, where t
c
represents
the charge collection time.


Fig.I.1: An illustration of the time dependent of the detector current during charge collection time t
c
.

The total charge generated in that specific interaction is equal to the time integral over the
duration of the current, thus

=
c
t
dt t i Q
0
) ( (I.5)

I.2.1 Detector operation modes
There are three general modes of operation of radiation detectors: the current mode, the pulse
mode and the mean square voltage mode (abbreviated MSV mode, or sometimes called
Campbelling mode). Pulse mode is the most commonly applied of these, but current mode
also finds many applications. MSV mode is limited to some specialized applications that
make use of its unique characteristics.



Time
i(t)
t
c
5
I.2.1.1 Current operation mode
In the current mode, a current-measuring device (practically a picoammeter) is connected
across the output terminals of a radiation detector as shown in Fig.I.2. The current mode
operation is used with many detectors when event rates are very high.



Fig.I.2: Radiation detector in current mode. (a) Current-measuring device (picoammeter) connected across the
output terminals of a radiation detector. (b) Recorded signal from a sequence of events.

I.2.1.2 Mean Square Voltage operation mode
The MSV mode of operation is most useful when making measurements in mixed radiation
environments when the charge produced by one type of radiation is much different than that
from the second type. In this mode, the average current I
0
is blocked. Then, by providing
additional signal-processing elements, the time average of the squared amplitude of the
fluctuations is computed. The processing steps are illustrated in Fig.I.3.


Fig.I.3: The processing steps using in a detector operating in the mean square voltage (MSV) mode.

I.2.1.3 Pulse operation mode
Most applications are better served by preserving information on the amplitude and timing of
individual events that only pulse mode can provide. The nature of the signal event depends on
the input characteristics of the circuit to which the detector is connected (usually a
preamplifier). The equivalent circuit can often be represented as shown in Fig.I.4.
Detector
pA
Time
i(t)

Ion chamber

Squaring circuit
Averaging
Output
Variance computing circuit
6

Fig.I.4: The equivalent circuit of both, detector output and the input of the circuit connected to it.

Figure I.5.a shows the signal pulse produced from a single event in a detector operated in
pulse mode. Two separate extremes of operation can be identified that depend on the relative
value of the time constant of the measuring circuit. In the case where the time constant, given
by τ=RC, is kept small compared with the charge collection time, so the signal voltage V(t)
produced under these conditions has a shape nearly identical to the time dependence of the
current produced within the detector as illustrated in Fig.I.5b. Radiation detectors are
sometimes operated under these conditions when high event rates or timing information is
more important than accurate energy information. But it is more common to operate detectors
in the opposite extreme in which the time constant of the external circuit is much larger than
the detector charge collection time as illustrated in Fig.I.5c.


Fig.I.5: (a) The signal pulse produced from a single event in a detector operated in pulse mode. (b) The case of a
small time constant load circuit. (c) The case of a large time constant load circuit.

Detector
C R V(t)
i(t)
Time
V(t)
Time
V(t)
Time


= dt t i Q ) (
(a)
(b)
(c)
Case 2 : RC >> t
c


V
max
= Q/C
Case 1 : RC << t
c


V(t) = R i(t)
7
I.2.2 Pulse height spectra and energy resolution
The pulse amplitude distribution is a fundamental property of the detector output that is
routinely used to deduce information about the incident radiation or the operation of the
detector itself. The most common way of displaying pulse amplitude information is through
the differential pulse height distribution. Figure I.6 shows an example of such distribution.
The abscissa is a linear pulse amplitude scale in volts or analog to digital converter (ADC)
counts. The ordinate is the differential number dN of pulses observed with an amplitude
within the differential amplitude increment dH, divided by that increment.


Fig.I.6: An example of differential pulse height spectra.

The number of pulses whose amplitude lies between two specific values, H
1
and H
2
, can be
obtained by integrating the area under the distribution between those two limits, as shown by
the cross-hatched area in Fig.I.6. Peaks in the distribution, such as H
4
, indicate pulse
amplitudes about which a large number of pulses may be found. On the other hand, valleys or
low points in the spectrum, such as H
3
, indicate pulse amplitudes around which relatively few
pulses occur. The physical interpretation of differential pulse height spectra always involves
area under the spectrum between two given limits of the pulse height.
In many applications of radiation detectors, the objective is to measure the energy distribution
of the incident radiation. These efforts are classified under the general term radiation
spectroscopy. One important property of a detector in radiation spectroscopy can be examined
by noting its response to a monoenergetic source of that radiation. Under these conditions, the
differential pulse height distribution is called the response function of the detector for the
energy used in the determination as illustrated in Fig.I.7. The energy resolution of the detector
H
2
H
1
H
4
H
3
Pulse height
dN/dH
8
is conventionally defined as the full width at half maximum (FWHM) divided by the location
of the peak centroid H
0
, thus
0
FWHM
H
R = (I.6)
For peaks whose shape is Gaussian with standard deviation σ , the FWHM is given by
σ 35 . 2 . The energy resolution R is thus a dimensionless fraction conventionally expressed as
a percentage. It should be clear that the smaller the figure for the energy resolution, the better
the detector will be able to distinguish between two radiations whose energies lie near each
other.


Fig.I.7: An example of response function and definition of detector resolution.

I.2.3 Detection efficiency
The detection efficiency depends on the type of radiation. For charged radiation such as alpha
and beta particles, they will form enough ion pairs along its path to ensure that the resulting
pulse is large enough to be recorded. The detector is said to have a high counting efficiency.
On the other hand, uncharged particle such as gamma rays and neutrons can travel large
distances between interactions. The detector in this case has less counting efficiency. It then
becomes necessary to have a precise figure for the detector efficiency.
It is convenient to subdivide counting efficiencies into two classes: absolute and intrinsic. The
absolute efficiency is defined as
source by the emitted quanta radiation of number
recorded pulses of number
=
abs
ε (I.7)
dN/dH
H H
0
Y/2
Y
FWHM
Resolution :
R = FWHM/H
0
9
The intrinsic efficiency is defined as
detector on the incident quanta radiation of number
recorded pulses of number
int
= ε (I.8)
The two efficiencies are simply related for isotropic sources by
|
¹
|

\
|

⋅ =
π
ε ε
4
int abs
(I.9)
where Ω is the solid angle of the detector seen from the actual source position. A commonly
encountered circumstance is shown in Fig.I.8. It involves a uniform circular disk source
emitting isotropic radiation aligned with a circular disk detector, both positioned
perpendicular to a common axis passing through their centers. The solid angle is given by the
following approximate equation calculated numerically [17]
( ) ( )
|
|
¹
|

\
|
− +
+

+
− ≅ Ω
2
3
1
2
2 / 5 2 / 1
1 8
3
1
1
1 2 F F α α
β
αβ
β
π (I.10)
where
( ) ( )
2 / 9
2
2 / 7 1
1 64
35
1 16
5
β
β
β
β
+

+
= F ;
( ) ( ) ( )
2 / 13
3
2 / 11
2
2 / 9 2
1 1024
1155
1 256
315
1 128
35
β
β
β
β
β
β
+
+
+

+
= F
2
|
¹
|

\
|
=
d
s
α ;
2
|
¹
|

\
|
=
d
a
β
This approximation becomes inaccurate when the source or detector diameters become too
large compared with their spacing.


Fig.I.8: A uniform circular disk source emitting isotropic radiation aligned with a circular disk detector, both
positioned perpendicular to a common axis passing through their centers.



d
a
s
Source Detector
10
I.2.4 Dead time
Dead time is defined as the finite time after the registration of an event, before the detector is
able to accurately register another incident event [18]. Dead time is the minimum amount of
time that must separate two events in order that they be recorded as two separate pulses. Two
models of dead time behaviour of counting systems have come into common usage:
paralyzable and nonparalyzable response. The fundamental assumptions of the models are
illustrated in Fig.I.9. At the center of the figure, a time scale is shown on which six randomly
spaced events in the detector are indicated. At the bottom of the figure is the corresponding
dead time behaviour of a detector assumed to be nonparalyzable. A fixed time τ is assumed to
follow each true event that occurs during the “live period” of the detector. True events that
occur during the dead period are lost and assumed to have no effect whatsoever on the
behaviour of the detector. In the case of non-paralyzable detectors and electronics, the
expression giving the recorded events rate m as a function of delivered events rate or true
interaction rate n can be calculated for random time distributions of the events for a given
dead time τ as
τ n
n
m
+
=
1
(I.11)
For paralyzable systems (dead time adds up for subsequent events) the rate of recorded events
reads
τ n
e n m

= (I.12)

Fig.I.9: An illustration of two assumed models of dead time behaviour for radiation detector. (a) Paralyzable
model. (b) True events in detector. (c) Nonparalyzable model.
Time
Time
Time
Dead
Live
(a)
(b)
(c)
Dead
Live
τ
τ

11
I.3 Radiation damage in particle detectors
Semiconductor devices are sensitive to radiation, both ionizing and non-ionizing. It was
found, that the degradation of the parameters of bipolar and MOS devices is caused by
radiation-induced surface effects at the Si-SiO
2
interface, as well as by defects in the bulk
silicon [19].

I.3.1 Surface damage
The passage of an ionising radiation in the depletion region in silicon detectors creates
electron-hole (e-h) pairs that are collected by the electric field at the electrodes and form the
signal. In the undepleted bulk of the semiconductor, where there is no electric field, the high
carrier density allows the deposited charge carriers to recombine. Therefore, the
semiconductor does not show permanent traces of the passage of a charged particle that loses
energy by ionisation.
On the contrary, the passage of an ionising radiation in the oxide causes the built up of
trapped charge in the oxide layers of the detector [20]. If an MOS structure (Fig.I.10) is
exposed to a short radiation pulse while under an applied bias voltage, electron-hole pairs are
generated in the oxide. Under the applied bias, the electrons that escape early recombination
with the holes are rapidly (within picoseconds) swept out of the oxide and leave behind an
instantaneous, essentially uniform distribution of relatively immobile holes. This positive
charge distribution causes an initial negative voltage shift, ∆V(O
+
), in the capacitance voltage
(C-V) characteristic of an MOS capacitor or the current- voltage (I-V) characteristic of the
equivalent MOSFET [20]. In terms of the continuous time random walk (CTRW) model [21],
holes then begin to move under the influence of the applied bias to either the gate or the Si0
2
-
Si interface by a slow polaron-hopping process that requires many decades in time. As the
transporting holes reach the interface most of them are removed, causing the voltage shift,
∆V(t), to decrease with time. Figure I.10 shows schematically the expected behaviour of the
voltage shift as a function of time for a sample irradiated under positive bias (a) and negative
bias (b).
In addition to the trapped charge, the ionising radiation also produces new energy levels in the
band gap at the SiO
2
-Si interface. These levels can be occupied by electrons or holes,
depending on the position of the Fermi level at the interface and the corresponding charge can
be added or subtracted to the oxide charge.
12

Fig.I.10: Contributions of holes to voltage shift in MOS structures. Dotted curves correspond to the transporting
holes. Dashed curves correspond to the trapped holes at interface. Continue curves correspond to the total. (a)
Positive bias. (b) Negative bias.

I.3.2 Bulk damage
While in the silicon crystal itself ionization is a reversible process, and therefore does not
cause any damage, the energy transfer to crystal atoms which is the non-ionizing energy loss
(NIEL) of the incident particle causes displacement damage [22]. The bulk damage is caused
by the NIEL interactions of a primary particle with mass m
p
and energy E
p
with a lattice
silicon atom with mass M
Si
. The energy transferred in the interaction is, in the non-relativistic
case:
( )
p
Si p
Si p
E
M m
M m
E ⋅
|
¹
|

\
|
+
= ∆
2
sin 4
2
2
ϑ
(I.13)
where ϑ is the scattering angle. Displacement damage occurs when the energy transferred to
the silicon atom is sufficient to remove it from the crystal lattice. The atom is then called
primary knock-on atom (PKA). The minimum threshold energy for the displacement is
eV 15 ≈ in silicon. The vacancy-interstitial (V-I) silicon created is called a Frenkel pair. The
minimum energy for particles like neutrons or protons, with mass u 1 ≈ , required to create a
Frankel pair is eV 110 ≈ . The same threshold energy for electrons is keV 260 ≈ . The energy
of the particle used for the irradiation studies reported in the present work is several orders of
magnitude higher than the threshold level, as it will be in the background radiation in the
inner detectors of the Large Hadron Collider (LHC) [19].
Gate (+) Gate (-)
SiO
2
Si SiO
2
Si

1.0

0
V
V



0
Log(t) Log(t)
0
V
V



1.0
0
(a) (b)
13
The recoil energy of the PKAs can be up to 130 keV and therefore they can remove other
atoms from the crystal lattice, giving rise to a PKA cascade. It has been estimated that about
50% of the energy of the recoil atom is deposited via ionisation and the displacement
dominates when the recoil atom loses its final 5-10 keV. The fraction of energy going to the
non-ionising interaction is described by the Lindhard partition function. The cascade results in
the formation of two or three terminal clusters of ≈ 50 Å linear dimension with high
concentration of Frankel defects. About 90% of the vacancies recombine with interstitials,
leaving no net damage in the crystal. Some vacancies can form stable divacancy (or multi-
vacancy) defect complexes and the remaining vacancies and interstitials diffuse through the
crystal and react with other defects or impurity atoms always present in the silicon crystal (O,
C, P, B…) to form stable complexes. The introduction rate of vacancies (V) and divacancies
(V
2
) have been determined to be
1
cm 5 . 0 1 . 2

± =
V
η and
1
cm 4 . 0 7 . 4

± =
V
η for 1 MeV
neutron irradiation. Figure I.11 shows an example of the final damage due to aggregation of
point defects (V2, VP).


Fig.I.11: A diagram of some defects in the n-type silicon crystal lattice due to point defect complexes.

Closely situated multiple displacements, which can interact electrically is called defect
cluster. Light particles, such as electrons generate mostly point defects, and need more than 5
MeV to produce clusters. The energy threshold for electrons to displace a Si atom has been
estimated to ≈ 260 keV, whereas only 190 eV is required for a neutron to do the same effect.
Heavy particles easily create clusters because of the high energy of the primary recoil Si
atom. Neutrons, protons and pions need only about 15 keV to create clusters and generate
Divacancy Vacancy Interstitiel silicon
(self interstitiel)
Interstitiel
impurity
Phosphorus Substitutional impurity Vacancy-phosphorus
14
point defects as well. The final radiation damage is due to the thermally stable defects formed
by the reaction of primary defects (V, interstitial) with other defects or atomic impurities.
Some of the possible reaction have been identified and are reported in Table I.1 [19]. Some of
the stable complexes are electrically active, therefore the changes of the electrical properties
of detectors are correlated with the electrical activity of the stable damage. Several defects
have been identified by means of different measurement techniques, such as electron
paramagnetic resonance (EPR), photoluminescence, current or capacitance deep level
transient spectroscopy (I-DLTS, C-DLTS), thermally stimulated current (TSC). Table I.2 lists
some of the identified defects, their charge states and their associated energy levels in the
band gap [19]. Most of these energy levels situate in the deep region of the silicon band gap,
close to the middle.

I reaction V reaction C
i
reaction
I + C
s
→ C
i
V + V → V
2
C
i
+ C
s
→ CC
I + CC → CCI V + V
2
→ V
3
C
i
+ O → CO
I + CCI → CCII V + O → VO
I + CO → COI V + VO → V
2
O
I + COI → COII V + P → VP
I + VO → O
I + CV
2
→V
I + VP → P

Table I.1: A few defect reactions in silicon. The subscript i stands for interstitial, s for substitutional, I for Si
interstitial, V for vacancy, C for carbon, O for Oxygen and P for phosphorus.


Defect Energy level Defect type
VO E
C
-0.17 acceptor
V
2
O E
C
-0.50 acceptor
V
2
E
C
-0.23
E
C
-0.42
E
V
+0.25
acceptor
acceptor
donor
VP E
C
-0.45 acceptor
CC E
C
-0.17 acceptor
CO E
V
+0.36 donor

Table I.2: Identified defect states with their energy levels in eV.

15
I.4. Trapping and generation-recombination at deep levels
If the energy levels introduced in the forbidden gap of a semiconductor lie greater than 0.1 eV
from the valence or the conduction band-edges, the level is commonly referred to as a deep
level. Deep levels can be formed by either introduction of impurities or be the result of
inherent crystal defects. They may be, for example, large foreign atoms positioned
substitutionally or interstitially, vacancies, host atoms on the wrong site in compound
semiconductors (anti-site defect), defect due to dislocations or damages induced by irradiation
or ion-implantation.
Deep levels may behave as carrier traps or as generation recombination centres if they are
near to mid-band-gap. As traps they can capture the free carriers supplied by the dopant
atoms, thus compensating the shallow levels, reducing the effective doping density and
increasing the resistivity of the material. Deep levels, behaving as recombination centres,
provide a path for the generation and recombination of electron-hole pairs across the band-
gap. Deep levels may be characterized by three parameters: the activation energy (E
t
) which is
related to the position of the level in the band-gap, its concentration (N
t
) and its capture cross-
section (σ) for carriers which provides a measure of the ability of the deep level to trap
carriers.
A theory describing the generation and recombination (g-r) processes has been established by
Shockley, Read and Hall [23, 24]. More details on g-r processes can be found in the literature
[25, 26]. Therefore, the effect is throughout the literature referenced as Shockley-Read-Hall
(SRH) generation/recombination. Four sub-processes are possible:
a) Electron capture. An electron from the conduction band is captured by an empty trap
in the band-gap of the semiconductor. The excess energy of E
c
− E
t
is transferred to
the crystal lattice (phonon emission).
b) Hole capture. The trapped electron moves to the valence band and neutralizes a hole
(the hole is captured by the occupied trap). A phonon with the energy E
t
− E
v
is
generated.
c) Electron emission. A trapped electron moves from the trap energy level to the
conduction band. For this process additional energy of the magnitude E
c
− E
t
has to be
supplied.
d) Hole emission. An electron from the valence band is trapped leaving a hole in the
valence band (the hole is emitted from the empty trap to the valence band). The energy
necessary for this process is E
t
− E
v
.
These four processes are illustrated in Fig.I.12.
16

Fig.I.12: The four sub-processes in the Shockley-Read-Hall generation/recombination process. (a) Electron
capture. (b) Hole capture. (c) Electron emission. (d) Hole emission.

The process (a) i.e. capture of electrons by the deep centre from the conduction band has the
following equation
n p n p R
T n T th n n a
α ν σ = > < = (I.14)
where n is the number of electrons in the conduction band, p
T
is the concentration of empty
deep states, σ
n
is the capture cross-section for electrons and <v
n
>
th
is the average thermal
velocity of the electrons. Essentially an electron with this thermal velocity must come within
an area σ
n
of the trap to be captured. α
n
= σ
n
<v
n
>
th
is thus the effective volume element swept
out per unit time.
Similarly the corresponding hole process, (b) has a rate R
b
given by
p n p n R
T p T th p p b
α ν σ = > < = (I.15)
where p is the number of holes in the valence band, n
T
is the concentration of filled deep
states, σ
p
is the capture cross-section for holes, <v
p
>
th
is the average thermal velocity of the
holes and α
p
= σ
p
<v
p
>
th
is the effective volume element swept out per unit time.
For process (c) i.e. emission of electrons from the deep level to the conduction band, the rate
of emission R
c
is given by
T n c
n e R = (I.16)
where e
n
is the proportionality constant defined as the electron emission rate.
Similarly the corresponding hole process, (d) has a rate R
d
given by
T p d
p e R = (I.17)
where e
p
is the proportionality constant defined as the hole emission rate.
The net rate of electrons leaving the conduction band at time instant t is given by
E
C
E
t
E
V
(a) (b) (c) (d) (a) (b) (c) (d)
Before After
17
n p n e
dt
dn
T n T n
α + − = − (I.18)
Similarly the net rate of holes leaving the valence band is given by
p n p e
dt
dp
T p T p
α + − = − (I.19)
Thus the net rate of increase of density of filled deep levels is given by
p n p e n p n e
dt
dp
dt
dn
dt
dn
T p T p T n T n
T
α α + + + − =
|
¹
|

\
|
− − − =
(I.20)
Using the total density of traps
T T T
p n N + = , we get
( ) ( )
T p p n n T p n
T
n e c e c N e c
dt
dn
+ + + − + = (I.21)
where c
n
and c
p
are the capture rates of electron and hole, respectively.
According to the detailed balance principle, in thermal equilibrium, the rate of any physical
process and its reverse must balance each other. Thus, in this case, the rates for holes
emission and capture must be equal. Similarly the rate of emission of electrons and the
corresponding capture rate must also exactly cancel. One can obtain the electron and hole
thermal emission rates from a deep level using the detailed balance principle and the Fermi
Dirac distribution function. The probability of an electron occupying an energy level E
t
is
given by
|
¹
|

\
| −
+
=
kT
E E
E f
F t
t
exp 1
1
) ( (I.22)
The emission and capture rates for electrons and holes are equal according to the balance
principle, thus
c a
R R = (I.23.a)
d b
R R = (I.23.b)
The number of filled traps is given by
T t T
N E f n ) ( = (I.24)
The density of electrons in the conduction band is given by
|
¹
|

\
| −
=
kT
E E
N n
C F
C
exp (I.25)
Using equations (I.14), (I.16), (I.22), (I.23.a), (I.24) and (I.25), we get the thermal emission
rate of electrons
18
|
¹
|

\
| −
> < =
kT
E E
N v e
C t
C th n n n
exp σ (I.26)
Similar analysis for the hole emission and capture processes (R
b
and R
d
) gives the thermal
emission rate of the holes as
|
¹
|

\
| −
− > < =
kT
E E
N v e
V t
V th p p p
exp σ (I.27)
For the steady state, there is no change in the occupancy of the deep levels, hence dn/dt=0 and
(I.22) gives the new probability of occupancy
p p n n
p n
T
T
t
e c c e
e c
N
n
E f
+ + +
+
= = ) ( (I.28)
Replacing c
n
, c
p
, e
n
and e
p
by their expressions, we get
( ) ( )
1 1
1
) (
p p n n
n p
E f
p n
n p
t
+ + +
+
=
α α
α α
(I.29)
where
|
¹
|

\
| −
= =
kT
E E
n
e
n
i t
i
n
n
exp
1
α
and
|
¹
|

\
| −
− = =
kT
E E
n
e
p
i t
i
p
p
exp
1
α
.
If the equilibrium state is disturbed by an external mean we can get a net generation-
recombination rate, thus
a c
R R G − = (I.30.a)
b d
R R G − = (I.30.b)
Replacing R
a
, R
b
, R
c
and R
d
by their expressions, we get
( ) ( )
1 1
2
p p n n
n pn
G
n p
i
+ + +

=
τ τ
(I.31)
where
T th n n
n
N > <
=
ν σ
τ
1
and
T th p p
p
N > <
=
ν σ
τ
1
are defined as the minority electron
lifetime and the minority hole lifetime respectively.
Inspecting (I.31) for constant values of n and p, it is clear that levels having an energy at mid
gap are considered as generation-recombination (g-r) centres, i.e. the g-r rate has a maximum
value. If the trap level is away from mid gap towards the conduction band then the emission
probability of the electron increases. Thus an electron, instead of recombining with a hole, is
emitted to the conduction band and the centre is considered as an electron trap. Similarly, if
the trap level is away from mid gap towards the valence band then the emission probability of
holes increases and the level behaves as a hole trap.
19
CHAPTER II
Charge Coupled Devices

II.1 CCD operation
In a CCD, a bit of information is represented by a packet of charges (electrons). These
charges are stored in the depletion region of a metal-oxide-semiconductor (MOS) capacitor.
Charges are moved about in the CCD circuit by placing the MOS capacitors very close to one
another and manipulating the voltages on the gates of the capacitors so as to allow the charge
to spill from one capacitor to the next, thus the name “charge-coupled” device. A charge
detection amplifier detects the presence of the charge packet, providing an output voltage that
can be processed. Charge packets can be created by injecting charge from an input diode next
to a CCD gate or introduced optically. Several clocking schemes, including the four-phase,
three-phase and two-phase techniques, presented in the following subsections, are utilized to
transfer charge from the collection gates to the output node.

II.1.1 Four-phase CCD
With a four-phase device (Fig.II.1), the charge is stored under two or three wells depending
upon the clock cycle. The clock rate is f
Clock
=1/(8T
i
), where i=1,8 is the number of gates in
two adjacent pixels.


Fig.II.1: A four phase charge transfer CCD clocking scheme
Pixel Pixel
Gates
V
1
V
2
V
3
V
4
Storage charge
T
1


T
2


T
3


T
4


T
5


T
6


T
7


T
8

20
Only one master clock is required to drive the array. Its phase must be varied for the gates to
operate sequentially. An anti-parallel clocking scheme is also possible. Here V
3
is the inverse
of V
1
and V
4
is the inverse of V
2
. For equal pixel sizes, four-phase devices offer the largest
well capacity compared to the two or three-phase systems. With the four-phase system, 50%
of the pixel area is available for the well [27].

II.1.2 Three-phase CCD
Three phase CCD clocking waveform complement improves spatial resolution over that
obtained in four phase devices, yet requires only three gates per pixel. This scheme differs
from four phase clocking by using only one storage gate and two barrier gates (Fig.II.2),
which allows for faster frame rates and the fabrication of higher density and resolution CCDs.
Another advantage of the technique is the formation of three independent polysilicon layers,
one for each set of gate electrodes, so that clock phases are not forced to operate on two gates
embedded in the same polysilicon layer. With three-phase system, only 33% of the pixel area
is available for the well capacity. Six steps (T
1
to T
6
) are required to move the charge one
pixel.

Fig.II.2: A three phase charge transfer CCD clocking scheme



Pixel Pixel
Gates
V
3
V
2
V
1
Stored charge
T
1


T
2


T
3


T
4


T
5


T
6

21
II.1.3 Two-phase CCD
A two phase charge transfer CCD clocking scheme shown in Fig.II.3 employs four gates for
each pixel, with adjacent gates connected together as pairs. The two phase CCD scheme
requires a more complex clocking arrangement than that of the three phase architecture. In
Fig.II.3, the alternating gates have different oxide thicknesses and therefore will create
different well potentials. Charge will preferentially move to the right-hand side of the pixel,
where the oxide layer is thinner. At time T
1
, both clocks are low. When V
2
is raised, the
potential increases as shown at time T
2
and the charge cascades down to the highest potential.
Then V
2
is dropped to zero and the charge is contained under the V
2
gate at time T
3
. This
process is repeated until the charge is clocked off the array.


Fig.II.3: A two phase charge transfer CCD clocking scheme

II.2 CCD array architecture
The choice of an array architecture is driven by the application. Full-frame and frame transfer
devices tend to be used for scientific applications. Interline transfer devices are used in
consumer camcorders, digital still cameras, and professional television systems. Linear array,
progressive scan, and time delay and integration (TDI) are used for industrial applications
[27].



Pixel Pixel
Gates
V
2
V
1
T
1



T
2



T
3




T
4
Stored charge
22
II.2.1 Linear arrays
The simplest arrangement is the linear array or single line of detectors. While these could be
photogates, photodiodes are used more often because they have higher quantum efficiency.
Linear arrays are used in applications where either the camera or object is moving in a
direction perpendicular to the row of sensors. They are used where rigid control is maintained
on object motion such as in document scanning.
Located next to each sensor are the transfer gate and then CCD shift register (Fig.II.4a). The
shift register is also light sensitive and is covered with metal light shield. Overall pixel size is
limited by the photodiode (single gate) size. For a fixed gate size, the active pixel width can
be reduced with a bilinear readout (Fig.II.4b). In comparison with the simple structure,
bilinear structure has twice the resolution.


Fig.II.4: A schematic representation of a linear array. (a) Simple structure. (b) Bilinear readout.

II.2.2 Full frame array
Figure II.5 illustrates a full frame transfer (FFT) array. After integration, the image pixels are
read out line-by-line through a serial register that then clocks its contents onto the output
sense node. All charge must be clocked out of the serial register before the next line can be
transferred. In full-frame arrays, the number of pixels is often based on powers of two (e.g.,
Photo
diode
Photo
diode
Transfer
gate
Transfer
gate
Transfer
gate
Serial readout register
Serial readout register
Serial readout register
Sense node
and amplifier
Sense node
and amplifier
Sense node
and amplifier
(a)
(b)
23
1024×1024) to simplify memory mapping. Full-frame arrays approach 100% fill factor and
are the choice for applications that require the highest possible quantum efficiency.


Fig.II.5: Full frame architecture.

During read out, the photosites are continually illuminated resulting in a smeared image. The
smear will be in the direction of the charge transport in the imaging part of the array. A
mechanical or external electronic shutter can be used to shield the array during readout to
avoid smear. When using strobe lights to illuminate the image, no shutter is necessary if the
transfer is between strobe flashes. If the integration time is much longer than the readout time,
then the smear may be considered insignificant. This situation often occurs with astronomical
observations.
Data rates are limited by the amplifier bandwidth and, if present, the conversion capability of
the analog-to-digital converter. To increase the effective readout rate, the array can be divided
into subarrays that are read out simultaneously. In figure II.6, the array is divided into four
subarrays. Because they are all read out simultaneously, the effective clock rate increases by a
factor of four. The software then reconstructs the original image.

Serial readout register
Imaging
area
Sense node
and amplifier
24

Fig.II.6: A large array divided into four subarrays.

II.2.3 Frame transfer
A frame transfer (FT) imager consists of two almost identical arrays, one devoted to image
pixels and one for storage (Fig.II.7). The storage cells are identical in structure to the light
sensitive cells but are covered with a metal light shield to prevent any light exposure. After
the integration cycle, charge is transferred quickly from the light-sensitive pixels to the
storage cells. Transfer time to the shielded area depends on the array size but is typically less
than 500 µs. Smear is limited to the time it takes to transfer the image to the storage area. This
is considerably shorter than that required by a full-frame device.

Readout Readout

Sense node
and
amplifier
Sense node
and
amplifier

Subarray Subarray
Subarray Subarray
Sense node
and
amplifier

Sense node
and
amplifier

Readout Readout
25

Fig.II.7: Basic architecture for a frame transfer CCD.

II.3 Readout time requirement for the vertex detector at the Future International
Linear Collider (ILC)
The only fully pixel vertex detector which operated at colliders in the past was the CCD-
based SLD (Stanford Linear Collider) vertex detector [28]. However, the readout time of a
CCD is too slow to satisfy the ILC requirements. A solution that allows shortening of the
readout time of a classical CCD by orders of magnitude is being developed by the LCFI
collaboration [29]. The principle of a Column Parallel CCD (CPCCD) is explained in Fig.II.8
and is, in essence, the readout of vectors in parallel instead of readout of a matrix serially. A
continuous readout with a 50MHz clock is needed to achieve the required 20 kHz/frame rate.
The essential feature of this approach is that charge moves fast and simultaneously in all
columns, so the clock always needs to drive the substantial capacitance of the sensor. This
amounts to a distribution of a 20 A clock at 50 MHz, which is the main challenge of this
approach.
Another type of a CCD-based device is In-Situ Storage Image Sensor (ISIS) [30], illustrated
in Fig.II.9. In ISIS, each pixel has an internal memory implemented as a small CCD register.
The charge is collected under a photogate and is transferred to a 20-pixel storage CCD inside
the same pixel. A p-well or deep p+ implant protects the CCD register from the unwanted
collection of the charge. The raw charge stored in the n+ buried channel of the CCD is kept
untouched during collisions and is read out only during the 200 ms quiet long period after the
collisions [6].
Serial readout register
Image array
Sense node
and amplifier
Shielded storage
array
26

Fig.II.8: Comparison of conventional and Column Parallel CCDs


Fig.II.9: Operation principle of ISIS.

II.4 Metal-Oxide-Semiconductor capacitor theory
The fundamental building block of the CCD is the Metal-Oxide-Semiconductor (MOS)
capacitor. This element is the backbone behind charge collection and charge transfer functions
of the CCD. The surface-channel CCD based on a p-MOS capacitor is rarely employed today.
N/f
out
27
The buried-channel CCD based on the n-p MOS capacitor is almost universally fabricated.
We will study these two types of MOS capacitors and discover differences between them.

II.4.1 P-MOS capacitor
A p-MOS capacitor consists of p-type (e.g., boron-doped) silicon substrate, a gate dielectric,
(e.g., thermally grown silicon dioxide approximately 1000 Å thick) and a conductive gate that
is deposited (usually doped polysilicon). The different bias modes of an MOS capacitor are:
accumulation mode when the gate voltage is below the flatband voltage, V
FB
. Depletion mode
when the gate voltage is between the flatband voltage and the threshold voltage, V
T
. Finally,
the inversion mode when the gate voltage is larger than the threshold voltage. The CCD is
operated in the depletion mode. This mode of operation is shown in Fig.II.10 where potential
(V) is plotted as a function of distance into the silicon. In surface-channel CCD (based on p-
MOS capacitor), in which charge is stored and transferred along the surface of the
semiconductor, the signal charge trapped at the Si-SiO
2
interface is a major problem, severely
limiting CTE (Charge Transfer Efficiency) performance.


Fig.II.10: The MOS structure showing the surface-channel potential well.

When a positive bias is applied to the gate, holes are driven away from the surface, leaving
behind uncompensated negatively charged acceptor (boron) atoms. This region is called a
depletion region since the region is depleted of mobile carriers, in this case holes. The number
of holes driven away equals the number of positive charges on the gate electrode, i.e.,
d A i
x qN Q = (II.1)
28
where Q
i
is ionized acceptor charge concentration beneath a depleted MOS gate (C/cm
2
), x
d
is
the depletion region depth (cm) and N
A
is the acceptor doping concentration (atoms/cm
3
).
The depletion region is nonconductive and acts as an insulator with a capacitance of
d
SI
DEP
x
C
ε
= (II.2)
where C
DEP
is the depletion capacitance per unit area (F/cm
2
), and ε
SI
is the permittivity of
silicon (1.04×10
-12
). The net gate capacitance C
T
relative to substrate is, in the depletion state,
the series combination of the oxide capacitance, C
OX
, and depletion capacitance, C
DEP
; i.e.,
1
1 1

|
|
¹
|

\
|
+ =
DEP OX
T
C C
C (II.3)
where C
OX
is the oxide capacitance (F/cm
2
) and given by
d
C
OX
OX
ε
= (II.4)
where ε
OX
is the permittivity of SiO
2
(3.45×10
-13
) and d is the thickness of the gate insulator
(cm). Electrons are collected at the Si-SiO
2
interface when a positive gate voltage is applied.
For charge neutrality to exist it is required that the charge on the gate be equal to the sum of
signal charge collected in the potential well and the net acceptor charge N
A
. For a fixed gate
potential, the number of charged acceptor atoms decrease as free electrons are collected. The
depletion region also becomes smaller:
A
Q SI
OX
SI
OX
SI
d
qN
V
C C
x
2
2
ε
ε ε
+
|
|
¹
|

\
|
+ − = (II.5)
where V
Q
is the effective voltage drop at the gate induced by the charge collected in the
potential well (V), a quantity defined by
OX
G Q
C
qQ
V V − = (II.6)
where Q is the signal charge collected at the Si-SiO
2
interface (e
-
/cm
2
). (II.5) is obtained by
solving Poisson’s differential equation and using (II.4).
Charge capacity of a MOS capacitor is defined as the amount of charge required to bring the
surface potential to 0 V (i.e., V
S
=0 V, Q
i
=0, x
d
=0). This means that the substrate and gate
potentials are fixed and the electrons at the Si-SiO
2
interface are shared between the oxide and
depletion capacitances (i.e., parallel capacitors in respect to the signal). Therefore, a change in
surface potential of V
S
due to Q is
29
DEP OX
S
C C
Q
V
+
− = ∆ (II.7)
The oxide capacitance C
OX
remains fixed, whereas C
DEP
increases with Q as electrons are
collected at the surface. However, C
OX
usually is much larger than C
DEP
, yielding
S OX
V C Q ∆ ≈ (II.8)

II.4.2 N-P MOS capacitor
To avoid the surface-state problem found in surface-channel CCD (based on p-MOS
capacitor), the buried-channel CCD (based on n-p MOS capacitor) was invented. In a buried-
channel CCD, charge packets are confined to a channel (i.e., a potential well) that lies beneath
the surface. In contrast to surface-channel operation, CTE performance for buried-channel
CCDs is remarkably high. Therefore, scientific CCDs are totally based on buried-channel
technology. Figure II.11 presents a cross-sectional view of a buried-channel potential well
showing a thin doped n-region that forms the buried-channel. In comparison to a surface-
channel structure (Fig.II.10), the n-layer reshapes the potential well to form a potential
maximum (V
MAX
) below the Si-SiO
2
interface and above the n-p junction. The collecting well
is at a higher potential than the barrier well and is where electrons would be collected in a
pixel.


Fig.II.11: A buried-channel potential well.

The n-buried channel must be completely depleted of majority carriers (electrons) to
distinguish them from signal electrons when generated. This condition is assumed to have
already taken place in Fig.II.11 in producing the potential well. The buried-channel shown in
30
Fig.II.11 can be thought as an n-p junction with a gate and insulator at the exterior surface of
the n-side. As in the case of a reverse-biased diode, a depletion region forms around the n-p
junction when biased with a reference voltage (V
REF
). In the n-material (and also in the p-
material) beyond the depletion region, the potential remains constant, since there are no
uncompensated charges present. However, as the surface is approached in the n-material, the
situation becomes analogous to an n-type MOS structure. If the applied voltage is negative
relative to the channel potential, the majority carriers (electrons) will be repelled away from
the surface, thereby creating a surface depletion region of uncompensated donor ions. These
positive lattice charges induced by the gate cause the potential in the n-material to fall
abruptly as the surface is approached.
A very important condition develops when a CCD gate is driven negatively. As the gate
voltage is lowered, the surface potential decreases until it becomes equal to the substrate
potential (i.e., V
S
=V
SUB
). This condition is shown in Fig.II.11 when V 8 − =
G
V . In this bias
state, holes from the channel stop region are attracted and collected at the Si-SiO
2
interface.
This condition is called the ‘inverted state’ because minority carriers (holes) populate the n-
channel. Additional gate voltage will attract more holes, ‘pinning’ and maintaining V
S
=0 V
independent of how negative the gate voltage is.
The analytic formula of the potential distribution in the gate and silicon, shown in Fig.II.12, is
obtained by solving Poisson’s differential equation [31], assuming depletion approximation,
thus
0
2
2
=
dx
V d
, 0 < < − x d (II.9)
SI
D
qN
dx
V d
ε
− =
2
2
, t x < < 0 (II.10)
SI
A
qN
dx
V d
ε
=
2
2
,
p
x t x t + < < (II.11)
where t is the n-channel depth (cm), qN
D
is the charge density of ionized donor (phosphorus)
atoms and x
p
is the depletion width of the p-region (cm).
The boundary conditions for the above differential equations are
FB G
V V d x V − = − = ) ( (II.12)
where V
FB
is the flat-band voltage associated with the fixed charge in the oxide layer (V).
( ) ( )
+ −
= = = 0 0 x
dx
dV
x
dx
dV
SI OX
ε ε (II.13)
31
) 0 ( ) 0 (
+ −
= = = x V x V (II.14)
( ) ( )
+ −
= = = t x
dx
dV
t x
dx
dV
(II.15)
( ) ( )
+ −
= = = t x V t x V (II.16)
0 ) ( = + =
p
x t x V (II.17)


Fig.II.12: An analytic model for the potential in a buried-channel CCD.

The two parameters of the model, after solving the differential equations above, are the
maximum potential V
max
of the channel and its location x
n
.
V
max
is given by
|
|
¹
|

\
|
+ =
D
A
J
N
N
V V 1
max
(II.18)
where V
J
is the junction potential given by
( ) ( ) ( ) ( )
2
4 2
2 / 1
IMP FB G OX OX OX IMP FB G
J
V V V V V V V V V
V
+ − + + − + + −
= (II.19)
where V
IMP
is a voltage associated with the n-layer given as
|
|
¹
|

\
|
+ =
SI OX
D IMP
t d
t qN V
ε ε 2
(II.20)
and V
OX
is the voltage drop across the oxide,
32
2
2
1
2
|
|
¹
|

\
|
+ =
t
d t qN
V
OX
SI
SI
A
OX
ε
ε
ε
(II.21)
x
n
is given by
D
A p
n
N
N x
t x − = (II.22)
II.5 Charge generation
The photoelectric effect is responsible for generating the charge signal when incident photons
interact with the photosensitive volume of the CCD. In Fig.II.13 a
55
Fe X-ray interacting with
a CCD. A 5.9 keV photon generates an electron cloud of approximately 1620 electrons. The
challenge for CCD manufacturers is to let incoming photons to interact.


Fig.II.13: A CCD exposed to X-rays generated by a
55
Fe source in which photons of 5.9 keV generate an
electron cloud of approximately 1620 e
-
.

Quantum efficiency is the performance parameter that tells us how well they have
accomplished this task, and is defined as
I i
QE QE η = (II.23)
where QE
I
is the interacting QE and η
i
is the quantum yield (number of electrons per
interacting photon) [31]. QE determines the fraction of photons incident on a device that is
actually detected. It is a complex function of detector material, detector geometry and photon
energy. For a CCD, QE is usually given as a percentage and is directly related to the number
of photoelectrons that are generated in a pixel for every photon that hits its surface. Let us
note that for photons having energy higher than the electron-hole pair creation energy
threshold (3.65 eV or 340 nm for Si) more than one pair could be produced. To take this
33
effect into account, quoted QEs for Si based detectors at wavelengths shorter than 340 nm are
corrected by a factor of λ(nm)/340, where λ is the photon wavelength. Silicon based front
illuminated CCD device are sensitive to wavelengths up to 1100 nm with QE that can
approach 80% in the 450–800 nm range. However, a classical CCD has virtually no response
below 350 nm and a QE of less than 5% is typically observed at 400 nm (in the blue-visible
range). The loss of sensitivity is due to the atomic structure of silicon, and to the fact that light
must pass through UV opaque front-side gate structures to get into the sensitive area of the
detector (see Fig.II.14 left) [4].
To enhance the sensitivity at short wavelengths (a region where lines from highly charged
ions are common) different techniques have been proposed. One of them is to cover the CCD
surface with a coating containing phosphor which acts as a UV ‘‘down converter’’ to the
visible. This technique improves the CCD sensitivity in the UV to a QE of 10–15%. Another
well known technique, developed since 1994 mainly for spatial observations, is to illuminate
the CCD from the back and create photoelectrons somewhere within the potential well of the
gates. To get the light directly into the sensitive area, the substrate is thinned to less than 20
µm by a chemical process (a.e. immersion in an acid bath). After thinning, silicon oxidizes
and forms a native oxide layer approximately 20 Å in thickness at the surface. A simplified
diagram of a back illuminated CCD structure is presented in Fig.II.14 right. Spurious charges
trapped on this layer could modify the QE because they affect the potential distribution inside
the CCD. This explains the ‘‘quantum efficiency hysteresis’’ (QEH) observed when the CCD
is ‘‘UV flooded’’ or vacuum cycled because both of these processes have a direct action on
the back-surface potential well [8]. Let us note that thinned CCDs are also used to detect low
energy X-rays in the 0.1–10 keV (0.12–12 nm) [4,9] with a QE that can reach 80% in the 0.8–
7 keV region (with the exception of a sharp dip at 1.84 keV (0.67 nm) due to strong
absorption of light close to the K-edge of Si). Above 8 keV, the probability of interaction of
photons with silicon decreases rapidly and the QE falls to almost zero for energy greater than
10 keV.

34

FigII.14: A simplified diagram of a CCD structure. Left: illuminated front and right: thinned illuminated back.

II.6. Charge collection
Charge collection is the ability of the CCD to accurately reproduce an image from the
electrons generated. Three parameters are included to describe this process: (1) the area or
number of pixels contained on the chip, (2) the number of signal electrons that a pixel can
hold (i.e., charge capacity of a pixel), and (3) the ability of the “target pixel” to efficiently
collect electrons when they are generated. The last parameter is the most critical because it
defines the spatial resolution performance of the CCD. Spatial resolution is primarily
associated with pixel size and charge diffusion characteristics.
For most scientific applications, the number of pixels making up an array should be as large
as possible. From the manufacturer’s standpoint, pixel count is ultimately limited by the
production yield. Not every chip fabricated works, and the bigger the chip, the lower the yield
and the higher the cost. Very large CCDs also present many difficulties for the user, primarily
in data storage. For example, a 10,000×10,000 sensor would produce 200 million bytes of
information per image, assuming 16-bit encoding. More important, however, is that
processing time rises exponentially with pixel count. So, to use large CCDs effectively, very
fast and expensive computer systems are required.
Also, from the camera designer’s standpoint, the problem with large arrays is the amount of
time required to read millions of pixels. Even if this read time were acceptable, long readouts
degrade data because of cosmic-ray artifacts and thermally generated dark current that
accumulate during the read process. To shorten readout time, large CCDs usually employ
several amplifiers working in parallel [11, 12, 14]. A technique used to beat the yield problem
and obtain ultralarge CCD focal planes is to mosaic them. As an example, three CCDs in
mosaic structure are shown in Fig.II.15.

35

Fig.II.15: Photograph of a three socket, etched silicon substrate with one CCD in place [32].

The well capacity is a measure of how many electrons a pixel can hold, usually 50,000 to
1,000,000. The greater the full-well capacity, the greater a CCD’s dynamic range and signal-
to-noise. Dynamic range is the ratio between the brightest and the faintest objects that can
simultaneously discriminated.

II.7. Charge transfer
Charge transfer efficiency (CTE) is a measure of the ability of the device to transfer charge
from one potential well to the next. CTE is specified in terms of charge transfer inefficiency
(CTI). CTI is the fraction of charge left behind in a single pixel transfer and is defined as
( ) CTE CTI − = 1 (II.24)
Theoretically, the amount of charge that is lost for an N-stage register, using Poisson’s
approximation, is [33]
( )
( ) CTI N
n
CTI N S
S
P
n
P i
n N
P
− =
+
exp
!
(II.25)
where N
P
is the number of pixel transfers (pixels), n is the trailing pixel number that follows
the target pixel (i.e., n=0 is the target pixel itself, n=1 is the first trailer, etc.), S
i
is the initial
charge contained in the target pixel (e
-
). Hence S
NP+n
is the charge contained in the N
P
+n
trailing pixel (e
-
).
Figures II.16 and II.17 are plots of (II.25) as a function of pixel number assuming an initial
charge packet S
i
=10000 e
-
for CTE=0.995 and 0.9999 respectively.

36

Fig.II.16: The charge transferred from the target pixel and the two firsts trailers to the 2000
th
pixel assuming
CTE=0.995.


Fig.II.17: Charge transferred from the target pixel and the two firsts trailers to the 2000
th
pixel assuming
CTE=0.9999
.
Ideally, three mechanisms are responsible for charge transfer: thermal diffusion, self-induced
drift and fringing field effect. The relative importance of each of these is primarily dependent
on the charge packet size. Both thermal diffusion and fringing fields are important in
transferring small packets, whereas self-induced drift, caused by mutual electrostatic
repulsion of the carriers within a packet, dominates charge transfer for large packets.


Ta
37
II.7.1 Self-induced drift
As its name suggests, self-induced drift is associated with the fields due to the point-to-point
variation of the electric charge during transfer [33]. This mechanism is important only when
the carrier concentrations are high, that is, during the initial period of the charge transfer. An
analysis of this mechanism has led to an approximate expression for the fraction of charge
remaining in the buried-channel storage well after the transfer time t:
1
1 ) (

|
|
¹
|

\
|
+ =
SI
t
t
τ
ε (II.26)
where
0
2
2
qN
C L
n
eff
SI
πu
τ = (II.27)
In the analysis above, N
0
represents the number of electrons initially in the storage well per
unit area, L the gate length, µ
n
the average electron mobility in the channel, and C
eff
the
effective storage capacitance per unit area. For buried-channel devices, the effective storage
capacitance is just [34]
1
2

|
|
¹
|

\
|
− + =
SI
D
SI
ch
OX
OX
eff
N N d d
C
ε ε ε
(II.28)
where d
ch
is the depth of the buried channel and N is the number of electrons in the channel
per unit area. Since self-induced drift is most important during the initial portion of the charge
transfer, N is assumed in (2.28) to be equal to N
0
, the initial amount of charge (per unit area)
in the well.

II.7.2 Fringing field drift
Fringing field drift arises from the potential difference existing between adjacent gate
electrodes. While self-induced drift characterizes the initial portion of the charge transfer, the
fringing field drift generally dominates the later portions of the transfer. An approximate
expression for the fraction of charge remaining in the storage well after the transfer time t due
to fringing field drift is
|
|
¹
|

\
|
− =
ff
t
t
τ
ε exp ) ( (II.29)
where
ff n
ff
E
L
u
τ ≤ (II.30)
38
The fringing field E
ff
represents the minimum field between electrodes and has the
approximate value
eff
SI
ff
C L
V
E
2
3
2 πε ∆
= (II.31)
where ∆V is the voltage difference between adjacent electrodes. Because the fringing field
drift is most effective during the latter portion of the charge transfer, the effective gate
capacitance in (II.28), since
D
N N << N, becomes
1 −
|
|
¹
|

\
|
+ =
SI
ch
OX
OX
eff
d d
C
ε ε
(II.32)
.
II.7.3 Thermal diffusion
In the absence of self-induced and fringing field drift, the transfer of the free electron charge
occurs by means of thermal diffusion [35]. An expression for the fraction of charge remaining
in the storage well after transfer time t due to thermal diffusion has been found through
Fourier analysis, thus
|
|
¹
|

\
|
− =
th
t
t
τ π
ε exp
8
) (
2
(II.33)
where
n
th
D
L
2
2
4
π
τ = (II.34)
.
II.8. Charge measurement
Charge measurement is the last major operation performed by the CCD. This process is
accomplished by conversion of signal charge to a signal voltage, amplification and signal
processing.

II.8.1 Charge conversion
Charge is converted to a voltage by a floating diode or floating diffusion. This circuit is
sometimes called an electrometer. Figure II.18 illustrates the last two gates of a four-phase
system. The diode, acting as a capacitor, is pre-charged at a reference level. The capacitance,
or sense node, is partially discharged by the amount of charge transferred. The difference in
voltage between the final status of the diode and its pre-charged value is linearly proportional
to the number of electrons, n
e
. The signal voltage after the source follower is
39
C
Gq
n V V V
e OUT RESET SIGNAL
= − = (II.35)
The gain, G, of a source follower amplifier is approximately unity and q is the electronic
charge. The charge conversion is q/C. The output gain conversion (OGC) is Gq/C. It typically
ranges from 0.1 µV/e
-
to 10 µV/e
-
. The signal is then amplified and processed by an electronic
circuit external to the CCD sensor [27].


Fig.II.18: Output structure: sense node (floating diffusion), reset transistor and output preamplifier.

II.8.2 Correlated Double Sampling
After a charge packet is read, the floating diffusion capacitor is reset before the next charge
packet arrives. The uncertainty in the amount of charge remaining on the capacitor following
reset appears as a voltage fluctuation.
Correlated double sampling (CDS) [36, 37] assumes that the same voltage fluctuation is
present on both the video and reset levels. That is, the reset and video signals are correlated in
that they both have the same fluctuation. The CDS circuitry may be integrated into the array
package and this makes processing easier for the end user.
CDS may be performed in the analogue domain by a clamping circuit with a delay-line
processor or by the circuit illustrated in figure II.19. When done in the digital domain, a high-
speed ADC is required that operates much faster than the pixel clock. Limitations of the ADC
may restrict the use of CDS in some applications. The digitized video and reset pulses are
subtracted and then clocked out at the pixel clock rate.
n
+
Floatig
diffusion
Gate
3
Gate
4
Low
voltage
Reset
V
REF
V
B
V
OUT

40

Fig.II.19: Correlated double sampling basic circuitry.

The operation of the circuit is understood by examining the timing signals (Fig.II.20). When
the valid reset pulse is high, the reset switch closes and the signal (reset voltage) is stored on
the capacitor C
R
. When the valid video pulse is high, the valid video switch closes and the
signal (video voltage) is stored on the capacitor C
V
. The reset voltage is subtracted from the
video voltage in a summing amplifier to leave the CDS corrected signal. CDS also reduces
amplifier 1/f noise.


Fig.II.20: Correlated double sampling timing.

II.9 Noise sources
Noise sources have been widely studied in the literature [31, 38-42]. There are two types of
noise sources: on-chip and off-chip. The on-chip noise sources include: dark current, shot
noise, pixel non-uniformity, spurious charge, fat-zero, transfer noise, residual image,
luminescence …etc. The off-chip noise sources include: light leak noise, preamplifier noise,
ADC quantizing noise, clock jitter noise, electromagnetic interference (EMI) …etc.
+
-
C
V
C
R

Valid
video
Reset
Amplifier
output
(a)
Valid Reset

Valid video
(b)
Amplifier output
after CDS
(c)
41
Dark current is intrinsic to semiconductors and naturally occurs through the thermal
generation of minority carriers. Dark current carriers are generated through intermediate-level
centers associated with imperfections or impurities within the semiconductor or at the Si-SiO
2

interface. The efficient solution to eliminate dark current is to cool the sensor. There are three
principal regions that contribute to dark current generation: (1) neutral bulk material below
the potential well and channel stop, (2) depleted material within the potential well and (3) Si-
SiO
2
interface states. These regions are illustrated in Fig.II.21.

Fig.II.21: Regions which contribute in the dark current.

42
Chapter III
Experimental setup and CTI calculation

III.1 Experimental setup
Measurement of charge transfer inefficiency is crucial in evaluating a CCD quality. This
parameter determines the attenuation in the signal charge generated by the incident particles
when transferred from one pixel to another. It is the ratio of the electrons left behind the
signal charge after transfer, due to trapping or other processes, to the initial signal charge
created by one particle hit. Knowing the charge transfer inefficiency and line length (number
of pixels in the vertical register), one can expect if the signal will be transferred to the sense
node of the readout circuit or not. The X-ray technique has become a standard in measuring
charge transfer inefficiency; therefore we used it in this work.
The measurements were carried out in the Particle Physics Laboratory at Oxford University as
part of the ILC linear collider flavour identification (LCFI) project [29]. LCFI group has been
developing CCD for more than a decade.
The measurement set up developed in Oxford with readout electronics and a freezer unit is
shown in Fig.III.1. The temperature range of the freezer is from -40
o
C down to −90
o
C while
the temperature inside the box where the CCD is placed is from about -17
o
C down to about
−60
o
C. The CCD characterized in this work is a T-type column parallel CCD (CPC-T). Fine
control of the CPC-T temperature is done using a CAL9500P controller and a power
controller (the temperature is kept constant within 0.1
o
C). A flux of boiled nitrogen is
introduced into the motherboard box to purge water vapour (Fig.III.2). Nitrogen is put in a
bottle and heated using a resistor (10 Ω) fed with a low DC voltage (2 to 9 V).
The CPC-T chips come in 2 main variants: inherent 4-phase CCD driven as 2-phase CCD,
and ‘pedestal’ 2-phase CCD with 2 additional DC-biased gates. The former was used in this
work. The first and second gates of each pixel, P1A and P1B, are driven by Phase1, and P1A
is offset by the DC voltage OPV (Offset and Pedestal Voltage), as shown in Fig.III.3. This
configuration is used to reduce the amplitude of the clock voltage and hence low power
consumption. The CPC-T has 500×10 pixels with a pixel size of 20×20 µm
2
.
Initial measurements have been performed on an un-irradiated device (Fig.III.4) in standalone
mode, where the signals from four columns of the CCD were amplified and connected to
external 14-bit ADCs. A
55
Fe source (Fig.III.2 and Fig.III.5) emitting 5.9 keV X-rays was
attached to a holder at a distance of 1 cm from the CCD to provide the signal charge.
55
Fe is
43
used as a calibration nuclide for scintillation and semiconductor detectors and proportional
counters; it almost exclusively disintegrates by electron capture decay to the ground state of
the stable nuclide
55
Mn [43]. The occupancy, with the geometry used and activity of the
source, is estimated to be around 1% with uncertainty. This occupancy is mainly defined by
the integration time and distance between X-ray source and CPC-T.


Fig.III.1: Picture of the CPC-T readout. The CPC-T mother board is inside the freezer.



Fig.III.2: Picture of the CPC-T motherboard with different connections to the other modules.
Tektronix function
generator
Agilent pulse
generator
500 MHz
oscilloscope
Labview software
Filtered amplifier
BVM2 module
Temperature
controller
Power and bias
Freezer
Flux of boiled
nitrogen
Plastic box
55
Fe X-ray
source
Flux of boiled
nitrogen
44

Fig.III.3: Clocking scheme for the 4-phase variant. This variant is driven as a two-phase CCD with additional
DC voltage (OPV) to the voltage of the first gate of a pixel.



Fig.III.4: The CPC-T tested in this work. It has 4 columns of 500 pixels each.



Fig.III.5: The
55
Fe X-ray source wherefrom the 5.9keV-photons are generated to hit the CCD.

45
III.1.1 Hardware part
The stand alone setup in Oxford is composed of several devices to deliver proper biasing,
clocking and steering signals to the CCD and also read out the data coming out from 4 CCD
channels. The CCD is cooled by flowing boiled liquid nitrogen into the inner box where the
CCD detector is located. The inner box is located in a freezer for better cooling and insulation
(Fig.III.2). The measurement setup is composed of the following devices:
• A DC power and bias supply which delivers ±5 V and ±12 V for the motherboard and
biasing signals for the CCD. It is connected to a PC via an USB port.
• A Tektronix Function Generator delivering master clock and CCD clock.
• BVM2 module which delivers clock signals for ADCs, trigger signal for Agilent Pulse
Generator which generates reset gate, trigger signal for CCD clock generated by the Tektronix
Function Generator, and several programmable outputs.
• An ICS-554 4-Channel, 14-Bit, 105 MHz PMC ADC Board with Down-Converters and
Xilinx FPGA.
• An Agilent 8111A pulse generator which forms and delivers proper signal for Reset Gate
(RG).
• A CAL9500 temperature controller which monitors the temperature via 4 wires connection
to the PT100 resistor located on the motherboard. The connection with heater and efficient
PID implemented loop keeps the temperature constant on the CCD placed in a cold
environment.
The schematic diagram in Fig.III.6 illustrates the electronics used to drive and read out the
CPC-T. The apparatus is controlled by a LabView program through interface modules. The
BVM2 sequencer receives the master clock of 1 MHz from the function generator to provide
four signals, two for ADC and two to trigger the generators which produces a CCD clock and
reset gate signals. The frequency of the master clocks depends on the readout frequency. The
former should be at least double of the latter.
Two Reset Gate configurations can be used:
• Reset per pixel: in this case Reset Gate is applied at each CCD clock pulse.
• No Reset Gate is applied during reading out pixels (2-Reset configuration).
The 2-resets configuration, when one reset is applied before reading the first pixel of the CCD
and one after reading the last pixel, is used in this measurement. This configuration leads to
low noise since the reset noise is absent. The occupancy is about 1% for the integration time
of 100 ms given the strength of the X-ray source and the experimental layout.

46

Fig.III.6: A schematic diagram of the CPC-T readout.

III.1.1.1 CPC-T motherboard
The CPC-T motherboard is the most important part of the setup (Fig.III.7). It is mainly used
to amplify and filter the signal. The clock voltage received from the function generator is
amplified by a differential amplifier. The latter has two outputs, inverted and non-inverted.
Both are used to generate four phases, two directly applied to the CPC-T inputs P1A and P2A,
and the others are added to the offset pedestal voltage (OPV) and then applied to the CPC-T
inputs P1B and P2B. All DC voltages controlled and generated by the Power and Bias unit are
applied to CPC-T. The on-chip readout circuit, constituted by a reset transistor and source
followers, provides a video signal which is then amplified by an off-chip preamplifier to adapt
the video signal to the filtered output amplifier.

47

Fig.III.7: A schematic diagram of the CPC-T motherboard.

III.1.1.2 Temperature controller
The CPC-T motherboard incorporates a 5Ω heater under the CCD well, implemented as a
meandered copper track on an internal PCB layer. A platinum 100Ω resistor (Pt100) is
soldered on the motherboard for temperature measurement. The controller box uses a
commercial temperature controller (CAL9500P), which has 3-wire connection inputs for
Pt100, analogue output (4..20 mA loop) and a mechanical relay (Fig.III.8). The CAL9500P
uses an RS485 interface for communication with the LabVIEW control software. The
additional electronics (power controller) converts the 4-20 mA CAL9500P output to 0-12
V/2.4 A to be used as an input for the heater (Fig.III.9).


Fig.III.8: Picture of the LCFI Motherboard heater controller.
CPC-T
P1A
P1B
P2A
P2B
CPC-T Bias and Reset Gate
Offset Pedestal Voltage
Clock
Voltage
Differential
Amplifier
OUT+
OUT-
Clock
Driver
Output
Amplifier
Output
Signal
48

Fig.III.9: A schematic diagram of the LCFI Motherboard heater controller.

III.1.1.3 ICS-554 Analog-To-Digital Converter
The ICS-554 is a four-channel 14-bit Analog-to-Digital PMC module with Digital
Downconverters (DDCs) and a Xilinx Field Programmable Gate Array (FPGA) that supports
user programming of custom signal processing functions. The ICS-554B has a one million
gate Xilinx Virtex II (XC2V1000) and the ICS-554C has a 3 million gate Xilinx Virtex II
(XC2V3000) device [44, 45].
The ADCs synchronously sample at frequencies up to 105 MHz. The optional four Graychip
GC4016 quad DDC (tuner) modules allow simultaneous down conversion of up to 16
arbitrary signal bands (e.g., 16 FDM signals). Following the tuners, the Xilinx Virtex-II
FPGA provides a powerful capability for base band processing. It can also be used to directly
process the ADC data when the DDCs are not used. The ICS-554 includes two 512 kB First
Input First Output memories (FIFO) and a fast PCI 2.2 64-bit, 66 MHz Direct Memory
Access (DMA) interface.
In this measurement, the ICS-554 uses an external clock, generated by a BVM2 module, of
which the frequency is the same as that of the master clock (Fig.III.10).
Underneath CPC-T
Temperature
Sensor (Pt100)
Heater
(5 Ω)
Relay
CAL9500P
I
in
V
o
Power Controller
Full scale Adj.
V
o
=12 V, I
in
=20 mA
Zero scale Adj.
V
o
=0 V, I
in
=4 mA

49

Fig.III.10: The ICS-554 module used as an analog to digital converter.

III.1.2 Software part
A software under LabView is developed to control power, bias, timing and data acquisition.
Changing parameters is very easy to find the optimum values or to study their effects.
Temperature is the only slow parameter to change. The software is constituted of the
following tabs:
- A bias tab which controls all CPC-T DC voltages like input gate voltage (IG), output
gate voltage (OG), output drain voltage (OD), offset pedestal voltage (OPV) and reset
drain voltage (RD).
- The sequencer tab: it is used to control the integration time which defines the
occupancy (the longer is the integration time the higher is the occupancy), the CCD
readout frequency which is the main parameter defining the readout speed (when traps
are present, the choice of this parameter is crucial) and the reset gate configuration
(two possible configurations: reset per pixel or only two resets per line).
- Filtered amplifier which controls the amplifier gain, bandwidth and offset. The
bandwidth should be higher than the readout frequency to avoid signal attenuation or
deformation. Offset is set to a value where no ADC saturation is recorded over all
pixels. The gain is to be set at a maximum possible value to increase the signal
dynamic range.
- A data acquisition (DAQ) system which controls the ICS-554 converter and the data
acquisition technique. This includes the sampling frequency (which should be at least
4 times greater than the readout frequency), the number of frames and the CDS
technique.
CH4
CH3
SYNC
TRIGGER
CLOCK
CH2
CH1
50
III.1.2.1 Bias tab
Figure III.11 shows a CPC-T bias tab. All DC voltages that bias the CCD are saved in a data
file. First this file is read to load biasing voltages. Then preferable values of voltages are set.
Most of these are fixed to optimum values. Finally, by clicking on ‘DOWLOAD’ button,
Power and Bias module delivers these voltages to the CCD.


Fig.III.11: CPC-T bias tab. It controls DC-voltages generator.

To understand the role of each voltage, Fig.III.12 illustrates a biased on-chip amplifier. The
main purpose of the on-chip amplifier in a CCD is the conversion of a charge packet into a
voltage or a current. The change in the detection node voltage when a charge packet enters the
node is sensed by the on-chip amplifier. In order to achieve a large bandwidth a two-stage
source follower (SF) amplifier is used. The first stage (First SF) consists of a source follower
and a current sink for biasing purposes. The second stage (Second SF) drives the external
load. The reset field effect transistor (FET), controlled by the reset gate (RG), is connected to
the floating diffusion region. In the off-state it can collect the next charge packet and in the
on-state it resets the detection node to a reference voltage (reset drain: RD). The bias voltage
(common source: CS) determines the bias current of the first stage.
51

Fig.III.12: An on-chip amplifier with a floating diffusion detection node.

III.1.2.2 Sequencer tab
The master clock generated by the function generator is divided by a factor of two and once
more by the clock divider: for example if the master clock is 16 MHz and the clock divider is
8 then the readout frequency is 1 MHz. The timing is read from a data file which contains: the
integration time, the reset configuration, the clock divider and other parameters.


Fig.III.13: A sequencer tab which defines the readout frequency, the reset configuration, the integration time and
other settings.
52
III.1.2.3 Amplifier tab
The user should check three parameters to avoid any saturation or deformation: bandwidth,
gain and offset. Bandwidth is set to a value at least double of the readout frequency. The best
value of the gain is as high as possible but without causing saturation.


Fig.III.14: A filtered amplifier tab which determines the amplifier gain and the offset to apply on the video signal
at the output of the CPC-T preamplifier.

III.1.2.4 DAQ system tab
The data acquisition is performed as follows. First the ADC parameters are set as shown in
Fig.III.15: the ADC clock source (internal or external), the trigger mode (rising or falling
edge) and the buffer length (greater than: number of pixels × samples per period). The ADC
performs conversion only when the ADC gate is open (high level) as shown in the sequencer
tab (Fig.III.13). Only 500 samples (number of pixels) are selected to be saved in the data file.
These samples correspond to the video signal at each pixel. Figure III.16 shows the selection
procedure. Two points (red and green) are chosen in the low level region of one period. The
video signal is the average of these two samples. The three values should be set to obtain an
53
optimum position of samples: the starting point (Ts), the distance between two samples of one
pixel (L2) and the distance to the next pixel (G2).


Fig.III.15: The ICS-554-ADC settings.

Fig.III.16: The selection of samples to be used to determine the video signal of each pixel.
54
The second step is to define the frame length (number of pixels) and the number of frames to
be saved in data file (Fig.III.17). The data file is organized in a format that makes reading and
analysing data easy. Each section in this file contains a header (the number of pixels, the size
of each sample and the number of samples in one pixel) and the acquired data. Before starting
reading data it should be made sure that the data displayed by the Labview software is the
same as that seen on the oscilloscope.


Fig.III.17: Data visualisation, acquisition and saving in a binary file.










55
III.2 Charge Transfer Inefficiency calculation
Many techniques have been used in the literature to analyse the CTI [46, 47]. In this work the
CTI is calculated as follows. The collected data is analysed using a MATLAB code [16]
(Appendix A). First, a correlated double sampling is applied, where the difference between
the signals of two consecutive pixels is taken to be the signal charge collected by the latter
pixel. This reduces some of the noise components (e.g. 1/f, kTC, white noise, etc.) in the CCD
signal. As an example, Figure III.18 shows the pulse-height distribution of ADC codes for 10
adjacent pixels in a column. Three regions are observed: the high peak region which
represents the noise, the region separating the two peaks which represents the charge sharing
between pixels, and the X-ray peak region which represents the fully collected charge in a
single pixel. The X-ray signal is the difference between the two centroids. The charge transfer
inefficiency (CTI) in one pixel is defined as the ratio of signal lost during transfer (captured
by traps) to the initial signal charge.


Fig.III.18: A distribution example of ADC channels of 10 adjacent pixels in a column.

The CTI is calculated following these steps: creation of a histogram with ADC codes of 10
pixels in a column (MPX=10). These pixels have nearly the same baseline. The histogram
creation is repeated 50 times to cover all 500 pixels in a column. The noise and X-ray peaks
are fitted to Gaussian functions of the form.
56
|
|
¹
|

\
|
|
¹
|

\
| −
− =
2
) (
exp ) (
c
b x
a x f (III.1)
where b is the centroid and 2 / c is the standard deviation.
x
0
− nσ and x
0
+ nσ are used as limits for the noise and X-ray peaks (x
0
and σ are the centroid
and the standard deviation respectively of the two Gaussian functions resulting from fitting
the noise and X-ray peaks) to determine the noise and X-ray centroids for each pixel. The
factor n is chosen between 1 and 3 depending on the amount of charge sharing.
The X-ray signal for each pixel is the difference between the X-ray peak and the noise peak
centroids. Figure III.19 shows the distribution of the averages as a function of pixel number.
The distribution is fitted to a first-order polynomial function P0 + P1j, where P0 corresponds
to the charge at the first pixel, P1 is the slope and j is the pixel number. The CTI is determined
using
CT I = −P
1
/P
0
(III.2)


Fig.III.19: Linear fit to average ADC channels. X-ray centroid of each pixel is calculated by averaging ADC
channels within the interval x
0
−nσ and x
0
+nσ where 1≤n≤3.

The CTI calculation is summarized in the flowchart of Fig.III.20. The most important part is
the determination of X-ray signal which is the difference between the noise distribution and
X-ray distribution centroids.
57

Fig.III.20: A flowchart that summarizes the method used to calculate the CTI.
Read data file
Make data in a 3D vector : DATA(i,j,k)
1≤i≤NC ; 1≤j≤NP ; 1≤k≤NF
NC : number of columns
NP : number of pixels
NF : number of frames
Apply CDS
i=1
i≤NC ?
no
Analyze data in the range of
pixels: j=Pstart to j=Pend, in
groups of MPX pixels each.
j=Pstart
j≤Pend ?
no
i=i+1
P1=j
P2=j+MPX
j=j+MPX
Make histogram of ADC
channels: j=P1 to P2
Fit noise peak and X-ray peak
with a Gaussian functions
m≤P2 ?
no
m=P1
Calculate X-ray signal of pixel m in column i m=m+1
Calculate CTI in all columns
58
Chapter 4
Charge Transfer Inefficiency results and discussion

IV.1 Introduction
The CTI calculation is based, as mentioned previously, on the X-ray technique [31]. The CCD
is exposed to a soft X-ray source during the integration time. The number of hit pixels per
column (occupancy) is about 1%. The column is then read for a time set by the number of
pixels and the time of reading one pixel. This operation is repeated thousands times to achieve
a high precision statistical calculation.

IV.2 Charge transfer inefficiency measurement
IV.2.1 Low statistics
The video signal is acquired in 1000 frames, each frame contains a video signal from 500
pixels which is the size of one column. The ADC channels are presented in a histogram.
Figure IV.1 shows a histogram example of ADC channels in the case of 1 MHz readout
frequency, -32
o
C operating temperature and 1000 frames.


Fig.IV.1: A distribution example of the ADC channels for 1000 acquired frames.

Three regions are observed: the high peak region which represents the noise, the region
separating the two peaks which represents the charge sharing between pixels, and the X-ray
59
peak region which represents the fully collected charge in a single pixel. The noise and X-ray
peaks are fitted to a Gaussian function to determine the centroids. The X-ray signal is the
difference between the two centroids. In Fig.IV.1, the statistics in X-ray peak region is low.
Therefore, the errors in fitting this peak to a Gaussian function are high. These high errors
result in an imprecise calculation of the charge transfer inefficiency.
X-ray signals, determined from each histogram of a group of 10 pixels, are fitted to a first
order polynomial P
1
+P
2
x. Figure IV.2 shows a linear fit of X-ray signals determined from
histograms in the case of 1 MHz readout frequency, -32
o
C operating temperature and 1000
read frames. The CTI is given by
1
2
P
P
CTI − = (IV.1)
The error in CTI is given by
CTI
P
P
P
P
CTI
|
|
¹
|

\
|

+

= ∆
2
2
1
1
(IV.2)
where P
1
, ∆P
1
, P
2
and ∆P
2
are obtained using the MATLAB code (Appendix A).


Fig.IV.2: Linear fit of the X-ray signals along the column (500 pixels).

Theoretically, it is expected that the X-ray signal at the first pixel will have the highest
amplitude (highest ADC channel). This is because the signal at this pixel is read directly by
the sense node without any transfer. For the other pixels, the more distant from the sense node
60
is the pixel the lower is the X-ray signal. Therefore, the X-ray signal level is inversely
proportional to the pixel number.
The measurement is performed for many operating temperatures to study the effect on the
CTI. Figure IV.3 presents the CTI as a function of the operating temperature in the range -
17
o
C to -55
o
C. The CTI increases with the temperature. This is due probably to two effects:
the effect of the dark current as it increases also exponentially with the temperature and the
effect of the presence of a low density of traps even though the device is not irradiated.


Fig.IV.3: The CTI as a function of the operating temperature for 1000 acquired frames. Error bars are also
shown.

The large errors observed in Fig.IV.3 are due to the low number of frames (low statistics).
Figure IV.4 shows that these errors (presented as relative errors) are more important in the
region between -35
o
C and -25
o
C. This is due, as mentioned above, to the low number of
events recorded in the X-ray peak region. This leads to a bad Gaussian fit of the X-ray peak
and hence a high error in the CTI determination.

61

Fig.IV.4: The CTI relative errors for 1000 acquired frames.

IV.2.2 High statistics
In this case the number of the read frames is increased from 1000 to 10000. Before analysing
the results, it has to be noted that this will enormously increase the acquisition time and file
size. On the other hand, the statistical errors will be extremely reduced. Figure IV.5 shows a
histogram of ADC channels in the case of 1 MHz readout frequency, -32
o
C operating
temperature and 10000 read frames.

Fig.IV.5: Distribution of the ADC channels for 10000 acquired frames.

62
The same regions are observed as in Fig.IV.1. However, the quality of the X-ray peak shape is
improved (High number of events are recorded in the X-ray peak region). Therefore, the X-
ray peak shape is closer to the Gaussian function than in Fig.IV.1 and a low Gaussian-fit
errors are obtained. However the noise-peak fit is not improved in comparison to the previous
case. This is because the noise is present in all pixels which results in high number of events
even with low number of frames contrary to the X-ray peak where the occupancy is too low
and the need of a high number of frames.
Figure IV.6 shows a linear fit of the X-ray signal calculated from the distribution in Fig.IV.5
using the method described in the previous chapter (section III.2). The fit is linear overall the
pixels and as a result gives the true averaged CTI. The linear CTI means that the dark current
and the density of traps are distributed quite homogeneously over the CCD.


Fig.IV.6: Linear fit of the X-ray signals along the column (500 pixels).

Figure IV.7 presents the CTI as a function of the operating temperature in the range between
-55
o
C and -17.5
o
C. The parameters used for each point of temperature are: 1 MHz readout
frequency, OPV=-0.81 V, clock voltage=4 V and 10000 frames (one frame=500 pixels). The
CTI increases almost exponentially with the operating temperature. This will be clarified in a
later section.

63

Fig.IV.7: CTI as a function of operating temperature for 10000-acquired frames.

The relative statistical errors are shown in Fig.IV.8 as a function of the operating temperature.
The errors are below 20% for the temperature above -45
o
C and higher in the rest of the range.
This is due to the low CTI value for the latter case.


Fig.IV.8: CTI-relative errors for 10000-acquired frames.


64
IV.3 Charge Transfer Inefficiency analysis
Figure IV.9 shows a CTI measurement of a CPC-1 taken previously by a member of a
collaborating group at Liverpool University [12]. Uncertainties are reduced mostly by
increasing the number of frames in the present work. In [12], the number of frames was 5000
and because of the inefficiency in sampling this is equivalent to 1000 frames in the present
work. This problem is bypassed in our setup by choosing the position of the sampling points
directly by using the Labview software.


Fig.IV.10: Results obtained at a test stand at Liverpool University [14].

Figure IV.10 shows the CTI values as a function of operating temperature for an un-irradiated
CPC-T for 10000 frames and fitted to an analytical model developed by colleagues in the
same group [11, 14, 47, 48]. The parameters used are: 1 MHz readout frequency, OPV=-0.81
V, clock voltage=4 V. The CTI is calculated using a linear fit to the average ADC channels as
a function of the pixel number like that shown in Fig.IV.6.
For the CCD used in the present work (CPC-T), with 500 pixels per column, a CTI value of
the order of 10
−5
means that only 0.5% of the signal charge is lost, which is acceptable in
normal operation.
The apparent trend of the CTI at high temperatures in the operating range used is probably
due to the contribution of two effects. First, there is the effect of thermal carrier generation
(dark current) which is highly temperature-dependent. The dark current, nonuniform by
nature, can have a large effect on the signal charge transfer operated at high temperatures,
65
long integration times and a large number of pixels in the column [49]. Second, there is the
possibility of the presence of low trap density that could have been created during the long
duration (around two years) of exposure to a soft X-ray source or intrinsic defects.
This significant value of CTI before irradiating the CCD was observed experimentally and
modeled by a simple analytic model by including one trap level [13]. Using the analytic
model of [14], the CTI is expressed as

|
|
¹
|

\
|
− −
|
|
¹
|

\
|

|
|
¹
|

\
|
|
|
¹
|

\
|
+ − −
|
|
¹
|

\
|
− −
×

|
|
¹
|

\
|
|
|
¹
|

\
|
+ − − =
e
w
e
e s
s
e
s
e s s
t
t t
t
t
t
n
N
CTI
τ τ
τ τ
τ
τ
τ
τ τ
exp exp
1 1
exp 1
exp 1
1 1
exp 1 2
(IV.3)

The measured CTI as a function of temperature is fitted to (IV.3) considering two deep traps
as shown in Fig.IV.10. Both are electron traps and located at 0.37 eV and 0.44 eV below the
bottom of the conduction band and both having a trapping cross-section σ
n
=3×10
−15
cm
2
. It is
assumed that there is no interaction between the two traps, so they interact independently with
the signal charge. Therefore, the total CTI is the sum of CTIs resulting from the effect of the
two traps. The fit is in good agreement with the data and shows that the 0.44 eV trap is the
dominant one in this range of temperature as its density (N
t2
= 5.22×10
10
cm
−3
) is much larger
than that of the 0.37 eV trap (N
t1
= 2.63×10
9
cm
−3
).
The accuracy of the CTI calculation can be improved by positioning the
55
Fe source so that it
irradiates uniformly the CCD, carefully choosing the gain so that the ADC is in its maximum
dynamic range and acquiring data in a large number of frames.
66

Fig.IV.9: Fitting of the CTI-T curve by including two electron traps: 0.17 eV and 0.44 eV below the conduction
band.

IV.4 Distribution of X-ray events
The non-uniformity of the X-ray source coverage has an effect on the CTI determination. This
is well understood and reproduces the estimate based on the setup geometry. The source is
placed 1 cm away from the CPC-T. Figure IV.11 shows the non-uniformity of the X-ray
source coverage represented by an extracted and estimated X-ray distributions.

Fig.IV.11: Measured and estimated occupancies.
67
The extracted distribution can be determined in two ways. The first is to divide all the counted
events in the range between the x
0
+σ and x
0
-σ limits by the total number of events. The latter
is equal to the number of frames (10000) times the number of pixels (500) in the column. The
second method is based on this simple formula
1
2
) (
A
A
n f
Measured
= (IV.4)
where n is the pixel number. A
1
and A
2
are extracted from fitting the ADC channels
distribution to a Gaussian functions of the form of (III.1). An example of the parameters
extracted from the ADC channels distribution is presented in Fig.IV.12.
The estimated distribution is determined using the following formula for the given geometry
(for more complicated formulas refer, for example, to [50]):
( )
2
3
2
0
2
2
) (
|
|
¹
|

\
|
− +
|
|
¹
|

\
|
|
|
¹
|

\
|
=
n n
l
h
l
h
n f
p
p
(IV.4)
where f is the distribution of X-rays upon the CPC-T, n is the pixel number, h is the distance
between the source and the CPC-T, l
p
is the length of one pixel and n
0
is the pixel number
corresponding to the vertex position. In order to obtain a good fit, the first 50 and the last 50
pixels are excluded.


Fig.IV.12: The parameters extracted from the distribution of the ADC channels and used to estimate the
occupancy.
68
IV.5 Noise effect
The noise is extracted by fitting the noise peak as shown previously (Fig.IV.5). The noise,
measured in ADC channels, is the standard deviation of the Gaussian function resulting from
the fit. One X-ray photon having energy of 5.9 keV generates around 1620 e
-
. The difference
between X-ray peak centroid and noise centroid (the signal resulting from one photon)
corresponds to 1620 e
-
. Using this calibration, the noise is estimated in electrons.
Figure IV.13 shows the noise in electrons as a function of pixel number for different operating
temperatures. The noise is between 80 and 85 electrons. It has the highest value in the centre
of the column and decreases towards the edges. This shape is probably due to the distribution
of the intrinsic defects and/or those created by X-ray source during two years of
measurement. Noise non-uniformity is the variation of noise from pixel to pixel. For example,
at -50
o
C, the average dark current (noise) is around 82 electrons and the rms variation due to
non-uniformity is about one electron.
As the defect density is proportional to the photon fluence, it is expected that the distribution
in Fig.IV.13 to have approximately the shape of the occupancy presented in Fig.IV.12. The
variation with the operating temperature is too small. This is because of the low density of
traps. The noise, in this case, increases with increasing temperature until it saturates. At the
saturation temperature all traps are ionized. The dark current noise is an indicator of trapping
and thermally generated electrons. The former is dominant in this range of low temperatures.


Fig.IV.13: Noise along the column (in electrons) for different temperatures.

69
IV.6 OFFSET of the pedestal voltage and clock voltage effects
As mentioned in chapter III, the CPC-T is an inherent 4-phase CCD driven as 2-phase CCD.
In this CCD, a two gates in a pixel are driven with phase1 (it is also the case for phase2). But
the first one is offset by a DC voltage which is the OPV voltage. Figure IV.14 shows the CTI
as a function of the OPV voltage for 3 V and 4 V clock voltages. The number of frames read
is 10000, the readout frequency is 1 MHz and the operating temperature is -40
o
C. The
operating window ( V δ ) is defined by the clock voltage. The higher is the clock voltage, the
wider is the operating window. But the power consumption increases by the square when
increasing the clock voltage. The limits of the OPV voltage are the edges of the operating
window. To avoid any shift in the clock voltage, one should choose the OPV voltage to be in
the center of the operating window.


Fig.IV.14: CTI as a function of the OPV voltage for 3 V and 4 V of the clock voltage.


70
Conclusion

Results
The work presented in this dissertation shows one of the common methods used in the
measurement of the charge transfer inefficiency of a charge-coupled device used as a particle
detector device. The X-ray technique is a standard method to measure the CTI. In this
technique, the CCD is exposed to a soft X-ray source (
55
Fe). A long integration time (50 to
100 ms) is required since the occupancy is low (≈1%). The readout period should be too small
in comparison to the integration time.
As the CPC-T studied has 4 channels, 500 pixels each, the CTI is measured for one channel
since they are identical. The setup used is composed of many apparatuses and modules. A
LABVIEW software is used to acquire data via an ADC converter then saved in a binary file.
The latter is analysed using a MATLAB code to determine the CTI.
The CTI is calculated for two number of frames, 1000 and 10000. This allows the study of the
effect of the statistical errors. With 10000 frames, we obtained small statistical errors in
contrary to the case of 1000 frames where the errors are quit high.
With the unirradiated CPC-T studied, the CTI is only a few 10
-5
which is usually found in
unirradiated CCDs used as particle detectors.
An analytic model is used to fit the experimental results obtained in this work. It is found to
be in good agreement when a low density of two electron traps located at 0.37 eV and 0.44 eV
below the conduction band is considered. These traps are present in this CCD, even it is not
irradiated, because of the intrinsic defects and the long period of exposure of this device to
55
Fe source.
The measured noise has a parabolic-like shape which indicates that the trap distribution has
the same shape too. Using a simple analytic model, the measured occupancy is estimated. The
estimated occupancy is in good agreement with the measured one except at the edges of the
CCD.
Finally, the effects of the OPV and clock voltages are studied. It is concluded that for each
clock voltage value there is an operating window where the CTI is low. Beyond this window,
the CTI increases rapidly and the electrons can not reach the sense node. The lower is the
clock voltage the lower is the energy consumption but the narrower is the operating window.
71
Outlook
As a future work, we propose to irradiate the CCD with a strong X-ray source and see what
the effects on the CTI and noise are. The irradiation should be in fraction and over several
steps of irradiation dose. We propose a step of 20 krad. After many irradiations, the life-time
of the CCD can be estimated. The analytic model should be developed to be able to include
more than two traps since it is expected that the more irradiated CCD the more defects are
created.

72
Bibliography

[1] R. W. Smith and J. N. Tatarewicz, “Replacing a Technology: The Large Space Telescope
and CCDs”, IEEE Proc., vol. 73. no. 7, pp. 1221–1235, 1985.
[2] C. J. S. Damerell, “Charge-coupled devices as particle tracking detectors”, Rev. Sci. Instr.,
vol. 69, no. 4, pp. 1549–1573, 1998.
[3] Y. Sugimoto et al., “CCD-based vertex detector for GLC”, Nucl. Instr. And Meth., A549,
pp. 87–92, 2005.
[4] H.P. Garnir and P. H. Lefèbvre, “Quantum efficiency of back-illuminated CCD detectors
in the VUV region (30–200 nm)”, Nucl. Instr. and Meth., B 235, pp. 530–534 2005.
[5] K. D. Stefanov, “CCD-based vertex detector for ILC”, Nucl. Instr. and Meth., A 569, pp.
48–52, 2006.
[6] A. Nomerotski, “Silicon detectors for tracking and vertexing”, Nucl. Instr. and Meth., A
598, pp. 33–40, 2009.
[7] K.D. Stefanov, “CCDvertex detector for the future linear collider”, Nucl. Instr. and Meth.,
A 501, pp. 245–250, 2003.
[8] C.T. Potter et al., “A CCD vertex detector for measuring Higgs boson branching ratios at a
linear collider”, Nucl. Instr. and Meth., A 511, pp. 225–228, 2003.
[9] C. Kim and M. Lenzlinger, “Charge Transfer in Charge-Coupled Devices”, J. Appl. Phys.,
vol. 42, no. 9, pp. 3586–3594, 1971.
[10] G. R. Hopkinson et al., “Comparison of CCD Damage due to 10 and 60 MeV Protons”,
IEEE 2003 NSREC, Monterey, CA, 2003.
[11] A. Sopczak et al., “Simulations of the Temperature Dependence of the Charge Transfer
Inefficiency in a High-Speed CCD”, IEEE Trans. Nucl. Sci., vol. 54, no. 4, pp. 1429–
1434, 2007.
[12] A. Sopczak et al., “Measurements of Charge Transfer Inefficiency in a CCD With High-
Speed Column Parallel Readout”, IEEE Trans. Nucl. Sci., vol. 56, no. 5, pp. 2925–2930,
2009.
[13] K. D. Stefanov, “Radiation Damage Effects in CCD Sensors for Tracking Applications in
High Energy Physics”, Ph.D. dissertation, Saga Univ., Saga, Japan, 2001.
[14] A. Sopczak et al., “Modeling of Charge Transfer Inefficiency in a CCD With High-
Speed Column Parallel Readout”, IEEE Trans. Nucl. Sci., vol. 56, no. 3, pp. 1613–1617,
2009.
73
[15] LABVIEW [Online]. Available: http://www.ni.com/labview
[16] MATLAB [Online]. Available: http://www.mathworks.com
[17] G. F. Knoll, Radiation Detection and Measurement, John Wiley & Sons, 2000.
[18] A. Sharma and J. G. Walker, “Paralyzable and nonparalyzable deadtime analysis in
spatial photon counting”, Rev. Sci. Instr., vol. 63, no. 121, pp. 5784–5793, 1992.
[19] C. Gianluigi, “The effect of hadron irradiation on the electrical properties of particle
detectors made from various silicon materials”, PhD Dissertation, Université Joseph
Fourier, Grenoble 1, 1998.
[20] H. E. Boesch et al., “Hole Transport and trapping in Field Oxides”, IEEE Trans. Nucl.
Sci., vol. 32, no. 6, pp. 3940–3945, 1985.
[21] H. E. Boesch et al., “Hole Transport and Charge Relaxation in Irradiated SiO
2
MOS
Capacitors”, IEEE Trans. Nucl. Sci., vol. 22, no. 6, pp. 2163–2167, 1975.
[22] R. Wunstorf, “Radiation Hardness of Silicon Detectors: Current Status”, IEEE Trans.
Nucl. Sci., vol. 44, no. 3, pp. 806–814, 1997.
[23] W. Shockley and W. T. Read, “Statistics of the recombinations of holes and electrons”,
Phys. Rev., vol. 87, pp. 835–842, 1952.
[24] R. N. Hall, “Electron-hole recombination in germanium”, Phys. Rev., vol. 87, p. 387,
1952.
[25] W. V. Roosbroeck, “Current-Carrier Transport and Photoconductivity in semiconductors
with trapping”, Phys. Rev., vol. 119, no. 2, pp. 636–652, 1960.
[26] V. A. J. VAN LINT, “The Physics of Radiation Damage in Particle Detectors”, Nucl.
Instr. and Meth., A 253, pp. 453–459, 1987.
[27] G. C. Holst and T. S. Lomheim, CMOS/CCD Sensors and Camera Systems, SPIE
PRESS, 2007.
[28] K. Abe et al., “The SLD VXD3 detector and its initial performance”, Nucl. Instr. and
Meth., A 386, pp. 46–51, 1997.
[29] LCFI Collaboration [Online]. Available: http://hepwww.rl.ac.uk/lcfi.
[30] T. G. Etoh et al., “An Image Sensor Which Captures 100 Consecutive Frames at 1 000
000 Frames/s”, IEEE Trans. Electron Dev., vol. 50, no. 1, pp. 144–151, 2003.
[31] J. R. Janesick, Scientific Charge-Coupled Devices, SPIE PRESS, 2001.
[32] S. C. Chapman et al., “Etch Alignment of CCD Mosaic Hybrid”, IEEE Trans.
Components, Packaging, and Manufacturing Technology, part B, vol. 20, no. 2, pp. 133–
140, 1997.
[33] Engeler, “Surface Charge Transport In Silicon”, Appl. Phys., 1970.
74
[34] D. F. Barbe, “Imaging Devices Using the Charge-Coupled Concept”, IEEE Proc., vol.
63, no. 1, pp. 38–67, 1975.
[35] E. K. Banghart et al., “A Model for Charge Transfer in Buried-Channel Charge-Coupled
Devices at Low Temperature”, IEEE Trans. Electron Dev., vol. 38, no. 5, pp. 1162–
1174, 1991.
[36] M. H. WHITE et al., “Characterization of Surface Channel CCD Image Arrays at Low
Light Levels”, IEEE J. Solid-State Circuits, vol. 9, no. 1, pp. 1–13, 1974.
[37] H. M. WEY AND W. GUGGENBUHL, “An Improved Correlated Double Sampling
Circuit for Low Noise Charge-Coupled Devices”, IEEE Trans. Circuits and Systems,
vol. 37, no. 12, pp. 1559–1565, 1990.
[38] P. A. LEVINE, “Low-Noise CCD Signal Recovery”, IEEE Trans. Electron Dev., vol. 32,
no. 8, pp. 1534–1537, 1985.
[39] F. Andoh et al., “The noise Reduction Effect of the Amplified Metal Oxide
Semiconductor Imager”, Jpn. J. Appl. Phys., vol. 34, pp. 3570–3575, 1995.
[40] H. Tian and A. El Gamal, “Analysis of 1/f Noise in Switched MOSFET Circuits”, IEEE
Trans. Circuits and Systems II: Analog and Digital Signal Processing, vol. 48, no. 2, pp.
151–157, 2001.
[41] K. Irie et al., “A model for measurement of noise in CCD digital-video cameras”, Meas.
Sci. Technol., vol. 19, 2008.
[42] L. Chen et al., “Signal-to-noise ratio evaluation of a CCD camera”, Optics & Laser
Technology, vol. 41, pp. 574–579, 2009.
[43] U. Schötzig, “Half-life and X-ray emission probabilities of
55
Fe”, Applied Radiation and
Isotopes, vol. 53, pp. 469–472, 2000.
[44] ICS ltd. [Online]. Available: www.ics-ltd.com.
[45] ICS-554 datasheet, GE FANUC.
[46] I. H. Hopkins et al., “Proton-Induced Charge Transfer Degradation in CCDs for Near-
Room Temperature Applications”, IEEE Trans. Nucl. Sci., vol. 41, no. 6, pp. 1984–
1991, 1994.
[47] A. Sopczak, et al., “Radiation hardness studies in a CCD with high-speed column parallel
readout”, JINST, vol. 3, p. 5007, 2008.
[48] A. Sopczak et al., “Comparison of Measurements of Charge Transfer Inefficiencies of a
High Speed Column Parallel CCD”, IEEE Trans. Nucl. Sci., vol 57, no. 2, pp. 854–859,
2010.
75
[49] A. J. P. Theuwissen, Solid-State Imaging with Charge-Coupled Devices. Norwell, MA:
Kluwer, 1995.
[50] E. Galiano and C. Pagnutti, “An analytical solution for the solid angle subtended by a
circular detector for a symmetrically positioned linear source”, Applied Radiation and
Isotopes, vol. 64, pp. 603–607, 2006.
76
Appendix A
% MATLAB code used to analyse measured data and calculate the CTI, the noise and the occupancy
clear; clc;
filename={'BinaryFile191.dat'};
filenoise={'Filenoise191.dat'};
ifile=1;
iframe=0;
first=0;
idata=0;
maxframes=10001;
aux_data=1;
aux_rawdata=1;
aux_datacol=1;
maximum=0;
minimum=0;
%%% Start : Open and read data file %%%
id=fopen(strcat('C:\',filename{ifile}),'rb');
idnoise=fopen(strcat('C:\',filenoise{ifile}),'wb');
header=fread(id,12,'uint8');
while ~feof(id)
pixels=256*header(7)+header(8);
samples_per_pixel=header(12);
ADCs=header(6);
frame_size = 4*ADCs*samples_per_pixel*pixels;
if iframe~=0
if frame_size~=first
disp('frame is of different size');
end
else
first=frame_size;
disp('reading the first frame, OK');
end
iframe=iframe+1;
frame(1:frame_size)=fread(id,frame_size,'uint8');
if aux_rawdata==1
max_data_size = maxframes*frame_size;
raw_data=zeros(1,max_data_size);
aux_rawdata=0;
end
for i=1:4:frame_size
77
raw_data(idata+1)=256*frame(i)+frame(i+1);
idata=idata+1;
raw_data(idata+1)=256*frame(i+2)+frame(i+3);
idata=idata+1;
end
header=fread(id,12,'uint8');
end
fclose(id);
%%% End : Open and read data file %%%
disp('Number of frames:');
iframe
disp('Number of pixels:');
pixels
Ptot=pixels;
%%%%%%%% Parameters %%%%%%%%%
disp('Analysis from pixel:');
Pstart=50
disp('to pixel:');
Pend=450
MPX=5;
Tinteg=8; %(ms)
Tpixel=1E-3; %(ms)
Factor=1;
Mbin=1;
M=2;
GV=0.6; %% G=1
%GV=4.6; %% G=2
%GV=3.6; %% G=3
%GV=9.36; %% G=4
%GV=1.3; %% G=5
ms=1/sqrt(2);
xraynoise=190;%190;
noisewidth=25;
nsigma=1.5;%1.5;
datatot=zeros(iframe,Ptot,4);
iraw=1;
for k=1:iframe
for j=1:Ptot
for i=1:4
n=raw_data(iraw);
78
iraw=iraw+1;
if j<=Ptot
datatot(k,j,i)=n;
end
if j>1
datatot(k,j-1,i)=datatot(k,j-1,i)-n;
n=datatot(k,j-1,i);
end
end
end
end
clear raw_data;
%%%%%Start analysing all pixels
PP=Pstart;
KK2=1;
KE2=0;
xrayC2=zeros(1,Pend-Pstart+1);
nxrayC2=zeros(1,Pend-Pstart+1);
noiseC2=zeros(1,Pend-Pstart+1);
nnoiseC2=zeros(1,Pend-Pstart+1);
Occupancy2=zeros(1,Pend-Pstart+1);
while PP<=(Pend-MPX)
KE2=KE2+1;
P1=PP;
P2=PP+MPX-1;
PP=PP+MPX;
data=zeros(iframe,P2-P1+1,4);
aux_data=0;
data=datatot(:,P1:P2,:);
maximum2=max(max(data(:,:,M)));
minimum2=min(min(data(:,:,M)));
pixels=P2-P1+1;
data_col=zeros(iframe*pixels,4);
for i=1:4
idata=0;
for k=1:iframe
for j=1:pixels
idata=idata+1;
data_col(idata,i)=data(k,j,i);
end
79
end
end
%%% Start: Fit distributions %%%
xdataC2=[minimum2:Mbin:maximum2];
ydataC2=(hist(data_col(:,M),xdataC2));
if PP==Pstart+MPX
k=1;
maxy=0;
l1=-150/0.6*GV/Factor;
l2=150/0.6*GV/Factor;
for i=1:length(xdataC2)
if xdataC2(i)>=l1 && xdataC2(i)<=l2
if ydataC2(i)>maxy
maxy=ydataC2(i);
imaxy=i;
end
end
end
ipeak1=imaxy;
limit1nC2=xdataC2(ipeak1)-noisewidth/0.6*GV/Factor; %%%%Noise limit1
limit2nC2=xdataC2(ipeak1)+noisewidth/0.6*GV/Factor; %%%%Noise limit2
else
limit1nC2=fresult2C2.b1-3*fresult2C2.c1;
limit2nC2=fresult2C2.b1+3*fresult2C2.c1;
end
xdata2C2=[limit1nC2:Mbin:limit2nC2];
ydata2C2=(hist(data_col(:,M),xdata2C2));
fresult2C2=fit((xdata2C2(2:length(xdata2C2)-1))',(ydata2C2(2:length(ydata2C2)-1))','gauss1');
limit1xC2=fresult2C2.b1+xraynoise/0.6*GV/Factor-nsigma*fresult2C2.c1; %%%%X-ray limit1
limit2xC2=fresult2C2.b1+xraynoise/0.6*GV/Factor+nsigma*fresult2C2.c1; %%%%X-ray limit2
xdata3C2=[limit1xC2:Mbin:limit2xC2];
ydata3C2=(hist(data_col(:,M),xdata3C2));
fresult3C2=fit((xdata3C2(2:length(xdata3C2)-1))',(ydata3C2(2:length(ydata3C2)-1))','gauss1');
if (PP>(Pend-MPX)) || (PP==(Pstart+Pend)/2) || (PP==(Pstart+MPX))
figure;
semilogy(xdataC2(2:length(xdataC2)-1),abs(ydataC2(2:length(ydataC2)-1)),'k-','LineWidth',1);
hold on;
semilogy(xdata2C2(2:length(xdata2C2)-1),fresult2C2(xdata2C2(2:length(xdata2C2)-1))','r-
','LineWidth',3);
hold on;
80
semilogy(xdata3C2(2:length(xdata3C2)-1),fresult3C2(xdata3C2(2:length(xdata3C2)-1))','b-
','LineWidth',3);
axis([fresult2C2.b1-3*fresult2C2.c1 fresult3C2.b1+3*fresult3C2.c1 1 2*fresult2C2.a1]);
grid on;
xlabel('ADC codes');
ylabel('Counts');
legend('Distribution of ADC codes','Fit noise','Fit X-ray');
end
limit1noise(2)=fresult2C2.b1-ms*fresult2C2.c1;
limit2noise(2)=fresult2C2.b1+ms*fresult2C2.c1;
limit1xray(2)=fresult3C2.b1-ms*fresult3C2.c1;
limit2xray(2)=fresult3C2.b1+ms*fresult3C2.c1;

for j=P1:P2
xrayC2(KK2)=0;
nxrayC2(KK2)=0;
noiseC2(KK2)=0;
nnoiseC2(KK2)=0;
for k=1:iframe
if ((datatot(k,j,M)>=limit1xray(2))&&(datatot(k,j,M)<=limit2xray(2)))
xrayC2(KK2)=xrayC2(KK2)+datatot(k,j,M);
nxrayC2(KK2)=nxrayC2(KK2)+1;
end
if ((datatot(k,j,M)>=limit1noise(2))&&(datatot(k,j,M)<=limit2noise(2)))
noiseC2(KK2)=noiseC2(KK2)+datatot(k,j,M);
nnoiseC2(KK2)=nnoiseC2(KK2)+1;
end
end
if nxrayC2(KK2)~=0 && nnoiseC2(KK2)~=0
fwrite(idnoise,noiseC2(KK2)/nnoiseC2(KK2),'real*4');
fwrite(idnoise,fresult2C2.c1,'real*4');
fwrite(idnoise,xrayC2(KK2)/nxrayC2(KK2),'real*4');
fwrite(idnoise,fresult3C2.c1,'real*4');
Occupancy2(KK2)=fresult3C2(fresult3C2.b1)/fresult2C2(fresult2C2.b1);
XrayADC2(KK2)=xrayC2(KK2)/nxrayC2(KK2)-noiseC2(KK2)/nnoiseC2(KK2);
xray_peak=XrayADC2(KK2);
XpixelC2(KK2)=j;
pixel_number=j;
KK2=KK2+1;
xray_peak
81
pixel_number
end
end
end
%%% Start: CTI determination %%%
figure;
LLC2=length(XrayADC2);
plot(XpixelC2,XrayADC2,'b-','LineWidth',0.5);
fresult4C2=fit(XpixelC2',XrayADC2','poly1');
hold on;
plot(XpixelC2,fresult4C2(XpixelC2),'r-','LineWidth',3);
grid on;
axis([Pstart Pend fresult3C2.b1-fresult3C2.c1 fresult3C2.b1+fresult3C2.c1]);
xlabel('Pixel number (COL 2)');
ylabel('X-ray peak');
legend('X-ray peak','Linear fit');
CTI2=-fresult4C2.p1/fresult4C2.p2
errorsC2=confint(fresult4C2);
dp1C2=(errorsC2(2,1)-errorsC2(1,1))/2;
dp2C2=(errorsC2(2,2)-errorsC2(1,2))/2;
dCTIC2=abs(CTI2)*(dp1C2/abs(fresult4C2.p1)+dp2C2/abs(fresult4C2.p2))
Publications related to this work

A. Sopczak et al., “Measurements of Charge Transfer Inefficiency in a CCD With High-
Speed Column Parallel Readout”, IEEE Trans. Nucl. Sci., vol. 56, no. 5, pp. 2925–2930,
2009.
A. Sopczak et al., “Comparison of Measurements of Charge Transfer Inefficiencies of a High
Speed Column Parallel CCD”, IEEE Trans. Nucl. Sci., vol 57, no. 2, pp. 854–859, 2010.

ﺹﺨﻠﻤ
لﻤﻌﺘﺴﺘ ﺸﻝﺍ لﻘﻨ ﺔﻴﻝﺎﻌﻓ ﻡﺩﻋ ﺱﺎﻴﻘﻝ ﺔﻴﻨﻴﺴﻝﺍ ﺔﻌﺸﻷﺍ ﺔﻴﻨﻘﺘ ﺔﻨﺤ ) CTI ( ﺏﻜﺭﻤﻝ ـﻝﺍ CCD . ﻭﻫ ﻊﺒﻨﻤﻝﺍ
55
Fe ﻭﻫ ﺏﻜﺭﻤﻝﺍ ﻭ
ﻉﻭﻨ ﻥﻤ CPC-T ) T-type CPCCD ( ﺎﻬﻨﻤ لﻜ ﻲﻓ ﺓﺩﻤﻋﺃ ﻊﺒﺭﺃ ﻱﻭﺤﻴ ﻭ 500 لﺴﻜﺒ . ـﻝﺍ CTI ﺩﻭﻤﻋ لﺠﺃ ﻥﻤ ﺕﺴﻴﻗ
ﺔﻬﺒﺎﺸﺘﻤ ﺓﺩﻤﻋﻷﺍ لﻜ ﻥﻷ ﺩﺤﺍﻭ . لﻤﻌﺘﺴﺍ LABVIEW ﻲﻠﺜﺎﻤﺘ لﻭﺤﻤ ﻕﻴﺭﻁ ﻥﻋ ﺕﺎﻴﻁﻌﻤﻝﺍ ﺏﺴﻜﺒ ﻡﻭﻘﻴ ﺞﻤﺎﻨﺭﺒ ﺯﺎﺠﻨﻹ
ﻲﻤﻗﺭ ) ADC ( ﻲﻓ ﺔﻁﺴﺍﻭﺒ ﺞﻤﺎﻨﺭﺒ ﺯﺠﻨﺃ ﻥﻴﺤ MATLAB ـﻝﺍ ﺝﺍﺭﺨﺘﺴﺍ ﻭ ﺔﺴﺎﻘﻤﻝﺍ ﺕﺎﻴﻁﻤﻝﺍ لﻴﻠﺤﺘ لﺠﺃ ﻥﻤ CTI .
ـﻝﺍ CTI لﺠﺃ ﻥﻤ ﺕﺒﺴﺤ 1000 ﻭ 10000 ﻊﻁﻘﻤ ) Frame .( ﺔﻴﺌﺎﺼﺤﻹﺍ ﺀﺎﻁﺨﻷﺍ ﺭﻴﺜﺄﺘ ﺔﺴﺍﺭﺩﺒ ﺍﺫﻫ ﺢﻤﺴ . ﺭﻐﺼﺃ
ﺔﻝﺎﺤ ﻲﻓ ﺕﻨﺎﻜ ﺔﻴﺌﺎﺼﺤﻹﺍ ﺀﺎﻁﺨﻷﺍ 10000 ﻊﻁﻘﻤ . ـﻝ ﺔﺒﺴﻨﻝﺎﺒ CPC-T ﺎﻌﺸﻹﺍ ﺭﻴﺜﺄﺘ ﺕﺤﺘ ﺎﻬﻌﻀﻭ لﺒﻗ ﺕﺎﻋ , ـﻝﺍ ﺕﻨﺎﻜ
CTI ﻲﻝﺍﻭﺤ 10
-5
ﻁﻘﻓ . ﺔﻓﺎﺜﻜ ﺔﻝﺎﺤ ﻲﻓ ﺎﻤﺎﻤﺘ ﺏﺴﺎﻨﻤ ﻪﻨﺃ ﺩﺠﻭ ﻭ ﺔﻴﺒﻴﺭﺠﺘﻝﺍ ﺞﺌﺎﺘﻨﻝﺍ ﺔﺒﺴﺎﻨﻤﻝ ﻲﻠﻴﻠﺤﺘ ﺝﺫﻭﻤﻨ لﻤﻌﺘﺴﺍ
ﺩﻨﻋ ﺔﻌﻗﻭﻤﺘﻤﻝﺍ ﻥﻭﺭﺘﻜﻝﻹﺍ ﺩﺌﺎﺼﻤﻝ ﺔﻀﻔﺨﻨﻤ 0.37 eV ﻭ 0.44 eV لﻗﺎﻨﻝﺍ ﻁﻴﺭﺸﻝﺍ ﺕﺤﺘ . لﻜﺸ ﻭﺫ ﺱﺎﻘﻤﻝﺍ ﺞﻴﺠﻀﻝﺍ
ـﻝ ﺔﺒﺎﺸﻤ Parabolic ﻝﺍ ﻊﻴﺯﻭﺘ ﻥﺃ ﻰﻝﺇ ﺭﺸﺅﻴ ﺎﻤﻤ ﺎﻀﻴﺃ لﻜﺸﻝﺍ ﺱﻔﻨﺒ ﻭﻫ ﺩﺌﺎﺼﻤ . لﺠﺃ ﻥﻤ ﻁﻴﺴﺒ ﻲﻠﻴﻠﺤﺘ ﺝﺫﻭﻤﻨ لﻤﻌﺘﺴﺍ
ﻑﺍﻭﺤ ﺩﻨﻋ ﺀﺎﻨﺜﺘﺴﺎﺒ ﺔﺴﺎﻘﻤﻝﺍ لﻼﺘﺤﻻﺍ ﺔﺒﺴﻨ ﻊﻤ ﻥﺴﺤ ﺏﺴﺎﻨﺘ ﻲﻓ ﻪﻨﺃ ﺩﺠﻭ ﻭ لﻼﺘﺤﻻﺍ ﺔﺒﺴﻨ ﺭﻴﺩﻘﺘ CCD . ﻥﻤ ﻪﻨﺃ ﺩﺠﻭ
لﺠﺃ ﺔﻴﺘﺎﻘﻴﻤﻝﺍ ﺩﻬﺠﻝ ﺔﻤﻴﻗ لﻜ ) Clock voltage ( ـﻝﺍ ﻡﻴﻗ ﺙﻴﺤ لﻴﻐﺸﺘﻠﻝ ﺓﺫﻓﺎﻨ ﺩﺠﻭﺘ CTI ﺔﻀﻔﺨﻨﻤ . ﺍﺫﻫ ﺝﺭﺎﺨ لﺎﺠﻤﻝﺍ
ـﻝﺍ ﺩﻴﺍﺯﺘﺘ CTI ﺱﺴﺤﺘﻝﺍ ﺓﺩﻘﻋ ﻰﻝﺇ لﻭﺼﻭﻝﺍ ﺎﻬﻨﻜﻤﻴ ﻻ ﺕﺎﻨﻭﺭﺘﻜﻝﻻﺍ ﻥﺃ ﺙﻴﺤﺒ ﺓﺭﻴﺒﻜ ﺔﻋﺭﺴﺒ ) Sense node .( ﻥﺎﻜ ﺎﻤﻠﻜ
لﻗﺃ ﺔﻗﺎﻁﻝﺍ ﻙﻼﻬﺘﺴﺍ ﻥﺎﻜ ﺭﻐﺼﺃ ﺔﻴﺘﺎﻘﻴﻤﻝﺍ ﺩﻬﺠ , ﻥﺃ ﻥﻴﺤ ﻲﻓ ﻕﻴﻀﺃ ﻥﻭﻜﺘ لﻴﻐﺸﺘﻝﺍ ﺓﺫﻓﺎﻨ .
Résumé
La technique des rayons X est utilisée pour mesurer la CTI dans un CCD. La source est une
55
Fe et le CCD est un CPC-T (T-type column parallel CCD), qui dispose de 4 canaux, 500
pixels chacun. La CTI est mesurée pour un seul canal, car ils sont identiques. LabVIEW est
utilisé pour acquérir des données via un convertisseur ADC. Un code MATLAB est utilisé
pour analyser les données mesurées et extraire la CTI. La CTI est calculée pour deux nombres
de frames, 1000 et 10000. Cela permet l'étude de l'effet des erreurs statistiques. Les petites
erreurs statistiques sont obtenues avec 10000 images. Pour un CPC-T non irradié, la CTI est
de l’ordre de 10
-5
. Un modèle analytique est utilisé pour ajuster les résultats expérimentaux et
s’est trouvés en bon accord dans le cas d’une faible densité de deux pièges à électrons situé à
0,37 eV et 0,44 eV en dessous de la bande de conduction. Le niveau de bruit mesuré est de
forme parabolique, ce qui indique que la distribution de pièges a la même forme. En utilisant
un modèle analytique simple, le taux d'occupation est estimé et il est en bon accord avec celui
mesuré sauf sur les bords de la CCD. Il a été constaté que, pour chaque valeur de la tension
d'horloge il existe une fenêtre d'exploitation où la CTI est faible. Au-delà de cette fenêtre, la
CTI s’augmente rapidement et les électrons ne peuvent pas atteindre le nœud de sortie. Plus
on abaisse la tension d’horloge, la consommation d'énergie diminue mais la fenêtre
d'exploitation devient plus étroite.

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