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CHAPTER 6 REGISTERS AND COUNTERS Registers A register is a group of flip-flops, each one of which capable of storing one bit

of information. In addition to the flip-flops, a register may have combinational gates that perform certain data processing tasks.

Four-bit register

Register with Parallel Load

Shift Registers A register capable of shifting the binary information held in each cell to its neighboring cell, in a selected direction, is called a shift register.

Four-bit shift register

Serial Transfer

Serial Addition

J Q = xy K Q = xy = ( x + y ) S = x yQ

Second form of serial adder

Universal Shift Register The most general shift register has the following capabilities. 1. A clear control to clear the register to 0. 2. A clock input to synchronize the operations.

3. A shift-right control to enable the shift-right operation and the serial 4. 5. 6.

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input and output lines associated with shift right. A shift-left control to enable the shift-left operation and the serial input and output lines associated with shift left. A parallel-load control to enable a parallel transfer and the n input lines associated with the parallel transfer. n parallel output lines. A control state that leaves the information in the register unchanged in response to the clock.

Four-bit universal shift register

Ripple Counters A register that goes through a prescribed sequence of states upon the application of input pulses is called a counter. Counters are available in two categories: ripple counters and synchronous counters. In a ripple counter, a flip-flop output transition serves as a source for triggering other flip-flops. In other words, the C input of some or all flip-flops are triggered, not by the common clock pulses, but rather by the transition that occurs in other flipflop outputs. In synchronous counter, the C inputs of all flip-flops receive the common clock. Binary ripple counter:

Four-bit binary ripple counter

BCD Ripple Counter:

State diagram of a decimal BCD counter

BCD ripple counter

Block diagram of a three-decade decimal BCD counter

Synchronous Counters Synchronous counters are different from ripple counters in that clock pulses are applied to the inputs of all flip-flops. A common clock triggers all flipflops simultaneously, rather than one at a time in succession as in ripple counter.

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Four-bit synchronous binary counter 11

Four-bit up-down binary counter ( Up control input has priority)

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BCD counter

TQ1 = 1 TQ2 = Q8Q1 TQ4 = Q2 Q1 TQ8 = Q8Q1 + Q4 Q2 Q1 y = Q8Q1 Binary Counter with Parallel Load

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Four-bit binary counter with parallel load

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Two ways to achieve a BCD counter using a counter with parallel load

Other counters Counters can be designed to generate any desired sequence of states. A divide-by-N counter (also known as a modulo-N counter) is a counter that goes through a repeated sequence of N states. The sequence may follow the binary count or may be any other arbitrary sequence. Counters are used to generate timing signals to control the sequence of operations in a digital system. Counters can also be constructed by means of shift registers. Counter with unused states

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The simplified equations are JA = B JB = C J C = B KA = B KB = 1 KC = 1

Counter with unused states

Ring Counter Timing signals that control the sequence of operations in a digital system can be generated by a shift register or by a counter with decoder. A ring counter is a circular shift register with only one flip-flop being set at any particular time; all others are cleared. The single bit shifted from one flipflop to the next to produce the sequence of timing signals.

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Generation of timing signals

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Johnson Counter A k-bit ring counter circulates a single bit among the flip-flops to provide k distinguishable states. The number of states can be doubled if the shift register is connected as a switch-tail ring counter. A switch-tail ring counter is a circular shift register with the complemented output of the last flip-flop connected to the input of the first flip-flop.

Construction of a Johnson counter

One disadvantage of the circuit in figure is that it finds itself in an unused state, it will persist in moving from one invalid state to another and never finds its way to a valid state. One correcting procedure is to change DC = ( A + C ) B . Johnson counters can be constructed for any number of timing sequences. The number of flip-flops needed is one-half the number of timing signals.

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