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M.Tech. – II Semester Regular Examinations, September, 2008 ADVANCED COMPUTER ARCHITECTURE (Common to VLSI System Design/ Electronics & Communications/ Computer Science & Engineering) Time: 3hours Answer any FIVE questions All questions carry equal marks --1.a) b) State Amdahl’s law. Following measurements are observed Frequency of FP operations (other than FPSQR) = 25% Average CPI of FP operations = 4.0 Average CPI of other instructions = 1.33 Frequency of FPSQR = 2% CPI of FPSQR = 20 Assume that the two design alternatives are to decrease CPI of all FPSQR to 2 or to decrease the average CPI of all FP operations to 2.5. Compare these two design alternatives using the CPU performance equation. Write notes on addressing modes for control flow instructions. What are the different competing forces an architect must observe when encoding the instruction set. Give a brief account on Instruction-level parallelism. What is meant by dynamic scheduling? Explain. Write notes on VLIW approach. Clearly bring out the differences between hardware and software speculation mechanism. Which has the lowest miss rate: a 16KB instruction cache with a 16KB data cache or a 32KB unified cache? Clearly bring out the differences between cache and virtual memory. What is multiprocessor cache coherence? Write short notes on Synchronization and multithreading. Contd…2., Max. Marks:60
2.a) b) 3.a) b) 4.a) b) 5.a) b) 6.a) b)
Code No: 54225/MT 7.a) b) 8.a) b)
What is meant by Block Interleaved parity and Distributed BlockInterleaved parity? Write short notes on Transaction-Processing Benchmarks. What are the partial issues to be considered for commercial interconnection network? Write short notes on designing a cluster. $$$