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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

88-444 Analog IC Design

Introduction to PSPICE Circuit Simulation


Kevin Banovic January 23, 2004

06-88-444

ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Overview
1. Introduction To PSPICE 2. Specifying Input Sources 3. Circuit Elements 4. MOSFET Models 5. Adding Variables 6. Analysis Options 7. Probe Application 8. PSPICE Simulation Procedure 9. NAND2 Gate Simulation 10. References

06-88-444

ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Introduction to PSPICE
SPICE stands for Simulation Program for Integrated Circuit Emphasis and is a computer program that accepts a circuit schematic input and outputs the simulated circuit behavior Berkeley SPICE, which is the original SPICE program, was developed at the University of California, Berkeley, and released for public use in 1972 PSPICE, which runs on the PC and Macintosh platforms, is one of the many commercial versions of SPICE and was introduced in 1984

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ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Specifying Input Sources


Independent DC Voltage and DC Current sources have the following standard form (shorthand):
Name node node value

Voltage Source names start with V while Current Source names start with an I
eg. Voltage Source: Vin 3 0 1.2K; eg. Current Source: I4 12 2 15m;

For long-form independent Voltage and Current sources:


Name node node DC value_DC AC value_AC phase eg. Voltage Source: Vin 1 0 DC 1 AC 0.1 90;

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ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Specifying Input Sources


The general form of a pulse waveform is [1]:
PULSE( V1 V2 Td Tr Tf Pw Period )

eg. VSW 10 5 PULSE(-1V -2V 50us 0.1us 0.1us 2us 10us);


06-88-444 ANALOG INTEGRATED CIRCUIT DESIGN WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Specifying Input Sources


The general form of a piecewise-linear waveform is [1]:
PWL( T1 V1 T2 V2 T3 V3 Tn Vn )

eg. VSW 10 5 (0us 5 25us 0 50us 5 75us 0 100us 5 125us 0);


06-88-444 ANALOG INTEGRATED CIRCUIT DESIGN WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Specifying Input Sources


The general form of a sine waveform is [1]:
SIN( Vo Va Freq Td Df Phase )

Degrees

Phase ( time Td ) Df Vo + Va sin 2 Freq ( time Td ) + e 360

Df = Damping Factor

eg. VSIG 10 5 SIN(0 1V 100KHz 1ms 1E4 45);


06-88-444 ANALOG INTEGRATED CIRCUIT DESIGN WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Circuit Elements
The basic RLC circuit elements can be specified by using the appropriate letter as the first letter of the device name [1]:
Format: Rx node node value eg. R12 5 2 15K;

MOSFET transistors are specified using an M as the first letter of the device name
Format: Mx drain gate source body model_name + W=width_value L=length_value eg. M1 4 2 3 3 cmosn W=2u L=1u;

The .MODEL statement is required in addition to MOSFET declaration in order to define the level (MOSFET model) and parameters

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

MOSFET Models
Different MOSFET models have been developed over the years that provide accuracy to specific channel lengths As the channel length decreases, MOSFET devices suffer from short-channel effects that increase the leakage current and noise threshold levels
The device threshold voltage scales along with the technology and causes an exponential increase of leakage current [2]

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ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

MOSFET Models
PSPICE LEVEL 1 Model (? 4m)
Implements the Shichman-Hodges model, which is based on the square law long-channel expressions [3] Best used to verify a manual analysis

PSPICE LEVEL 3 Model (? 1m)


A semi-empirical model (depends on measured device data to define its parameters) [3]

PSPICE LEVEL 7 Model (? 0.13m)


Berkeley Short-Channel IGFET Model (BSIM3V3) Provides an analytically simple model that is based on a number of parameters extracted from experimental data It is accurate as well as simple and is the most popular model

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

MOSFET Models
A MOSFET Model can be declared by the .MODEL statement and using the model name specified earlier [1]
Format: .MODEL model_name NMOS( + LEVEL=level_number parameters ) eg. .MODEL NFET NMOS(LEVEL=3 UO=580);

The parameters specified by each model can be declared by the user or the default values will be used The level 3 model, which is popular for digital design, has 21 ID parameters such as:
PHI (surface potential), TOX (oxide thickness), DELTA (width effect on threshold), KP (process transconductance coefficient), UO (surface mobility), and GAMMA (bulk threshold parameter)

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Adding Variables
Variables can be added using the .PARAM statement A variable must be initialized before it can be used
Format: .PARAM variable_name = variable_value eg. .PARAM W=1 VDD=5 VSS=2.5;

A variable can be used in a statement using curly brackets


Format: {variable_name} eg. Vin 1 0 {VDD};

A variable can be varied using the .STEP statement


Format: .STEP variable_name start end increment eg. .STEP VDD 2.5 5 0.5;

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Analysis Options
There are many different analysis options but the three major types are [1]:
1. DC Analysis (.DC) Determines the DC bias points of a circuit for a sweeping source General Form: .DC source_name start end increment 2. AC Analysis (.AC) Specifies the frequency values used for the frequency response analysis (Types: LINear, OCTave, DECade) General Form: .AC LIN points start stop 3. Transient Analysis (.TRAN) Simulates circuit operation over time for various inputs General Form: .TRAN time_increment final_time

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

Probe
The .PROBE statement is the most commonly used output option which is used to plot the circuit waveforms Waveforms can be displayed in the probe application (invoked with the .PROBE statement) by selecting Trace ? Add Trace and then specifying a trace expression Multiple traces can be viewed on a single plot and multiple plots can be added to the window by selecting Plot ? Add Plot to Window

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ANALOG INTEGRATED CIRCUIT DESIGN

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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

PSPICE Simulation Procedure


The following steps are needed to simulate a circuit from the PSPICE A/D application: 1. Create a new file by selecting File ? New ? Text File 2. Write a title statement on the first line 3. Input the circuit description: power supplies & signal sources, element descriptions and model statements 4. Add any Analysis Requests (eg. .DC, .AC, .TRAN) 5. Add any Output Statements (eg. .PROBE) 6. Write .END on the last line of the file 7. Save the file with a .cir extension 8. Run the simulation by selecting Simulation ? Run
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NAND2 Gate Simulation

Circuit Description:
M1 4 2 3 3 cmosp W={Width*factor} L=1u; M2 4 1 3 3 cmosp W={Width*factor} L=1u; M3 4 1 5 5 cmosn W={Width*factor} L=1u; M4 5 2 0 0 cmosn W={Width*factor} L=1u;

Vin,A 0 0 1 1

Vin,B 0 1 0 1

Vout 1 1 1 0

06-88-444

ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

NAND2 Gate Simulation


NAND2 SIMULATION, NAME, STUDENT NUMBER *PARAMETERS: .PARAM Width=2u factor=1; *SIGNALS: Vdd 3 0 5; VinA 1 0 Pulse( 0 5 25us 0us 0us 75us 125us); VinB 2 0 Pulse( 0 5 50us 0us 0us 100us 125us); *CIRCUIT DESCRIBTION FOR NAND2 GATE: M1 4 2 3 3 cmosp W={Width*factor} L=1u; Transistor nodes: Drain, Gate, Source, Body M2 4 1 3 3 cmosp W={Width*factor} L=1u; M3 4 1 5 5 cmosn W={Width*factor} L=1u; M4 5 2 0 0 cmosn W={Width*factor} L=1u; *MODEL DECLARATION: .MODEL cmosp PMOS LEVEL=7; .MODEL cmosn NMOS LEVEL=7; *ANALYSIS AND OUTPUT OPTIONS: .STEP PARAM factor 1 5 1; .TRAN 0.1us 120us; .PROBE .END
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RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

NAND2 Gate Simulation

06-88-444

ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004

RESEARCH CENTRE FOR INTEGRATED MICROSYSTEMS - UNIVERSITY OF WINDSOR

References
[1] Paul W. Tuinenga, SPICE: A Guide to Circuit Simulation & Analysis Using PSPICE, 1995 Prentice Hall [2] Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Series 2001 [3] www.csee.umbc.edu/~plusquel/vlsiII/slides/mos4.html

06-88-444

ANALOG INTEGRATED CIRCUIT DESIGN

WINTER 2004