A Dissertation

Submitted to the Graduate School of the University of Notre Dame in Partial Fulfillment of the Requirements for the Degree of

Doctor of Philosophy


Rajkumar Sankaralingam, M.S.

Patrick J. Fay, Director

Graduate Program in Electrical Engineering Notre Dame, Indiana October 2005


Abstract by Rajkumar Sankaralingam For long-haul fiber-optic communication systems, the development of efficient high-speed photodiodes and transistors compatible with each other is essential for monolithic integration. This dissertation details the design, fabrication, and characterization of InP-based photodiodes and HEMTs suitable for operating in the low-loss low-dispersion window of the optical fibers used in telecommunication systems. High-speed photodiodes with bandwidths as high 60 GHz and a responsivity of 0.3 A/W have been achieved using a dual-depletion design. To achieve better bandwidth-efficiency products, a novel drift-enhanced dual-absorption design was developed and demonstrated. Diodes fabricated with this design achieved bandwidths of 30 GHz with a responsivity of 0.82 A/W. Numerical and analytical analyses have been performed to understand the bandwidth limitations of these photodiodes to optimize their performance. Ultrafast HEMTs with cutoff frequencies over 200 GHz have been demonstrated using a 0.1 µm T-gate process. Non-linear models suitable for use in circuit simulators were developed to accurately describe the performance of both the photodiodes and the HEMTs. Using these models, a single-ended four-stage transimpedance amplifier has been designed exhibiting a gain of 4.5 kΩ with a 50 GHz bandwidth. A novel differential

Rajkumar Sankaralingam transimpedance amplifier utilizing the unique design of dual-absorption photodiodes was proposed and demonstrated. This design is shown to achieve improved responsivity-bandwidth product compared to conventional designs.

. . . . . . . . . . . . . . . . .3 Experimental results . . . . . . . . . . . .1 Material structure . . . . . . . . . . . . . . . 2. . . . . . . . . . . . . . . . . . . . . . . .2 Device modeling . . . . . .3. . . . . .2. . .2 Experimental setup . . . .3. . . . . . . . . . . . . . .1. 2. . CHAPTER 2: PHOTODETECTORS . . . 4. . and results . . . . . . . . . . . . . . . . . . . . . . . 2. .2 Drift-enhanced PIN photodetectors . . . . . . . . . 2. . . . . . . . . . . . . . . . . . . . . .5 Device simulation . . . . . . . . . . . . . 2. .1 Fabrication and process Flow . .2 Differential design . . . . . TABLES . . . . . fabrication. . . . . . . .4 Device modeling . .1. . . . . . . . .1 Conventional PIN photodetectors . . iv viii ix 1 8 12 15 16 18 19 23 23 28 29 30 32 35 40 47 51 64 72 75 76 84 ACKNOWLEDGMENTS . . . . . . . . . . . . 2. . . .1. . . . . . . . . . . . . . . . . . .1 Fabrication and process flow . . . . . . . .1. . . . . . . . . . . . . . . . .3 Experimental results . . .2 Fabrication and process Flow . . . .1. . . . . . . . . .3 Drift-enhanced dual-absorption PIN photodiodes . . . . . . . . . . .1 Material structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2. . ii . . . . . . . . . . . . 2. . . . . . . . . . . .2. . . 3. . . . . . . . CHAPTER 1: INTRODUCTION . . . . . . . . . . . . .2 Experimental results . . . . . CHAPTER 3: HIGH ELECTRON MOBILITY TRANSISTORS . . .CONTENTS FIGURES . . . . . . . . 2. . . . 4. 3. . . . . . . . . . 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3. . . . . . . . . . . . . . . . . . . . . . . .1 Single-ended design . . . . . . . . . . CHAPTER 4: PHOTORECEIVERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2. . . . . . . . . . . . . . . . . .1 Transimpedance amplifier design 4. . . 2. . . . . . . . . . 2.

. . BIBLIOGRAPHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 91 92 93 iii . . . . . . . . . . . . . . .CHAPTER 5: SUMMARY . . . . . . . . . . . . . . . . . . . . . .2 Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Conclusions . . . . . . . . 5. . . . . . 5. .

. . . . . 47]. . . . .11 Band diagram of transparent anode TA5000. (b) AA7000 with absorption layer thickness of 5000˚ and A ˚ respectively (c) TA5000 with a absorption layer thickness 7000 A of 5000 ˚ and InAlAs transparent anode layer. . . . . . A 2. . . . 2. . . . . . . . . . . . . . . . . . . 2. . . . 2. . . . . . . .2 Optical absorption coefficients for various photodetector materials [43. . .2 1. . 2. . . . . . . . . . . . Schematic cross-section of a PIN photodiode. . . Normalized responsivity curve used to calculate bandwidth. . . . . . InGaAs electron (solid) and hole (dashed) drift velocities as a function of electric field [53]. . . .10 Material structure of drift-enhanced PINs used in this work (a) AA5000. . . . . . . . . . . . . . . . . . . Area dependence of dark current.8 2. . . . . . . .12 Area dependence of dark current in fabricated devices. . . . . . .5 2. .1 2. . . . . . . . . . . . . .7 2. . . . . . . Schematic diagram of stacked layer integration of PIN-HEMT structure. . . . . . . . . . Schematic of drift-enhanced PIN structure. . . . . . . . . . . 4 5 6 11 13 14 16 17 18 19 20 20 2. . . . . . . . . . . . . . . . . . .9 2.15 Normalized responsivity curve of TA5000. . . . . Material structure and band diagram of conventional PIN. . . . .6 2. . . . . . . . . Schematic diagram of shared layer integration of PIN-HBT structure. . . Bandwidth of a conventional PIN diode (junction area 248 µm2 corresponding to 10 µm optical window diameter) as a function of its absorption layer thickness. Experimental setup used to measure the bandwidth and responsivity of photodetectors. . . .4 2. . . . . . . . . . . . . . . . . .13 DC photoresponse of transparent anode PIN (TA5000). . . . . . . .1 1. . . . . . . . . . . . . iv 22 22 24 24 25 26 . . . . . .3 2. . . . . . . .FIGURES 1. .3 2. . . . . . . . . . . . . . Simple equivalent circuit of a PIN photodetector. . .14 Bias dependence of device capacitance for TA5000. . . . . . . .

. .20 Schematic cross-section of a dual-absorption photodiode. . . . . . . . .18 Dual absorption PINIP photodiode structure. . . . . . . .16 Inverse area dependence of bandwidth. . . . . . . . . . . . . . . . . . . . . . . . . . Light shaded area comprises data for In0. . InAs and GaAs as a function of electric field. . . . . . . and Cx is the launch capacitance. . . . . . . . . .24 Frequency response of 6 µm optical diameter devices showing the advantage of drift-layers in improving 3-dB bandwidth. . . . . . . . . 2. . . .26 Measured bandwidth of drift-enhanced devices as a function of inverse area. . . .25 Measured bandwidth of drift-enhanced and control structures as a function of area. . . . . . . . . . . . .28 Measured (dashed) and modeled (solid) s-parameters of TA5000 (10 µm optical diameter device). . . . . . . . dark shaded area refers to GaAs bulk values [7]. . . . . . . . . . . . 27 28 29 30 31 33 34 34 35 36 36 37 38 38 40 43 43 v . . . . . .19 Material structures: (a) Control design (b) Drift enhanced design. 2. . . . Rd is the diode shunt resistance. . . . . . . . . . . . . . . .23 Device capacitance as a function of area. . . drift-enhanced structure exhibits improved bandwidths over control structure. . . . . . . . . . . . . . . .17 Bias dependence of bandwidth in AA7000.30 Schematic diagram showing the initial carrier distribution as result of impulse optical excitation. . . . . . . . .82 A/W. . . . . . . . .32 Simulated transit-time limited impulse response in TA5000. 2. . . . . Ls is the total series inductance (mainly due to pads). . . . . . . . . . . . . . . 2. . . . . . .53 Ga0. . . . . . . . 2. . . . . 2. . . . . . . . 2. . . . . 2. . 2. . . . . 2. . . . . 2. up to 30% for 6 µm optical diameter devices. . . . . 2. . . . . . . Cp is the pad capacitance. . . . . . Rs is the series resistance of the diode (sum of contact resistance and bulk resistance). . . . . . . . . . . . . . .22 DC photoresponse of a typical drift-enhanced device showing responsivity of 0. . . .47 As on InP substrates from different authors.29 Area dependence of modeled and theoretical junction capacitance in TA5000. . . . . . . . . .31 Electron drift velocities of InGaAs. . 2.21 (a) Schematic representation of crystallographic mesa etch profile with respect to wafer flats (b) SEM image of mesa profile along [011] (b) along [011]. . . . 2. Cj is the junction capacitance due to depletion. . . . . . . . . 2. . . . 2. . .2. . . . . . . . . . . . . . . . . . . .27 Lumped element equivalent circuit used to describe photodiodes. . . . . . . . . .

ft and fmax of 0. . . . . . . . . . . . . . . . . . .10 Material structure of modified lattice matched HEMT with reduced layer thicknesses and InP etch stop. . . . . . . . Schematic HEMT layer structure with (a) lattice matched channel (b) composite channel. . 3. . . . . . . . .7 3. . . . . . . . . . . . A peak BWE of 26 GHz is obtained. . . . . . . . . . .3 µm gate length. . . . . . . . . . .17 Measured (symbols) and modeled (solid) Ids vs Vds charactersitics. . . 3. . . . . . . . . . . . . 3. .3 µm gate length lattice matched HEMTs.3 V (low noise bias condition). . .3 V (corresponds to peak ft . 3.1 µm gate length device.5 3. . . . 3. . .9 Schematic cross-section of a typical InP-based HEMT. . . .20 Measured (symbols) and modeled (solid) s-parameters for Vgs =-0.33 Maximum BWE and corresponding total depletion width as a function of absorption layer thickness for drift-enhanced dual-absorption photodiode structure. . . . . . . . . . . . .15 EEHEMT circuit schematic [1]. . .1 µm T-gates. . . . . . .8 3.5 V and Vds =1. . . . a dual-absorption structure without drift layer is optimal (W1 = W ). . . 3. .12 Ids vs Vgs charactersitics of 0. . . . vi .1 µm gate length device. . .6 3. . . . . Ids vs Vgs charactersitics of pseudomorphic HEMT with 0. . . . .2 3. . . . . .1 3. . . .35 µm. . . . . . . 3. . . . . . . . . . . . . . . . . . .13 Ids vs Vds charactersitics of 0. . . .3 µm gate length. . . . as extracted from simulation. .11 SEM image showing end view of 0. . . . . . . . . . . . . . . . . . . . . . . .3 3. . 3. . . .1 µm gate length device. . . . . . . . . . . .3 V. . . . . . . . ft and fmax of 0. . . . . . . . . . . . . SEM image showing end view of T-gates fabricated. . . . . . Ids vs Vds charactersitics of pseudomorphic HEMTs with 0. .4 3. . . . .14 Current gain and Mason’s Unilateral power gain of 0. . . . . . . 45 49 52 53 55 55 Ids vs Vds charactersitics of lattice matched with 0. . .2. . 3. . . For W1 ≥ 1. . 3.19 Measured (symbols) and modeled (solid) s-parameters for Vgs =-0. . .16 Measured (symbols) and modeled (solid) Ids vs Vgs charactersitics. . .3 µm gate length. . .3 µm gate length pseudomorphic HEMTs. . . . . . . . . high gain). . . .18 Measured (symbols) and modeled (solid) s-parameters for Vgs =0 V and Vds =1.3 µm gate length. . . . . . . . . . . . . . . . . 3. . 56 57 58 59 60 61 62 63 63 65 67 67 69 70 71 3. . . .2 V and Vds =1. . Ids vs Vgs charactersitics of lattice matched HEMT with 0.

. . . .9 4. . . . . . . . . . . . . . . . . . . . . . . . Differential transimpedance amplifier using a drift-enhanced dualabsorption photodiode at the input. . Simple feedback transimpedance amplifier. .6 4.2 4. . . . . . . Transimpedance amplifier with four amplifying stages. Vo2 corresponds to a common gate amplifier followed by a common source stage (bottom diode) (b) Vo1 and Vo2 showing a 180◦ broadband phase difference. . . . . . . .4.5 4. . . . . . . .Vo1 corresponds to the common gate stage followed by a source follower (top diode). . . . . . . . . . . . . . . . 90 vii . . . . .10 Eye diagram for the differential transimpedance amplifier for a 40 Gbps PRBS pattern of length (231 − 1). . . . . . . . . . . Output voltage of the differential amplifier corresponding to 1 mW optical power. . . . . . (a) Output voltage magnitude of the transimpedance stages for a 1 mW incident optical power . . . . . . . . .8 4. . . . . . . Transimpedance gain assuming open load. . . . . . . . . . . . Eye diagram of the output waveform for a 40 Gbps RZ PRBS pattern of length (231 − 1). . 73 76 77 80 81 84 87 88 89 4. . Feedback common source amplifier with source follower output. . . . .4 4. . .7 Common receiver topologies: (a) low impedance design (b) high impedance design (c) transimpedance design. . . . . .1 4. . . . . . . . .3 4. . . . . . . . . . . . . . . . each division corresponds to 50 mV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


2.1 2.2 2.3 3.1 3.2 4.1


39 42




I am indebted to Prof. Patrick Fay for his patience and guidance over the last five years. I cannot thank him enough in words. A thesis advisor is lot like a parent for a graduate student’s intellectual and professional development. My advisor, Prof. Fay, did take his role very seriously. This work would not have been possible without the help of Mike Thomas, Mark Richmond, and Keith Darr. I deeply appreciate their dedication and am thankful for their patience in bearing me in spite of all my complaints!. I am grateful to Prof. Snider and Prof. Jena for helping me out with fruitful discussions whenever I ran into problems. I am thankful to them and Prof. Hall for being in my thesis committee. I am thankful to all my friends who endured me, I cherish their friendships and experiences far above any other aspect of my time at Notre Dame. I especially appreciate my parents and wife for their support and love, without whom I wouldn’t have been able to get this far.



A communication system is required to transfer information between two points over a distance. This information transfer is usually achieved by superimposing or modulating the information on to an electromagnetic wave that acts as a carrier for the information signal. In optical communication systems, the electromagnetic carrier is in the optical range of frequencies and the transmission is typically through optical fibers. Since optical carrier frequencies are around 100 THz (near infrared), it yields a far greater potential transmission bandwidth than conventional metallic cable systems. Also, optical fibers exhibit very low transmission loss compared to copper conductors, facilitating extremely wide repeater spacing (long transmission without intermediate electronics) for implemeting communication links, thus reducing system cost and complexity. Together with the modulation bandwidth capability of optical fibers, this has made adoption of fiberoptics a necessity in the majority of long-haul telecommunication applications. In a typical fiber-optic communication system, the intensity of a semiconductor laser is modulated by the input informational signal using an external modulator. This signal is launched onto a fiber for transmission. At the other end, a photodetector converts the optical signal back to the message signal, which is then amplified before further processing.


Such materials are called direct bandgap materials. the generation of carriers is controlled by filled valence band states and available conduction band states separated by incident photon energy under the constraint of conservation of momentum. the conservation of momentum translates to transition of electron from valence band to conduction band with almost the same momentum. As a result. Fundamentally. Silicon and germanium. To facilitate such generation. manifested usually in the form of photocurrent. Absorption in indirect bandgap materials requires the assistance of a phonon (particle associated with lattice vibrations having a small energy and large momentum compared to photons) so that momentum as well as energy are conserved. conduction band minima should lie directly above valence band maxima in momentum space. A photodetector is essentially a solid-state sensor that converts light energy into electrical energy. absorption is weaker in indirect bandgap materials necessitating thicker absorption layers which leads to higher transit times and hence lower bandwidths. Hence.The photodetector is an essential component of any optical fiber communication system and is one of the crucial elements which dictates the overall system performance. improvements in detector characteristics and performance lead to fewer repeaters and lowers both investment and maintenance costs. are used 2 . When considering signal attenuation along the link. the probability of having an interaction take place involving all three particles will be lower than a simple electron-photon interaction in the direct absorption process. the system performance is determined at the detector. Since the indirect absorption process involves a phonon in addition to the electron and photon. in spite of being indirect bandgap materials. Since photons have negligible momentum (infrared).

Also.53 Ga0. Independent of integration scheme.65 µm and is especially useful for telecommunication photodetectors as it includes both the 1.4 to 1. Of these. In addition to favorable wavelength operation.55 µm windows.0 µm. In high bit-rate optical communication systems. thus making it an ideal choice for meeting the demands of monolithically integrated long-haul communication systems.3 and 1. frequency response and noise. In0. both heterojunction bipolar transistors (HBTs) and high electron mobility transistors (HEMTs) have been demonstrated in the InGaAs/InP material system.8 µm. where the optical dispersion and attenuation in standard silica fibers are at their respective minima. the choice of device technology for photoreceiver design is based on performance criteria like sensitivity.47 As lattice matched to InP has a cutoff wavelength of 1. very high speed optical modulators and lasers have been demonstrated in this wavelength region. There are many different types of photodetectors possible with the most appropriate kind of detector being determined by the application. MSM diodes are the least complex but they have limited quantum efficiency for high-speed operation. while germanium detectors are used at longer wavelengths up to 1. waveguide photodiodes (WGPDs) and avalanche photodiodes are most widely used. PIN. For high performance long-haul communication III-V semiconductors are more common. Avalanche photodiodes offer excellent sensitivity 3 .as detector materials for local area network applications. Monolithically integrated receivers offer the advantage of potentially lower cost. An integrated photoreceiver is made up of two key elements: photodetector and electronic amplifier. lower parasitics and higher reliability compared to hybrid receivers. metal-semiconductor-metal (MSM). Silicon detectors are common for wavelengths from 0.

53Ga0. Optical absorption coefficients for various photodetector materials [43. both HBTs and HEMTs have been successfully 4 . such freedom comes at the expense of increased complexity in fiber alignment. When it comes to transistors. Due to packaging simplicity.6 0.Photon energy (eV) 5 4 3 2 1 0.47As GaAs InP 1 103 0.8 0. WGPDs ease this constraint by side-illumination through a waveguide such that the light path and carrier path are perpendicular to each other.2 1.7 1 108 1 107 Si 1 106 (m-1) 1 105 a-Si:H 1 104 Ge In0. 47].36 In0. but they suffer from a trade-off between bandwidth and responsivity.64P0. and sensitivity [5]. due to internal gain but are inherently limited when it comes to high bandwidth. But. Both conventional top-illuminated PIN diodes and WGPDs are actively pursued in OEICs for next generation high-speed communication systems [48].8 1. we pursue top-illuminated PIN photodiodes in this work.4 1.6 1.2 0. noise performance.9 0. [22]. wavelength ( ) for various semiconductors Figure 1.1. PIN diodes have excellent bandwidth with good linearity.4 0.8 Wavelength ( m) Absorption coefficient ( ) vs.7Ga0.3As0.0 1. Conventional PIN diodes are top-illuminated and are easy to align to optical fibers.

for all HEMT based amplifiers. HEMT layers are grown first. [22]. followed by the detector layers as shown in Fig. When it comes to noise performance.integrated with PIN photodetectors [24]. although HBTs in general exhibit a lower 1/f noise than HEMTs. In general. HEMTs exhibit exceptional highfrequency low-noise performance. Both InP HBTs and HEMTs have been demonstrated with very high cutoff frequencies .2. Pseudomorphic HEMTs provide further reduced 1/f and generation-recombination noise. Photodiode p PIN layers i n HEMT n barrier channel buffer semi−insulating substrate HEMT layers Figure 1. and 562 GHz for HEMTs [59].604 GHz for HBTs [21].2. The high frequency noise performance of HEMTs is also enhanced by use of submicron gate lengths and low-resistance T-gate profiles [28]. 1. Schematic diagram of stacked layer integration of PIN-HEMT structure. This is because the performance of the device on top is sometimes degraded due to imperfect insu- 5 . Monolithic integration of PINs and HEMTs is best implemented by a stacked layer structure.

HBT Photodiode p PIN layers i n n emitter p base i collector n sub−collector semi−insulating substrate HBT layers

Figure 1.3. Schematic diagram of shared layer integration of PIN-HBT structure.

lating quality of the layers underneath it. In the case of photodetector this shows as dark current and hence increased shot noise. In the case of HEMTs, this shows as degraded parasitics which significantly affects the power gain cutoff frequency [15]. This can impose a significant penalty while designing wide-band low noise amplifiers. Since the dark current induced shot noise of PINs are expected to be insignificant compared to noise sources in the amplifier, PIN layers are usually stacked on top of HEMT layers. In HBT based designs, this is less critical, but the conventional choice is to grow HBT layers on top of PIN layers. But stacking HBT and PIN layers makes processing difficult due to non planarity of the resulting structure. Hence, HBTs and PINs often share the base and collector regions as shown in Fig. 1.3 (see e.g. [20],[23]). PIN-HEMT photoreceivers offer flexibility in terms of device design, as both transistor and photodetector heterostructures can be optimized independently. Hence, unlike shared layer PIN-HBT photoreceivers, devices can be optimized separately. Therefore, in this work, we focus on PIN-HEMT receivers due to their good cut-off frequencies, low-noise characteristics, as well as the design flexibility and processing simplicity. 6

Though 40 Gbps PIN-HEMT receivers have been reported in literature, most of them use waveguide photodiodes and distributed amplifiers. To make photoreceivers cost efficient, lumped element amplifiers integrated with top-illuminated photodiodes would be more preferable. The goal of this thesis is to demonstrate that 40 Gbps performance can be achieved in such a configuration.



A photodetector is a transducer capable of producing an electrical signal in response to an optical signal. Semiconductor photodetectors rely on the absorption of incident photons with energy greater than the semiconductor bandgap energy to generate electron-hole pairs (EHPs). Photodetection broadly involves three processes: (1) absorption of optical energy and generation of carriers, (2) transportation of these photogenerated carriers away from the absorption region, (3) carrier collection and generation of photocurrent [4]. The performance of a photodetector can be characterized by various figures of merit. These include the responsivity of the detector, its bandwidth, and the noise added to the signal by the detector. Responsivity is a measure of light-to-current conversion efficiency of the detector. Mathematically, the responsivity of a detector, Iph ηq = Pinc hν , is given as



where q is the elementary charge, h is Planck’s constant, ν is the frequency of incident light, Iph is the photocurrent, Pinc is the incident optical power, and η is the external quantum efficiency representing the fraction of incident photons leading to Iph . In reverse biased junction photodiodes where the depletion region (high


The RC time constant is determined by the equivalent circuit parameters of the photodiode. as holes typically have a lower drift velocity than electrons in common photodetector materials. It is possible to have gain in photodetectors (as in avalanche photodetectors) due to impact ionization and avalanche multiplication that can lead to very high responsivities. d is the depletion region thickness and ηi is the internal quantum efficiency defined as the ratio of number of EHPs created to the number of absorbed photons. But these mechanisms are usually accompanied by a penalty in bandwidth and noise performance [14]. Diffusion current becomes important when the photocurrent due to carriers absorbed in the p and n con- 9 . A high detector responsivity improves the signal-to-noise ratio of the receiver system. Carrier transit time is the time taken by photogenerated carriers to travel across the high-field region. The bandwidth of a photodetector is defined as the frequency at which the responsivity of the detector has fallen off by 3-dB from its low frequency value. load impedance. In pure.field region) constitutes the bulk of the absorption region. defect free material. ηi is almost unity. diffusion current and carrier piling at heterointerfaces [6]. α is the absorption coefficient of the intrinsic region. RC time constant. Diode series resistance (due to ohmic contacts and bulk resistances). It is limited mainly by carrier transit time. η can be approximated by η = ηi (1 − R)(1 − e−αd ) (2. and the junction and parasitic capacitances contribute to the RC time constant. It is usually dominated by hole transit time.2) where R is the optical reflectivity between air and the semiconductor.

However.3) where ft is the transit time limited bandwidth and fRC is the RC-limit. ft can be approximated by [26] 3. al [26]. But using a double-heterostructure design can lead to carrier piling at the junctions which again can slow the detector. both the factors need to be optimized carefully. For high-speed detectors. To analyze the performance of the photodetector analytically. this problem can be overcome by superlattice or compositional grading at the heterointerfaces.4) 1 1 1 1 = ( 4 + 4) 4 v 2 ve vh (2.5) Here. diffusion current can be eliminated by using a double-heterostructure design that limits absorption to high-field intrinsic regions. if carrier transit time and the RC time constant are independent of each other and have Gaussian responses. this diffusion component is usually much smaller than the drift current and contributes a slow but small tail to the detector’s impulse response. For InGaAs. According to Kato et. the bandwidth (f3dB ) can be approximately given by (neglecting diffusion and carrier piling) 1 2 f3dB = 1 1 + 2 2 ft fRC (2. typical 10 . ve and vh are electron and hole saturation velocities.5v 2πd ft ≈ where v is defined as (2. In conventional detector designs. For broadband operation.tact regions within about one diffusion length of the edge of the depletion region becomes comparable to the current arising from photogenerated carriers within the depletion region.

reported values are ve = 6. A simple equivalent circuit of a PIN photodiode is given in Fig. 2. In photoreceivers. Rs I(t) Cd Cp RL Figure 2.1. 11 .5 × 106 cm/s and vh = 4. the input impedance of the amplifier following the photodetector is often designed to be lower than 50 Ω to improve the circuit bandwidth.8 × 106 cm/s [26].6) where RL is the load resistance and Cd is the photodiode junction capacitance. If the parasitic capacitance (Cp ) and series resistance (Rs ) are negligible. thicker intrinsic region leads to higher transit time and smaller Cd .1 [6]. Another important characteristic of a photodetector is its noise performance. Simple equivalent circuit of a PIN photodetector. Typically in normally-incident PIN diodes. RL is usually assumed to be 50 Ω because most of the RF instruments used for device characterization are designed to have an input impedance of 50 Ω. Hence we need to tailor the intrinsic layer thickness to optimize bandwidth. then the RC-limited bandwidth can be given by 1 2πRL Cd fRC = (2. For discrete photodetectors.

This leads to a direct increase in absorption volume and a reduction in depletion capacitance. an undoped (intrinsic) layer is introduced between p and n regions (a PIN diode). the dark current is usually quite small. then the input resistance of the amplifier and the amplifier’s noise figure also contribute to the Johnson noise of the overall photoreceiver. Since most photodiodes are operated under reverse bias conditions. which manifests itself as shot noise. So a PIN structure offers both better quantum efficiency as well as potentially improved bandwidth compared to PN junction diodes.1 Conventional PIN photodetectors A simple junction photodiode relies on generation of EHPs in the depletion region between p and n regions. This dark current.Shot noise and Johnson noise (thermal noise) are the two dominant sources of noise in high-speed detectors. Such an intrinsic region is completely depleted at relatively low reverse bias and hence acts as an extended depletion region. Johnson noise is due to the various resistances in diode’s equivalent circuit. 2. the fluctuations are due to the randomness in thermal generation of carriers. the contribution of the amplifier dominates noise performance in a photoreceiver at telecommunication wavelengths. To enhance the generation of EHPs and to reduce junction capacitance. there is also a contribution from the background radiation in the ambient where the detector is placed. Usually. Here. If the diode is followed by an amplifier in a receiver circuit. contributes to the total system noise and gives random fluctuations about the average particle flow of the photocurrent. Diode shunt resistance and series resistance contribute to the Johnson noise. Apart from these noise sources. The intrinsic layer thickness in a PIN diode is a key design parameter that 12 .

Thus there is a tradeoff between bandwidth and responsivity in PIN diodes. For high responsivity.2. bandwidth-efficiency product (BWE) is a convenient metric.2 0.determines the responsivity and bandwidth of the detector. the maximum quantum efficiency is 100% and the maximum BWE that can be obtained is the bandwidth of the diode.4 0. for assessing performance of a photodetector design.8 1 Absorption layer thickness (µm) Figure 2. Bandwidth of a conventional PIN diode (junction area 248 µm2 corresponding to 10 µm optical window diameter) as a function of its absorption layer thickness. 50 40 30 20 10 0 Bandwidth (GHz) 0 0. but increased thickness leads to an increased carrier transit-time and hence can lower the bandwidth. Since there is no inherent optical gain in PIN diodes. 13 . the intrinsic layer thickness should be as large as possible. Hence.6 0.

which corresponds to a maximum A efficiency of 29%. The layer structure used along with its simulated band diagram are given in Fig. 14 . 2. 2. while n-type layers were doped with silicon.5 E-Ef (eV) 0 -0. To achieve bandwidths of 40 GHz with a 10 µm optical window diameter device. The p-type layers were doped with carbon. we need an absorption layer thickness of about 5000 ˚. 2. Material Structure 1 Anode Absorption layer Ec(eV) Ev(eV) Ef(eV) ———————————————500˚ p+ InGaAs (anode) A ———————————————5000˚ i InGaAs (absorption layer) A ———————————————2000˚ n+ InP (cathode) A ———————————————200˚ i InGaAs (etch stop) A ———————————————SI InP (substrate) 0. Material structure and band diagram of conventional PIN.2). the bandwidth of a PIN structure can be determined as a function of its absorption layer thickness (Fig.5 Cathode -1 -1.3. Junction capacitance is calculated for a device with 10 µm optical window diameter corresponding to a junction layout area of 248 µm2 .5 0 1000 2000 3000 4000 5000 6000 7000 8000 Depth (A) Figure 2. The heterostructures used to fabricate PIN photodiodes in this work were grown by metalorganic chemical vapor deposition (MOCVD).3.2 and 2.3 can be used in designing a PIN layer structure.Eqns. Assuming a load resistance of 50 Ω and considering only junction capacitance.

3/30 sccm of SF6 /O2 with a DC bias of 30 V. The electric field due to this bias sweeps the photogenerated carriers across the depletion region. the diode operates under a reverse bias sufficient to deplete the intrinsic region completely.Normally. This was followed by mesa isolation of the n-InP cathode and the InGaAs etch stop. in the anode layer) although the contribution of this effect to the responsivity and bandwidth is small. The p-InGaAs anode and i-InGaAs absorption layer were then etched using a mixture of citric acid and hydrogen peroxide (20:1 citric acid/H2 O2 ) to expose the n-InP layer underneath. Even for moderate reverse bias. e. Fiducial marks were also laid out along with the anode contacts to facilitate alignment of subsequent layers. Technically there is also diffusion of carriers photogenerated outside the i-layer (i. Vias were defined in the BCB by dry etching in RIE using 3. cathode contacts were defined by thermal deposition of 900/150/1200 ˚ of A AuGe/Ni/Au. This governs the transit time of the device which in turn affects the bandwidth. InP was etched using a mixture of phosphoric and hydrochloric acid (3:1 H3 P O4 /HCl). the carriers drift across the i-layer at close to their saturation velocities. These contacts were then annealed for 30 sec in a rapid thermal processor at 290◦ C in a nitrogen ambient. Once the devices were isolated. The bias was optimized to realize sloped 15 .1 Fabrication and process flow Fabrication of the PIN photodetectors evaluated in this thesis involves seven mask layers. 2.1. Benzocyclobutene (BCB) was then spun on the sample to serve as passivating layer and as a low-k dielectric for the overlay pads. Anode contacts were defined by depositing 200/2000 ˚ of Ti/Au A through electron beam deposition on the p+ -InGaAs cap layer.

i.4.1.2 Experimental setup The DC measurements were made using an Agilent 4155C semiconductor parameter analyzer.side walls that lead to good step coverage for evaporated metal films. e. Figure 2. fiber alignment was done by maximizing electrical output. the BCB was etched off in the annular opening in the anode contact to create an optical window through which photoexcitation is provided as shown in Fig. 2. Metal pads were then defined to draw out contacts through the BCB vias to facilitate RF probing. Schematic cross-section of a PIN photodiode. The RF measurement setup used to measure the on-wafer frequency response consists of a distributed feedback (DFB) laser source which 16 ..4. Finally. A fiber probe was used to position an optical fiber on top of the device. The alignment was active. 2.

we can calculate the variation in responsivity with frequency. The measurement setup is almost completely computer controlled by a GPIB driver written in C for this purpose.5. so as to monitor its optical power. The light from the attenuator is then sent through a splitter.55 µm. The signals are then recombined. producing a modulated output which is then fed to a optical attenuator. the incoming optical signal is split equally into two branches and by application of a suitable bias. From the AC voltage impressed across the spectrum analyzer’s input impedance by the photocurrent. Experimental setup used to measure the bandwidth and responsivity of photodetectors. while the other arm goes to the DUT (Device Under Test). This light is modulated by a 50 GHz synthesizer through a Mach-Zehnder modulator. A schematic diagram of the complete responsivity and bandwidth measurement setup is shown 17 .Laser & Controller 50 GHz Synthesizer Data Generator 50 GHz MZ Spectrum Analyzer Optical Attenuator DUT Optical Power Meter Figure 2. emits light at 1. Here. Effects of imperfections in the electrical and optical components are removed using a calibration procedure based on a standard reference detector. the two branches are separated in phase due to the electro-optic effect in lithium niobate. The electrical output generated in the DUT in response to the modulated optical input is detected by a 50 GHz spectrum anlayzer.

2. The bandwidth experimentally observed using the setup described was typically around 20 GHz as shown in Fig.2 × 10−5 µA/µm2 .3 Experimental results The fabricated diodes were observed to have dark currents in the nA range for devices of junction area less than 588 µm2 . The dark currents were also found to scale linearly with junction areas as shown in Fig. The area dependence of the dark currents measured at a reverse bias of 3 V gave a typical dark current density of 1. 24 µm 12E-9 at 3V Dark Current (A) Dark Current (A) 1x10-8 10 µm 10E-9   14 µm 6 µm 8E-9 6E-9 4E-9 2E-9   1x10 -9 1x10-10 0E+0 -5 -4 -3 -2 -1 0 1 0 Bias Voltage (V) (a) 200 400 600 800 1000 1200 Area (µm 2) (b) Figure 2. 2.in Fig. Area dependence of dark current. 2.6. Responsivity was normalized to the 18     1x10-7 14E-9 .

1 1 10 100 Frequency (GHz) Figure 2.low frequency value to show the 3-dB value clearly. 2.8).01 0.7. The drift-enhanced design has two depletion layers an absorption layer. Normalized responsivity curve used to calculate bandwidth. The less-than-optimum performance of these diodes is explained by poor contact resistance which led to high series resistance in these devices. 2. 19 .2 Drift-enhanced PIN photodetectors The drift-enhanced PIN structure (also called a dual-depletion PIN structure) preserves the responsivity of conventional PIN while offering the potential for improved bandwidth [12]. The main advantage of this structure is that it reduces junction capacitance due to an increased depletion layer thickness while only modestly impacting the transit time. and a transparent wide bandgap drift layer (Fig. Normalized Responsivity (dB) 5 0 -5 -10 -15 -20 -25 0.

6 Drift Velocity (x107 cm/s) 1.2 0 0 20 40 60 80 100 Electric Field (kV/cm) Figure 2.9).4 0. InGaAs electron (solid) and hole (dashed) drift velocities as a function of electric field [53].4 1. the drift layer has negligible effect on the overall transit time limited 20 . 2.8. The inclusion of a transparent i-InP drift layer between the i-InGaAs absorption layer and cathode only increases the transit time of electrons.8 1. Schematic of drift-enhanced PIN structure. As a result.6 0.2 1 0.9. the transit time of holes across the InGaAs absorption layer is longer than that of electrons for top-illuminated conventional PIN diodes (Fig.8 0. Due to lower drift velocity. 1.p anode i absorption layer V I drift layer n cathode Figure 2.

provided that the thickness of the drift layer is such that the electron transit time is preserved at a value less than or comparable to the hole transit time. while the other design (TA5000) featured a A transparent p-InAlAs layer in addition to the top p-InGaAs anode. The control design (AA5000) has a conventional (absorbing) anode with a 5000 ˚ thick absorption layer.bandwidth of the photodiode. a portion of the photogenerated carriers in the p-layer recombines before reaching the depletion region without contributing to the total current. the electron and hole transit times would be comparable for a drift layer thickness of around 2500 ˚ when the absorption layer thickness is 5000 ˚. was used. The structure with the InAlAs contact layer is expected to have a better responsivity because the transparent anode layer allows photogeneration to occur only in the high-field absorption layer. Hence making the p-layer transparent enables all of the incoming light to participate in EHP generation and increases responsivity. 2.10. 21 . otherwise identical to the A control design (AA5000). 2. another heterostructure (AA7000) with 7000 ˚ absorption layer thickness.11. Since the responsivity of such a device is the same as a conventional PIN diode due to an identical absorption volume. A A Two drift-enhanced designs with drift layer thickness of 2500 ˚ were evalA uated. the dual-depletion offers an improved BWE compared to a conventional PIN design. Both the heterostructures were grown by MBE. and a calculated band diagram for structure TA5000 is shown in Fig. A schematic diagram of all three heterostructures are given in Fig. To study the effect of absorption layer thickness. Using the same saturation velocities used for InGaAs in conventional PIN photodiodes and assuming a electron drift velocity of 1. If the p and i layers are both narrow bandgap material.5 × 107 cm/s for InP [32].

5 -2 0 0. 22 . A 1.————————————– 300 ˚ p+ InGaAs (anode) A ————————————– 5000 ˚ (AA5000) A i InGaAs (absorption layer) ————————————– 2500 ˚ i InP (drift layer) A ————————————– 100 ˚ n+ InGaAs (etch stop) A ————————————– 3000 ˚ n+ InP (cathode) A ————————————– 200 ˚ i InGaAs (etch stop) A ————————————– SI InP (substrate) (a) ————————————– 300 ˚ p+ InGaAs (anode) A ————————————– 7000 ˚ (AA7000) A i InGaAs (absorption layer) ————————————– 2500 ˚ i InP (drift layer) A ————————————– 100 ˚ n+ InGaAs (etch stop) A ————————————– 3000 ˚ n+ InP (cathode) A ————————————– 200 ˚ i InGaAs (etch stop) A ————————————– SI InP (substrate) (b) ————————————– 300 ˚ p+ InGaAs (anode) A ————————————– A 100 ˚ p+ InAlAs (transparent anode) ————————————– 5000˚ (TA5000) A i InGaAs (absorption layer) ————————————– 2500 ˚ i InP (drift layer) A ————————————– 100 ˚ n+ InGaAs (etch stop) A ————————————– 3000 ˚ n+ InP (cathode) A ————————————– 200 ˚ i InGaAs (etch stop) A ————————————– SI InP (substrate) (c) Figure 2.4 0.10.5 E .E (eV) 0 -0.8 1 InGaAs InP InGaAs InP E E f c f E v 1.6 0.5 -1 -1.5 InAlAs 1 InGaAs 0.2 0. Band diagram of transparent anode TA5000.2 Depth (µm) Figure 2. (b) AA7000 with absorption layer thickness of 5000˚ and 7000 ˚ respectively (c) TA5000 with a absorption layer A A thickness of 5000 ˚ and InAlAs transparent anode layer.11. Material structure of drift-enhanced PINs used in this work (a) AA5000.

2.1 Fabrication and process Flow The fabrication sequence for drift-enhanced PINs is almost identical to that of conventional PIN diodes.2. and AA7000 respectively. we can reduce losses due to reflection and improve the responsivity by almost 30%. Typical responsivities at 1. Due to reflection at the interface between air and InGaAs. 2.84 × 10−7 µA/µm2 . Otherwise. the input optical power is stepped in 3 dB increments and the corresponding currents 23 . making use of the InGaAs etch stop to facilitate n-contact placement.2 Experimental results Typical dark currents were in the nA range for devices with junction areas up to 1136 µm2 for all three heterostructures.3 A/W. The responsivity of the transparent anode structure shows an improvement over the absorbing anode structure as expected. 0.38 A/W for AA5000.2.55 µm were 0. and 0. and AA7000 respectively. The difference in the current densities are mainly due to processing non-uniformities.35 × 10−6 µA/µm2 . The dark current behavior was almost linear with area in all devices.16 × 10−6 µA/µm2 for AA5000. If we use SiNx for AR coating. A typical illuminated measured I-V characteristic of a fabricated photodiode on heterostructure TA5000 is given in Fig.12. and 1.13. as shown in Fig. TA5000. part of the incident optical power is reflected back (assuming normal incidence). TA5000. The only difference was to modify the mesa etch process to include H3 PO4 /HCl etchant to etch the drift layer. For the photoresponse.2. 2. photolithography and other processes were the same as in conventional PINs.27 A/W. Dark current densities assuming linear dependence on junction areas were found to be 1. 4.

5 3 2.12.5 1 200 400 600 800 2 1000 1200 Area (µm ) Figure 2. 24 .5 2 1. DC photoresponse of transparent anode PIN (TA5000).13. Area dependence of dark current in fabricated devices.5 Dark Current (nA) TA5000 AA5000 AA7000 4 3.5 4. 10-3 10-4 Popt= 420 µW Current (A) 10-5 10-6 10-7 10-8 10-9 10 -10 Dark Current Popt stepped in 3dB increments 0 2 4 6 8 10 12 14 16 Bias Voltage (V) Figure 2.

Experimentally determined device capacitances using a CV meter were found to saturate with bias at about 2 V. Equally spaced logarithmic I-V curves in the figure indicate that the electrical output is quite linear with the optical input for over at least two orders of magnitude from 3. The RF experimental setup described earlier (Fig.5) was used to measure the frequency response of these devices. Extrapolation using least-squares fits of a single-pole transfer function to the measured data suggests a 3 dB bandwidth of around 25 . Bias dependence of device capacitance for TA5000. 2.are recorded. 2. 400 350 25 µm 15 µm 10 µm 6 µm Capacitance (fF) 300 250 200 150 100 50 0 0 2 4 6 8 10 Reverse Bias (V) Figure 2.14. Bandwidths greater than 50 GHz were observed for 5000 ˚ devices with optical window diameter ≤ 10µm (corresponds A to junction area 248 µm2 ).3 µW to 420 µW. as shown in Fig.14.

As the junction area decreases.5 -2 -2.15).60 GHz for 6 µm diameter devices on TA5000 and AA5000.01 0. Relative Responsivity (dB) 0.5 0 -0. while the 6 µm diameter AA7000 devices showed a bandwidth of around 52 GHz. 2. Normalized responsivity curve of TA5000.15. 2. the bandwidths reported are estimates obtained by extrapolation (Fig.5 -1 -1. For devices exhibiting bandwidth over 50 GHz.16. Bandwidth decreases with increasing junction area due to the increasing RClimit as shown in Fig. The linear region of inverse area dependence clearly shows that bandwidth of large area devices are limited by junction capacitance. These values correspond to BWEs of 14.2 GHz for TA5000 and 15. bandwidth becomes dominated by the transit time limit and begins to saturate.6 GHz for AA7000. AA7000’s bandwidth dependence on area has 26 .1 1 10 100 Frequency (GHz) Figure 2.5 -3 0.

and the bandwidth is limited by diode capacitance.16.17). Carrier transit-time-limited bandwidth decreases as bias is increased partly due to a decrease in drift velocity with electric field (Fig. Inverse area dependence of bandwidth.9) and partly because of an increased depletion region width in the contact layers [5]. at higher bias voltages. Small area devices were observed to exhibit pronounced bias dependent peaking around 2 V. the intrinsic region is not fully depleted. The bandwidth of drift-enhanced diodes has an interesting bias dependence (Fig. carrier transit time limits the bandwidth. In small area devices. 2. at low bias voltages. which is evident in the 27 . 70 Bandwidth (GHz) 60 50 40 30 20 10 0 AA7000 TA5000 2 4 -1 6 9 -2 8 10 Area (x 10 m ) Figure 2. In general.a shorter linear region due to increased transit time contribution of the thicker absorption layer. 2.

18 [19]. The increase in responsivity in this case is accompanied by the undesired effect of doubling device capacitance. 28 .17. 60 50 40 30 20 10 0 0 2 4 6 8 10 25 µm 15 µm 10 µm 6 µm Bandwidth (GHz) Bias Voltage (V) Figure 2. 2. Since the contact layers were heavily doped (> 1019 cm−3 ). the contribution due to increased depletion layer thickness is much smaller compared to decrease in transit time through the absorption layer due to the decrease in drift velocity. 2.3 Drift-enhanced dual-absorption PIN photodiodes The responsivity of a conventional vertically illuminated PIN diode can be improved without affecting the transit time limit by adding another absorption layer as shown in the PINIP structure in Fig.6 µm and 10 µm optical diameter devices. Bias dependence of bandwidth in AA7000.

19. a control structure without the i-InP drift layers but otherwise identical was used. 2. Both 29 . The absorption layer thickness was chosen to be 7000 ˚ because we expect these devices to A be strongly RC-limited and thus a larger absorption length and transit time can be used without appreciably sacrificing device bandwidth. Dual absorption PINIP photodiode structure. a judicious combination of the two designs should lead to a better BWE than is possible in conventional vertically illuminated diodes. Since the dual-depletion design eases the RC-limit while preserving responsivity. The cross-sectional schematic of the heterostructures used in this work is given in Fig.18. a layer structure similar to the dual-depletion photodiodes was used. To study the effectiveness of the drift enhancement layer for increasing bandwidth.3.leading to a more severe RC-limited bandwidth. ———————————————— p+ InGaAs (anode) ———————————————— i InGaAs (absorption layer) ———————————————— n+ InP (cathode) ———————————————— i InGaAs (absorption layer) ———————————————— p+ InGaAs (anode) ———————————————— SI InP (substrate) Figure 2.1 Material structure To evaluate the performance of the drift-enhanced dual-absorption design. 2.

followed by alloying at 290◦ C in RTP for 30 A 30 .———————————————— p+ InGaAs (anode) 300 ˚ A ———————————————— A p+ InAlAs (anode) 100 ˚ ———————————————— A i InGaAs (absorption layer) 7000 ˚ ———————————————— A n+ InP (cathode) 500 ˚ ———————————————— A n+ InGaAs (cathode etch stop) 100 ˚ ———————————————— A n+ InP (cathode) 2500 ˚ ———————————————— A i InGaAs (absorption layer) 7000 ˚ ———————————————— p+ InAlAs (anode) 100 ˚ A ———————————————— A p+ InGaAs (anode) 300 ˚ ———————————————— p+ InP (anode) 10000 ˚ A ———————————————— A i InGaAs (etch stop) 100 ˚ ———————————————— SI InP (substrate) ———————————————— A p+ InGaAs (anode) 300 ˚ ———————————————— A p+ InAlAs (anode) 100 ˚ ———————————————— i InGaAs (absorption layer) 7000 ˚ A ———————————————— A i InP (drift layer) 2500 ˚ ———————————————— A n+ InP (cathode) 500 ˚ ———————————————— A n+ InGaAs (cathode etch stop) 100 ˚ ———————————————— A n+ InP (cathode) 2500 ˚ ———————————————— A i InP (drift layer) 2500 ˚ ———————————————— A i InGaAs (absorption layer) 7000 ˚ ———————————————— p+ InAlAs (anode) 100 ˚ A ———————————————— A p+ InGaAs (anode) 300 ˚ ———————————————— p+ InP (anode) 10000 ˚ A ———————————————— A i InGaAs (etch stop) 100 ˚ ———————————————— SI InP (substrate) (a) (b) Figure 2.3. 2. i-InGaAs and n-InP were wet etched using citric acid.2 Fabrication and process Flow Fabrication of dual-absorption diodes involves eight mask layers. the heterostructures were grown by MBE. Schematic cross-section of the photodiode after fabrication is shown in Fig. Material structures: (a) Control design (b) Drift enhanced design. p-InGaAs. p-InAlAs.20. Cathode contacts were then defined by thermal deposition of 900/150/1200 ˚ of AuGe/Ni/Au.19.and phosphoric acid-based etchants as in dualdepletion diodes. 2. After anode contact definition. Anode contacts were defined first by electron beam deposition of 200/2000 ˚ of A Ti/Au.

Optical window Light Ti/Au AuGe/Ni/Au p i I n I i p Ti/Au SiNx Semi−insulating substrate Figure 2. Mesa isolation of the anode contact layer is then carried out by etching the p-InP and underlying InGaAs etch stop using a combination of wet and dry etches. TLM pads incorporated along with the cathode contacts were used to test the contact resistivity. i-InGaAs. sec in nitrogen ambient. and p-InGaAs layers by wet etch to expose the bottom anode contact. 200/2000 ˚ of A Ti/Au was then deposited to define bottom anode contacts by electron-beam deposition. p-InAlAs. Schematic cross-section of a dual-absorption photodiode. and contact resistances of less than 0. all subsequent steps were carried out using an optimized two-layer photoresist process. Dry 31 ¤¡¡¡¡¡¤ £ ¤£ ¤£ ¤£ ¤£ ¤¡¤¡¤¡¤¡¤¡£ £¡£¡£¡£¡£¡ ¡¡¡¡¡£¤ ¦¦¦¦¦¦¦¦¦©¨©¨©¨©¨©¨ ¨ Ti/Au SiNx ¦¦¦¦§¥§¥§ ¥  ¢  ¢  ¢  ¢ ¡¡¡¡ ¢ . since the primary device mesa is too tall to be fully covered by a single layer of AZ5214 photoresist. Dry etching was needed for isolation because the bottom InGaAs etch stop and the InP substrate had unintentional layer intermixing in the samples used that could not be etched away using selective wet chemical etchants.1 Ωmm were obtained.20. nInP. After this mesa etch. This was followed by removing the n-InGaAs etch stop.

etching was done in RIE using CH4 /H2 /Ar with a flow rate of 4/20/10 sccm. as expected.5/1000 sccm. 2.55 µm of top illuminated drift-enhanced photodiodes exhibit a measured responsivity of 0. e. 2. improving to 0. SiH4 /N H3 /N2 with a flow rate of 60/7. The sidewall damage due to the dry etch process was reduced using a sputtered SiO2 layer to protect the active device areas. 2100 ˚ of SiNx A was deposited by PECVD to act as a passivation layer. The crystallographic nature of etchants can be clearly seen from Fig. After stripping the protective SiO2 layer.3.82 A/W with AR coating. 75 mT chamber pressure. the wet etching in certain crystallographic planes occur faster in preference to others.. Finally RF metal pads were defined by depositing 200/4000 ˚ of Ti/Au by electron beam A deposition. Since SiNx forms a conformal coating. the mesa patterns had to be aligned perpendicular to the [011] crystal direction (primary flat) in such a way that sidewalls over which metal lines run have an outward slope.21. and a chamber pressure of 1300 mT were used at a RF power of 25 W to deposit SiNx . and as anti reflection coating. Dry etching was followed by a short wet etch to minimize the damage further. i. and 300 W of RF power. The photocurrent scales linearly with incident optical power as shown in Fig. and both citric acid-based InGaAs etch and the H3 P O4 -based InP etch are crystallographic.59 A/W without AR coating. 2.2 V and the device capacitance is linear with device area with capacitance per unit 32 .22.3 Experimental results DC measurements at 1. Capacitance measurements (at 1 MHz) indicate that both control and drift-enhanced structures are fully depleted at 1. Control devices without the drift layers exhibit identical responsivity. interlayer dielectric.

Fully depleted devices with 6 µm diameter optical windows (with total junction area of 374 µm2 ) showed capacitances of 71 fF and 91 fF for devices with and without drift layers. as shown in Fig.21. respectively (a reduction of 22% due to drift layer).7 33 . corresponding to a BWE of 19.147 fF/µm2 for control and drift-enhanced designs respectively. The measured electrical 3-dB bandwidth of a typical 6 µm optical diameter device is 30 GHz for the drift-enhanced design.23.Primary flat [011] [011] Secondary flat (a) (b) (c) Figure 2. (a) Schematic representation of crystallographic mesa etch profile with respect to wafer flats (b) SEM image of mesa profile along [011] (b) along [011]. area of 0. 2.151 fF/µm2 and 0.

82 A/W. 2.23. GHz at 1.10-3 10-4 Popt=336 µW Current (A) 10-5 10-6 10-7 10-8 Popt stepped in 3dB increments Dark current 10 -9 -1 0 1 2 3 4 5 Bias voltage (V) Figure 2. while the control design exhibited bandwidths of 24 GHz for devices of the same area. DC photoresponse of a typical drift-enhanced device showing responsivity of 0. Device capacitance as a function of area. 500 Capacitance (fF) 400 300 200 100 0 0 drift-enhanced control 500 1000 1500 2000 2500 3000 Area (µm2) Figure 2.55 µm (Fig.24). The bandwidth decreases with increase in 34 .22.

26) shows linear dependence when capacitance limited and tends to saturate when the RC-limit becomes comparable to the transit-time limit. 2. 2.27 shows the equivalent circuit used. The diodes were modeled in Agilent-EEsof’s ADS software using these measured s-parameters. 2. as shown in Fig. Fig.25.24.01 0. 2. Frequency response of 6 µm optical diameter devices showing the advantage of drift-layers in improving 3-dB bandwidth. Normalized Responsivity (dB) 1 0 -1 -2 -3 -4 -5 -6 0.junction area due to increased capacitance. 35 .1 1 10 100 Control Drift-enhanced Frequency (GHz) Figure 2.4 Device modeling On-wafer s-parameter measurements of the photodiodes biased at 4 V were made using a 40 GHz network analyzer to extract an equivalent circuit model of the photodetector. The inverse area dependence of the bandwidths (Fig.

Measured bandwidth of drift-enhanced devices as a function of inverse area. drift-enhanced structure exhibits improved bandwidths over control structure.26.5 1 Area (x 10 m ) Figure 2.5 3 36 . Measured bandwidth of drift-enhanced and control structures as a function of area.30 Bandwidth (GHz) 25 20 15 10 5 0 0 500 drift-enhanced control 1000 1500 2000 2500 3000 Area (µm2) Figure 2.5 9 2 -2 2.25. 30 Bandwidth (GHz) 25 20 15 10 5 0 0. -1 1. up to 30% for 6 µm optical diameter devices.

so the current source which is usually included in photodiode models to quantify carrier generation due to input optical signal is absent. The measurement setup was controlled by Agilent-EEsof’s IC-CAP software and the s-parameters were ported to ADS. Rd is the diode shunt resistance. Lumped element equivalent circuit used to describe photodiodes. Junction capacitances extracted from the measured S-parameters are quite linear with area and are close to the theoretical values (assuming a parallel plate structure) for the TA5000 heterostructure as shown in Fig.28 shows the measured and modeled s-parameters of the photodiode. 2.29. Cj is the junction capacitance due to depletion. Cp is the pad capacitance. and the model is valid under dark conditions. Excellent agreement between the model and the measured sparameters for 1 to 35 GHz was obtained. The equivalent circuit assumes that the junction capacitance is completely due to depletion. 15 µm and 25 µm).Rs Ls I(t) Rd Cd Cp Cx Figure 2.27. Fig. Rs is the series resistance of the diode (sum of contact resistance and bulk resistance). Circuit parameters were then extracted in ADS by non-linear least-squares optimization to match the measured sparameters of the device. 37 . 2. Series resistances extracted from the model for the dual-depletion devices were around 14 Ω for 6 µm devices and around 10 Ω for larger devices (10 µm. and Cx is the launch capacitance. Ls is the total series inductance (mainly due to pads).

92 0. Measured (dashed) and modeled (solid) s-parameters of TA5000 (10 µm optical diameter device).94 0.98 0 S 11 -10 -20 Magnitude 0.1 0. 160 Junction Capacitance (fF) 140 120 100 80 60 40 20 0 0 Theoretical Modeled 200 400 600 800 2 1000 1200 Area (µm ) Figure 2.29. Area dependence of modeled and theoretical junction capacitance in TA5000.28. 38 .9 Phase -30 -40 -50 -60 0 5 10 15 20 25 30 -70 35 Frequency (GHz) Figure 2.96 0.

(fF) Launch capacitance.7 20 13. (fF) 20.5 26. (Ω) Series inductance. The series resistance extracted from the model was 28 Ω for 6 µm drift-enhanced device and is dominated by the spreading resistance of the bottom p-contact.6 13.8 14. Rs .1 65.8 49.6 22. respectively.8 51. Cp . Ls . (pH) Pad capacitance. the extracted junction capacitances were 52 fF and 75 fF for drift-enhanced and control designs.For the dual-absorption design. Cj (fF) Series resistance.1 SUMMARY OF EQUIVALENT CIRCUIT PARAMETERS FOR 6 µm OPTICAL WINDOW DIAMETER PHOTODIODES. TABLE 2. The pad capacitance extracted for our design was 22 fF.7 2.3 39 . Rd (kΩ) Junction capacitance. Extracted Circuit Parameters Dual-depletion (TA5000) Dual-absorption Control 13 74.5 22. These values suggest that the device layout and heterostructure can be further optimized to improve bandwidth.4 3 Depletion resistance.1 1.4 Drift-enhanced 1. Cx . for 6 µm optical diameter devices.8 27.

Schematic diagram showing the initial carrier distribution as result of impulse optical excitation. which is usually true when incident light intensity is small and applied bias is large. A carrier drift model is used to compute the transit time in the device assuming a parallel plate structure. 40 . The impulse response at the terminals of the device is then computed by time-domain convolution of the transit-time limited impulse response and the impulse response of the small-signal equivalent circuit of the device in the absence of illumination [57]. The model also assumes space charge effects and carrier piling at the heterointerfaces are negligible to further simplify the problem.5 Device simulation The frequency response of the photodiodes was analyzed theoretically using both an analytical and numerical model to assess their fundamental BWE limitations.2. The numerical model used a one-dimensional transit-time calculation coupled with the extracted circuit parameters. The quasi-static carrier drift model assumes the device is fully depleted.30. − − − − − p− − − − − − dx e− i h + I + + + + + + + + + + + n Figure 2.

The velocities are given by E(µn + vnhf β|E|) 1 + βE 2 µp vphf E InGaAs hole velocity. Since the device terminals are assumed to be short-circuited. 2. The induced current as a function of position x and time t is given by Q(x. t) is the number of carriers at position x and v is their velocity. and can be represented by a time-dependent current source in the equivalent circuit model. the impulse response at the terminals of the diode is simply the convolution of the impulse response of the equivalent circuit and the transit-time limited impulse response.7) where Q(x. The intial exponential carrier distribution accounts for absorption through the intrinsic layer of the incident light. device capacitance need not be considered for this calculation. The contribution of all moving charges within a given time step gives the total transittime limited current in the device.9) (2. For terminal load impedances other than a short circuit.30 (corresponding to impulse of incident light shone at t=0 from anode side of the device) and by dividing the depletion region into very small cells and considering charge transport between two short-circuited parallel plate electrodes. The resulting calculated current is the transit-time limited current of the device. t)v(x) W ∆I(x.8) (2. The drift velocities of electrons and holes were computed using the empirical analytic equations used by Williams [53]. t) = (2. vn (E) = (2.The transit-time limited behavior of the carriers was calculated assuming an exponential initial carrier concentration as shown in Fig.10) 41 . vn (E) = 1 + βE 3 InGaAs electron velocity. vp (E) = vphf + µp E E(µn + vnhf βE 2 ) InP electron velocity.

we can estimate the fundamental performance limits of an ideal device. For the dual-absorption structures. µp (cm2 /V s) Electron saturated velocity. β Permittivity InGaAs 8000 300 1x107 6x106 0. (cm/s) Hole saturated velocity. vphf . (cm/s) Electron velocity fitting parameter.[54]. 42 .8x10−12 12.TABLE 2.8x10−7 13. which matches the measured bandwidths closely. The saturation velocity values used in the simulation are consistent with those reported in the literature [8].5 GHz for the control device. Properties Electron mobility. this analysis leads to a bandwidth of 23.5 GHz for the drift-enhanced structure and 31.[49]. If the parasitics in the equivalent circuit are neglected. This can be justified from the fact that the velocities reported in the literature vary over a wide range as shown in the case of electrons in Fig. 2. this model estimates a bandwidth of 37. using the fitting parameters extracted from TA5000.6 o The saturation velocities used in the calculation were obtained by fitting the measured frequency response of the simple single absorption drift-enhanced structure (TA5000).31.9 o InP 3500 1x107 0.3 GHz for control design and 29 GHz for the drift-enhanced design (for the 6 µm optical diameter devices).2 MATERIAL CHARACTERISTICS USED IN SIMULATION. µn (cm2 /V s) Hole mobility. vnhf . Considering only junction capacitance and a 50 Ω load resistance.

Transit-time Impulse Response (arb.53 Ga0. Simulated transit-time limited impulse response in TA5000.2 0 0 5 10 15 20 25 30 Time (ps) Figure 2.31.4 0. units) 1. dark shaded area refers to GaAs bulk values [7].6 0. Light shaded area comprises data for In0. InAs and GaAs as a function of electric field.Figure 2.32.47 As on InP substrates from different authors.8 0. 43 .2 1 0. Electron drift velocities of InGaAs.

corresponding to BWEs of 23 GHz and 19.11) where W1 is the thickness of the InGaAs absorption layer and W is the sum of InGaAs absorption and InP drift layer thicknesses. the transit-time limited current density frequency response for a drift-enhanced structure can be expressed as: qαφ0 W 1 − ejωτe 1 − e−αW J(ω) = + + αW + jωτe jωτe αW e−αW1 − 1 e−αW1 (ejωτh − 1) qαφ0 W1 + αW − jωW/vh αW1 jωτh (2. The saturation velocities used in the calculation were the same as those used in numerical analysis. The transit-time limit for a dualabsorption structure is the same as in a simple drift-enhanced design due to the device symmetry.12) . the responsivity for a single-pass design is given by q (1 − R)(1 − e−2αW1 ) hν 44 = (2. the diode’s 3-dB bandwidth was computed as a function of W1 and W . and α is the absorption coefficient of InGaAs. extended for a drift-enhanced structure. Neglecting diffusion and recombination in the absorption regions and carrier pile-up at the heterointerfaces.3 GHz respectively. φ0 is the incident photon flux density. τe and τh are the electron and hole transit times. This expression was derived following the treatment in [4]. An analytical model of the drift-enhanced photodiode was also developed to assess its fundamental BWE limitations and to verify the results obtained from numerical analysis. Assuming only the device capacitance and load resistance (50 Ω) contribute to the RC limit and charge carriers travel at their saturation velocities. Neglecting diffusion and assuming unity internal quantum efficiency.

where R is the surface reflectance. A peak BWE of 26 GHz is obtained.8 drift-enhanced PINIP PINIP (no drift) 1.6 Maximum BWE (GHz) 26 25 24 23 22 21 20 0.6 0. corresponding to a maximum achievable BWE of 25 GHz. as extracted from simulation. Maximum BWE and corresponding total depletion width as a function of absorption layer thickness for drift-enhanced dual-absorption photodiode structure. a dual-absorption structure without drift layer is optimal (W1 = W ).2 1.15 µm (for a 6 µm optical diameter device) with AR coating (R=0). the analysis projects a maximum BWE of 35 GHz.4 0. For the drift-enhanced dual-absorption layer structure used in our fabricated diodes. The less-than-expected measured bandwidth of the device is mainly due to the high series resistance (28 Ω) in these first-generation devices.95 µm and W of 1.8 1 1.2 1 0. This analysis leads to a maximum BWE product of 26 GHz for this design (single-pass) with a bandwidth of 36 GHz for W1 of 0.4 1.6 1.4 . For W1 ≥ 1.8 1. the analysis estimates a 3 dB bandwidth of 40 GHz. This BWE is nearly 5 GHz larger than what is achievable by conventional vertically illuminated PIN diodes of similar geometry.27 1. The pad layout capacitance in our structure estimated 45 W (µm) 1. For a two-pass design.35 µm.8 W1 (µm) Figure 2.33.

Even though the numerical model is modestly pessimistic.7 30.7 23. The transit-time limited bandwidth was extracted from the measured frequency response assuming a single-pole roll off. TABLE 2. Improved pad layout and the use of a thicker anode contact layer is expected to ease this restriction.3. 46 . and f3dB refers to the 3 dB bandwidth of the photodiodes into a 50 Ω load. fT is the transit-time limited bandwidth. Hf is the bandwidth of the equivalent circuit. and is denoted as “measured fT ” in the table. In the table. Measured Design Hf fT data f3dB Numerical model fT f3dB Analytical model fT f3dB Control 29 55 24 46.from the circuit model is 22 fF. which combined with the high series resistance results in a substantial reduction in RC-limited bandwidth.9 Drift-enhanced 40 54 30 50 29 53.3 58.3 MEASURED AND MODELED RESULTS FOR 6 µm OPTICAL DIAMETER DRIFT-ENHANCED DUAL-ABSORPTION DEVICE.8 Note: All bandwidths are in GHz A summary of measured and modeled values is given in Table 2. the performance projected makes drift-enhanced dual-absorption devices very attractive for 40 Gbps receivers.3 24.

HEMTs. separate optimization of each device is necessary. we focus on developing a high-speed HEMT structure which can be integrated with our photodiodes to realize a photoreceiver. In this chapter. The amplification can be provided by either a field effect transistor.or bipolar transistor-based amplifier. A key issue in integration is that the performance of the implemented devices must not be degraded due to the integration process. also known as modulation-doped-field-effect transistors (MODFETs) rely on modulation doping to increase carrier mobility in the conduction channel. the generated photocurrent is quite weak and needs electronic amplification before it can be used for further processing. In most cases. To realize OEICs with devices which individually offer state-of-the-art performance. Since in PIN-HBT receivers the active layers are usually shared which makes individual device optimization difficult. it is essential to have an amplification circuit along with the detector.CHAPTER 3 HIGH ELECTRON MOBILITY TRANSISTORS Photodetectors by themselves are generally insufficient to produce directly usable signals for optical information processing systems. When a layer of undoped low-bandgap material and heavily doped high-bandgap material form a heterojunction. Since PIN diodes have no internal gain. due to the difference in electron affinities of the 47 . the PINHEMT receiver is chosen for this work. and the choice of transistor technology is a very important issue in receiver design.

the latter usually achieved by making the gate length small. The key figures of merit for a high-speed HEMT are its transconductance (gm ) and cut-off frequencies (ft and fmax ). The other cut-off frequency. one can modulate the 2DEG density. This can be related to the lumped element parameters by. By applying an external voltage across the heterointerface.2) where (Cgs + Cgd ) is the total gate capacitance associated with the Schottky gate contact. we need to increase gm and decrease gate capacitance.two layers. The advantage of modulation doping is that the mobile charge carriers are spatially separated from the ionized dopant atoms and hence Coulombic scattering is greatly reduced resulting in higher carrier mobility. gm 2π(Cgs + Cgd ) ft = (3. Typically. Under saturation conditions when output conductance 48 . is the frequency at which the Mason’s unilateral power gain falls to unity. and thus its conductivity. ∂Id ∂Vgs gm = (3. an undoped spacer layer is added between the heavily doped wide-bandgap region and the undoped low-bandgap region to further improve electron mobility. The improved transport properties in a modulation-doped structure by itself does not necessarily lead to high speed performance of HEMTs because their speed also depends on the the ability to modulate high speed electrons [36].1) Vds =const. fmax . electrons are transferred from the high-bandgap material to the lowbandgap material to form a two-dimensional electron gas (2DEG). Transconductance is a measure of efficient channel current modulation and is given by. Hence to achieve high ft . The device ft is the frequency at which the short circuit current gain falls to unity.

we need to achieve short gates with reduced Rg .is negligible. As a result. Schematic cross-section of a typical InP-based HEMT. to achieve high ft and fmax at the same time. fmax can be approximated by [31]. Figure 3. 49 . while still maintaining a small gate “footprint”. a number of “mushroom” or T-gate processes have been developed to increase the gate cross-sectional area and thus reduce its resistance. A schematic of a HEMT structure with T-gate is shown in Fig. ft 8πRg Cgd fmax = (3. This reduction in gate resistance significantly increases the power gain cutoff frequency (fmax ) and reduces the noise figure of sub-micron gate length HEMTs [36].1.1. 3.3) Due to fmax ’s dependence on Rg (gate resistance).

the sheet carrier density and gate-tochannel separation are directly related to each other. minimizing the gate-to-channel separation increases transconductance. dspacer is the thickness of the undoped spacer layer. ∆Ec qND (dbarrier − dspacer )2 − q 2 Vth = φB − (3. ND is the doping concentration in the uniformly doped barrier layer. If the barrier layer is uniformly doped.4) where is the dielectric constant of the semiconductor layer beneath the gate.The HEMT structure has the advantage of placing the channel in close proximity to the gate (typically less than 500 ˚). d is the gate-to-channel separation.5) where φB is the Schottky barrier height. and ∆d is the displacement of the two-dimensional electron gas from the heterojunction interface [35]. the A vertical dimensions need to be proportionally reduced in order to maintain a reasonably high aspect ratio (the ratio between gate length and effective gate-tochannel separation). gm = d + ∆d vavg (3. The threshold voltage is related to the barrier layer thickness as given by [9]. This geometrical parameter is very important in controlling the field effect action of HEMTs and should be maintained at least over five to reduce short-channel effects [36]. As shown by this expression. As the gate length is reduced. and dbarrier is the thickness of the barrier layer including dspacer . Assuming the classic saturation velocity model (SVM). ∆Ec is the conduction band discontinuity between spacer and channel. Thus a decrease in gate-tochannel separation would shift the threshold voltage to more positive values and thus reduces drain current. in most practical HEMT 50 . To overcome this problem.

1 Material structure. An increased conduction band discontinuity leads to higher channel charge density and greater confinement. 3. it also reduces the breakdown voltage of the device. Since having a δ-doped layer decouples sheet charge and gate-to-channel separation. The heterostructures were grown by MBE and their schematics are given in Fig. a pseudomorphic AlAs layer (which is lattice mismatched to InP) was used as a etch stop for gate recess. Also. the pseudomorphically grown channel layers experience a strain which limits the total thickness of channel achievable and may also lead to increased defects. and results To facilitate integration with the photodetectors already demonstrated. since the lattice constant becomes larger compared to InP’s lattice constant. this helps to suppress threshold voltage shifts due to non-uniform gate recess and hence provides a tighter control on the threshold voltage. In the lattice matched structure. Two promising HEMT designs were evaluated . In both structures. 3.2. Though a lower bandgap channel improves the high-frequency performance. The composite structure has several potential advantages for high speed performance since the electron mobility increases with indium content in InGaAs. fabrication. we focus on InP material system.one structure had a lattice matched InGaAs channel and the other had a composite channel (pseudomorphic) made of three InGaAs layers with varying indium composition. 51 . Si was used as n-type dopant in the InGaAs cap layer and for the δ-doping plane in the InAlAs barrier layer.structures. a silicon δ-doped layer is used instead of a uniformly doped InAlAs layer. and the conduction band discontinuity at the InGaAs/InAlAs heterojunction also increases as the energy bandgap approaches that of InAs.

The HEMT fabrication process sequence comprises three mask layers. The active region is first defined by wet chemical etching of the n-InGaAs cap. a tri-layer resist structure was used: a MMA (methyl methacrylate) layer sandwiched between two PMMA (poly 52 .63 Ga0. Optically defined gates in our lab are limited to ≈ 1 µm. Once the mesa was defined.———————————————— 80 ˚ n+ InGaAs (contact) A ———————————————— 25 ˚ AlAs (etch stop) A ———————————————— 170 ˚ i InAlAs (barrier) A *-*-*-*-*-*-*-*δ − doping*-*-*-*-*-*-*40 ˚ i InAlAs (barrier) A ———————————————— 200 ˚ i InGaAs (channel) A ———————————————— 2000 ˚ InAlAs (buffer) A ———————————————— SI InP (substrate) ———————————————— 250 ˚ n+ InGaAs (contact) A ———————————————— 100 ˚ i InAlAs (barrier) A *-*-*-*-*-*-*-*δ − doping*-*-*-*-*-*-*40 ˚ i InAlAs (barrier) A ———————————————— 30 ˚ i In0. To get T-gates with electron beam lithography. This ensures that the channel does not come in contact with the gate metal at the mesa edges during gate metallization.2. InGaAs channel.42 As (channel) A ———————————————— 3000 ˚ InAlAs (buffer) A ———————————————— SI InP (substrate) (a) (b) Figure 3. Ohmic contacts were then defined by thermal deposition and alloying of AuGe/Ni/Au as for the photodiodes.58 Ga0. a mushroom etch was done with 1:1 citric acid/H2 O2 to etch InGaAs selectively over InAlAs.47 As (channel) A ———————————————— 70 ˚ i In0.53 Ga0.37 As (channel) A ———————————————— 80 ˚ i In0. InAlAs barrier. Gate patterns were then defined optically or through electron beam lithography. Etching into the buffer region ensures that the active regions are electrically isolated from each other. and part of the InAlAs buffer using 20:1 citric acid/H2 O2 solution. TLM patterns laid along with ohmic contacts were used to test the contact resistance of the metallization. so electron beam lithography was used to achieve submicron gate lengths. Schematic HEMT layer structure with (a) lattice matched channel (b) composite channel.

methyl methacrylate) layers.3. The A PMMA layer at the bottom requires a higher electron dose to become soluble in developer solution than the layer over it due to its larger molecular weight. SEM image showing end view of T-gates fabricated. showing the small gate footprint and large gate “head” for low resistance. The lower PMMA layer had a molecular weight of 950 k. the sandwiched MMA layer with 8.Figure 3. leading to a T-shaped cross-section.3 shows a typical T-gate end view. Fig. and the top PMMA layer had a molecular weight of 50 k. This gives rise to a preferential development. The exposed patterns were developed in 1:3 MIBK (methyl isobutyl ketone)/IPA solution and were subject to descum in UV 53 . optimized to achieve a gate length of 0.3 µm. 3. The thickness of the layers used were 1600/4500/1500 ˚ .5 % methacrylic acid (MAA).

Since etching rates of InGaAs and InAlAs can be significantly modified due to the electrochemical etching component of the citric acid when exposed to metal electrodes [58]. Cr/Au was thermally deposited on to the sample and lifted off to form the gate electrode. Optically defined gates were descummed in RIE using oxygen plasma.37 V. while the pseudomorphic device exhibits a higher maximum transconductance of 648 mS/mm and a threshold 54 . The gate recess etch is broken into a series of short etch steps. the InGaAs cap layer was etched off to achieve a Schottky gate contact (gate recess). the lattice matched device exhibits a maximum transconductance of 501 mS/mm and a threshold voltage of -0. On-wafer DC and RF measurements of fabricated devices were performed using an Agilent 4155C semiconductor parameter analyzer and 8722D network analyzer in a microwave probe station.4 and 3.5 show drain current dependence on gate voltage. and the drain current as a function of drain bias is monitored between each step. since conduction takes place mostly through the heavily doped cap layer. Optimal etch depth is achieved by using an iterative gate recess etch. the I-V is nearly linear. Figs. 3. After gate definition. the I-V characteristic gradually saturates and ideally flattens out when the cap layer is fully removed. The pseudomorphic HEMTs exhibit higher transconductance and larger current density as expected. Before the recess etch. only the recess region was exposed during gate definition. Once the recess is complete. As the cap layer is progressively etched off. DC measurements were also done through RF probes to suppress oscillations due to the high gain and bandwidth of these devices. The etch is completed when a target drain current density is achieved.ozone (UVO) cleaner to remove any resist residue that might have been left over after development.

300 600 500 400 300 200 100 0 0.5.4 Transconductance (mS/mm) Drain Current (mA/mm) 250 200 150 100 50 0 -0.6 Gate Voltage (V) Figure 3.2 Gate Voltage (V) Figure 3.4 -0. 55 .6 -0. Ids vs Vgs charactersitics of pseudomorphic HEMT with 0.2 0 0.2 0 0.3 µm gate length. 350 700 600 500 400 300 200 100 0 -0. Ids vs Vgs charactersitics of lattice matched HEMT with 0.4 -0.2 Transconductance (mS/mm) Drain Current (mA/mm) 300 250 200 150 100 50 0 -0.4.3 µm gate length.

8 1. Both the lattice matched and pseudomorphic devices exhibit high output conductance.6 and 3. 56 .15 V gs 0.voltage of -0. it is still associated with reduced gain and excess noise at high frequencies. a sharp increase in the saturated drain current with respect to drain bias.11 V. [11].6 Drain Voltage (V) Figure 3.7 V to 0. This effect is believed to be because of trapping and detrapping of carriers in the InAlAs buffer layer [37]. Figs.4 0.2 1.3 µm devices.7 show the drain current dependence on the drain voltage of 0. and may be related to on-state breakdown and premature burnout [46]. Ids vs Vds charactersitics of lattice matched with 0. Although it has been demonstrated to be mainly a DC effect [13]. 3.6.5 V in steps of 0. and impact ionization in the InGaAs channel [13]. Surface states also play a role and passivation has been shown to drastically reduce the I-V kink in InP-based HEMTs [51].3 µm gate length. 350 Drain Currrent (mA/mm) 300 250 200 150 100 50 0 0 V : -0. The output conductance is exacerbated by “kink effect”.

2 1. To estimate fmax we calculate Mason’s unilateral power gain (U ) from measured s-parameters. a 20 dB/decade linear extrapolation is typically used to estimate ft and fmax . Figs. Ids vs Vds charactersitics of pseudomorphic HEMTs with 0.3 µm lattice matched and pseudomorphic device respectively.4 0.500 Drain Current (mA/mm) V : -0. In terms of Y-parameters. If the cutoff frequencies of the device are beyond the measurement range of the network analyzer.3 µm gate length.6) At fmax . 3.9 show the cutoff frequencies of a 0.15 V gs 400 300 200 100 0 0 0. U goes to unity.6 Drain Voltage (V) Figure 3.7.8 and 3. U is given by [31] |Y21 − Y12 |2 4[Re(Y11 )Re(Y22 ) − Re(Y12 )Re(Y21 )] U= (3. Since h21 is the short-circuit current gain. ft can be determined by determining the frequency at which h21 becomes unity. ft and fmax were calculated from s-parameters measured with the network analyzer.5 V in steps of 0.8 1.7 V to 0. 57 .

as fmax dependence on parasitics is larger when output conductance is not negligible. ft and fmax of 0.8. we measured the gate voltage induced for a reverse gate 58 . The DC and RF results of both lattice matched and pseudomorphic HEMTs are summarized in Table 3. consistent with their higher transconductance values. The table clearly shows that reduction in gate length has favorable effect on transconductance and cutoff frequencies.ft ’s of pseudomorphic HEMTs were higher.3 µm gate length lattice matched HEMTs. The lower-than-expected fmax of the pseudomorphic devices is due to larger parasitics compared to lattice matched devices. The fmax ’s of both lattice matched and pseudomorphic HEMTs were comparable.1. |h | (dB) 35 30 25 20 15 10 5 0 109 f ~ 70 GHz t Unilateral Gain (dB) 21 ~ 145 GHz 15 10 5 0 1010 1011 Frequency (Hz) Figure 3. 40 40 35 30 25 20 f max Current Gain. though the pseudomorphic structure could be expected to have a higher fmax due to its higher ft . To get a measure of breakdown voltage.

current of 1 mA/mm with grounded drain and source. The new design had a lattice matched channel and an InP etch stop as shown in Fig. To avoid possible problems associated with material growth. another heterostructure design with reduced channel and barrier layer thicknesses (to improve the aspect ratio) and a more effective etch stop was investigated. 3. and the lattice matched HEMTs had a mean value of 9. Also. ft and fmax of 0. |h | (dB) 35 30 25 20 15 10 5 0 109 f ~ 92 GHz t Unilateral Gain (dB) 21 ~ 144 GHz 20 15 10 5 0 10 10 10 11 Frequency (Hz) Figure 3. the gate recess etch was difficult to control consistently.10.7 V.3 V. indicating that lattice matched devices would have a higher gate-drain breakdown voltage. Both the structures were easily overetched during gate recess.3 µm pseudomorphic devices exhibit a mean induced gate voltage of 3.40 40 35 30 25 f max Current Gain. Even in the lattice matched structure with an AlAs etch stop layer. the layers were all kept lattice matched to InP.9. 59 . InP as a etch stop layer has been shown to improve bias induced kink effect and the frequency dispersion of the transconductance [33]. The 0.3 µm gate length pseudomorphic HEMTs. In order to reduce the short-channel effects and get more repeatability.

1 µm gate lengths. To achieve 0.2 11. Mean values Lgate (µm) gm.1 SUMMARY OF FABRICATED LM-HEMT AND P-HEMT RESULTS. Material structure of modified lattice matched HEMT with reduced layer thicknesses and InP etch stop.5 23.9 0.7 11.4 306 -0.32 577 -0.9 P-HEMT 1. To achieve this level of speed performance.10. 172 GHz for 43 Gb/s [50].1 µm.6 28.dc−max (mS/mm) Vth (V) ft (GHz) fmax (GHz) LM-HEMT 1. e. the gate length was further shrunk to 0. Photoreceivers using InP-based HEMT technology for 40-Gb/s applications found in the literature indicate that as a rule of thumb the cutoff frequencies (both ft and fmax ) need to be four times the system bit rate.29 654 -0.36 82.TABLE 3. i.1 136. the thicknesses of the electron beam lithography resists were thinned down to 800/2500/750 ˚ of 950 k PMMA/MMA A 60 .1 0.6 ———————————————— 300 ˚ n+ InGaAs (contact) A ———————————————— 30 ˚ InP (etch stop) A ———————————————— A 115 ˚ i InAlAs (barrier) *-*-*-*-*-*-*-*δ − doping*-*-*-*-*-*-*35 ˚ i InAlAs (barrier) A ———————————————— 150 ˚ i InGaAs (channel) A ———————————————— 2000 ˚ InAlAs (buffer) A ———————————————— SI InP (substrate) Figure 3.4 361 -0.3 62.9 143.

The 0. Due to the small etch window in 0. A typical fabricated 0.1 µm T-gates.1 µm device exhibits a maximum transcon- 61 .11. The InP etch stop was left in place before gate metallization due to lack of a highly selective wet-etchant against InAlAs. DC and RF results of devices made in the modified structure were measured on-wafer as described earlier.1 µm T-gate structure is shown in Fig. Wet etching with citric acid was further assisted by means of ultrasonic agitation.1 µm devices.11.5) MAA/50 k PMMA by diluting the resists and re-optimizing the spin speeds. a wetting step with isopropyl alcohol was employed prior to gate recess etching to improve gate recess wet etch uniformity and reproducibility [16]. The lithographic conditions and developing time were correspondingly readjusted. SEM image showing end view of 0. 3. Figure 3.(8.

500 800 700 Transconductance (mS/mm) Drain Current (mA/mm) 400 300 200 100 0 600 500 400 300 200 100 -1 -0. the maximum projected ft and fmax were 193 GHz and 218 GHz (Fig.2 µm devices.2.ductance as high as 706 mS/mm (Fig. 3. 62 .1 µm devices and 7.12). The drain current dependence on drain voltage was free from kink effect observed in the devices fabricated earlier (most likely due to the passivation provided by InP etch stop layer) as shown in Fig.5 V for the 1. 3.1 µm gate length device.2 0 0. A summary of DC and RF results is tabulated in Table 3.2 0 0. 3. The device exhibits an output conductance of 156 mS/mm and a mean gate-drain breakdown voltage of 3.4 -0.12.3 µm devices made in the earlier structures.4 Gate Voltage (V) Figure 3. Ids vs Vgs charactersitics of 0.6 -0.8 -0.13.14). Using measured s-parameters.2 V for the 0. better than the 0. enough to design lumped element amplifiers for 40 Gbps receivers [48].

Ids vs Vds charactersitics of 0.13.1 µm gate length device.600 Drain Current (mA/mm) V : -650 mV to 250 mV in steps of 75 mV 500 400 300 200 100 0 gs 0 0. 63 .1 µm gate length device.5 1 1.5 Drain Voltage (V) Figure 3. |h | (dB) Unilateral Gain (dB) 40 30 20 10 f ~ 193 GHz t 40 30 f ~ 218 GHz 20 10 0 1010 1011 21 max 0 109 Frequency (Hz) Figure 3. Current gain and Mason’s Unilateral power gain of 0. 50 50 Current Gain.14.

It is a measurement-based empirical analytic model. Rd ) and the capacitances (Cxgd .2 Device modeling modified LM-HEMT 1. simple model that accurately reflects the actual device performance is essential. there is no direct relationship between the model equations and basic physical laws. Rs .dc−max (mS/mm) Vth (V) ft (GHz) fmax (GHz) 3. Extrinsic elements include the parasitic inductances (Lg .9 33. parasitic resistances (Rg .1 0.2 SUMMARY OF DC AND RF RESULTS FOR THE MODIFIED LM-HEMT. Dispersion effects are modeled using Rdb . 3. Mean values Lgate (µm) gm. i. Vds ).1 676 -0.TABLE 3.12 18. a scalable. Rid and the gate charges Qgc and 64 .. Cxgs ). Ls . Parameter extraction was based on fitting the model equations to the measured data. while the intrinsic elements include all other parameters. The circuit can be divided into two parts: intrinsic and extrinsic elements. Ris .55 185 202 For circuit design. e. The equivalent circuit topology used in the EEHEMT model is given in shown Fig. Ld ). Cxds . The EEHEMT model included in Agilent-EEsof’s IC-CAP data acquisition and modeling software was used to model our devices [1]. Cdb and a non-linear source Idb (Vgs .15.2 423 -0.

Output charge delay is modeled using a constant output capacitance Cdso . it is convenient to use the admittance (Y) parameters to characterize its electrical properties. Since the intrinsic device has a modified Π-topology. the intrinsic admittance was found by de-embedding the extrinsic elements. 65 .Cxgd Igd Gate Lg Rg + Qgy Igs + Qgc Ris Rid Ids Cbs Rdb Idb Cdso Rd Ld Drain Rs Cxgs Cxds Ls Source Figure 3. Forward conduction in the gate contact is modeled using Igs which has the normal exponential diode current dependence on Vgs .15. The charges are simple closed form expressions whose derivatives fit typical observed bias dependencies in capacitance data for HEMTs. After determining the extrinsic elements. while the extrinsic parameters are not. EEHEMT circuit schematic [1]. Qgy are used to model charging delay between depletion region and the channel. Most of the intrinsic parameters are bias dependent.

Once Rs is known. this method also can yield an estimate of the lead inductances by evaluating the imaginary part of the s-parameters during the cold-FET measurement. This is because in strong gate forward bias.g. This method computes the value of Rs from changes in Vgs due to application of two drain currents. These values were then used as starting points to get better approximations in the Arnold-Golio method [3]. Though the original formulation of the “cold FET” method assumed Vds and Vgs to be zero to optimize contact resistances and parasitic inductances of the bond wires. they can be readily extracted by evaluating the device s-parameters over a range of bias conditions. where s-parameters were measured for a number of Vgs biases at the nominal Vds operating point. In addition to the access resistances. 66 .16 shows the modeled and measured drain current dependence on gate voltage and Fig.17 shows the drain current dependence on drain voltage. Rg and Rd can be extracted by the cold FET method made with the gate strongly forward-biased at zero drain-source voltage [10]. further simplification can be achieved by strongly forward biasing the gate [2]. The DC I-V parameters (e. threshold voltage) are extracted once the extrinsic elements are known.. Both the drain and gate resistances are separable if the value of source resistance is known by an independent method. Four different measurement setups were used to establish the values of these parameters from their preliminary estimates.The source resistance is extracted using the Yang-Long method [60]. the intrinsic gate charge model of the FET is shunted by the small resistances of the forward active diode and the fully open channel between drain and source. Fig. which are 50 to 100 times greater than the gate current in the linear region. such as Yang-Long. transconductance. 3. Since the lead inductances are independent of bias. 3.

4 Gate Voltage (V) Figure 3.17.2 0 0. 67 .2 0.2 1. 600 Drain Current (mA/mm) 500 400 300 200 100 0 0 0.2 600 500 400 300 200 100 0 0.6 0.4 0. Measured (symbols) and modeled (solid) Ids vs Vds charactersitics.500 800 700 Transconductance (mS/mm) Drain Current (mA/mm) 400 300 200 100 0 -1 -0.4 -0.8 -0.6 -0.4 Drain Voltage (V) Figure 3. Measured (symbols) and modeled (solid) Ids vs Vgs charactersitics.16.8 1 1.

19. in the model is slightly pessimistic and hence circuits designed using this model are expected to exhibit more gain than predicted by the simulator. The cut-off frequencies predicted by the model were 167 GHz for ft and 216 GHz for fmax against measured (extrapolated) values of 193 GHz and 218 GHz respectively. The device shows peak ft at Vgs of -0. 3.2 V and a Vds of 1.Then the charge and dispersion parameters were extracted from s-parameter data measured at different bias points.20. the performance of the model is shown for different Vgs values. The actual model parameters were extracted from this linear equivalent circuit data [2]. 68 . The measured and modeled s-parameters for various Vgs at a constant Vds of 1. 3.18.3 V are shown in Figs. A built-in transform with IC-CAP was used to compute the linear equivalent circuit parameters based on the measured sparameter data. Forward transmission. The performance projected by the model is sufficient to design lumped element 40 Gbps receivers.3 V. Since the variation of ft typically saturates with Vds . s21 . 3.

3 V.18.-15 -20 90 80 Magnitude (dB) -25 -30 Phase (deg) 70 60 -35 -40 -45 -50 0 5 10 15 20 25 30 35 50 40 30 Frequency (GHz) s11 20 180 s12 Magnitude (dB) 15 160 Phase (deg) 10 140 120 5 100 0 0 5 10 15 20 25 30 35 Frequency (GHz) s21 s22 Figure 3. 69 . Measured (symbols) and modeled (solid) s-parameters for Vgs =0 V and Vds =1.

2 V and Vds =1. high gain). Measured (symbols) and modeled (solid) s-parameters for Vgs =-0. 70 .-15 -20 90 80 Magnitude (dB) -25 -30 Phase (deg) 70 60 -35 -40 -45 -50 0 5 10 15 20 25 30 35 50 40 30 Frequency (GHz) s11 20 180 s12 Magnitude (dB) 15 160 Phase (deg) 10 140 120 5 100 0 0 5 10 15 20 25 30 35 Frequency (GHz) s21 s22 Figure 3.3 V (corresponds to peak ft .19.

-10 -15 90 80 70 60 50 40 30 5 10 15 20 25 30 35 20 Magnitude (dB) -20 -25 -30 -35 -40 -45 -50 0 Phase (deg) Frequency (GHz) s11 20 180 s12 Magnitude (dB) 15 160 Phase (deg) 10 140 120 5 100 0 0 5 10 15 20 25 30 35 Frequency (GHz) s21 s22 Figure 3.20. 71 .5 V and Vds =1.3 V (low noise bias condition). Measured (symbols) and modeled (solid) s-parameters for Vgs =-0.

For a given average optical power at the receiver.CHAPTER 4 PHOTORECEIVERS The important performance characteristics of a photoreceiver are operating bandwidth/bit rate. and represents the range of input signal levels over which the receiver is usable. such as extinction ratio. RZ coding yields improved sensitivity over NRZ [38]. Depending on the system. Receiver sensitivity is defined as the minimum average optical power level needed to achieve a particular bit error rate (BER). and dynamic range. modulation formats can be made to utilize bit-correlations to make a format more resilient to distortions accumulated along the fiber. sensitivity and dynamic range encompass essential properties of the received signal. Typically a BER of ≤ 10−9 is required for long-haul fiber optic communication systems. sensitivity. The bandwidth requirement of the photoreceiver is also dictated by the coding scheme and the transmission bit rate of the system. where the optical pulse duration equals the bit duration. Dynamic range is the ratio of maximum to minimum average optical power with a given BER. signal distortions and intersymbol interference (ISI). Return-to-Zero (RZ) schemes where the optical pulses occupy only a fraction of the bit duration have larger bandwidth requirements than NonReturn-to-Zero (NRZ) schemes. Typically. While bandwidth determines the speed of the receiver. but this value depends on the data rate and the modulation format used for transmission. Though RZ coding leads to enhanced system 72 .

but it suffers from poor sensitivity due to high Johnson noise arising from the input shunt resistor [34]. Common receiver topologies: (a) low impedance design (b) high impedance design (c) transimpedance design. and 3) the transimpedance design [45]. as well as more complicated transmitter structures [55]. The choice of preamplifier topology plays an important role in determining the overall photoreceiver performance. 4. it comes at the expense of higher bandwidth requirements. [25]. The circuit architecture in this case can be designed to compensate for the 73 .performance. 2) high impedance design. bias iph Output Amplifier iph bias iph Output Amplifier Equalizer bias Output Amplifier (a) (b) (c) Figure 4.1 shows the three basic topologies commonly used in integrated photoreceivers: 1) low impedance design. is an inverting voltage amplifier with resistive feedback from output to input. The high impedance design overcomes this problem.1. This leads to low bandwidth and usually requires an equalization circuit to extend the bandwidth [27]. but the input admittance is dominated by the total input capacitance. The transimpedance design. The low impedance design is the easiest to monolithically integrate and was used in many of the early OEIC receivers. Fig. in its simplest form.

the low frequency components which are attenuated by the equalization process cause saturation of the amplifier prior to the equalizer at high signal levels. Kuebart et al. attenuation of the low frequency components is achieved via negative feedback and hence the low-frequency components are amplified by the closed-loop. instead of the open-loop gain of the amplifier. and good noise performance.and closed-loop gains [45]. we chose to design a transimpedance receiver. In general. 74 . the noise performance of transimpedance amplifiers is usually not as good as can be achieved with a high impedance amplifier. This is because in the high impedance amplifier.reactive impedance presented by the photodiode and hence eliminates the need for post-equalization. This leads to an improvement in the dynamic range of the amplifier by approximately the ratio of the open. the noise performance of transimpedance amplifier can almost match that of high-input impedance design. The transimpedance amplifier also has better dynamic range than that of high impedance front end. Hence a transimpedance amplifier would offer good sensitivity and better bandwidths than high impedance design without need for equalization. large dynamic range. This is mainly due to the effect of feedback resistance on the frequency response of the amplifier. [30] have compared all three topologies for a PIN-HEMT receiver and shown experimentally that the transimpedance design achieved the highest sensitivity for the same bandwidth as the other designs. In the transimpedance amplifier. With proper design. in this work. Due to its potential for high bandwidth.

4.4. The maximum transimpedance gain possible using this configuration is limited by RF . lowering input resistance improves the input pole magnitude and hence leads to higher bandwidth and lowering output resistance leads to better current drive capability.2. but this would lower the bandwidth. This configuration lowers both the input and output resistances. So to increase the transimpedance gain we need to increase RF .1 Transimpedance amplifier design The most common transimpedance amplifier (TIA) configuration is the “shuntshunt” feedback topology. TZBW can be approximated by [28]. as larger RF reduces the input pole magnitude.1) where A is the open-loop voltage gain of the amplifier. where a negative feedback network senses the voltage at the output and returns a proportional current to the input. the transimpedance gain (ZT ) is given by (neglecting the input conductance of the amplifier and the photodetector).2) 75 . A 2πCD T ZBW = (4. Due to this tradeoff. is the transimpedance-bandwidth product (TZBW).2. where RF provides feedback around an ideal voltage amplifier. CD is the sum of photodiode and amplifier input capacitances. a figure of merit used to characterize a TIA’s high speed performance. 4. using ZT at low frequencies. independent of the feedback resistance. For the amplifier in Fig. and RF is the feedback resistance. For the simple topology shown in Fig. ARF A + 1 + sRF CD ZT = (4.

1. the responsivity-bandwidth product is commonly used.1 Single-ended design A simple way to implement the core amplifier shown in Fig. there will be loss of signal level at the output. 4. to evaluate the performance of the photoreceiver (amplifier + photodetector). But.2.RF -A Iin CD Vout Figure 4. Improvement in amplifier design and the transistor structure leads to better A. if the common source stage were to drive a low impedance load. while monolithic integration and device scaling leads to reduced CD . 4. 4. The source follower also provides a low capacitance load to the common source stage. A transimpedance amplifier with a common source amplifier and a source follower output designed using a 0. Simple feedback transimpedance amplifier.3. Since the HEMT models used in the simulation were for discrete 76 . Similar to TZBW for the amplifier.1 µm HEMT model developed earlier is shown in Fig. So a source follower is usually used as a buffer to isolate the loading effect of the output stage.2 is to use a common source amplifier.

1 V RC2=120 Ω -0. All 77 .3.3 V H2 Vout H1 Photodiode 3V RF=225 Ω 2.2 V H4 H3 Figure 4.7V RD=100 Ω 5. devices. Level shifting diodes were used to appropriately bias the circuit so that all the transistors are biased very close to their peak ft values.8 V D1 D2 D3 RC1=30 Ω 1. Gate finger inductance was estimated using sparameters measured on shorted devices and was included in the model. The level shifters are modeled as forward biased gate Schottky contacts with drain and source contacts shorted. Feedback common source amplifier with source follower output. the parasitic capacitances and inductances due to the probe pads were neglected during the simulation.

we used the Agilent ADS simulator to maximize TZBW. The level shifters require wider devices because the gate diode needs to carry the high bias current with a reasonable forward bias voltage. This can be achieved by cascading more stages to the amplifier. the feedback becomes weaker. which as mentioned earlier comes at the cost of bandwidth. Since practical 40 Gbps systems require a gain of 1 kΩ to 5 kΩ [29].3) This suggests that to improve the transimpedance gain we need to increase RF .1). the open loop voltage gain of the core amplifier is approximately equal to gm1 RD and the low-frequency closed loop transimpedance gain is given by (from Eqn. 4. Since bandwidth cannot be estimated analytically due to the complex non-linear nature of the HEMT model. similar to the discrete devices used for modeling. as the frequency increases.transistors in the design are 100 µm wide with two fingers. This is because. gm2 . It is important to recognize that the TIA of Fig. A cascode current source is used to bias the source follower as it gives a high output impedance. 4. Using the simulator. we need to increase the gain further.3 exhibits an inductive output impedance. The damping resistors Rc1 and Rc2 were added to the transistor gates in the current source to suppress oscillations at high frequencies. is much less than RF . the feedback amplifier gave a low-frequency transimpedance gain of 180 Ω with a bandwidth of 53 GHz. except for the level shifters which were 500 µm wide with five fingers. If the cascaded amplifier stage were to have feedback within the common source stage. This inductive output impedance may lead to ringing if the circuit drives substantial load capacitance. lowering the loop gain [41]. gm1 RD RF 1 + gm1 RD ZT = (4. −1 If the output impedance of the source follower. the output node of 78 .

4.3 would see a resistive component in addition to the gate capacitance which can be used to control ringing. Keeping the 3-dB bandwidth to at least 50 GHz and maximizing the gain. 4. this corresponds to a responsivity of 1350 V/W.2 dBΩ) and a 3-dB bandwidth of 50 GHz (Fig. they are not expected to degrade the performance greatly. Assuming a lumped element RLC model for interconnects between transistors in the signal path with a series inductance of 20 pH. and a capacitance (to ground) of 1 fF. These results do not include the effect of interconnect parasitics. For the dual depletion photodiode (TA5000) with a responsivity of 0. a series resistance of 10 Ω. but this serves as a worst-case estimate.5). 4.the source follower in Fig. The series resistance of the parasitics themselves are not expected to be as high as 10 Ω. Since the interconnects are short. Such a cascaded stage also makes biasing easier. 79 . This configuration leads to a transimpedance gain of 4550 Ω (73. we added three more stages to the feedback amplifier as shown in Fig. 4. Inductive peaking from the interconnects can even be exploited to improve the performance of the circuit by careful modeling and design.3 A/W. the bandwidth and gain of the amplifier was found to remain almost the same.

3 V 12.7 V 100 Ω 7.9 V 30 Ω H11 500 Ω 12.2 V 120 Ω H8 3.3 V 120 Ω H4 H3 Figure 4.2 V 30 Ω 1.2 V 100 Ω 100 Ω 6.7 V H12 4.2 V D1 D2 D3 5V V 200 Ω 10.6 V H7 6.3 V 30 Ω 120 Ω 3V 80 -0.2 V 4.6 V 9.1 V H1 Photodiode 3V 270 Ω 3.2 V 500 Ω H6 H10 H9 6. .1 V 500 Ω H2 H5 Vout H13 8. Transimpedance amplifier with four amplifying stages.

T is the simulation temperature (taken to be 290 K). Channel noise generated by the DC transconductance gm was characterized by assuming a spectral density given by [1]. The noise performance of the HEMTs was estimated using the equivalent circuit modeled to characterize its performance (Fig. The noise model assumes resistors Rg .Transimpedance gain (dBΩ) 75 200 150 100 Phase (deg. 4kT < i2 > = ∆f R (4.4) where k is the Boltzmann’s constant. Rid . Rd . Transimpedance gain assuming open load. and ∆f is the noise bandwidth. and Rdb included in the EEHEMT model generate thermal noise with spectral density. Rs . 81 . 3. Ris . q is the electron charge.) 70 50 0 65 -50 -100 -150 60 0 10 20 30 40 50 -200 60 Frequency (GHz) Figure 4.15).5.

Since noise figure and noise temperature definitions assume a matched input source [39]. usually 290 K. the equivalent noise temperature Te of the circuit can be calculated using the conjugate of input admittance of the circuit (determined from s11 ) for the source admittance. The thermal noise contribution of all resistors external to the device were included with a spectral density similar to Eqn. and assumes all the thermal noise sources are uncorrelated. related to noise figure by. the noise parameters of the circuit were calculated. Te . the system can also be characterized by noise temperature. Using Te .4. Alternatively.5) The model neglects flicker noise. Sensitivity for a particular BER can be estimated by the relation [45]. the equivalent input-referred noise current of the circuit can be calculated. and Yopt is the optimum source admittance for the circuit which results in the minimum noise figure.7) where T0 is the ambient temperature. the noise figure of a two-port network is given by [17]. Rn |Ys − Yopt |2 Gs F = Fmin + (4. 82 . Rn is the equivalent noise resistance of the circuit.< i2 > 8kT gm = ∆f 3 (4. For any source admittance Ys . 4. Including these noise sources in a two port s-parameter simulation. Te T0 F =1+ (4.6) where Fmin is the minimum noise figure.

These responsivity values were measured without any anti-reflection coating.6. The total input-referred current is calculated by integrating the input-referred noise current obtained earlier from Te over the noise bandwidth. Q is a parameter related c to the BER (Q=6 for BER=10−9 . 4. This definition gives a noise bandwidth of 70 GHz for our amplifier.7 dBm. but adding further stages would decrease the dynamic range of the receiver and 83 . and A0 is the low frequency gain. this corresponds to a responsivity of -9. with a responsivity of 0.6 dBm.8) where < i2 > is the total input-referred noise current. and the receiver has sufficient noise margin. The eye diagram includes thermal noise in the system calculated with the knowledge of noise bandwidth estimated using s-parameter simulation. The transimpedance gain can be further increased by including more stages. The noise bandwidth for a system is defined by [18]. Using these relationships. and is the re- sponsivity of the photodetector. Q=7 for BER=10−12 etc. we could expect a 30 % improvement in responsivity leading to a sensitivity of -10.38 A/W.6 dBm is projected for the TIA based receiver assuming the diode structure of TA5000 with responsivity of 0. The “open” eye indicates that the effect of ISI is not significant.¯ Q P = < i2 > c (4. For a receiver based on photodiode design AA7000. A standard 40 Gbps (231 -1) RZ PRBS test pattern assuming a peak input photocurrent of 100 µA was used to generate the output “eye diagram” shown in Fig. If silicon nitride was used as a anti-reflection coating. a sensitivity of -8. 1 A2 0 ∞ fN = |A(f )|2 df 0 (4.3 A/W.9) where A is the gain of the circuit.).

This bandwidth would suffice for 40 Gb/s NRZ systems. Though our design does not include interconnect parasitics. with proper layout and design the amplifier can achieve bandwidths and gain very close to the best reported values. adding further stages will not have a significant penalty in the noise performance of the receiver. The table compares the results which have the best TZBW for different technologies reported so far. A summary of recent TIA work is given in Table 4. Since the 84 . Also. but RZ scheme requires higher bandwidths for optimum performance [56].2 Differential design The dual-absorption photodiode design evaluated earlier had a maximum bandwidth of 30 GHz. Since the input stage has both current and voltage gain. adding further stages will require accurate modeling of interconnect parasitics to calculate the performance metrics as they can play a significant role in determining the performance of the circuit.1.1. 4.Figure 4.6. including this work. Eye diagram of the output waveform for a 40 Gbps RZ PRBS pattern of length (231 − 1). add more complexity to the receiver.

there is a need to convert single-ended output from a photodiode to differential anyway. The equivalent circuit parameters of the half-diodes were estimated from the extracted values for a drift-enhanced dual-absorption diode in Table 2. we can improve the bandwidth if we decouple the two diodes and feed the outputs to a differential TIA. (2000) [52] This work dual-absorption design is essentially two diodes stacked on top of each other and is dominated by RC-limited bandwidth. The resulting equivalent circuit. we used the analytical simulation technique developed for the dual depletion diodes. To estimate the bandwidths of each half-diode from the measured parameters. (2001) [44] Roux et al.TABLE 4. combined with the transit-time limit obtained using the previously obtained drift velocities. 42]. and parasitic capacitance). sufficient for 40 Gb/s RZ schemes.1 STATUS OF HIGH-SPEED TRANSIMPEDANCE AMPLIFIERS. 85 .1 by using the half-diode junction areas (from the mask layout) to calculate the junction capacitance and depletion resistance. Technology InP HEMT GaAs MHEMT InP HBT SiGe HBT InP HEMT Bandwidth (GHz) 49 50 60 50 50 ZT (dBΩ) 52 66 71 49 73 Reference Shigematsu et al. (2003) [42] Kobayashi (2003) [29] Weiner et al. series inductance. and by halving the parasitics (series resistance. Since practical limiting amplifiers and clock and data recovery circuits which follow the TIA in a full receiver system are typically differential [40. leads to bandwidths of 50 GHz and 39 GHz for the top and bottom half-diodes respectively.

The biasing was done such that the DC bias points at the input of each arm of the differential pair was matched and all the transistors were at their peak ft ’s. All the transistors had gate length of 0. The schematic of the complete differential design is shown in Fig. The source follower fed by the common gate stage reduces the output impedance. but the phase difference degrades for frequencies above 20 GHz.1 µm. all other devices are 100 µm wide. The gain of both the stages were designed to be very close to each other. and keeps the poles at the inputs of the differential amplifier comparable. the difference in the output voltages were due to the difference in the currents generated in the top and bottom half-diodes. so to use a differential amplifier. 4. Using an open-loop common gate amplifier as the input transimpedance stage with a common source stage in one of the common gate output segments and a source follower in the other. the voltage waveforms achieve a broadband 180◦ phase difference (Fig. the output current of both the half-diodes in a dual-absorption design have the same phase. 4. The current source transistors H9 and H10 are 200 µm wide to accomodate larger bias current through them.However. Transistors H4 − H6 form a source follower and transistors H11 − H13 form the inverting common source feeding into the differential amplifier. we need to have a broadband phase difference of 180◦ between the two inputs.7). The closed-loop transimpedance amplifier stage used in the single-ended receiver with a common source stage at its output does offer 180◦ phase difference at low frequencies with another identical transimpedance stage with source follower at its output. This was achieved by using a simple inverting common source amplifier.8. 86 . Transistors H1 − H3 and H14 − H16 form the input common gate transimpedance stage to the half-diodes.

(a) Output voltage magnitude of the transimpedance stages for a 1 mW incident optical power .) 60 100 50 0 -50 -100 -150 0 10 20 30 40 50 -200 0 10 20 30 40 50 60 Frequency (GHz) Frequency (GHz) (a) (b) Figure 4.50 40 30 20 10 0 Vo1 Vo2 200 150 Vo1 Vo2 Magnitude (mV) Phase (deg.Vo1 corresponds to the common gate stage followed by a source follower (top diode).7. Vo2 corresponds to a common gate amplifier followed by a common source stage (bottom diode) (b) Vo1 and Vo2 showing a 180◦ broadband phase difference. 87 .

8 V 30 Ω 88 3V 1.4 V 100 Ω H11 120 Ω H12 5.2 V 4.5 V H14 50 Ω 2.1 V 50 Ω H1 4.3 V 30 Ω 3 V 120 Ω H2 H4 Vo1 H7 H5 H6 3. .8.10.1 V 100 Ω 4.4 V 2.1 V 8.2 V H3 1.9 V 7.1 V 120 Ω H16 -0.6 V H8 Vo2 30 Ω 6.5 V 3.7 V 3.5 V 120 Ω Photodiode 30 Ω H15 1.2 V 30 Ω H9 120 Ω H10 H13 4.4 V Figure 4.1 V 8. Differential transimpedance amplifier using a drift-enhanced dual-absorption photodiode at the input.4 V 100 Ω 100 Ω 7V Vout 10.

a 1 mW input optical power would lead to 506 µA of photocurrent in the top half-diode. If the same configuration is used with single absorption layer design (AA7000).9. we get a output voltage of 243 mV (corresponding to a transimpedance gain of 296 Ω) with a 3-dB bandwidth of 44 GHz as shown in Fig.Using the measured responsivity of the drift-enhanced dual-absorption diode. 4.1 GHz-A/W for the differential design. 4.) 100 200 50 0 150 -50 100 -100 60 0 10 20 30 40 50 Frequency (GHz) Figure 4. we get a output voltage of 150 mV with the same bandwidth.9.3 GHz-A/W for the single ended design and 36. This corresponds to a responsivity-bandwidth product of 22. and 314 µA in the bottom half-diode. 300 200 150 Output voltage (mV) 250 Phase (deg.8. Using these diodes in the differential amplifier design shown in Fig. Output voltage of the differential amplifier corresponding to 1 mW optical power. 89 .

82 A/W for the drift enhanced dual absorption photodiode. each division corresponds to 50 mV. from which input referred noise current was inferred as in the case of single-ended amplifier. To calculate the input referred noise current. 4. The output corresponding to a standard (231 − 1) 40 Gbps RZ PRBS pattern with 1 mW of incident optical power is given in Fig. 90 . Eye diagram for the differential transimpedance amplifier for a 40 Gbps PRBS pattern of length (231 − 1). this leads to an estimated sensitivity of -6.10. The low sensitivity is mainly due to the low gain of the input common gate stage.Figure 4. Thus the differential design combined with the dual absorption photodiodes provides an improved bandwidth-responsivity product compared to single ended design.93 dBm. the corresponding matrix of the equivalent two port for common mode input and differential output can be calculated. Using the current correlation matrix generated.10. Using the measured responsivity of 0. Using these values and the Y -parameters of the circuit. a four port s-parameter simulation of the circuit was done in ADS. The noise performance of the circuit was analyzed considering all the thermal noise sources similar to the single-ended design. the noise parameters of the two port was calculated. The open eye shows that the receiver has sufficient bandwidth for 40 Gbps performance.

Theoretical models indicate that the drift-enhanced dual-absorption design can achieve 24% improvement in bandwidth-efficiency over the conventional top-illuminated PIN photodetectors. Since photodiodes need electronic preamplification.1 Conclusions High speed photodiodes and HEMTs in the InP material system essential for photoreceivers in long-haul fiber-optic communication systems have been designed and fabricated. Photodiodes with bandwidths as high as 60 GHz with a responsivity of 0. high frequency HEMTs with gate lengths as small as 0.CHAPTER 5 SUMMARY 5. A novel drift-enhanced dual-absorption photodiode design was proposed and demonstrated to ease the bandwidth-efficiency tradeoff common in PIN detectors. Non-linear models were developed to describe the performance of both the high-speed photodiodes and the HEMTs.1 µm were demonstrated using electron beam lithography. Using the dual-depletion photodiodes with 0.1 µm HEMTs. Diodes fabricated using this design achieved bandwidths of 30 GHz into a 50 Ω load with a responsivity of 0.82 A/W. a single-ended transimpedance amplifier was 91 .3 A/W have been demonstrated. These models were used to design monolithic PIN/HEMT transimpedance photoreceivers. The T-gate structure developed for these short gate HEMTs allowed these transistors to achieve cutoff frequencies over 200 GHz.

A novel differential transimpedance amplifier design using dual-absorption photodiodes was proposed to ease the responsivity-bandwidth product further. Noise characterization of both the single-ended and differential TIAs needs to be done to understand the limitations of the noise model and to better estimate the sensitivity of the photoreceiver. they are much faster than conventional photodiodes where holes play a significant role. This design achieved better responsivity than conventional designs and makes the dual-absorption photodiode a very attractive candidate for the high-speed highefficiency photoreceivers required in long-haul fiber-optic communication systems. 92 . By extending the dual-absorption concept to UTC-PDs.designed which achieved a gain of 4. But the UTC-PD structure is inherently limited in responsivity due to the thin absorption layer in its design. UTC-PDs rely on absorption in a doped (undepleted) layer with subsequent electron injection into a non-absorbing wide-bandgap drift layer. The photoreceivers need to be optimized as a whole to improve their bandwidthresponsivity product.2 Future work The dual-absorption design can be easily extended to improve the efficiency of other photodetector architectures. Since UTC-PDs depend only on electrons for carrier transport.5 kΩ with a 50 GHz bandwidth. 5. this limitation can be eased considerably. The dual-absorption design combined with the proposed differential TIA design leads to some interesting possibilities and requires further investigation. For example. corresponding to a better TZBW than the best reported value in the literature for HEMT based TIAs.

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