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during normal program execution. The best example of the random need for attention is the use of the keyboard on a computer. Every time a key is pressed, the microprocessor must deal with an activity. Other peripheral devices such as disk drives, CRT’s and printers also need to interact with the microprocessor. Just how the microprocessor accomplishes the task of working these devices is the subject of this device. 4.1 Polling • Technique/approach to taking care of peripheral devices. • Microprocessor checking each device in rotation at frequent intervals to see if it need service. • The computer time spent in polling is largely wasted. • Not efficient when the processor needs to perform other tasks. • Need better system that allow processor to be free to continue normal sequential execution and only stop to deal with a peripheral when it specially needed attention. • So that, interrupt system has been design to satisfy the requirement for external input control and freeing the CPU from waiting for events to occur. 4.1.1 Concept hardware interrupt INTERRUPT
1. What is interrupt? • Interrupt is a call for the microprocessor to interact or service the interrupting unit. • The interrupt will cause the computer to suspend the program being executed and jump into a special interrupt processing program. • There are many circumstances under which it would be desirable to interrupt the normal flow of a program in the computer to react to special event. • Example: User command from keyboard Command from other external input Abnormal situation – power failure Execution of an illegal instruction Completion signaling of an I/O task 2. Interrupt capability • • • • • lines. Allow computer to take special actions when required. Used to time-share the CPU between several different programs at once. Satisfy the requirement for external input control. Provides the desirable feature of freeing the CPU from waiting for events to occur. Provides one or more special control lines to the central processor know as interrupt
Printer Mouse IRQ CPU IRQ Disk Drive IRQ IRQ Keyboard IRQ – Interrupt ReQuest . The return includes restoring the microprocessor to its exact condition before the interrupt occurred. it would return control to the interrupted program. Pertinent information including: Location of the last instruction executed.1. 1) The microprocessor finished the current instruction. i. i. • Interrupt handler program – action taken by the processor when an interrupt occurs. iii.The messages sent to the computer on these IRQ lines also known as interrupt. until the end of an instruction cycle. The processor returns from an interrupt. the processor will then execute the interrupt routine called for. 2 . 2) Normal operation is suspended. Also known as interrupt routine. The contents of the registers and the status of microprocessor in general must be preserved so that it can again resume operation when the interrupt has been serviced. • The process of determining the appropriate course of action by the interrupt handler program (interrupt routine) is known as servicing the interrupt. The interrupt signal will not be acknowledge until the current instruction is carried out. All the pertinent information about the program being suspended is saved/preserved in a known part of memory. Values of data in various registers that contain pieces of information relate to the algorithm being carried out when the interrupt occurred. 3) The microprocessor jumps to the location in memory where the interrupt service routine has been stored and executes the routine. Either in a special area associated with the program (process control block) or in a part of memory known as stack area. • When interrupt occurs. 4. ii. 4) When interrupt routine complete its task. • There are 4 distinct steps that microprocessor takes after an interrupt. The address of the routine may be fixed in the microprocessor design.2 Interrupt service • The interrupt will cause the computer to suspend the program being executed and jump to a special interrupt processing program.
1.1: Servicing an interrupt Interrupt Normal Execution Finish Current Instruction Suspend Operation Store registers Jump to Subroutine and Execute Return to Normal Operation Restore Microprocessor Status Contents of registers stored in stack Contents of registers returned from stack Normal Execution Continues Figure 4. iii.2: Sequence of event during interrupt 4. The original program would resume execution exactly where it left off.3 Usage of interrupt 3 . Figure 4. iv. All registers were restored to their original values. the program counter (PC) is loaded with retrieval address of instruction that would have been executed if an interrupt had not occurred. The information they contained must be retrieved from memory and placed back in their respective registers.ii. Finally.
it would perform the required action. ii) As a completion signal. the input character would be stored in a known memory location. The current program is suspended. the computer normally restores the register values and returns control to the suspended program. that is. 4 . iii) As a means of allocating CPU time. This program would be case. This causes an interrupt to occur. when the interrupt has been serviced. Example: Keyboard input. • • Interrupt are useful as notifiers to the CPU of external events that Frees the CPU from necessity of performing polling. Otherwise. Figure 4. Figure 4. for example. unless the interrupt specifies a different course of action. ready for the program to use when it is reactivated. and determines what character has been received.3 shows the steps in processing a keyboard input interrupt. Normally. it would pass data to the program expecting input from that keyboard. If so. Suppose a key is struck on the keyboard. and control is transferred to the keyboard interrupt handler program. The keyboard interrupt handler first inputs the character. if the user typed a command to suspend the program being run.• • The way in which an interrupt is used depends on the nature of the device. for example. suspending the program or freezing the data on the screen. ii) The interrupt as a completion signal • Controlling the flow of data to an output device. i) The interrupts as an external event notifier • require action. It would next determine if the input is one that requires special action. There are several different ways in which interrupt are used: i) As an external event notifier. When the action is complete.3: Using a keyboard handler interrupt Keyboard input can be processed using a combination of programmed I/O and interrupt. using programmed I/O. iv) As an abnormal event indicator.
Figure 4. The computer capable of outputting characters to the printer much faster than the printer can handle them. • The CPU can only execute one program at a time. depending on the type of printer. the interrupt capability prevents the loss of output.4 shows this application. Figure 4.5 shows this application.4: Using a print handler interrupt The computer sends one or more characters at a time to the printer. • Example: Printer • Printer is a slow output device. This interrupt indicates that the printer has completed printing the characters previously received and is ready for more characters. Figure 4. it would be necessary to output characters at a very slow rate to assure that the computer did not exceed the ability of the printer to accept output. that program is interrupted and relinquishes control to a dispatcher program within the operating system (OS) that allocates the next block of time to another program. When the printer is ready to accept more characters. • Interrupt capability prevents the loss of output and allows the printer to control the flow of characters to a rate that printer can accept. • Each program is allowed to execute some instructions. • After a certain period of time. 5 . • Interrupt can be used to control the flow of characters to the printer in an efficient way. since it allows the printer to control the flow of characters to a rate that the printer can accept. Without the interrupt capability. it sends an interrupt to the computer.• Interrupt serves to notify the computer of completion of a particular course of action. iii) The interrupt as a means of allocating CPU time • Interrupt is used as a method of allocating CPU time to different programs that are sharing the CPU. • Allows the CPU to perform other tasks while it waits for the printer to complete its printing. The use of an interrupt also allows the CPU to perform other tasks while it wait for the printer to complete its printing. In this case. in rapid rotation among them. • Time share multiple programs implies that the computer system must share the CPU by allocating small segments of time to each program.
such as parity error. • This is effective method for allowing the OS to share CPU resources among several programs at once.4 Multiple interrupt and prioritization 6 .1. 4. the interrupt routine returns control to the OS. Internal interrupts are sometimes called traps or exceptions. Example: Execution of an illegal instruction. • When the interrupt clock occurs.Figure 4. OS determines which program will receive CPU time next. whereas the other interrupt that we have discussed so far are generated externally. Interrupt routine can notify the user of the error and return control of the CPU to the operating system program. close open files. i) Divide by zero ii) Nonexistent op code iii) Hardware error detected • One obvious example of an external event requiring special computer action is power failure. provided that the computer has quick notification of the power failure. When the error occurs it is not possible to complete the executing program. You should notice that these interrupt are actually generated from inside the CPU. and perform other housekeeping operations that will allow the computer to restart without loss any data. iv) The interrupt as an abnormal event indicator • Interrupt used to handle abnormal events that effect operation of the computer system. • The time between interrupt pulses is known as a quantum.5: Using an interrupt for time sharing • The computer system provides an internal clock that sends an interrupt periodically to the CPU. System will attempt to recover from the error and that the appropriate personnel be notified. A power line monitor that connects to the interrupt facility provides this capability. The interrupt routine will save the status of programs that are in memory. • The events are directed at the problems within the computer system itself. • Another important application is when a program attempt to execute an illegal instruction such as a divided by 0 or a nonexistent op code or when a hardware error is detected. It will then halt the computer. Most computers provide enough internal power storage to save the work that being performed and to shut down gracefully.
6 shows a simple example of this situation. • This leads to hierarchy of interrupts.• There are many different input and output devices and event indicators connected to interrupt lines. i) Logical way • Highest priority are reserved for time sensitive situation. external event. • Lower priority usually for task completion interrupts. interrupt routine C is the highest priority. In this figure. • A higher priority interrupt will be allowed to interrupt an interrupt of lower priority. Used chips that perform a prioritizing function. Figure 4. There are three methods used to establish priorities: i) Logical way ii) Hardware or software iii) Assigning a priority number to each interrupts. Connecting most critical devices to the interrupt pin with the highest priority.Power failure. eventually returning control to the original program that was running. 7 . followed by B and A. Figure 4. • Lower priority interrupt will have to wait until a higher priority interrupt is completed.6: Multiple interrupts • • Most computer system allows the system manager to establish priorities for various interrupt. . • Two different processing method used for determining which device initiated interrupt: i) Vectored interrupt ii) Polling • Multiple interrupt can be handled by assigning priorities to each interrupt – handle top priority first. ii) Hardware or software • • • Highest priority devices are placed closest to the CPU. back and forth. • Multiple interrupts will occur from time to time. in which higher-priority interrupts can interrupt other interrupts of lower priority.
Sends the interrupt on to the microprocessor along with the address of the interrupt routine to execute. 2000 On the instruction located at 1003. Address routine. • When the interrupt request occurs. Vectored to new location 1000 1001 1002 8 20 (Hi) 00 (Lo) . interrupt 1 is received.All peripheral devices are connected to the interrupt controller chip. • The interrupt will then check the assigned address to get the interrupt routine. Interrupt caused the microprocessor to check assigned address.7(a): Program is interrupted while working at location 1003h Program Counter The microprocessor is executing the normal program sequence. 2000h loaded into program counter address register and routine is executed. • Assigned address contains the address of the routine to be executed. the microprocessor will automatically load the program counter with the assigned address. Vectored Interrupt • Address of the interrupting device is included as a part of the interrupt. • Example: Assume that assigned interrupt address is FFFAH and FFFBH Hex Address Program Counter 1003 Interrupt 1 occurs 1000 1001 1002 1003 1004 2000 2001 2002 2030 FFFA 0 0 1 0 0 0 0 0 20 (Hi) FFFB 0 0 0 0 0 0 0 0 00 (Lo) FFFC FFFD FFFE Address Hex FFFF Figure 4. Vectored address FFFA and FFFB contains the address of interrupt routine.
processor returns to the next sequential address in the normal routine. 2000h loaded into program counter address register and routine is executed. the program is returned from interrupt At the end of subroutine.7(b): Vectored interrupt has sent program to execute at new location Interrupt caused the microprocessor to check the assigned address for vector. Vectored address FFFA and FFFB contains the address of interrupt routine.7(c): After the routine is finished at location 2030h. Address routine.1003 1004 2000 2001 2002 2030 FFFA 0 0 1 0 0 0 0 0 FFFB 0 0 0 0 0 0 0 0 FFFC FFFD FFFE FFFF Figure 4. Hex Address Program Counter 1004 1000 1001 1002 1003 1004 2000 2001 2002 2030 RETURN 20 (Hi) FFFA 0 0 1 0 0 0 0 0 FFFB 0 0 0 0 0 0 0 0 00 (Lo) FFFC FFFD FFFE FFFF Figure 4. Types of interrupt 9 .
10 . . Hardware stack • • • • A number of registers set aside within the processor to serve as the stack location. . . Obviously. • • • Most interrupt can be temporary disable by program instruction when a program is performing a critical task that would be negatively affected if an interrupt were to occur. These locations in memory are specified by manufacturer of the microprocessor chip.interrupt that will always be acknowledged and accepted. some or all of the microprocessor registers may be used. • Software interrupt are vectored interrupt if the processor has such instruction. 4. • The various interrupts can be masked by assigning each interrupt possible a bit position in an interrupt mask register.5 Software interrupt • Behave much like hardware interrupt. The advantage of hardware stack is rapid access and therefore. • Application of software interrupt is to centralize I/O operations. • Software interrupt make the interrupt routine available for use by other programs. But the size of the stack is limited by the number of registers that can be provided. so the microprocessor does not accept them. to return the microprocessor to its pre-interrupt status requires a procedure to accomplish this. • Similar to a known fixed location. • Many interrupt use fixed locations for vector address. speed.1. • Often used to jump to other programs in memory. What is stack? • The location where the contents of the registers in the microprocessor are temporary stored. except that software interrupt are written into the main program and executed in the course of sequential operation.interrupt that not be accepted.• Interrupt can be divided into TWO categories: i) Maskable ii) Non-maskable Maskable – interrupt that can be selectively disabled.interrupt that never disabled. 4. • The instruction will send the processor to create the assigned address for vectored location of the interrupt service routine.Used by each program to request I/O from the operating system software.example: power failure. Non-maskable .2 STACK During an interrupt routine. Restrict the flexibility of a microprocessor. . • Program can access these routine simply be executing the INT instruction with appropriate parameter. This would destroy data previously in the registers if their contents were not saved in some way. • These interrupt can then be disabled or masked.
However. When stack instruction occurs. Stack pointer • Hold the address of the stack.Stack is an excellent method for storing the return address and arguments for subroutine calls. stacks are used just about any time a subroutine is called. each entered or stacked on the last entry.1 • i) Function of stacks – interrupt. In fact. When interrupt occurs. pop ii) iii) iv) v) 4. Figure 4. • Whenever a stack is required. subroutine There are a lot of situations that need the used of interrupt: When a subroutine is called. • The software stack is almost unlimited in size and can reside anywhere in memory.2. stack can also be built independently of an interrupt request.8.8 (A): Stack of plate illustrating First In Concept First plate in Plate taken off stacked First plate in will be last plate out 11 . the stack pointer register will track its location by holding the 16-bit stack address.Software stack • An area in RAM for temporary storage of data and registers contents. It is analogous to the way plates are stack at a salad bar. one byte at a time. Efficient way of storing intermediate data values during complex calculations. • This implementation causes the need for a special register in the microprocessor called the stack pointer register. Plate stacked Figure 4. 4.2 • The stack address is built.2. Stack operation – push. • Building this stack is an inherent part of the interrupt signal. . To store data when the most recently used data will also be the first need.
Directions of occupied address are moving toward lower address. If a bit is set. BYTE X X X 1 0 0 1 1 Flag Register Accumulator B Accumulator A D Register PC Register The D register. when an interrupt is completed. 12 .Figure 4. however do sometimes allow a choice as to which register to save. • Each bit position can be assigned to a register. .3 Stack building Most stack operations are however automatic. For example. • The call or JSR instruction always saves the contents of the program counter. the register is not saved.2. The others are clear. for instance. 4. accumulator B and the flag register would be push or saved to the stack. That is. • The stack builds downward. indicating that the registers they are represent will not be saved to stack.4 Examples – multiple interrupts & subroutine Subroutine Calls • A subroutine is an out-sequence part of the program that can be accessed by the jump to subroutine (JSR) or a call instruction. • For some operations. • Stack operate by LIFO (Last In First Out) • The last byte put on the stack will be the first byte retrieved from the stack. the register is saved. if the byte XXX10011 follow the PUSH instruction.2. 4. This is because the bit corresponding to those registers is set. to push byte onto the stack and PULL or POP to take a byte off the stack. • Naming the registers to be saved is accomplished within the byte following a PUSH instruction. • The individual stack instructions. If a bit position is clear. the entire process of saving the contents of registers is done automatically whenever a subroutine call is encountered. • Stack instructions use assembly language mnemonics like PUSH. The last plate off the stack is the last plate placed of the stack. only those register whose content is important are saving in the stack – save valuable processor time.8 (B): Stack of Plate Last Out Concept • The first plate put on the stack is at the bottom.
another subroutine is required.10 shows the main program loaded in memory from location 0200H to 0350H. The instruction occupies three bytes of memory. One routine is nested in another. one for the instruction and two for the address of the subroutine to be executed. This address is loaded into the program counter register. The JSR instruction occupies 3 bytes as before. Note that the top of the stack is now addressing F009h. it encounters a JSR instruction at location 0210H.Figure 4. 0213H is the address of the next instruction in the main program. Again the. The next instruction that would have been executed is at location 0213H. Program The first routine then continues until the RETURN instruction is found. The return instruction POPs the address off the top of the stack and loads it into the register of program counter. is 1018H. where the last in address is stored. At location 1015H. When subroutines call on other subroutine. Return to Main Subroutines can be called at any time and as often as needed. etc. One subroutine can call another and this routine can call a third. the programs are said to be nested. The RETURN instruction does not need an address because the address to return to has stored on the stack. Now the microprocessor begins executing the second subroutine. The micro program knows that the JSR instruction requires 3 bytes and. therefore. This where the program was Main executing the first subroutine when the second call instruction was encountered. 13H. places address 0213H on the stack. JSR @ 1000 The address on the top of the stack. As the program executes. The top address of the stack is F00AH and will contain the high byte 02H and F009H will contain the low byte. The microprocessor then begins executing instruction at location 1000H. microprocessor places the address of the next instruction to be execute on the stack. it is also possible to call it. Now the top address in the stack is 0213H. location F007h. this time at location 2000H. The JSR instruction then cause the program counter address register to be loaded with the address of the subroutine. The second routine finishes at location 2010H when the RETURN instruction is reached. If another subroutine is required. 0000 1 Subroutine st 0200 0210 0211 0212 0213 0350 Jump Instruction 10 Hi Byte 00 Lo Byte Continue Main JSR @ 2000 Return to 1st 2nd Subroutine 1000 Stack Storing Address to Return to 13 .
1015 1016 1017 1018 1019 102A Jump Instruction 20 Hi Byte 00 Lo Byte Return 2000 2nd Subroutine 2010 Return F007 F008 F009 F00A 18 Lo 10 Hi 13 Lo 02 Hi Figure 4.10: Sequence of Events and Memory Locations 14 .
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