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5, MAY 2011

1385

A Generalized Scalar PWM Approach With Easy Implementation Features for Three-Phase, Three-Wire Voltage-Source Inverters

Ahmet M. Hava, Member, IEEE, and N. Onur Cetin, Student Member, IEEE ¸

Abstract—The generalized scalar pulse width modulation (PWM) approach, which unites the conventional PWM methods and most recently developed reduced common mode voltage PWM methods under one umbrella, is established. Through a detailed example, the procedure to generate the pulse patterns of these PWM methods via the generalized scalar PWM approach is illustrated. With this approach, it becomes an easy task to program the pulse patterns of various high performance PWM methods and beneﬁt from their performance in modern three-phase, threewire voltage-source inverters for applications such as motor drives, PWM rectiﬁers, and active ﬁlters. The theory is veriﬁed by laboratory experiments. Easy and successful implementation of various high-performance PWM methods is illustrated for a motor drive. Index Terms—Carrier, common-mode voltage, discontinuous PWM (DPWM), generalized scalar PWM, inverter, modulation, near state PWM (NSPWM), pulse width modulation (PWM), PWM implementation, scalar, space vector, space vector PWM (SVPWM), zero sequence.

Fig. 1.

Circuit diagram of a PWM-VSI drive connected to an R-L-E type load.

I. INTRODUCTION

T

HREE-PHASE, three-wire voltage-source inverters (VSI) are widely utilized in ac motor drive and utility interface applications requiring high performance and high efﬁciency. In Fig. 1, the standard three-phase two-level VSI circuit diagram is illustrated. The classical VSI generates ac output voltage from dc input voltage with required magnitude and frequency by programming high-frequency rectangular voltage pulses. The carrier-based pulse width modulation (PWM) technique is the preferred approach in most applications due to the low-harmonic distortion waveform characteristics with well-deﬁned harmonic spectrum, ﬁxed switching frequency, and implementation simplicity. Carrier-based PWM methods employ the “per-carrier cycle volt-second balance” principle to program a desirable inverter output voltage waveform [1]. In every PWM cycle, the reference voltage, which is ﬁxed over the PWM cycle, corresponds to a ﬁxed volt-second value. According to the volt-second balance principle, the inverter output voltages made of rectangular voltage pulses must result in the same volt-seconds as this reference volt-second value.

∗ Fig. 2. Triangle intersection PWM phase “a” modulation wave v a , switching signal and va o voltage.

Manuscript received April 12, 2010; revised September 7, 2010; accepted September 9, 2010. Date of current version June 22, 2011. Recommended by Associate Editor J. A. Pomilio. The authors are with the Department of Electrical and Electronics Engineering, Middle East Technical University, Ankara 06531, Turkey (e-mail: hava@eee.metu.edu.tr; ocetin@eee.metu.edu.tr). Digital Object Identiﬁer 10.1109/TPEL.2010.2081689

There are two main implementation techniques for carrierbased PWM methods: 1) scalar implementation and 2) space vector implementation. In the scalar approach, as shown in Fig. 2, for each inverter phase, a modulation wave is compared with a triangular carrier wave [using analog circuits or digital hardware units (PWM units) as conventionally found in motor control microcontroller or DSP chips] and the intersections deﬁne the switching instants for the associated inverter leg switches. In the space vector approach, as illustrated in the space vector diagram in Fig. 3, the time lengths of the inverter states are precalculated for each carrier cycle by employing space vector theory and the voltage pulses are directly programmed [2], [3]. The mathematics involved in the scalar method modulation waves and the space vector calculations is related. With proper modulation waves, the scalar and space vector PWM pulse patterns can be made identical [1]. Thus, both techniques may have equivalent performance results. But the

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the reference voltages of each leg have the same shape but they are 120◦ phase shifted from each other. the inverter line-to-line voltage per-carrier cycle average value is not affected. then a modulation wave consisting of sinusoidal form with proper fundamental frequency and magnitude is compared with the high-frequency carrier wave. voltage linearity. In particular. no neutral current path exists (except for very high frequencies where circuit parasitic capacitances establish a current ﬂow path) and only the inverter line-to-line voltages determine the load current subcarrier frequency content. The period of the carrier wave is equal to one PWM period (TS ). To obtain sinusoidal output voltages. an output voltage with a desirable value is obtained by creating a reference voltage and matching this reference voltage with the pulse width modulated inverter output voltages for each PWM period. The per-carrier cycle average value of the voltage of one VSI leg output (vao ) (phase to dc bus midpoint voltage) is equal to the ∗ reference value of that leg ( va ) due to the volt-second balance principle. VOL. Thus. in the scalar implementation three symmetric and 120◦ phase shifted sinusoidal modulation waves are compared with the carrier wave and this method is called as the conventional SPWM method. The upper and lower switches of each leg operate in complementary manner (Sa + = 1 → Sa− = 0). If a sinusoidal fundamental output voltage is wanted. and remote state PWM (RSPWM) [15] methods. 3. Therefore. However. This paper ﬁrst reviews the PWM principles and establishes a general scalar approach that treats the conventional and RCMV– PWM methods. . However. The injection of a zerosequence signal simultaneously shifts each reference wave in the vertical direction (with respect to the carrier wave). the reference (modulation) wave of each ∗ ∗ ∗ phase (va . In scalar PWM. Based on the scalar or vector approach. scalar approach is simpler than the space vector approach from the implementation perspective as the involved computations are generally fewer and less complex [1]–[9]. and switching frequency characteristics [1]. 8). While the former method provides low harmonic distortion. in a PWM period (TS ). compared to SPWM. Sb + . as will be discussed in the following. the latter yields low switching losses. Voltage space vectors of three-phase two-level inverter. the average value of the output voltage is equal to the reference value. three-wire inverters where the neutral point of the load is isolated. II. under balanced operating conditions. which will be symbolized with vno . MAY 2011 Fig. In three-phase. The experimental results verify the feasibility of the proposed approach. if the modulation wave is larger (smaller) than carrier wave. it signiﬁcantly inﬂuences the harmonic distortion. the overall inverter performance increases substantially over SPWM. The upper switch states are shown in the brackets (Sa + . The paper then reviews the pulse patterns and performance of the popular PWM methods. According to this principle. 2). and the recently developed active zero state PWM (AZSPWM) methods [12]. the implementation of these methods is not easy and not reported in the literature to sufﬁcient depth. Furthermore. Obtained with zero-sequence signal injection. [3]. the n-o potential in Fig. discontinuous PWM1 (DPWM1) [11]. [13]. the zero-sequence signal injection technique has been in wide utilization in practice. [18]. 26. The fundamental output voltage (may be obtained by removing the PWM ripple from the output voltage) has the same waveform as the modulation wave. [17]. can be freely varied. Thus. are a few (and the most important ones) to name. near state PWM (NSPWM) [14]. there are various PWM methods proposed in the literature which differ in terms of their voltage linearity range. SVPWM [1]. constraining the reference modulation waves to pure sinusoidal form is not favorable in most cases. Sc + ). ripple voltage/current. [18] and DPWM1 [11]. Ever since this advantage has been understood. and high-frequency common mode voltage/current properties. space vector PWM (SVPWM) [3].1386 IEEE TRANSACTIONS ON POWER ELECTRONICS. Therefore. three-wire VSIs. “1” is ON and “0” is OFF state. With a proper zero-sequence signal injection (theoretically. and unites most methods under one umbrella. Furthermore. the upper switch is ON (OFF). the last few have been recently developed with the quest for reducing the VSI common mode voltage (CMV) magnitude [16]. any common bias voltage (zero-sequence signal (v0 ) can be added (injected) to the SPWM reference voltages (modulation waves). v0 changes the position of the output line-to-line voltage pulses (see Fig. REVIEW OF THE CARRIER-BASED PWM PRINCIPLES The PWM approach is based on the “per-carrier cycle voltsecond balance” principle. in three-phase. 1. In such applications. which is a generally applicable principle to all power electronic converters. vb . the fundamental constraint in programming the PWM pulses for each phase involves the volt-seconds balance. vc ) is compared with a carrier wave (vtri ) and the intersections deﬁne the switching instants for switches of the associated inverter phase leg (see Fig. the relation between the conventional and recently developed reduced CMV (RCMV) PWM methods is not well understood both in terms of implementation characteristics and performance characteristics. which has been used in motor drives for many decades [10]. [2]. However. The conventional sinusoidal PWM (SPWM) [10]. and provides guidance for simple practical implementation which is favorable over the conventional methods (space vector or scalar [1]–[9]). Therefore. In a three-phase VSI. difﬁculties arise in implementing and understanding the performance attributes of these PWM methods. Therefore. In a PWM period. [19] are two highly popular examples. NO. switching losses. inﬁnite choices exists! [1]). 5.

First. three-wire VSIs. This is because some PWM methods with favorable pulse patterns have been ﬁrst invented based on the space vector approach [12]. The carrier waves may be triangular or sawtooth. 3) in the following equation: Fig. [21]). low switching loss. in most cases. In all these cases. While this constraint allows easy implementation of conventional PWM methods. (b) B-type region. Thus. Therefore. the scalar method-based equivalents are easy to implement. and two of them (V0 and V7 ) are zero-voltage vectors (which provide degree of controllability similar to the zero-sequence signal of the scalar implementation) which generate zero output voltage. THREE-WIRE ¸ 1387 both methods extend the voltage linearity range of the VSI by 15% [20]. 3. 3 a (1) Since there are eight possible inverter states available. the space vector implemented SVPWM and AZSPWM1 utilize A-type and NSPWM utilizes B-type segments [14]. most useful PWM pulse patterns could be obtained by this approach [1]. as will be discussed in the next section. the vector space is divided into segments. Second. the implementation is straightforward. The next section will formally treat the subject and explore the possibilities. Investigations reveal that all space vector PWM methods utilize either A-type or B-type segments. as a different approach to form the PWM pulse pattern from the scalar approach requires a brief review at this stage. the zero-sequence signals can be arbitrarily generated. but quite laborious [2]–[9]. but generating them based on the phase reference voltages (original modulation signals) provides signiﬁcant advantages. the direct space vector implementation is always a difﬁcult task for a PWM generator. The carrier of a phase may be phase shifted with respect to the carriers of other phases. and these voltage vectors are applied with . [21]. six of them (V1 . vector time lengths. and selecting the phase relation between the V∗ = 2 ∗ ∗ ∗ ∗ v + avb + a2 vc =V1m ej ω e t . The aforementioned discussions indicate that in the scalar implementation both the zero-sequence signal and the carrier signals allow degrees of freedom to obtain various PWM pulse patterns with substantial differences in performance. the calculated duty cycles: 7 V k tk = V ∗ T S k =0 7 (2) tk = TS . then corrections to the vector duty calculations or recalculations with the modiﬁed reference vector become necessary. V6 ) are active voltage vectors. V5 . Until present. the space vector approach. Section III provides the generalized scalar PWM implementation approach which overcomes the involved procedure and computations. some others are undiscovered. employing the complex variable transformation. For example. recent studies have illustrated that employing triangular carrier waves at the same frequency. However. (a) A-type region. the phase switch duty cycles are calculated and loaded to the PWM counter of the PWM generator of a control board of the VSI. Voltage space vectors and 60◦ sector deﬁnitions. V3 . There are six A-type and six B-type segments available (see Fig. to be obtained with aid of the generalized scalar PWM approach. Thus. In the space vector analysis. It may even be at a different frequency. In the space vector approach. The space vectors segments must be found and vector duty cycles must be calculated. the zero-sequence signals are obtained by evaluating the reference voltages. and the utilized voltage vectors of these PWM methods alternate at the boundaries of the corresponding segments [16]. 4). given a vector sequence. Then. the duty cycles of the voltage vectors are calculated according to the vector volt-second balance rule deﬁned in the following equations. Should the reference voltage tip point fall out of the inverter voltage hexagon (overmodulation condition [20]. 4.HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE. and sequences. While the space vector implementation of such pulse patterns is laborious. for each phase. [18]. V4 . where a = ej (2π /3) . k =0 (3) Each PWM method utilizes different voltage vectors. Of these voltage vectors. GENERALIZED SCALAR PWM APPROACH The generalized scalar PWM approach provides degrees of freedom in the choice of both the zero-sequence signal and the carrier waves [22]. In the space vector approach. the carrier waves of different phases can be selected arbitrarily. [13] and their scalar equivalents will be found during the aforementioned discussed exploration state. While some of these possibilities have been explored in the past. not only the modulation waves. III. conventionally one common triangular carrier wave is utilized for all phases due to its symmetric switching sequence which results in low harmonic distortion. In three-phase VSIs. Therefore. it also constrains the variety of PWM methods with the scalar implementation. V2 . [16]. However. and “one switching at a time” characteristics. but also the carrier waves are per phase and can be arbitrarily selected. it is important to show the pulse pattern equivalency and implementation advantage. the volt-seconds balance is not affected and the per-carrier cycle average value of the VSI leg output voltage is retained. the vector transformation yields eight voltage vectors as shown in Fig. the time domain phase reference voltages are translated to the complex reference voltage vector (V ∗ ) ∗ with the magnitude (V1m ) that rotates in the complex coordinates with the ωe t angular speed (see Fig. In three-phase.

Block diagram of the conventional scalar PWM method employing zero-sequence signal injection and a common triangular carrier wave. for x ∈ {a. the ﬁnal reference (modulation) signals (voltage references with double star superscripts) are generated. For both cases. in the CPWM methods. the zerosequence signal of these CPWM methods is found. and vc are the original sinusoidal reference signals and v0 is the zero-sequence signal. the triangle and modulation waves intersect. [24]. The zero-sequence signal of the widely utilized continuous PWM (CPWM) methods is generated by employing the minimum magnitude test which compares the magnitudes of the threephase original reference signals and selects the signal which has minimum magnitude [1]. the ratio of the fundamental component magnitude of the line to neutral inverter output voltage (V1m ) to the fundamental component magnitude of the six-step mode voltage (V1m -6 -step = 2Vdc /π) is termed the modulation index Mi [1] Mi = V1m V1m -6 -step (9) (4) + v0 + v0 (5) (6) 2π 3 2π 3 ∗ ∗ ∗ where va . then v0 = (sign(va )) · (Vdc /2) − va . the generalized scalar PWM approach will favor such constraints for the purpose of keeping the scope of the paper within practical boundaries. voltage utilization level) term at this stage. only one triangular carrier wave is utilized for all phases. [23]. the individual modulation and carrier waves are compared to determine the associated inverter leg switch states and output voltages. In the generalized scalar approach. the duty cycle of each switch can be easily calculated in the following for both single and multicarrier methods: dx+ = 1 2 1+ ∗∗ vx Vdc /2 . Modulation waveforms and zero-sequence signals of the popular PWM methods (Mi = 0. and ON and OFF switchings always occur. MAY 2011 Fig. ∗ ∗ ∗ ∗ ∗ Assume |va | ≥ |vb |. Fig. 7). Using the zero-sequence There are two commonly used zero-sequence signals in practical applications (see Fig. b. In the conventional approach (see Fig. the phase signal which is the largest in magnitude is clamped to the dc bus with the same polarity [1]. simple magnitude rules described in [1] are utilized to generate these signals.1388 IEEE TRANSACTIONS ON POWER ELECTRONICS. Block diagram of the generalized carrier-based scalar PWM employing the zero-sequence signal injection principle and multicarrier signals. 5. Fig. In the most common DPWM modulation wave (in the literature recognized as the DPWM1 modulation wave). In the scalar representation. The two popular zero-sequence signal . The inverter leg whose modulation wave is clamped to the dc bus is not switched. Assume ∗ ∗ ∗ ∗ |va | ≤ |vb |. b. Given the described set of constraints. Further relaxing the constraints and investigating alternative pulse patterns with favorable characteristics is a subject matter of future research. 6. |vc |. switching losses are reduced in DPWM methods.5. 6). Then. This modulation wave is recognized as SVPWM modulation wave in [1]. the modulation waves are always within the carrier triangle peak boundaries. therefore. the modulation waves are deﬁned as follows: ∗∗ ∗ ∗ va = va + v0 = V1m cos(ωe t) + v0 ∗∗ ∗ ∗ vb = vb + v0 = V1m cos ωe t − ∗∗ ∗ ∗ vc = vc + v0 = V1m cos ωe t + It is helpful to deﬁne a modulation index (Mi . 5. Scaling this signal by 0.7). VOL. c} . 26. The clamped phase is alternated throughout the fundamental cycle. the zero-sequence signal is injected such that reference signal of one phase is always clamped to the positive or negative dc bus. |vc |. which is the special case of generalized approach. for x ∈ {a. then v0 = 5 · va . For a given dc-link voltage (Vdc ). signal injected modulation waves. according to the original three-phase sinusoidal reference signals (voltage references with single star superscripts) and zero-sequence signals. within every carrier cycle. 7. NO. 5. In discontinuous PWM (DPWM) methods. c} (7) (8) dx− = 1 − dx+ . carrier waves of different phases based on the voltage references yields favorable results [14]. As a result. the generalized block diagram of scalar PWM approach with zero-sequence signal injection principle is illustrated in Fig. vb . Inside the voltage linearity region.

the theoretically inﬁnite choice of methods. [2]. 4. AZSPWM3. is not discussed in this paper. However. Observing the pulse patterns. and DPWM1 at high Mi have been widely used. Likewise. so they are not considered practical. the aforementioned discussed PWM methods will be reviewed in terms of pulse patterns and performance. SVPWM method yields. full investigation of all PWM methods in regard to their pulse pattern and performance is a laborious task. This paper will be conﬁned to the methods discussed in this paragraph. IV. Thus. With equally partitioned two zero states [(0 0 0) and (1 1 1)]. Such operations can be very easily performed with the PWM units of the modern digital signal processors used in ac motor drives and PWM rectiﬁers. the proposed approach is broad and covers most methods reported in the literature. in practice reduces to a relatively small count when a systematic evaluation and performance comparison (among the many methods) is made. The second pattern with the same modulation wave yields AZSPWM3 [12]. In the alternating polarity triangular carrier wave methods. which has been studied in [23] and found to have quite limited performance. This section aims to review the popular PWM methods with the focus on their pulse patterns such that in the following section the practical implementation can be discussed to sufﬁcient depth. 9(a) for region A1∩B2 of Fig. it can be shown that they can be included under the generalized scalar PWM umbrella. Also note that SPWM with multicarrier signals. the approach yields sufﬁcient results from the practical utilization perspective. vtri -a . the alternating triangle polarities. DPWM1 yields. Taking the common triangular carrier vtri as reference. PULSE PATTERNS AND PERFORMANCE CHARACTERISTICS OF POPULAR PWM METHODS Since a large number of PWM methods exist and each method with unique pulse pattern yields unique performance characteristics. vtri -c ) additional methods yield. the switching losses remain the same (as one of the phases ceases switching during the PWM period) while the ripple of DPWM1 becomes less compared to SVPWM. These methods have simultaneous phase switching problem constraining their . Due to reduction of the total zero state duty cycles at high Mi and 50% increase of the carrier frequency (decrease of the carrier cycle). the effect of the zero states on ripple decreases and they can be lumped as one [1]. 4(a)]. SVPWM provides very low PWM ripple and provides voltage linearity for the modulation index range of 0 < Mi < 0. Consequently. For example. ∗ ∗ ∗ For example. from the PWM ripple reduction perspective SVPWM is the best method. References [1]. The ﬁrst pattern along with the CPWM modulation waveform yields AZSPWM1. while reviewing the pulse patterns of the popular methods. Note that all the popular PWM methods reported in [1] which have different modulation waves than the aforementioned methods use common triangle and fall under the same umbrella and can be treated with the generalized scalar PWM approach. and [16] involve such thorough investigation of large count of PWM methods and in conclusion it appears that only the popular methods discussed in this paper deserve signiﬁcant attention. it will also be possible to demonstrate why these methods are so well accepted. As it has symmetric zero stages. further PWM pulse patterns. For example increasing the switching frequency by 50% and employing the DPWM1 method (of which the pulse pattern is illustrated in Fig. Using the proposed approach and creating a variety of triangular carrier wave patterns and modulation wave shapes. However. Considering that the methods reported in this paper (both conventional and the recently developed RCMV–PWM methods) and the other conventional methods reviewed in [1] are the most popular methods (due to their superior performance when compared to other methods). the va ≥ vb . and thus major advantages of these methods can be recognized.6 where discontinuous PWM methods can be used [1]. RSPWM1-23 [15].HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE. using the discussed DPWM modulation wave along with a common triangular carrier wave for all phases. The pulse pattern of SVPWM is illustrated in Fig. with only the two modulation waves. It has been illustrated that transition injection CPWM and DPWM method waveforms are shown in Fig. vtri -b . the triangular carrier wave polarities can be alternated according to the regions deﬁned in Fig. 7 along with the zero-sequence signal. This goal can be easily achieved by comparing the modulation waves. where no zero-sequence signal is injected. Before getting involved in implementation details and experimental results. AND NSPWM SPACE VECTOR REGION DEPENDENT POLARITY ALTERNATING CARRIER SIGNALS experimental performance [16]. and polarity controlled triangular carrier waves. the performance characteristics can be studied. low ripple or low loss results. for example those in Table I. but varying the triangle polarities (resulting in multicarrier waves. 4). Using the discussed CPWM modulation wave along with a common triangular carrier wave for all phases. Using the same modulation waves. therefore. Thus. Thus. SPWM is the naive form. vc condition corresponds to the A1 region. [16] and AZSPWM2 [13] are two RCMV-PWM methods reported that are not included in the study either. the switching count and. all the high-performance PWM methods could be covered. three carrier wave alternating (multicarrier) patterns are given in Table I.907. 4. 8 for the region A1 [see Fig. THREE-WIRE ¸ 1389 TABLE I AZSPWM1. can be obtained by determining the regions of Fig. SVPWM at low Mi . But as Mi increases the ripple also increases and it looses its advantage around Mi ≈ 0. and thus new methods can be invented. The third pattern along with the DPWM waveform yields NSPWM. Therefore.

VOL. Comparing the pulse patterns of Fig. AZSPWM1. higher CMV is associated with increased common mode current (motor leakage current). SVPWM. It should also be noted that AZSPWM methods have very high ripple at low Mi (due to the fact that the zero states are replaced with active vectors with opposite direction to the reference voltage vector) and at high Mi they are inferior to NSPWM as the . (c) AZSPWM1 in region A1. NSPWM. This high CMV is illustrated in Figs. the two AZSPWM methods yield low CMV with Vdc /6 magnitude and AZSPWM3 has a lower CMV frequency which is favorable. 8. and common mode voltage of SVPWM. As shown in Fig. Pulse patterns of various PWM methods. (b) NSPWM in region B2. The main disadvantage of NSPWM involves voltage linearity. Fig. NSPWM is only linear in the range of 0. The CMV traces of Fig. The switching count reduction is obtained by proper sequencing the voltage vectors. 5. for both SVPWM and DPWM1. In motor drive applications. may take the values of Vdc /6 or Vdc /2. However. in motor drives operation at low Mi is required and NSPWM must be combined with another method [27]. NO. the CMV of SPWM. it has simultaneous switching actions which may yield undesirable results of motor terminal overvoltages or increased leakage current during switching instants (similar to RSPWM and AZSPWM2). The PWM cycle view of modulation signals. between methods is seamless (the load current is not disturbed) and a combination of the two methods has been successfully used in commercial drives.1390 IEEE TRANSACTIONS ON POWER ELECTRONICS. higher risk of nuisance trips. 9. This is obtained differently from the DPWM1 method. Similar to DPWM1. depending on the inverter switch states. its ripple is low in the high Mi range as the active vectors close to the reference voltage vector dominate [14].61 ≤ Mi ≤ 0. operating at low Mi and obtaining low CMV is possible by employing AZSPWM1 or AZSPWM3 in this range. While in DPWM1 one of the zero states is avoided. 9(b)–(d) demonstrate this advantage. the inverter CMV is high. a CMV of −Vdc /2 and Vdc /2 can be created. inverter upper switch logic signals. and reduced bearing life [24]–[26]. Thus. it can be observed that NSPWM is a discontinuous PWM method and it yields equivalent advantages to DPWM1 in terms of switching loss reduction. (d) AZSPWM3 in region A1. While in PWM rectiﬁer applications this range is sufﬁcient. 3 (10) According to (10). 26. these methods can be favorable over SVPWM and DPWM1 in CMV sensitive applications. as shown at the bottom of the pulse pattern diagrams.907). Since they do not utilize zero states. and AZSPWM3 (and all other RCMV PWM methods) avoid a CMV with a magnitude of Vdc /2 and their CMV magnitude is conﬁned to Vdc /6. phase and line-to-line voltages. In motor drive applications. in NSPWM both zero states are avoided and an active vector is introduced instead.907 (DPWM1 linearity range: 0 < Mi < 0. (a) DPWM1 in region A1∩B2. and DPWM1 methods (and all other common carrier wave PWM methods). 8 and 9(a) at the bottom traces. As these methods utilize zero vectors V0 and V7 . while AZSPWM1 has found application [24]. The CMV of the three-phase VSI is deﬁned as the potential of load star point with respect to the midpoint of dc bus of the inverter and the CMV at the inverter output can be expressed as follows: vcm = vao + vbo + vco . As a result. 9(c) and (d). 9(a) and (b). MAY 2011 Fig. AZSPWM3 has been cautiously approached. However.

and at logic “0” otherwise (Sa − logic is complementary of Sa + ). V. etc. 10). Only several comparisons among the three sinusoidal references (original modulation waves) and several algebraic operations are necessary to obtain the zero-sequence signal. the remaining task involves the sine-triangle comparison stage. In such cases. The modulation waves of the discussed methods. the deadtime. Employing such digital platforms. a common triangular carrier wave and for AZSPWM1. At such frequencies the parasitic circuit components (capacitances) are negligible (open-circuit) and. In this chip. are generated. the injected zerosequence signal is a low-frequency signal (periodic at 3ω e and/or its multiples. In this application. lower than the carrier frequency by at least an order of magnitude) which causes low-frequency CMV. the switching rule is deﬁned as the PWM signal of the upper switch of an inverter phase (for instance. AZSPWM methods should only be used in regions where all other methods do not meet the performance requirements of an inverter drive. the zero-sequence voltage has no detrimental effect on the drive and yields no common mode current (CMC).HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE. its complementary. therefore. The scalar PWM implementation of all the discussed methods is an easy task compared to the space vector implementation (discussed at the end of Section II). the discussed PWM methods are implemented using the Texas Instruments TMS320F2808 ﬁxed-point DSP chip. sidering the simplicity of the scalar PWM algorithms. the perphase duty cycles are calculated ﬁrst. Once the ﬁnal modulation signals and triangles are obtained. which are shown in Fig. The implementation can be best realized on digital PWM units such as the modern motion control or power management microcontrollers and DSP chips (which involve a well developed software programmable digital PWM unit) [30] or dedicated FPGA units [31]–[33]. Most modern commercial drives and power converters utilize such control chips which are offered at economical price. Combination of AZSPWM methods at low Mi and NSPWM at high Mi is an alternative approach for low CMV requiring applications [27].907. VI. Then. Since the gain functions of the discussed modulation waves are provided in [21] the compensation is an easy task. [29]. or PERIOD value are loaded to these counters depending on the pulse pattern to be generated. [21]. on the other hand. IMPLEMENTATION In this section. the approach can be readily employed in most power converter control platforms. One carrier cycle is completed as the counter counts up from “0” to “PERIOD” and then decrements down to “0” again. the high-frequency CMV effects (at the carrier frequency and higher) have been considered here. 10. Combination of SVPWM at low Mi and DPWM1 at high Mi is common in industrial drives. For SVPWM and DPWM1. Thus. Sa + ) is at logic level “1” when the counter value is between the loaded values of comparator register A (COMPA) and comparator register B (COMPB) comparator registers (see Fig. Determining the triangle polarity also involves only a comparison of the sinusoidal references. the duty cycles are converted to the count number as they are scaled with the PERIOD. Having obtained the zerosequence signal. Since the EPWM module has two comparator registers (COMPA and COMPB) per phase. High-frequency CMV. This task is left to the implementation engineer as a straightforward procedure. (b) active low (–vtri ). are all parameters that are controlled by the user via software. The value of this counter deﬁnes the half of the PWM period. AZSPWM3. unless low common mode impedance path is provided by ﬁlter conﬁgurations included in the drive for the purpose of ripple reduction [28]. This comparison is performed to determine the switching instants via a comparator for each phase. can be harmful and can be reduced by PWM pulse pattern modiﬁcation. The EPWM module includes an internal counter clock (termed as “PERIOD”) which corresponds to the triangular carrier wave. The PWM period (thus the switching frequency). the duty cycles are calculated according to (7) and (8). and NSPWM using a common triangular carrier wave but alternating its polarity according to Table I. the count number. Thus. the practical implementation of the PWM methods of Section IV is discussed. These operations can be lumped together with the zero-sequence signal determination stage to further minimize the computational burden. zero (0). From these signals. . 7 are generated according to the simple magnitude rule approach discussed in Section III. overmodulation condition may occur due to dynamics or other line or load variation conditions. it is easy to program (combine) two or more PWM methods and online select a modulator in each operating region in order to obtain the highest performance [1]. and con- Fig. the treatment of overmodulation can be included in the algorithm as a gain correction step as reported in [20]. THREE-WIRE ¸ 1391 switching losses are higher [16]. it is added to the original modulation waves and the ﬁnal modulation signals result. The duty cycles are checked and bounded to the range of 0 to 1 (in case overmodulation condition occurs). It should be noted that in all PWM methods. While operating at high Mi (such as full speed operation of a drive or PWM rectiﬁer operating under the normal operating range). as shown in Section III via examples. the PWM signals are generated by the enhanced PWM (EPWM) module of the DSP [30] which is a hardware digital circuit dedicated for the purpose of generating the PWM signals. Thus. For every PWM cycle. EXPERIMENTAL RESULTS In the laboratory. although they are linear in the range of 0 < Mi < 0. PWM pulse pattern generation mechanism of the EPWM unit of the TMS320F2808 for (a) active high (vtri ).

vbo . 26. Employing the scalar implementation approach and utilizing the TMS320F2808 DSP platform. phase currents. common mode voltage and currents of the considered methods are shown in Fig. 11 for AZSPWM1. require loading the register COMPA with the value PERIOD and the register COMPB with its complementary (1 − da + )·PERIOD. A 4 kW.6 kHz for CPWM methods and 10 kHz for DPWM methods to provide equal average switching frequency. 8 and 9(a)] are generated such that the PWM cycle starts and ends with the upper switches in the high “1” state. 380 Vll−rm s induction motor is driven from the VSI in the constant V/f mode (176. respectively. VOL. Methods involving PWM periods with active low (corresponding to the −vtri case). However. In AZSPWM1. The PWM pulse pattern generation procedure is summarized in the ﬂowchart of Fig. Thus. Note that the zero-sequence signal generation and the alternating triangle determination (region R determination) stages are gathered for reduced computations. only active switch states are utilized. 10(a). corresponding to the pulse pattern of Fig. 12(a) and(b) for SVPWM and AZSPWM1. involves loading register COMPB with the zero “0” value. Sb + . (often termed as “active high” [24]) except for the PWM periods where the switching ceases in DPWM methods. While the ﬂowchart is generated for AZSPWM1. The aforementioned waveforms demonstrate that the various PWM methods can be easily implemented with the generalized scalar PWM approach. 1510 min−1 ) is discussed. It should be noted that various choices exist in terms . 14. NO. the PWM method implementation procedure becomes an easy task. thus. 5. conventional methods use only the pulse pattern of Fig. MAY 2011 The conventional PWM pulse patterns [see Figs. the inverter design engineers can choose among the offered various PWM methods based on the performance requirement of the application and easily implement one of the methods or a combination of various methods.3 Vrm s /51 Hz. which is shown in Fig. Fig. the approach is the same and straightforward for all other discussed methods. while RCMV-PWM methods use both.7 Vrm s /50 Hz) and the PWM frequency is 6. AZSPWM1 has higher PWM current ripple and comparable CMV/CMC to NSPWM. 1440 min−1 . respectively). As can be seen from the diagrams all the discussed methods provide satisfactory performance at the high Mi . and register COMPA with the Sa + duty cycle da + ·PERIOD. and they may cause overvoltages at the motor terminals in long-cable applications [14]. Note that SVPWM utilizes zero vectors (000) and (111) which cause a CMV of −Vdc /2 and Vdc /2. Inverter upper switch (Sa + . 10(a). PWM signals are programmed and applied to a three-phase VSI. AZSPWM3 has high CMV and CMC magnitude compared to NSPWM. 11. 10(b). AZSPWM1 line-to-line voltages are bipolar [16]. the CMV is limited to Vdc /6. Bipolar voltage pulses result in higher output current ripple compared to unipolar voltage pulses. solutions for these problems have been provided in [24] and [27] as a part of the PWM algorithm. 8 and 9(c).8 (180.1392 IEEE TRANSACTIONS ON POWER ELECTRONICS. While in SVPWM the line-toline voltages are unipolar. Generating this pulse pattern. SVPWM and DPWM1 have low current ripple but high CMV/ CMC. This demonstrates that all the intended pulse patterns can be easily generated. respectively (compare with Figs. Operation at Mi = 0. NSPWM provides low motor current ripple and CMV/CMC. but its CMV/CMC frequency is less. vco ) and the line-to-line voltages (vab ) of SVPWM and AZSPWM1. As a result. 13 shows inverter output voltages (vao . Fig. PWM pulse pattern generation ﬂowchart for AZSPWM1. Thus. The modulation waves (obtained by passing switch logic signals through a low-pass ﬁlter designed for the purpose of illustration of the modulation method). and Sc + ) logic signals and the inverter output common mode voltage (vcm ) waveforms for two PWM periods are shown in Fig.

vb o . (d) DPWM1. (a) SVPWM. 200 V/div) waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 μs/div). Experimental phase current (top. Experimental inverter upper switch (Sa + . (c) AZSPWM3. Experimental inverter output voltages (va o . Especially high control bandwidth applications such as servodrives and vector controlled industrial drives are increasingly employing FPGA units for current regulation and PWM pulse pattern generation due to fast response and ﬂexible programming capability of FPGA units [31]–[33]. 13. THREE-WIRE ¸ 1393 Fig. 200 V/div). Sc + ) logic signals (top three. 0. (b) AZSPWM1. 12. (e) NSPWM. 5 V/div) and the inverter output CMV (vc m ) (bottom. (time scale: 2 ms/div).8. CMC (top. of implementation platforms. 14. Fig. 100 V/div) and the line-to-line voltage (va b ) (bottom.HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE. Sb + . waveforms (Mi = 0.6 kHz). CMV (bottom. fs -ave = 6. and modulation signal (bottom. 200 V/div) waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 μs/div). . vc o ) (top three. 500 mA/div). Fig. 2 A/div).2 unit/div).

“Analysis and realization of a pulse width modulator based on voltage space vectors. 15–19. C. Appl. pp. 1059–1071. Yadaiah. Appl. 1605–1612. Cheng. M. Ind. 35. no. ¨ [14] E. no. G. “Dynamic overmodulation characteristics of triangle intersection PWM methods. 555–577. Y. Lipo.” in Proc. 4. M. 14. pp. 5. “Pulse width modulation for electronic power conversion.” Brown Boveri Rev. and N.” Proc. [12] Y. J. Lian. Ind. and AZSPWM3 methods provide good performance. pp. A./Aug. 2009.” IEEE Trans. “An approach to eliminating high-frequency shaft voltage and ground leakage current from an inverter-driven motor. 1162–1169. Jan. Mar. pp. Greece. pp. Ind. 1797–1805. “FPGA-based SVPWM control IC for 3-phase PWM inverter. 896–907. 1999. 40. [22] N. pp. D. Skibinski. 1. 1569–1580. Appl. “Reduction of common mode currents in PWM inverter motor drives. Aug. Blasko. “Optimal common-mode voltage reduction PWM technique for inverter control with consideration of the dead-time effects. 8. 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Shu. pp. “Generalized PWM–VSI control algorithm based on a universal duty-cycle expression: Theoretical analysis. IEEE ECCE 2009 Conf. 1997. Rhodes. M. Raciti. ELECO 2009. [10] A. 2007. “Reduction of bearing currents in inverter fed drive applications by using sequentially positioned pulse modulation. 2004. A. 5. Sep. [15] M. R. L. Ind. Sul.. Hava. Pongiannan. 14. J. Bursa. 2.” in Proc. Hava.” IEEE Trans. 40. [7] A. the method to generate the pulse patterns of these PWM methods via the generalized scalar PWM approach is illustrated. Semiconductor Power Converter Conf. 4. Ind. Stanke. and A. Jain. A. vol. 26.. T.. [30] TMS320 x280x. It is shown that the generalized scalar approach yields a simple and powerful implementation with modern control chips which have digital PWM units. Sep. Power Electron. 1194–1214. Kuo. Part I: Basic development. vol. Hava and E. Leggate.” IEEE Trans. [21] A. Un and A. Jul. vol. Depenbrock. Soc. 2008.. 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PWM methods. and its reduction techniques in ac motors. Madison. degrees from the University of Wisconsin. Turkey. he was with Yaskawa Electric America. degree from Istanbul Technical University. and power quality. Since 2002. Turkey. He received the B. in 1991 and 1998. Middle East Technical University. in 2010. In 1995. . in 2007.HAVA AND CETIN: GENERALIZED SCALAR PWM APPROACH WITH EASY IMPLEMENTATION FEATURES FOR THREE-PHASE. Inc. in 1987. all in electrical engineering.. WI. Istanbul. Ankara. Waukegan.IL. Mequon. Ankara. and Ph.. respectively. Middle East Technical University. He received the B. THREE-WIRE ¸ 1395 Ahmet M. he has been a Research Assistant with the Department of Electrical and Electronics Engineering.Sc. ¸ in 1985. he was with Rockwell AutomationAllen Bradley Company. degree from Baskent ¸ University.S. Turkey. Turkey.Sc. Hava (S’91–M’98) was born in Mardin. and the M. and the M. both in electrical engineering.D.. degree from Middle East Technical University. His current research interests include voltage-source inverters. Onur Cetin (S’10) was born in Ankara. N. Ankara.S. where he is currently an Associate Professor. Since 2008. His research interests include power electronics. in 1965. and common-mode noise. motor drives. From 1997 to 2002. he has been with the Department of Electrical and Electronics Engineering.

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