CY8CKIT-001 PSoC® Development Kit Guide

Doc. # 001-48651 Rev. *E April 19, 2011

Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone (USA): 800.858.1810 Phone (Intnl): 408.943.2600 http://www.cypress.com

Copyrights

Copyrights © Cypress Semiconductor Corporation, 2009-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. PSoC® Designer™, and PSoC® Creator™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations.

Flash Code Protection Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used. There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly evolving. We at Cypress are committed to continuously improving the code protection features of our products.

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CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

Contents

1. Introduction
1.1 1.2 1.3

9

1.4 1.5 1.6 1.7

Kit Overview.................................................................................................................9 Kit Contents .................................................................................................................9 Installation..................................................................................................................10 1.3.1 Before You Begin ...........................................................................................10 1.3.2 Prerequisites ..................................................................................................10 1.3.3 Installing PSoC 1 Development Software ......................................................10 1.3.4 Installing PSoC 3 Development Software ......................................................10 1.3.5 Installing PSoC 5 Development Software ......................................................11 PSoC Development Board.........................................................................................12 1.4.1 Default Switch and Jumper Settings ..............................................................12 Kit Revision................................................................................................................14 Conventions...............................................................................................................14 Document Revision History ......................................................................................14

2. Loading My First PSoC Project
2.1

15

2.2

2.3

2.4

My First PSoC 1 (CY8C28) Project ...........................................................................16 2.1.1 Loading My First PSoC 1 Project ...................................................................16 2.1.2 Building My First PSoC 1 Project ...................................................................17 2.1.3 Programming My First PSoC 1 Project ..........................................................17 2.1.4 Running My First PSoC 1 Project ..................................................................18 My First PSoC 1 (CY8C29) Project ...........................................................................19 2.2.1 Loading My First PSoC 1 Project ...................................................................19 2.2.2 Building My First PSoC 1 Project ...................................................................20 2.2.3 Programming My First PSoC 1 Project ..........................................................21 2.2.4 Running My First PSoC 1 Project ..................................................................22 My First PSoC 3 (CY8C38) Project ...........................................................................23 2.3.1 Loading My First PSoC 3 Project ...................................................................23 2.3.2 Building My First PSoC 3 Project ...................................................................24 2.3.3 Programming My First PSoC 3 Project ..........................................................26 2.3.4 Running My First PSoC 3 Project ..................................................................27 My First PSoC 5 (CY8C55) Project ...........................................................................27 2.4.1 Loading my First PSoC 5 Project ...................................................................27 2.4.2 Building My First PSoC 5 Project ...................................................................28 2.4.3 Programming My First PSoC 5 Project ..........................................................30 2.4.4 Running My First PSoC 5 Project ..................................................................31

3. Sample Projects
3.1

33

CY8C28 Family Processor Module Example Projects...............................................33 3.1.1 My First PSoC 1 (CY8C28) Project................................................................33 3.1.1.1 Creating My First PSoC 1 (CY8C28) Project ...................................33 3.1.1.2 main.c ..............................................................................................41

CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

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Contents

3.2

3.3

ADC to LCD Project ....................................................................................... 42 3.1.2.1 Creating ADC to LCD Project .......................................................... 42 3.1.2.2 main.c ..............................................................................................47 3.1.3 ADC to UART with DAC................................................................................. 49 3.1.3.1 Creating ADC to UART with DAC Project ....................................... 49 3.1.3.2 main.c ..............................................................................................58 3.1.4 CapSense® ................................................................................................... 61 3.1.4.1 Creating CapSense Project ............................................................. 61 3.1.4.2 main.c ..............................................................................................67 CY8C29 Family Processor Module Example Projects .............................................. 71 3.2.1 My First PSoC 1 (CY8C29) Project................................................................ 71 3.2.1.1 Creating My First PSoC 1 (CY8C29) Project................................... 71 3.2.1.2 main.c ..............................................................................................79 3.2.2 ADC to LCD Project ....................................................................................... 80 3.2.2.1 Creating ADC to LCD Project .......................................................... 80 3.2.2.2 main.c ..............................................................................................85 3.2.3 ADC to LCD with DAC and UART .................................................................87 3.2.3.1 Creating ADC to LCD with DAC and UART Project ........................ 87 3.2.3.2 main.c ..............................................................................................98 3.2.3.3 Counter8_1INT.asm ......................................................................102 CY8C38 / CY8C55 Family Processor Module Example Projects............................104 3.3.1 My First PSoC 3 / PSoC 5 Project ...............................................................104 3.3.1.1 Creating My First PSoC 3 / PSoC 5 Project ..................................104 3.3.1.2 Placing and Configuring the PWM.................................................105 3.3.1.3 Placing and Configuring Digital Output Pin Hardware ...................106 3.3.1.4 Placing and Configuring the Software Digital Output Pin ..............107 3.3.1.5 Connecting the Components Together..........................................108 3.3.1.6 Configuring the Pins ......................................................................109 3.3.1.7 Creating the main.c File.................................................................110 3.3.1.8 Configuring and Programming the PSoC Development Board .....111 3.3.2 ADC to LCD Project ..................................................................................... 112 3.3.2.1 Creating ADC to LCD Project ........................................................112 3.3.2.2 Placing and Configuring Delta Sigma ADC ...................................112 3.3.2.3 Placing and Configuring an Analog Pin .........................................113 3.3.2.4 Placing and Configuring Character LCD .......................................114 3.3.2.5 Connecting the Components Together..........................................115 3.3.2.6 Configuring the Pins ......................................................................115 3.3.2.7 Creating the main.c File.................................................................116 3.3.2.8 Configuring and Programming the PSoC Development Board .....118 3.3.3 ADC to UART with DAC............................................................................... 119 3.3.3.1 Creating ADC to UART with DAC Project .....................................119 3.3.3.2 Placing and Configuring Delta Sigma ADC ...................................119 3.3.3.3 Placing and Configuring an Analog Pin .........................................120 3.3.3.4 Placing and Configuring Character LCD .......................................121 3.3.3.5 Placing and Configuring Voltage DAC...........................................122 3.3.3.6 Placing and Configuring Opamp....................................................123 3.3.3.7 Placing and Configuring Analog Pin ..............................................124 3.3.3.8 Placing and Configuring UART......................................................125 3.3.3.9 Placing and Configuring Digital Output Pin ...................................126 3.3.3.10 Placing and Configuring DMA .......................................................127 3.3.3.11 Connecting the Components Together..........................................128 3.3.3.12 Configuring the Pins ......................................................................129 3.3.3.13 Creating the main.c File.................................................................129

3.1.2

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CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

....5.............12 J6 ...........6.......................2............4........................5 Configuring the Pins................8 Placing and Configuring UART .................................3V 177 A..........................166 3......................4......DC Power Jack......1.....3................1.......Contents 3. Doc.......2..149 3......3......................157 SAR ADC (PSoC 5 Only) .......11 Connecting the Components Together ................148 CapSense .......................5....5..................3.............2 Setting a 3.3.........2...................3....1.........1 Creating ADC to UART with DAC Project...136 3.........2...134 USB HID...1.....3....3.............3.....3V 177 A..2 Placing and Configuring SAR ADC................179 A.............2............. *E 5 ..3.....................3....................149 3.........................6 Creating the main..........8 9V Battery Terminals ...............................2..................162 3...175 A........c File ....1 Setting a 5V Supply from VREG......2.....7 Configuring and Programming the PSoC Development Board............10 VDD Select Switch .....................................152 3..........163 3.178 A.....................................................1..5 3......................1 175 PSoC Development Board.11 J7 ...........................3...........................................168 3......3..................5 Configuring the Pins.......3................................................3................1..............1....... # 001-48651 Rev..6..........................179 A......140 3............6 Placing and Configuring Opamp .................................180 CY8CKIT-001 PSoC Development Kit Guide...................................153 3..3.143 3..9 J8 ....6.........176 A.................c File ........................158 3............... Board Specifications and Layout A.............................1.....3 Placing and Configuring Software Digital Input Pin ..................1........1...............4......136 3......7 J1 .......................1 Power Supply ........................................6.....................7 Placing and Configuring Analog Pin ...1 Factory Default Configuration ..6 Creating the main................VDD ANLG Select .....6..........7 Configuring and Programming the PSoC Development Board.................6..6..........158 3.....166 3....3..................159 3....3V Supply from VBUS ............165 3....4 Placing and Configuring Character LCD...........3.......c File ..2.....6.............180 A.......136 3............4 3.........VDD DIG Select.....................154 3................3..179 A.............1..........................................3.....................172 More Example Projects ...179 A...........2 Placing and Configuring CapSense ..................176 A...................................5 Setting a 5V Supply from VBUS ...............................5 Placing and Configuring Voltage DAC ...3 Setting VDD ANLG as VADJ and VDD DIG as VDD for VDD = 3...............................3....168 3...................178 A......1...12 Configuring the Pins.....................2 Power Supply Configuration Examples...............173 Appendix A.................................................13 Creating the main.....................2 Placing and Configuring USBFS................10 Placing and Configuring DMA....4..144 3..........................................175 A...........................3 Placing and Configuring Character LCD...........6....160 3.......................................7 3...............................................................5.........2........................................6 3......3.........6...............161 3........................4 Placing and Configuring Digital Output Pin.3.2..5........149 3.........3.............2...........3..6 Setting a 3......3V Supply from VREG.......................1.....................3................4........6..........................4.......................1....1..........5V Source..............14 Configuring and Programming the PSoC Development Board..3...............141 3...........3.....5................................................4 Setting VDD DIG as VADJ and VDD ANLG as VDD for VDD = 3................3.............3.151 3......................175 A.........3......6..3...3...............2.1 Creating CapSense Project .............14 Configuring and Programming the PSoC Development Board.....3 Placing and Configuring an Analog Pin .......158 3................1......................9 Placing and Configuring Digital Output Pin.....1 Creating USB HID Project....4....................176 A......5.....4 Placing and Configuring LED...........................6...........3.........................164 3.3.........6...

...5 P17 .......VDDIO Select.3....................1...........1..206 C...........1.............................................................190 A......3.......................196 A...........185 A.........................Processor Reset Button ..........4 B....4 P1......3 A.............................................................1.......7.......................................1....................203 Protection Circuitry .................................................1..............7............ P2.....204 Level Translation .........2............................1..................................184 A.....206 6 CY8CKIT-001 PSoC Development Kit Guide......... *E ............6.1 R31 ...6...184 A..................................External MHz Oscillator ..................................3..........2 JTAG.......................................3..........................................2....................206 C............185 A........183 A....6..................8 J11 ......................................192 A....3..................................6 Enabling the Boost Component in PSoC 3 and PSoC 5 Processor Modules...................................................................................1....183 A........1.. # 001-48651 Rev.......... J4 and J5 ......196 A..........................2 A.......1............3 CY8C29 Family Processor Module..3 Expansion Port C ...............4 J9 ...206 C....................LCD Module Power ............ J3........2.......2 SW4 ...................................................3 U8 ......... 196 Bill of Materials ...2 CY8C28 Family Processor Module..............9 SW1 and SW2 ......3......... MiniProg3 Technical Description C.........3..............................1......181 A...............185 A...............2 Expansion Port B.....4......DB9 Serial Communications Port ..........................................Multipurpose Variable Resistor......1... P3 and P4 .............LCD Contrast Adjustment.................4 CY8C38 Family Processor Module............................................................3.........................................2 CY8C28 Family Processor Module..........190 Schematics ...................................1.....................................1 J2.....3............3.......6 Processor Module ..1.....1 205 Interfaces...............188 A....4 LCD Module ...........Artaflex WirelessUSB LP Radio Module Receptacle..................................1.199 A.......................................1......................3 SWD/SWV .......182 A............201 Appendix B..........................6 J14 .......Serial Port Power ............2..............3 CY8C29 Family Processor Module.................................................3.............................7 R20 ......3 Prototyping Components ...........................1.......4 I2C™...................................................................1......1 B..............................................................2...................................184 A.....181 A.......182 A.......190 A........................3.............................1..1.... MiniProg3 B..........Multipurpose Push Button Switches ........5 CY8C55 Family Processor Module............Contents A...................Full Speed USB Port .......183 A......1.................2 J12 ..203 Programming in Power Cycle Mode ..................194 A..............................184 A.............4....................................1 CY8CKIT-001 PSoC Development Board ..........................................................Processor Module Receptacles...............................................7........................2 P15 .......2...204 Appendix C..................................................203 Interface Pin Assignment Table..........................................................................................1.............Adjustable Regulator Variable Resistor...........1...1................182 A.....191 A.......................................................................3..........1.............................6.......1.........1 ISSP...............................4 CY8C38 Family Processor Module.................182 A...................................206 C.....................1..193 A................................................5 203 MiniProg3 LEDs.........................................................3 J10 ......................................................Variable Resistor Power................Wireless Radio Module Power ....183 A..3 B..............2 B.....1 Prototyping Area...........198 A...................183 A......191 A...........................................5 CapSense Elements .......13 R11 .....180 A.......1 CY8CKIT-001 PSoC Development Board .............195 A................2.........3.......................184 A..................... Doc...................5 CY8C55 Family Processor Module...........7 Expansion Ports.......................1..................1 Expansion Ports A and A'............................199 A.............

....207 C.................................Contents C........................2.......209 CY8CKIT-001 PSoC Development Kit Guide.............................................................................2.............................. *E 7 ............................................................2 10-Pin Connector .3 Connectors ....................................................... # 001-48651 Rev.................207 C.....................................................2 C...................1 5-Pin Connector ........207 Power...... Doc.........................

# 001-48651 Rev.Contents 8 CY8CKIT-001 PSoC Development Kit Guide. *E . Doc.

And Documentation Software CD for PSoC 3 / PSoC 5. And Documentation CY8CKIT-001 PSoC Development Kit Guide. PSoC 3. This guide and kit gives you a practical understanding of PSoC technology. Firmware. and CY8C55 Family Processor Modules. *E 9 .1 Kit Overview The CY8CKIT-001 PSoC® Development Kit provides you a common development platform where you can prototype and evaluate different solutions using any one of the PSoC 1. which includes ❐ ❐ PSoC® Designer™ IDE ■ PSoC® Programmer™ Software ❐ CY8C28 Data Sheets ❐ Kit Release Notes ❐ Software Release Notes ❐ Example Project Files. 1. or PSoC 5 architectures.1. CY8C38. Firmware. # 001-48651 Rev. Introduction 1. which includes ❐ ❐ ❐ ❐ ❐ ❐ ❐ PSoC® Creator™ IDE PSoC Programmer Software CY8C38 Data Sheet CY8C55 Data Sheet Kit Release Notes Software Release Notes Example Project Files. In addition. the kit gives several example projects with step-by-step instructions to enable you to easily get started developing PSoC solutions. Doc.2 Kit Contents The CY8CKIT-001 PSoC Development Kit includes: ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PSoC Development Board PSoC CY8C28 Family Processor Module PSoC CY8C38 Family Processor Module PSoC CY8C55 Family Processor Module MiniProg3 Programmer and Debug tool USB Cable 12V Power Supply Adapter Wire Pack Printed Documentation ❐ Quick Start ❐ Schematic PSoC Development Board Design Software CD for PSoC 1. This kit includes PSoC CY8C28.

*E . However. the installation automatically installs it for you. Note PSoC CY8C29 Family Processor Module is not part of this Kit. 1. Doc. but you only need to install the software for the processor module you plan to use. The installers for PSoC Programmer and PSoC Creator automatically start before the Kit examples are installed.3.12.3 Installing PSoC 1 Development Software To use the CY8C28 or CY8C29 Family Processor Module (PSoC 1) you need: ■ ■ PSoC Designer 5. After installation. and a Windows Installer.4 Installing PSoC 3 Development Software To use the CY8C38 Family Processor Module (PSoC 3) you need: ■ ■ ■ PSoC Creator 1. Once the Cypress software installation is complete. You must activate this license within 30 days of installation.16 compiler to build PSoC 3 applications. you can purchase this module from www.Introduction 1. and you run PSoC Creator.1 Before You Begin All Cypress software installations require administrator privileges but is not required to run the installed software. For each installation. you have to manually download from Adobe website and install it.cypress.2 Prerequisites PSoC Creator and PSoC Designer both use the Microsoft . and then double click Add or Remove Programs.3 Installation Everything you need to use the PSoC Development Kit is included.NET Framework and Windows Installer are not on your computer. 1.0 is currently installed. Adobe Acrobat Reader. user guides and key documents are located in the \Documentation subdirectory of the PSoC Designer installation directory. refer to the documentation as needed: 10 CY8CKIT-001 PSoC Development Kit Guide.12.3. 1. using the menu. activate the compiler license from Help  Register  Keil. select Typical on the Installation Type page.3 or later PSoC Development Kit example files Insert the PSoC 3 / PSoC 5 Software CD and. select Install Software for PSoC 1. If . Shut down any currently running Cypress software. This compiler is included on the CD. using the menu. select Install Software for PSoC 3. 1. uninstall it. This option installs all three required software packages. # 001-48651 Rev. Note The Keil compiler is distributed with a free license.3 or later If PSoC Designer 5.com. After installing PSoC Creator and PSoC Programmer. If you do not have Adobe Acrobat Reader. Disconnect any ICE Cube or MiniProg devices from your computer.3. Insert the PSoC 1 Software CD and. PSoC Creator uses the DP8051 Keil 8. click Control Panel. Click Start.0 SP6 or higher PSoC Programmer 3.3.0 Production PSoC Programmer 3. and will prompt you to install if it is not detected.NET Framework.

3 or later PSoC Development Kit example files Insert the PSoC 3 / PSoC 5 Software CD and. using the menu.chm) Note After the installation is complete.3. Documents include (but not limited to): ■ ■ ■ PSoC Creator Component Author Guide (component_author_guide.pdf) Warp Verilog Reference Guide (warp_verilog_reference. PSoC Creator uses the GNU GCC 4.Introduction ■ ■ PSoC Creator  Help  Topics Getting Started Programmer  Documentation User Guide Other documents included with this release are located in the \Documentation subdirectory of the PSoC Creator installation directory.pdf) Customization API Reference (customizer_api.chm) Note After the installation is complete. For each installation. Doc.0\PSoC Creator\documentation You can access this directory from within PSoC Creator under Help  Documentation.5 Installing PSoC 5 Development Software To use the CY8C55 Family Processor Module (PSoC 5) you need: ■ ■ ■ PSoC Creator 1. the kit contents are found at the following location: C:\Program Files\Cypress\PSoC Development Kit\ 1. This option installs all three required software packages. Documents include (but not limited to): ■ ■ ■ PSoC Creator Component Author Guide (component_author_guide. select Install Software for PSoC 5.0 Production PSoC Programmer 3.pdf) Warp Verilog Reference Guide (warp_verilog_reference.4. The default location is: C:\Program Files\Cypress\PSoC Creator\1.1 compiler to build PSoC 5 applications. the kit contents are found at the following location: C:\Program Files\Cypress\PSoC Development Kit CY8C55\ CY8CKIT-001 PSoC Development Kit Guide. The installers for PSoC Programmer and PSoC Creator automatically start before the Kit examples are installed.12.0\PSoC Creator\documentation You can access this directory from within PSoC Creator under Help  Documentation.pdf) Customization API Reference (customizer_api. The default location is: C:\Program Files\Cypress\PSoC Creator\1. refer to the documentation as needed: ■ ■ PSoC Creator  Help  Topics Getting Started Programmer  Documentation User Guide Other documents included with this release are located in the \Documentation subdirectory of the PSoC Creator installation directory. *E 11 . # 001-48651 Rev. select Typical on the Installation Type page. After installing PSoC Creator and PSoC Programmer.

allowing the I/O to expand to external boards. 1.4.8V to 5. Default Position: 3. In addition. Note All CY8C28 and CY8C29 family processor module example projects are configured for 5V. The board also provides the ability to separate the PSoC core VDD rail into two separate rails. Configure the board to 5V. and software developers in building their own systems around Cypress’s PSoC devices. In addition. Input power to the board is from one of two sources: ■ ■ 12V 1A power supply adapter 9V alkaline battery (not included) This full featured board incorporates three onboard linear regulators that power peripherals and PSoC processor modules at voltages between 1. a fixed 3. and a multipurpose variable resistor.Introduction 1.3V for 3. SW3 .1 Default Switch and Jumper Settings Jumpers on the CY8CKIT-001 PSoC Development Main Board have a default setting for 3. The board is equipped with a 2x16 alphanumeric LCD module capable of 1. the board is able to separate the I/O VDD rails.3V operation.5V to 5V for 5V supply adjustable regulator. multipurpose LEDs. each of the jumpers must be set according to these instructions.VDD Select.0V. there is a mini-B full speed USB interface and a female DB9 serial communications interface. For Default configuration. firmware. three capacitive sensing elements (two buttons and a five segment slider) are included on the board to allow the evaluation of CapSense® applications. supports removable processor modules.3V supply and 1. and a 1. mechanical push buttons. # 001-48651 Rev. giving the flexibility to power the I/O ports at different voltages. In addition. The board also has a prototyping area containing a small breadboard complete with I/O port sockets nearby.3V (down position) 12 CY8CKIT-001 PSoC Development Kit Guide.5V to 3. The board has four GPIO expansion slots. *E . Also included is a 12-pin wireless radio module interface which can be used to develop CyFi™ Low-Power RF or other embedded RF solutions with this kit. This allows you to plug different PSoC processor modules into the board based upon the desired features of both 8-bit and 32-bit PSoC devices. analog and digital.4 PSoC Development Board The CY8CKIT-001 PSoC Development Board is designed to aid hardware. Doc.7V and 5. before creating the example projects.0V I/O. The board was designed with modularity in mind and. These regulators include a fixed 5V 1A linear regulator.3V 300 mA linear regulator. The flexibility to configure the power domains is one of the foremost features of this board. as a result.

VDD Analog. Default Position: ON (lower two pins) J2-J5 . J6 . Default Position: VDD (upper two pins. # 001-48651 Rev.VDDIO Power Select. *E 13 . Default Position: VREG (upper two pins) J7. Doc.Radio Power. Default Position: Installed J11 . Default Position: Installed CY8CKIT-001 PSoC Development Kit Guide.5V Source.LCD Power. both headers) J12 .Introduction J8 .Variable Resistor Power.RS232 Power (Serial Communications).VDD Digital. Default Position: Installed J14 . Default Position: VDD (upper left two pins) J10 .

Updated images. If the part number is CY8C3866AXI-040. You can also check the silicon marketing part number on the processor module. you own the latest version. Note WARNING: 1. look for the white sticker on the bottom left on the back side of the kit box.6 Conventions These conventions are used throughout this guide. AddedKitRevision section Description of Change 14 CY8CKIT-001 PSoC Development Kit Guide. you own the latest version. *E . or the PSoC device. You can purchase the latest processor module at www.5 Kit Revision To know the kit revision.cypress.cypress. Documentation Conventions Convention Courier New Size 12 Italics [bracketed.cypress. If the revision reads CY8CKIT-001B Rev **. you do need to purchase our latest PSoC 5 process module at www. Displays cautions that are important to the subject. bold] Bold  With  Arrows Bold Usage Displays file locations and source code: C:\ …cd\icc\. Updated PSoC Creator and PSoC Programmer versions Updated images.com/go/CY8CKIT-001.com/go/CY8CKIT-009. PSoC Creator. Displays file names and reference documentation: sourcefile. To upgrade CY8CKIT-001A to CY8CKIT-001B: the PSoC 3 Processor Module and kit CD needs to be updated.com/go/CY8CKIT-010. Doc. Table 1-1. # 001-48651 Rev. To upgrade CY8CKIT-001 to CY8CKIT-001B. and download the latest CD ISO image at www. Displays functionality unique to PSoC Designer.7 Document Revision History Document Title: CY8CKIT-001 PSoC Development Kit Guide Document Number: 001-48651 Revision ** *A *B *C *D *E Issue Date 6/23/09 7/22/09 11/19/09 05/21/10 01/05/11 02/10/11 Origin of Change AESA AESA AESA AESA RKAD RKAD New Guide CDT based updates CDT based updates Updated with PSoC 5. then congratulations. and then click Next. 1.Introduction 1. then congratulations. user entered text: File  New Project  Clone Displays commands and selections. and icon names in procedures: Click the Debugger icon.hex Displays keyboard commands in procedures: [Enter] or [Ctrl] [C] Represents menu paths. besides the upgrades stated above.

2.

Loading My First PSoC Project

The CY8CKIT-001 PSoC Development Kit supports projects across the PSoC 1, PSoC 3, and PSoC 5 architectures. This section walks you through the high level design process for opening, building, programming, and running your first PSoC projects using this kit. Before beginning, follow each of these steps to make certain that your software and hardware environments are properly configured and ready for these projects: 1. Install PSoC Designer using the steps listed in Installing PSoC 1 Development Software on page 10. 2. Install PSoC Creator using the steps listed in Installing PSoC 3 Development Software on page 10. 3. Connect the MiniProg3 into your PC using the supplied USB cable. When you connect the MiniProg3, Microsoft Windows® may indicate that it has found new hardware. All required drivers were installed as part of the PSoC Programmer installation process; however, if Windows opens the driver installation dialog boxes, accept the defaults and allow Windows to automatically find the appropriate driver. 4. Close any open PSoC Creator or PSoC Designer applications and projects. 5. Configure the PSoC Development Board (jumper settings and switches) in its default configuration, as described in Default Switch and Jumper Settings on page 12. 6. Use the PSoC CY8C28 Family Processor Module or PSoC CY8C29 Family Processor Module for the PSoC 1 version of your first PSoC project (My First PSoC 1 (CY8C28) Project on page 16 or My First PSoC 1 (CY8C29) Project on page 19). 7. Use the PSoC CY8C38 Family Processor Module for the PSoC 3 version of your first PSoC project (My First PSoC 3 (CY8C38) Project on page 23). 8. Use the PSoC CY8C55 Family Processor Module for the PSoC 5 version of your first PSoC project (My First PSoC 5 (CY8C55) Project on page 27). 9. For a PSoC 1 project, use the ISSP header on the PSoC CY8C28 Family Processor Module or PSoC CY8C29 Family Processor Module and connect the MiniProg3 ISSP port. 10.For a PSoC 3 or PSoC 5 project, use the JTAG ribbon cable. Connect the ribbon cable to the MiniProg3 and the PSoC CY8C38 Family Processor Module, or PSoC CY8C55 Family Processor Module into the header labeled PROG on the processor module. Note The MiniProg3 should not be "hot plugged" into processor modules that are attached to the PSoC Development Board. In other words, do not plug the ribbon cable of the MiniProg3 into the processor module while code is actively running on the module. Doing so may cause the PSoC device to unintentionally reset. Power down the PSoC Development Board and module by unplugging the power supply from the Development Board before attaching the MiniProg3 device to the module board. Once the ribbon cable is attached to the module board, power can then be applied to the system by plugging in the power supply to the PSoC Development Board. This will avoid any undesirable PSoC device resets. 11. Power the PSoC Development Board using the 12V AC power supply adapter

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Loading My First PSoC Project

2.1

My First PSoC 1 (CY8C28) Project
This is a simple PSoC 1 project using a PWM peripheral inside PSoC, and software to control the blinking rates of two different LED outputs. For this project, be sure you have the PSoC CY8C28 Family Processor Module inserted into the PSoC Development Board and the appropriate software installed. This section walks you through the high level steps of opening, building, and programming a project.

2.1.1

Loading My First PSoC 1 Project
1. Open PSoC Designer. 2. In the Start Page, navigate to File  Open Project/Workspace 3. Navigate to the project directory C:\Cypress\CY8CKIT-001\CY8C28 Projects\ 4. Open the folder Ex1_LED_with_PWM. 5. Double click Ex1_LED_with_PWM.app. 6. The project opens in the Chip Editor view. All the project files are in the Workspace Explorer.

Figure 2-1. Chip Editor View

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CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

Loading My First PSoC Project

2.1.2

Building My First PSoC 1 Project
1. Select Build  Generate/Build 'Ex1_LED_with_PWM' Project. Figure 2-2. Build Project

2. PSoC Designer builds the project and displays comments in the Output window. When you see the message that the project built with 0 errors and 0 warnings you are ready to program the device. Figure 2-3. Output Window

2.1.3

Programming My First PSoC 1 Project
1. Open Program Part from within PSoC Designer by selecting Program  Program Part. 2. In the Program Part window, ensure that MiniProg3 is selected in the Port Selection box. 3. In the Program Part window, set Acquire Mode to Reset. 4. In the Program Part window, set Verification to On. This ensures that downloaded checksum matches the actual checksum. 5. In PSoC Programmer, set AutoDetection to On to enable the software to automatically detect and configure for the target device family and device. Note If PSoC Programmer is properly configured, AutoDetection reports a device family of 28xxx. Note Make sure ISSP protocol is selected.

CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

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Loading My First PSoC Project

6. In the Program Part window, click the program arrow to program the device. 7. Wait until programming is completed to continue. Note For debugging purposes, the CY8C28 Family Processor Module is designed to accommodate the use of the CY3215-DK In-Circuit Emulator (ICE Cube). When using the ICE Cube debugger, make certain that PSoC Designer is configured so that the ICE Cube DOES NOT provide power to the processor module. Within the PSoC Designer application, select Project  Settings and select Debugger from the tree list. Make sure External only is selected under the Pod Power Source section and select Execute program from Debug menu to start debugging.

2.1.4

Running My First PSoC 1 Project
1. Connect P1[6] to LED1 and P1[7] to LED2. Verify that LED1 and LED2 are blinking based on the project's use of the PWM and software. Now that the PSoC 1 device is programmed, reset the PSoC Development Board by pressing and releasing the reset switch (SW4). 2. LED1 blinks approximately once every second and LED2 blinks about three times a second. Figure 2-4. Connect P1[6] to LED1 and P1[7] to LED2

P1[6] P1[7] LED1 LED2

3. For more details regarding this project, see the detailed step-by-step project instructions in My First PSoC 1 (CY8C28) Project on page 33.

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CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

This section walks you through the high level steps of opening. 5. Navigate to the project directory C:\Cypress\CY8CKIT-001\CY8C29 Projects\ 4. The project opens in the Chip Editor view. Double click Example_My_First_PSoC_Project. Figure 2-5.2 My First PSoC 1 (CY8C29) Project This is a simple PSoC1 project using a PWM peripheral inside PSoC. Open the folder Example_My_First_PSoC_Project. and software to control the blinking rates two different LED outputs. navigate to File  Open Project/Workspace 3.app. Chip Editor View CY8CKIT-001 PSoC Development Kit Guide. building. # 001-48651 Rev. and programming a project. Open PSoC Designer. 2. 6.1 Loading My First PSoC 1 Project 1. For this project. In the Start Page. be sure you have the PSoC CY8C29 Family Processor Module inserted into the PSoC Development Board and the appropriate software installed. All the project files are in the Workspace Explorer.Loading My First PSoC Project 2. *E 19 .2. Doc. 2.

2 Building My First PSoC 1 Project 1. When you see the message that the project built with 0 errors and 0 warnings you are ready to program the device. Output Window 20 CY8CKIT-001 PSoC Development Kit Guide.Loading My First PSoC Project 2. Figure 2-7. PSoC Designer builds the project and displays comments in the Output window.2. Figure 2-6. Doc. Build Project 2. Select Build  Generate/Build 'Example_My_First_PSoC_Project' Project. # 001-48651 Rev. *E .

5. set Programming Mode to Reset. This is a precautionary check to verify that there is no data corruption during programming. Note If PSoC Programmer is properly configured. CY8CKIT-001 PSoC Development Kit Guide. In PSoC Programmer.2. In PSoC Programmer.3 Programming My First PSoC 1 Project Figure 2-8. Within the PSoC Designer application. AutoDetection reports a device family of 29x66 and device of CY8C29466. Note For debugging purposes. Make sure External only is selected under the Pod Power Source section and select Execute program from Debug menu to start debugging. 4. Doc. When using the ICE Cube debugger. set AutoDetection to On to enable the software to automatically detect and configure for the target device family and device. # 001-48651 Rev. set Verification to On so that the software verifies that the downloaded program's checksum matches the actual checksum of the flash memory after programming. select Project  Settings and select Debugger from the tree list. With these settings configured. make sure that MiniProg3 is selected in the Port Selection box. Wait until programming is complete before continuing. Connect MiniProg3 to J5 on the CY8C29 Family Processor Module 1. 6. In PSoC Programmer. Note Make sure ISSP protocol is selected. 7. Open PSoC Programmer from within PSoC Designer by selecting Program  PSoC Programmer. 3. *E 21 . make certain that PSoC Designer is configured so that the ICE Cube DOES NOT provide power to the processor module. click Program to program your PSoC 1 device. In PSoC Programmer.Loading My First PSoC Project 2. 2. the CY8C29 Family Processor Module is designed to accommodate the use of the CY3215-DK In-Circuit Emulator (ICE Cube).

4 Running My First PSoC 1 Project 1. Doc. reset the PSoC Development Board by pressing and releasing the reset switch (SW4). Now that the PSoC 1 device is programmed. Figure 2-9.2. LED1 blinks approximately once every second and LED2 blinks about three times a second. Verify that LED1 and LED2 are blinking based on the project's use of the PWM and Software. see the detailed step-by-step project instructions in My First PSoC 1 (CY8C29) Project on page 71. For more details regarding this project. Connect P0[7] to LED1 and P1[7] to LED2. 2. # 001-48651 Rev. 22 CY8CKIT-001 PSoC Development Kit Guide.Loading My First PSoC Project 2. Connect P0[7] to LED1 and P1[7] to LED2 P0[7] P1[7] LED1 LED2 3. *E .

Figure 2-10. CY8CKIT-001 PSoC Development Kit Guide. Kits and Solutions 5. insert the PSoC CY8C38 Family Processor Module in the PSoC Development Board and install the appropriate software. building. under Start Page Topics expand Kits and Solutions. 6. Doc. 2. you can see the project files in Workspace Explorer (see Figure 2-11 on page 24).cywrk to open the project. For this project. Under Kits and Solutions. # 001-48651 Rev. In the Start Page. Select the directory in which to store the project. 4.3 My First PSoC 3 (CY8C38) Project This is a PSoC 3 project using a PWM peripheral programmed from inside the PSoC 3 device to control the blinking rates of two different LED outputs. Click Ex1_LED_with_PWM. 3. This section shows you the high level steps of opening. Open PSoC Creator. 2. expand PSoC CY8C38 Family Processor Module Kit. and programming a project.Loading My First PSoC Project 2.1 Loading My First PSoC 3 Project 1.3. After the project opens. *E 23 .

24 CY8CKIT-001 PSoC Development Kit Guide. Figure 2-12.3. *E . Build Window 2.2 Building My First PSoC 3 Project 1. Select Build  Build Ex1_LED_with_PWM.Loading My First PSoC Project Figure 2-11. Doc. # 001-48651 Rev. When you see the message "Build Succeeded" you are ready to program the device. PSoC Creator builds the project and displays the comments in the Output window. Workspace Explorer 2.

# 001-48651 Rev.Loading My First PSoC Project Figure 2-13. Doc. Output Window CY8CKIT-001 PSoC Development Kit Guide. *E 25 .

The Options window opens. click Program.3V Set Transfer Mode to SWD Set Active Port to 10 Pin Set Acquire Mode to Reset Set Debug Clock Speed to 3.3. Because of this. Expand the tree under MiniProg3 and click Port Acquire.3 Programming My First PSoC 3 Project Figure 2-14. In the Options window. The Select Debug Target dialog box opens. select Select Debug Target. 3. In PSoC Creator. Click Close.Loading My First PSoC Project 2. Doc. click Options. If this is your first time running PSoC Creator. Select the appropriate device and click Connect. Wait until programming is complete before continuing. follow these steps to configure the MiniProg3 device for these PSoC Development Kit projects. select Programmer/Debugging  MiniProg3 from the tree list. you cannot perform power cycle mode programming. *E . The PSoC Creator Status Bar indicates that the device is programming. • • • • • • Set Applied Voltage to 3. ❐ From the Debug menu. Note VTARG of the MiniProg3 is wired exclusively to VDDIO1 of the chip on the PSoC CY8C38 Family Processor Module. Connect MiniProg3 to J5 on the CY8C38 Family Processor Module 1. from the Debug menu. 26 CY8CKIT-001 PSoC Development Kit Guide. skip to the next step below and begin programming. 4. # 001-48651 Rev.2 MHz Click OK. If these configurations are set. ❐ ❐ ❐ 2. ❐ ❐ From the Tools menu in PSoC Creator.

Figure 2-15. expand PSoC CY8C55 Family Processor Module Kit.1 Loading my First PSoC 5 Project 1. switch SW3 to 3. 3. In the Start Page. Unplug the DVK board. For this project. 2.3V and then reapply power to the DVK board. Click Ex1_LED_with_PWM. LED1 blinks approximately once every second and LED2 blinks about three times a second. Doc. 3.3. CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.Loading My First PSoC Project 2. Connect P1[6] to LED1 and P1[7] to LED2. building. 2. 4.4. 2. 2. Open PSoC Creator. and programming a project. This section shows the high level steps of opening.4 My First PSoC 5 (CY8C55) Project This project uses a PWM peripheral programmed from inside the PSoC 5 to control the blinking rates of two different LED outputs.cywrk to open the project. Verify that LED1 and LED2 are blinking based on the project's use of the PWMs. For more details regarding this project. review the detailed step-by-step project instructions in My First PSoC 3 / PSoC 5 Project on page 104.4 Running My First PSoC 3 Project 1. Connect P1[6] to LED1 and P1[7] to LED2 P1[6] P1[7] LED1 LED2 4. *E 27 . Under Kits and Solutions. under Start Page Topics expand Kits and Solutions. insert the PSoC CY8C55 Family Processor Module in the PSoC Development Board and install the appropriate software.

6.Loading My First PSoC Project Figure 2-16. *E .2 Building My First PSoC 5 Project 1. Workspace Explorer 2. Select Build  Build Ex1_LED_with_PWM. Figure 2-17. Kits and Solutions 5. After the project opens. 28 CY8CKIT-001 PSoC Development Kit Guide.4. Doc. # 001-48651 Rev. you can see the project files in Workspace Explorer. Select the directory in which to store the project.

Loading My First PSoC Project Figure 2-18. *E 29 . PSoC Creator builds the project and displays the comments in the Output window. Build Window 2. Figure 2-19. Doc. # 001-48651 Rev. When you see the message "Build Succeeded" you are ready to program the device. Output Window CY8CKIT-001 PSoC Development Kit Guide.

4. Note VTARG of the MiniProg3 is wired exclusively to VDDIO1 of the chip on the PSoC CY8C55 Family Processor Module. Doc.2 MHz Click OK ❐ ❐ ❐ ❐ From the Debug menu.Loading My First PSoC Project 2. select Select Debug Target. select Programmer/Debugging  MiniProg3 from the list. Click Close. skip to the next step below and begin programming. ❐ ❐ From the Tools menu in PSoC Creator. Select the appropriate device and click Connect. 2. you cannot perform power cycle mode programming.3 Programming My First PSoC 5 Project Figure 2-20. If these configurations are set. If this is your first time running PSoC Creator. Expand the tree under MiniProg3 and click Port Acquire. • • • • • • Set Applied Voltage to 3. The PSoC Creator Status Bar indicates that the device is programming. from the Debug menu. In the Options window. *E . 30 CY8CKIT-001 PSoC Development Kit Guide. 4. Because of this. Wait until programming is complete before continuing. Connect MiniProg3 to J5 on the CY8C55 Family Processor Module 1. click Options. 3. # 001-48651 Rev.3V Set Transfer Mode to SWD Set Active Port to 10 Pin Set Acquire Mode to Reset Set Debug Clock Speed to 3. In PSoC Creator. follow these steps to configure the MiniProg3 device for these PSoC Development Kit projects. click Program.

Figure 2-21. *E 31 .3V and then reapply power to the DVK board. LED1 blinks approximately once every second and LED 2 blinks about three times a second. 3. Connect P1[6] to LED1 and P1[7] to LED2 P1[6] P1[7] LED1 LED2 CY8CKIT-001 PSoC Development Kit Guide.Loading My First PSoC Project 2.4 Running My First PSoC 5 Project 1.4. Unplug the DVK board. Connect P1[6] to LED1 and P1[7] to LED2. 2. # 001-48651 Rev. Doc. switch SW3 to 3. Verify that LED1 and LED2 are blinking based on the project's use of the PWMs.

Doc. # 001-48651 Rev.Loading My First PSoC Project 32 CY8CKIT-001 PSoC Development Kit Guide. *E .

3V.1 CY8C28 Family Processor Module Example Projects My First PSoC 1 (CY8C28) Project Creating My First PSoC 1 (CY8C28) Project 1. Read these precautions before you create example projects: ■ ■ ■ ■ ■ All CY8C28 / CY8C29 family processor module example projects are configured for 5V. To create a new project. New Project Window 5. Sample Projects This chapter shows you how to create the sample projects included with this kit. When working with example projects. Click OK. ■ 3. Figure 3-1. 4. Reapply power after you place jumpers on the breadboard. select the Chip-Level Project.1 3.1.1. click File  New Project. 3.1. Remove power before changing board jumpers for each example project. # 001-48651 Rev. Open PSoC Designer 5. click Browse and navigate to the appropriate directory. Name the project Ex1_LED_with_PWM. The Select Project Type window opens. Close any open project in PSoC Creator before loading or creating an example project. In Location.0 2.3. *E 33 . In the New Project window. When you complete each project make certain to save the project. Doc.1 3. The New Project window opens. use 12V power supply adapter. All CY8C38 / CY8C55 family processor module example projects are configured for 3. CY8CKIT-001 PSoC Development Kit Guide.

In this window under Select Target Device. the project opens to chip view 34 CY8CKIT-001 PSoC Development Kit Guide. Select Project Type Window 6. 8. Doc.By default. The Device Catalog window opens. Click on the PSoC tab. 7. and scroll down to the CY8C28XXX section. then click OK. Under Generate 'Main' File Using:. Device Catalog Window 9.Sample Projects Figure 3-2. 10. *E . # 001-48651 Rev. for this project select C. click View Catalog. Figure 3-3. For this project click CY8C28645-24LTXI device in this section and then click Select.

In the User Modules window. # 001-48651 Rev. Figure 3-5. *E 35 . expand the PWMs folder. The User Module (UM) is placed in the first available digital block. User Modules Window 12.In this folder right click on a PWM8 and select place. Doc. CY8CKIT-001 PSoC Development Kit Guide. Default View.Sample Projects Figure 3-4. 11.

36 CY8CKIT-001 PSoC Development Kit Guide. click View  Properties Window. the Properties window opens on the left side of the screen. Doc. If the Properties window does not appear. Figure 3-7.Sample Projects Figure 3-6.Click the placed PWM8_1 UM.Next. Configure the PWM with the settings as in the following figure. Properties Window 14. route the PWM CompareOut signal to P1[7]. The first step is to configure the Look Up Table (LUT) on Row_0_Output3. # 001-48651 Rev. Place User Module PWM8 13. *E .

*E 37 .Click on GlobalOutOdd_7. Doc. 18.Sample Projects Figure 3-8. in this window configure PIN for Port_1_7. Digital Interconnect Window 17.In this window enable Row_0_Output_3_Drive_3 to connect to GlobalOutOdd_7. the Digital Interconnect window opens. 16. Figure 3-9.Click Close. Route the PWM8 CompareOut signal to P1[7] 15.Double click the LUT. A window appears. CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.

Configure the Global Resources window to match the following figure. *E . Workspace Explorer 21. Figure 3-11.Sample Projects Figure 3-10. Configure the LED for P1[6]. Properties Window 22. 20. this adds the UM to the project. Doc. In this folder right click the LED and select place. 38 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Configure PIN for Port_1_7 19.Click OK to continue.In the User Modules window expand the Misc Digital folder.2 User Modules. It appears in the Workspace Explorer  Ex1_LED_with_PWM[CY8C28]  Ex1_LED_with_PWM[Chip]  Loadable Configurations  Ex1_LED_with_PWM .Click the LED_1 UM and navigate to the Properties window. This UM does not use digital or analog blocks. Figure 3-12.

Global Resources Window 23. Replace the existing main.c file within Workspace Explorer. Figure 3-14. Doc.Sample Projects Figure 3-13.Open the existing main.Save the project.Build the project. 25. Build  Generate/Build 'Ex1_LED_with_PWM' Project. Workspace Explorer 24. which can be found within the attachments feature of this PDF document.c content with the content of the embedded CY8C28_main_Ex1. # 001-48651 Rev.c file. *E 39 . CY8CKIT-001 PSoC Development Kit Guide.

Use PSoC Designer as described in Programming My First PSoC 1 Project on page 17 to program the device.Save and close the project.Configure the DVK board SW3 to 5V.Configure the DVK breadboard using the included jumper wires: ❐ ❐ P1[6] to LED1 P1[7] to LED2 29. 32.Sample Projects 26. 40 CY8CKIT-001 PSoC Development Kit Guide. and observe the blinking LEDs.Reapply power to the board.Disconnect power to the board.Reset the DVK. 31. # 001-48651 Rev. *E . Doc. 30. 28. 27.

which can be found within the attachments feature of this PDF document.c file within Workspace Explorer. /* Turn on the PWM to blink LED on P1. } /* End of while(1) */ } /* End of main */ /* [] END OF FILE */ CY8CKIT-001 PSoC Development Kit Guide.2 main. * * Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { WORD i. i++).c 1. Replace the existing main.h" /* Part specific constants and macros */ /* PSoC API definitions for all User Modules */ /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes the PWM and starts the PWM clock which will * blink LED1. i++). Note To access the embedded attachments feature in the PDF document.7 */ while(1) { /* Delay time depends on compiler optimization levels and CPU clock */ for (i = 0.h> #include "PSoCAPI.Sample Projects 3. #else #endif /* Switch the state of Software LED (on or off) */ LED_1_Invert(). # 001-48651 Rev. 2. for (i = 0.c content with the content of the embedded CY8C28_main_Ex1. #include <m8c. i < 60000. click on the paper clip icon located in the lower left corner of the Adobe Reader application.1.// Give some more delay if HiTech compiler is used. i < 60000. Doc.c file. i < 40000. Then the main loop is entered which delays enough for LED2 to * blink at a quicker rate than LED1. /* Variable used for delay */ PWM8_1_Start(). LED_1_Start().1.6 */ /* Enable Software controlled LED */ /* The following loop controls the software LED connected to P1. Open the existing main.// Gives approx 450 msec delay with ImageCraft // and 170 msec with HiTech #ifdef HI_TECH_C for (i = 0. *E 41 . i++).

1 Creating ADC to LCD Project 1. Select Multi User Module Window 3. In the User Modules window expand the Amplifiers window. In this case the DS1128 configuration is used. select place.2.1. *E .1 on page 33. Ensure that the PGA is placed in ACC00.1.Sample Projects 3. and then right click DelSigPlus and choose Place. In the User Modules window expand the ADCs folder. Figure 3-15. 42 CY8CKIT-001 PSoC Development Kit Guide. Connect the voltage potentiometer (VR) to the ADC input P0[1].1. Doc. Follow steps 1 to 10 in section 3. 2. 4. 5. # 001-48651 Rev. The program reads the 9-bit ADC result and prints it to the LCD.1. Verify that the DelSigPlus_1 UM is placed in ASC10. change the Name of the project to Ex2_ADC_to_LCD. Right click PGA. Click OK. Scroll down in the window to verify that this is the case. A window opens with multiple options for the DelSigPlus UM.2 ADC to LCD Project This project demonstrates a 9-bit Delta Sigma ADC by measuring the voltage of the potentiometer center tap wiper and displaying the result on the LCD. 3.

Ensure that the PGA is placed in ACC00. Click PGA_1 and configure the properties to match this figure. Click DelSigPlus_1 and configure the properties to match this figure. Right click LCD and click place. 6. In the User Modules window expand Misc Digital. *E 43 . Doc. PGA_1 Properties 8. DelSigPlus_1 Properties CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-16. Figure 3-17. # 001-48651 Rev. 7. Figure 3-18.

*E . # 001-48651 Rev. Figure 3-20. If it is not configured for this port.Configure the Global Resources to match the following figure. Doc. LCD_1 Properties 10.Sample Projects 9. double click the MUX and choose Port_0_1. Ensure that AnalogColumn_InputMUX_0 is connected to Port_0_1. 44 CY8CKIT-001 PSoC Development Kit Guide. Global Resources 11. Click LCD_1 and configure the properties to match this figure. Figure 3-19.

*E 45 . Ensure that AnalogColumn_Clock_0. 14. CY8CKIT-001 PSoC Development Kit Guide. Ensure that AnalogColumn_InputMUX_0 is connected to Port_0_1 12. Figure 3-22.c content with the content of the embedded CY8C28_main_Ex2.Ensure that AnalogColumn_Clock_0.c file within Workspace Explorer. is connected to VC1. is connected to VC1 13.Save the project. # 001-48651 Rev. If it is not. Doc.Open the existing main.c file.Sample Projects Figure 3-21. double click the MUX and choose VC1. which can be found within the attachments feature of this PDF document. Replace the existing main.

16. ADC values may fluctuate several counts due to system noise.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 17 to program the device. 21. and if the potentiometer voltage is at the edge of an ADC count. *E .Configure the DVK breadboard using the included jumper wires: ❐ P0[1] to VR Figure 3-23. 46 CY8CKIT-001 PSoC Development Kit Guide.Configure the DVK SW3 to 5V. Doc.After programming the device. 17. 22. Connect P0[1] to VR RESET P0[1] VR R20 19. # 001-48651 Rev.Build the project.Sample Projects 15. press the reset button and vary the POT (R20) to see the results on the LCD. Note The ADC output values may not reach full range due to potentiometer and ADC limitations.Reapply power to the board.Save and close the project. Build  Generate/Build 'Ex2_ADC_to_LCD' Project. 20.Disconnect power to the board. 18.

Sample Projects 3.1. Open the existing main.2 main. and displays it on the LCD */ while (1) { /* Is there ADC data? */ if(DelSigPlus_1_fIsDataAvailable()) { /* Store result from ADC */ CY8CKIT-001 PSoC Development Kit Guide. *E 47 . /* Set the LCD to (Row=0. /* Enable Global interrupts */ /* This loop waits for a valid ADC result. Note To access the embedded attachments feature in the PDF document. DelSigPlus_1_Start(DelSigPlus_1_HIGHPOWER). /* Initialize the LCD */ LCD_1_Position(ROW_0.c file. starts and waits for an * ADC conversion.c 1. click on the paper clip icon located in the lower left corner of the Adobe Reader application. Replace the existing main.Column=0) */ DelSigPlus_1_StartAD(). /* Initialize the ADC */ LCD_1_Start(). LCD_1_PrCString("V Count: "). then it displays the raw counts to the LCD. /* Start gathering conversions from the ADC */ M8C_EnableGInt.h" /* LCD specific */ #define ROW_0 0 #define ROW_1 1 #define COLUMN_0 0 #define COLUMN_9 9 /* part specific constants and macros */ /* PSoC API definitions for all User Modules */ /* /* /* /* LCD LCD LCD LCD row 0 */ row 1 */ column 0 */ column 9 */ /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes both the ADC and LCD.c file within Workspace Explorer.2. # 001-48651 Rev. which can be found within the attachments feature of this PDF document.h> #include "PSoCAPI. 2. /* Holds the integer ADC result */ /* Initialize the PGA used to buffer input from the potentiometer (VR) on P0. Doc. * * Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { WORD adcResult.1 to the ADC */ PGA_1_Start(PGA_1_HIGHPOWER). COLUMN_0). #include <m8c.c content with the content of the embedded CY8C28_main_Ex2.

# 001-48651 Rev. /* Print ADC result on LCD */ } } /* End of while(1) */ } /* End of main */ /* [] END OF FILE */ 48 CY8CKIT-001 PSoC Development Kit Guide. *E .Sample Projects adcResult = DelSigPlus_1_wGetDataClearFlag(). /* Set LCD to (Row=0. COLUMN_9). Doc. LCD_1_Position(ROW_0.Column=9) */ LCD_1_PrHexInt(adcResult).

A window opens with multiple options for the DelSigPlus UM. Click OK. right click DAC6. and then right click DelSigPlus and choose Place.1 Creating ADC to UART with DAC Project 1. and click place.1. and click place. In the User Modules window expand the ADCs folder. right click LCD. CY8CKIT-001 PSoC Development Kit Guide. right click Counter16. 8. Move it to ASC21 block by drag and drop. 9. and click place. Follow steps 1 to 10 in section 3. A 38400 BAUD UART outputs the current ADC count as ASCII formatted into a hexadecimal number. A 6-bit DAC outputs a table generated sine wave at a frequency proportional to the ADC count. In the User Modules window expand DACs. Ensure that the PGA is placed in ACC00 6. Ensure that the PGA is placed in ACC00.3 ADC to UART with DAC This project demonstrates sine wave generation by using a 6-bit DAC. 3. 4. In the User Modules window expand the Amplifiers window. The firmware reads the voltage output by the DVK board potentiometer and displays the raw counts on the DVK board character LCD display similarly to those shown in the previous project. 5. In the User Modules window expand Misc Digital. 2.1.1. and select place. Scroll down in the window to verify that this is the case. Figure 3-24. Verify that the UM is placed in ASC10. 7. right click TX8.1. User module gets placed in ASD20 analog block by default. The frequency outputs to an oscilloscope. Right click PGA. The sine wave period is based on the current value of the ADC. In this case the DS1128 configuration is used. *E 49 . In the User Modules window expand Digital Comm. In the User Modules window expand Counters.Move the UMs so that they match the configuration shown in Figure 3-25 on page 50. # 001-48651 Rev.3. 10.Sample Projects 3. Doc.1 on page 33. 3. change the Name of the project to Ex3_ADC_to_UART_with_DAC. select place.

Figure 3-26. Configure User Modules TX8_1 Counter16_1 Counter16_1 PGA_1 DelSigPlus_1 DAC6_1 11. DelSigPlus_1 Properties 50 CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-25. # 001-48651 Rev. Click on DelSigPlus_1 and configure it to match this figure. Doc. *E .

Click PGA_1 and configure it to match this figure. LCD_1 Properties 15. Doc. DAC6_1 Properties 14.Click LCD_1 and configure it to match this figure. Figure 3-28.Sample Projects 12. # 001-48651 Rev.Click on Counter16_1 and configure it to match this figure. PGA_1 Properties 13.Click DAC6_1 and configure it to match this figure. Figure 3-29. Counter16_1 Properties CY8CKIT-001 PSoC Development Kit Guide. Figure 3-30. *E 51 . Figure 3-27.

enable Row_0_Output_2_Drive_2 to connect GlobalOutOdd_2.Click TX8_1 and configure it to match this figure.Sample Projects 16. # 001-48651 Rev. Figure 3-32. Figure 3-31. Digital Interconnect Window 52 CY8CKIT-001 PSoC Development Kit Guide.Click RO0[2] LUT. TX8_1 Properties 17. Doc. *E .

double click the MUX and choose Port_0_1.Sample Projects 18. A window appears.Verify that AnalogColumn_InputMUX_0 is connected to Port_0_1. Figure 3-33. *E 53 . Figure 3-34. Configure AnalogOutBuf_1 21. # 001-48651 Rev. If it is not configured for this port.Click GlobalOutOdd_2. CY8CKIT-001 PSoC Development Kit Guide.Click AnalogOutBuf_1 and configure it for Port_0_5. in this window configure PIN for Port_1_2. Configure PIN for Port_1_2 19. Doc. 20.Click OK to continue.

*E . Doc. Verify AnalogColumn_InputMUX_0 Connection 54 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.Sample Projects Figure 3-35.

double click the MUX and chose VC2. If it is not. Figure 3-36. # 001-48651 Rev. Verify AnalogColumn_Clock_0 Connection CY8CKIT-001 PSoC Development Kit Guide. *E 55 .Verify that AnalogColumn_Clock_0 and AnalogColumn_Clock_1 are connected to VC2.Sample Projects 22. Doc.

28.Configure Global Resources to match the following figure.Open the existing main. 25. Replace the existing main. 34. click Build  Generate/Build 'Ex3_ADC_to_UART_with_DAC' Project. Figure 3-37. Doc. 56 CY8CKIT-001 PSoC Development Kit Guide.Save the project.Configure the DVK breadboard using the included jumper wires as follows: ❐ ❐ ❐ P0[1] to VR P1[2] to TX P0[5] to Scope Note An LED (P0[5] to LED1) by nature does not accurately show the changes in frequency the best way to see this is to use a Scope(P0[5] to Scope).To Generate the project. 26.c file within Workspace Explorer.Disconnect power to the board.Configure the DVK SW3 to 5V.c file. 32. 29. click Build  Build 'Ex3_ADC_to_UART_with_DAC' Project.c content with the content of the embedded CY8C28_main_Ex3.Find the line '@INTERRUPT_9' (for PSoC Block DBC01) and replace that line with: ljmp _Counter16_C_ISR 30. Configure Global Resources 24.Select boot.Sample Projects 23.Open your boot.To Build the project. *E . Select All Files for Files of the type:.tpl in the list of files and click Open.tpl file in the project folder Files  Open File. # 001-48651 Rev. 31. 33.Save the project. 27. which can be found within the attachments feature of this PDF document.

Use a terminal application such as TeraTerm or HyperTerminal with these setup parameters.Connect a serial cable to the PC and the DVK board. and P0[5] to LED1 TX P0[1] P1[2] VR 35. # 001-48651 Rev. CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-38. ADC values may fluctuate several counts due to system noise.On the DVK board. verify that RS232_PWR(J10) is jumpered to ON. press Reset and vary the pot to see the result on the LCD as well as in the terminal application.Reapply power to the board. View the DAC output on a scope or with an LED. 37. Connect P0[1] to VR. After programming the device. *E 57 . 38. and if the potentiometer voltage is at the edge of an ADC count. 40. ❐ ❐ ❐ ❐ ❐ Baud Rate: 38400 Data: 8-bit Parity: none Stop: 1bit Flow Control: none 39. Doc.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 17 to program the device. 36. Note The ADC output values may not reach full range due to potentiometer and ADC limitations. P1[2] to TX.Save and close the project.

53. 4. DAC and UART.c 1. 9.c content with the content of the embedded CY8C28_main_Ex3. 31. it continuously checks for an ADC conversion. 7. 58. 60. 47. # 001-48651 Rev.c file within Workspace Explorer. 59. 26. Note To access the embedded attachments feature in the PDF document.1. LCD. 16. 39. *E . #include <m8c. 60. 22. 1. 49. 7. 51. Doc. 17. 11. 5. /* /* /* /* LCD LCD LCD LCD row 0 */ row 1 */ column 0 */ column 9 */ BYTE sinTable[]= 0. and updates the Counter16 period (based on the raw count) for the * DAC output. 13. * * Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { /* Variable for holding ADC result. 51. 3. 10. 14. 59. 33. 42. 60. 56. 55. Counter16_1_Start(). Replace the existing main. 44. 29. Open the existing main. click on the paper clip icon located in the lower left corner of the Adobe Reader application. Counter16_1_EnableInt(). 49. transmits the raw count * serially.3. 28. Counter. 2. 12. 59. PGA. 23. 6.c file. 3. 2. 39. and updating counter period */ WORD adcResult.2 main. }. If there is * one then it displays the ADC raw count to the LCD. 20. 58. 31.h> #include "PSoCAPI. * In the main loop. 41. 19. 55. 0 BYTE tablePos = 0. 2. 44. 59. 25. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes the ADC. 53. 36. 0. which can be found within the attachments feature of this PDF document.h" /* part specific constants and macros */ /* PSoC API definitions for all User Modules */ /* Counter16 Interrupt Handler */ #pragma interrupt_handler Counter16_C_ISR /* LCD specific */ #define ROW_0 0 #define ROW_1 1 #define COLUMN_0 0 #define COLUMN_9 9 const { 0. 1.Sample Projects 3. 36. 56. /* Enable the counter used for DAC update rate */ /* Enable DAC update interrupt */ 58 CY8CKIT-001 PSoC Development Kit Guide. 46. 33.

COLUMN_0). LCD_1_Position(ROW_0. M8C_EnableGInt.column=0) */ Print ADC result to LCD */ Write LCD result to TX8 -> PC */ Write return character to TX8 */ CY8CKIT-001 PSoC Development Kit Guide. COLUMN_9).asm file to jump * to it. LCD_1_PrCString("V Count: "). /* Set the LCD to (Row=0. * * Parameters: * void * * Return: * void /* /* /* /* Move LCD (row=0. Every time a terminal count is reached the DAC will get the next * value from the sinTable.tpl has been modified to jump to this ISR every terminal * count. # 001-48651 Rev. /* Get new ADC data */ /* Change DAC update rate counter */ Counter16_1_WritePeriod((adcResult << 4) + 200). } } /* End of while(1) */ } /* End of Main */ /******************************************************************************* * Function Name: Counter16_C_ISR ******************************************************************************** * * Summary: * This is the interrupt service routine for the Counter16 usermodule written * in C. LCD_1_PrHexInt(adcResult). DAC6_1_Start(DAC6_1_HIGHPOWER). The related #pragma above is necessary for the boot.Column=0) */ /* Enable Global Interrupts */ while(1) { /* Step 1: Get BYTE data from the ADC Step 2: Write BYTE data from ADC to the counter in order to change the DAC update rate Step 3: Move the LCD cursor back to the beginning and display new ADC data Step 4: Write ADC data out the TX port. and then send a return */ /* Is new data available from the ADC? */ if (DelSigPlus_1_fIsDataAvailable()) { adcResult = DelSigPlus_1_wGetDataClearFlag(). TX8_1_PutCRLF(). /* Start the character LCD */ LCD_1_Position(ROW_0. /* Start the ADC */ DelSigPlus_1_StartAD(). *E 59 . TX8_1_PutSHexInt(adcResult). /* Start reading values on the ADC */ LCD_1_Start(). /* Start the DAC */ DelSigPlus_1_Start(DelSigPlus_1_HIGHPOWER). /* Enable to PGA to buffer signal from VR to ADC */ PGA_1_Start(PGA_1_HIGHPOWER). The boot. Doc.Sample Projects /* Start the TX8 UM with no parity (baud rate = 38400) */ TX8_1_Start(TX8_1_PARITY_NONE).

} DAC6_1_WriteBlind(sinTable[tablePos++]). *E . } /* [] END OF FILE */ 60 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Doc.Sample Projects * *******************************************************************************/ #ifdef HI_TECH_C void Counter16_C_ISR(void) @ 0x24 #else void Counter16_C_ISR(void) #endif { // Check to see if we have reached the // if (tablePos >= sizeof(sinTable)) { tablePos = 0.

Right click the CSD user module in the workspace explorer and select CSD Wizard. The firmware displays the CapSense button presses on the LCD (row 1) and associated LEDs. 2. Note that this project uses IDAC. 4. change the Name of the project to Ex4_CapSense.1 on page 33.4 CapSense® This project demonstrates CapSense. Select Multi User Module Window 3.1. Do refer to CapSense user module datasheet for more information on using Rb. A window appears with the option to use the default configuration. # 001-48651 Rev. Right click CSD and choose Place. 3.1. But if using external Rb with CSD is desired then populate R15 (connected to P3[1]).1.1 Creating CapSense Project 1.4.1. Follow steps 1 to 10 in section 3. Select Yes and click OK. In the User Modules window expand the Cap Sensors folder. Figure 3-39.Sample Projects 3. CY8CKIT-001 PSoC Development Kit Guide. *E 61 . It also displays the CapSense slider position on the LCD (row 2). Doc. Rb can range from 2k to 10k.

CapSense Wizard 6. Figure 3-41. CapSense Wizard window opens. # 001-48651 Rev. set the # of buttons to 2. In the CapSense Wizard window. Select P0[7] as the Modulator Capacitor Pin. *E .Sample Projects Figure 3-40. Select CSD Wizard 5. Doc. 7. under the Global Settings Tab. 62 CY8CKIT-001 PSoC Development Kit Guide.

CapSense Wizard Place Buttons 8. Do the same for SW1 and drag it to P0[6] Figure 3-43. # 001-48651 Rev. Click and hold SW0 and drag it to P0[5] 9.Sample Projects Figure 3-42. *E 63 . CapSense Wizard Slider Sensors CY8CKIT-001 PSoC Development Kit Guide. Doc.

right click LED. Sensors Settings Tab 13. and click place. *E . 15.In the User Modules window expand Misc Digital. # 001-48651 Rev. 17. Do the same thing for each slider sensor and corresponding pin. and click place. ❐ ❐ ❐ ❐ ❐ S0[0] to P0[0] S0[1] to P0[1] S0[2] to P0[2] S0[3] to P0[3] S0[4] to P0[4] 11. 16. and click place. right click LCD.In the User Modules window expand Misc Digital.In the User Modules window expand Misc Digital. 64 CY8CKIT-001 PSoC Development Kit Guide. Doc. Figure 3-44. right click LED.Sample Projects 10. Select the Sensors Settings Tab 12.Click OK 14.Click CSD_1 and configure it to match this figure.Set the Resolution to 80.

LCD_1 Properties 19.Click LED_2 and configure it to match this figure. LED_2 Properties 21. LED_1 Properties 20. Doc. Figure 3-47. CSD_1 Properties 18.Configure Global Resources to match the following figure. *E 65 . Figure 3-48. Figure 3-46. Click LCD_1 and configure it to match this figure. CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.Sample Projects Figure 3-45. Click LED_1 and configure it to match this figure.

Sample Projects Figure 3-49. Configure Global Resources 22.Configure the DVK board SW3 to 5V.c content with the content of the embedded CY8C28_main_Ex4. P0[5]. 24. 31. 25. # 001-48651 Rev.Save the project. *E . 29.Open the existing main. If B1 (P0[5]) is pushed it also displays "Button1" in the top row of the LCD display. 23. 32.Ensure that P0[1].Disconnect power to the board.Save and close the project.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 17 to program the device. Likewise.Configure the DVK breadboard using the included jumper wires: ❐ ❐ P1[6] to LED1 P1[7] to LED2 28. 30.Reapply power to the board. 66 CY8CKIT-001 PSoC Development Kit Guide.c file within Workspace Explorer. click Build  Generate/Build 'Ex4_CapSense' Project. An LED lights up when either CapSense button is pushed. Doc. which can be found within the attachments feature of this PDF document. Replace the existing main.Reset the DVK. if B2 (P0[6]) is pushed it displays "Button2" in the top row of the LCD display. 27. 26. The bottom row of the LCD displays the Slider position with a Horizontal Bar graph. and P0[7] are disconnected.To Generate and build the project.c file.

c content with the content of the embedded CY8C28_main_Ex4.1. *E 67 . BYTE sensor_2).c 1. Doc. # 001-48651 Rev.h> #include "PSoCAPI.h" /* part specific constants and macros */ /* PSoC API definitions for all User Modules */ /* LCD specific */ #define ROW_0 0 /* LCD row 0 */ #define ROW_1 1 /* LCD row 1 */ #define COLUMN_0 0 /* LCD column 0 */ #define NUM_CHARACTERS 16 /* Number of characters on LCD */ /* For clearing a row of the LCD*/ #define CLEAR_ROW_STR " " /* Button 1 only string for row 0 of the LCD */ #define BUTTON_1_STR "Button1 " /* Button 2 only string for row 0 of the LCD */ #define BUTTON_2_STR " Button2" /* Button 1 and 2 string for row 0 of the LCD */ #define BUTTON_1_2_STR "Button1 Button2" /* Default string for button row of the LCD */ #define DEFAULT_ROW_0_STR "Touch Buttons " /* Default string for slider row of the LCD */ #define DEFAULT_ROW_1_STR "Touch The Slider" /* CapSense specific */ #define SLIDER_RESOLUTION 80 #define SCANSENSOR_BTN_B1 0 #define SCANSENSOR_BTN_B2 1 void UpdateButtonState(BYTE sensor_1. #include <m8c. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes CapSense and the LCD. Open the existing main. click on the paper clip icon located in the lower left corner of the Adobe Reader application. 2.c file.c file within Workspace Explorer. Note To access the embedded attachments feature in the PDF document. void UpdateSliderPosition(BYTE value). * * Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { CY8CKIT-001 PSoC Development Kit Guide. Then it continuously * scans all CapSense sensors (slider sensors and buttons). Replace the existing main.Sample Projects 3.4.2 main. gets the state of * the buttons and slider and updates the LCD with the current state. which can be found within the attachments feature of this PDF document.

/* CapSense Initialization */ CSD_1_Start(). /* Slider Position */ BYTE stateB_1. /* Update LCD and LED's with current Button and Linear Slider states */ UpdateButtonState(stateB_1. /* LED1 Initialization */ LED_1_Start(). /* For Bargraph display on LCD */ LCD_1_InitBG(LCD_1_SOLID_BG). /* Button1 State */ BYTE stateB_2. *E . stateB_2 = CSD_1_bIsSensorActive(SCANSENSOR_BTN_B2). UpdateSliderPosition(pos). /* LED2 Initialization */ LED_2_Start(). stateB_2). /* Update state to active/inactive for each button sensor */ stateB_1 = CSD_1_bIsSensorActive(SCANSENSOR_BTN_B1). /* Update baselines for each sensor */ CSD_1_UpdateAllBaselines(). while(1) { /* Scan each CapSense sensor and update their raw data value */ CSD_1_ScanAllSensors(). LED's are also updated according to button * state. /* Button2 State */ M8C_EnableGInt. Doc. * * Parameters: * sensor_1: Button state for B1 * sensor_2: Button state for B2 * * Return: 68 CY8CKIT-001 PSoC Development Kit Guide. /* Get Linear Slider Position */ pos = CSD_1_wGetCentroidPos(1).Sample Projects BYTE pos. /* Enable Global Interrupts */ /* LCD Initialization */ LCD_1_Start(). # 001-48651 Rev. /* Load finger thresholds set in user module parameters */ CSD_1_SetDefaultFingerThresholds(). } } /******************************************************************************* * Function Name: UpdateButtonState ******************************************************************************** * * Summary: * Updates the LCD screen with the current button state by displaying which * button is being touched on row 0. /* Initialize the baselines by scanning all sensors and getting the initial raw data values */ CSD_1_InitializeBaselines().

/* Turn off the LED1 */ } } else { /* Display default string on LCD and set LCD_1_PrCString(DEFAULT_ROW_0_STR). /* Button 2 is not active */ LED_2_Off(). BYTE sensor_2) { LCD_1_Position(ROW_0.Sample Projects * void * *******************************************************************************/ void UpdateButtonState(BYTE sensor_1. } } /******************************************************************************* * Function Name: UpdateSliderPosition ******************************************************************************** * * Summary: * Updates the LCD screen with the current slider position by displaying the * horizontal bar graph. LED_2_Off(). } else // sensor_2 { /* Display Button 2 state on LCD and LCD_1_PrCString(BUTTON_2_STR). LED_2_On(). /* Set both LED's off in this state */ LED_1_Off(). * * Return: * void * the LCD and LEDs */ both button sensors are active */ LED1 */ LED2 */ LED's to off */ CY8CKIT-001 PSoC Development Kit Guide. LED_2_On(). Doc. # 001-48651 Rev. /* Check the state of the buttons and update if (sensor_1 && sensor_2) { /* Display both Button strings on LCD if LCD_1_PrCString(BUTTON_1_2_STR). /* Both LED's are on in this state */ LED_1_On(). * * Parameters: * value: Centroid position from CapSense slider.COLUMN_0). *E 69 . LED_1_On(). /* Turn on LED2 */ LED_1_Off(). } else if (sensor_1 || sensor_2) { if (sensor_1) { /* Display Button 1 state on LCD and LCD_1_PrCString(BUTTON_1_STR).

COLUMN_0. } } /* [] END OF FILE */ 70 CY8CKIT-001 PSoC Development Kit Guide. } else { /* Update the bar graph with the current finger position */ LCD_1_DrawBG(ROW_1. # 001-48651 Rev. Doc.Sample Projects *******************************************************************************/ void UpdateSliderPosition(BYTE value) { /* The slider position is 0xFF if there is no finger present on the slider */ if (value > SLIDER_RESOLUTION) { /* Clear old slider position (2nd row of LCD) */ LCD_1_Position(ROW_1. LCD_1_PrCString(DEFAULT_ROW_1_STR). COLUMN_0). NUM_CHARACTERS. value + 1). *E .

Click OK. click Browse and navigate to the appropriate directory. New Project Window 5. CY8CKIT-001 PSoC Development Kit Guide. In Location. Figure 3-50.2 3.2.2. To create a new project. Name the project Example_My_First_PSoC_Project. 4. select the Chip-Level Project.1 CY8C29 Family Processor Module Example Projects My First PSoC 1 (CY8C29) Project Creating My First PSoC 1 (CY8C29) Project 1. Open PSoC Designer 5. The New Project window opens. # 001-48651 Rev.1. *E 71 . In the New Project window.Sample Projects 3.1 3. 3. Doc.0 2. The Select Project Type window opens. click File  New Project.

and scroll down to the CY8C29466. click View Catalog. The Device Catalog window opens. Under Generate 'Main' File Using:. for this project select C. Click on the PSoC tab. 72 CY8CKIT-001 PSoC Development Kit Guide. 7. Select Project Type Window 6. For this project click any device in this section and then click Select.Sample Projects Figure 3-51. CY8C29566. # 001-48651 Rev. then click OK.… section. Doc. 8. Figure 3-52. In this window under Select Target Device. Device Catalog Window 9. *E .

Default View.In this folder right click on a PWM8 and select place. User Modules Window 12. The User Module (UM) is placed in the first available digital block.By default. Doc. In the User Modules window. # 001-48651 Rev. the project opens to chip view Figure 3-53. *E 73 . expand the PWMs folder. CY8CKIT-001 PSoC Development Kit Guide. Figure 3-54. 11.Sample Projects 10.

Sample Projects Figure 3-55. click View  Properties Window. *E . Doc. Configure the PWM with the settings as in the following figure. Properties Window 74 CY8CKIT-001 PSoC Development Kit Guide. If the Properties window does not appear. Figure 3-56. # 001-48651 Rev.Double click the placed PWM8_1 UM. the Properties window opens on the left side of the screen. Place User Module PWM8 13.

A window appears. in this window configure PIN for Port_0_7. 18. Figure 3-58. Route the PWM CompareOut signal to P0[7] 15.Next.Sample Projects 14. 16. the Digital Interconnect window opens. Figure 3-57. route the PWM CompareOut signal to P0[7].Double click the LUT. *E 75 .Click on GlobalOutEven_7. CY8CKIT-001 PSoC Development Kit Guide.Click Close. The first step is to configure the Look Up Table (LUT) on Row_0_Output3.In this window enable Row_0_Output_3_Drive_1 to connect to GlobalOutEven_7. Doc. Digital Interconnect Window 17. # 001-48651 Rev.

20. Configure PIN for Port_0_7 19.Click OK to continue.Sample Projects Figure 3-59.2 User Modules. *E . Configure the LED for Port_1_7. # 001-48651 Rev. 76 CY8CKIT-001 PSoC Development Kit Guide. Figure 3-60. Workspace Explorer 21. This UM does not use digital or analog blocks.In the User Modules window expand the Misc Digital folder.Double click the LED_1 UM and navigate to the Properties window. It appears in the Workspace Explorer  Example_My_First_PSoC_Project[CY8C29]  Example_My_First_PSoC_Project[Chip]  Loadable Configurations  example_my_first_psoc_project . Doc. this adds the UM to the project. In this folder right click the LED and select place.

CY8CKIT-001 PSoC Development Kit Guide.c content with the content of the embedded CY8C29_main_Ex1.c file within Workspace Explorer. Replace the existing main. *E 77 . Global Resources Window 23.c file. # 001-48651 Rev.Open the existing main. Properties Window 22. which can be found within the attachments feature of this PDF document. Figure 3-62.Configure the Global Resources window to match the following figure.Sample Projects Figure 3-61. Doc.

Reset the DVK. 26.Configure the DVK breadboard using the included jumper wires: ❐ ❐ P0[7] to LED1 P1[7] to LED2 29. # 001-48651 Rev. and observe the blinking LEDs.Configure the DVK board SW3 to 5V. *E . 31. Workspace Explorer 24.Save the project. 28.Sample Projects Figure 3-63. 25. 78 CY8CKIT-001 PSoC Development Kit Guide.Reapply power to the board. 27.Save and close the project.Build the project.Disconnect power to the board.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 21 to program the device. 30. 32. Doc. Build  Generate/Build 'Example_My_First_PSoC_Project' Project.

2 = . * ********************************************************************************/ /****************************************************************************** * PWM Settings: * * Input Clock = VC3 //VC3 = 24MHz/16/16/256 =366. and blinks another LED * with a software timing loop. Replace the existing main. /******************************************************************************* * File Name: main. click on the paper clip icon located in the lower left corner of the Adobe Reader application. Note To access the embedded attachments feature in the PDF document. # 001-48651 Rev.2Hz * Enable = High * CompareOut = ROW_0_Output_3 * TerminalCountOut = None * Period = 100 Output period = (Period+1)*(1/Input Clock) = 101/ 366.i++){} //Length of delay depends on compiler and CPU clock LED_1_Invert().Sample Projects 3. //Switch the state of Software LED.6Hz with a PWM. *E 79 .h> #include "PSoCAPI.7 LED_1_Start().c file within Workspace Explorer.i<60000. which can be found within the attachments feature of this PDF document. //if off turn it on } //End of while(1) }//End of main CY8CKIT-001 PSoC Development Kit Guide.2.275sec or 3.6Hz * PulseWidth = 50 * CompareType = Less Than Or Equal * InterruptType = Terminal Count * ClockSync = Sync to SysClk * InvertEnable = Normal * ********************************************************************************* / #include <m8c. if on turn it off.c file.h" unsigned int i.2 main.c content with the content of the embedded CY8C29_main_Ex1.7 while(1) { for (i=0. // part specific constants and macros // PSoC API definitions for all User Modules // Varible used for delay void main(void) { PWM8_1_Start().1.// Turn on the PWM to blink LED on P0. Open the existing main. Doc. The * firmware blinks one LED at about 3.// Enable Software controlled LED // The following loop controls the software LED conneted to P1.c 1. 2.c * * Description: * This file provides source code for My First PSoC Project example.

In the User Modules window expand the Amplifiers window.2. and select the DS1128 configuration. Verify that the DelSig_1 UM is placed in ASC10. Select Multi User Module Window 3. Click OK. change the Name of the project to Example_ADC_to_LCD. 5. Connect the voltage potentiometer (VR) to the ADC input P0[1]. 2.2 ADC to LCD Project This project demonstrates a 9-bit Delta Sigma ADC by measuring the voltage of the potentiometer center tap wiper and displaying the result on the LCD.Sample Projects 3.2. A window opens with multiple options for the DelSig UM. *E . if necessary. 4.2. 3. # 001-48651 Rev. Ensure that the PGA is placed in ACB00. Follow steps 1 to 10 in section 3. select place. Right click PGA. Click OK.2. Scroll down. The program reads the 9-bit ADC result and prints it to the LCD. In the User Modules window expand the ADCs folder. 80 CY8CKIT-001 PSoC Development Kit Guide. Figure 3-64. Doc. and then right click DelSig and choose Place.1 on page 71.1 Creating ADC to LCD Project 1.1.

# 001-48651 Rev. Figure 3-67. 6. *E 81 . Double click DelSig_1 and configure the properties to match this figure. Double click PGA_1 and configure the properties to match this figure. Right click LCD and click place. PGA_1 Properties 8. Ensure that the PGA is placed in ACB00. Doc. In the User Modules window expand Misc Digital. Figure 3-66.Sample Projects Figure 3-65. DelSig_1 Properties CY8CKIT-001 PSoC Development Kit Guide. 7.

# 001-48651 Rev. Figure 3-68.Sample Projects 9. Doc. Figure 3-69. LCD_1 Properties 10.Configure the Global Resources to match the following figure. If it is not configured for this port. *E . 82 CY8CKIT-001 PSoC Development Kit Guide. double click the MUX and choose Port_0_1. Global Resources Properties 11. Ensure that AnalogColumn_InputMUX_0 is connected to Port_0_1. Double click LCD_1 and configure the properties to match this figure.

is connected to VC1.Ensure that AnalogColumn_Clock_0. Replace the existing main.c file within Workspace Explorer. Doc.c file. Ensure that AnalogColumn_InputMUX_0 is connected to Port_0_1 12. If it is not. CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-70. is connected to VC1 13. double click the MUX and chose VC1.Open the existing main. which can be found within the attachments feature of this PDF document.c content with the content of the embedded CY8C29_main_Ex2. Ensure that AnalogColumn_Clock_0. *E 83 .Save the project. Figure 3-71. 14. # 001-48651 Rev.

Sample Projects 15.After programming the device.Configure the DVK SW3 to 5V. 22. Build  Generate/Build 'Example_ADC_to_LCD' Project. 18.Build the project. and if the potentiometer voltage is at the edge of an ADC count. 84 CY8CKIT-001 PSoC Development Kit Guide.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 21 to program the device. Connect P0[1] to VR RESET P0[1] VR R20 19. 16. *E . ADC values may fluctuate several counts due to system noise.Reapply power to the board. 20. Note The ADC output values may not reach full range due to potentiometer and ADC limitations.Configure the DVK breadboard using the included jumper wires: ❐ P0[1] to VR Figure 3-72. press the reset button and vary the POT (R20) to see the results on the LCD. Doc. 21.Save and close the project. 17.Disconnect power to the board. # 001-48651 Rev.

* ******************************************************************************** /****************************************************************************** * PGA Settings:(The PGA buffers the potentiometer voltage on P0. which can be found within the attachments feature of this PDF document.2 main. The * firmware takes a voltage output from a potentiometer and displays the raw * counts on an LCD.Sample Projects 3. /******************************************************************************* * File Name: main.2. *E 85 .h" // part specific constants and macros // PSoC API definitions for all User Modules unsigned int wADCResult.c content with the content of the embedded CY8C29_main_Ex2. Note To access the embedded attachments feature in the PDF document. // Holds the integer ADC result void main(void) { CY8CKIT-001 PSoC Development Kit Guide. * this is achieved by selecting the appropriate configuration when placing the UM.2.(Vdd/2) and Vdd = 5V.h> #include "PSoCAPI. this parameter is unused *******************************************************************************/ #include <m8c. 2. * * DataFormat = Unsigned * DataClock = VC1 // VC1 = 24MHz/12 = 2MHz * ClockPhase = Normal * PosInput = ACB00 (PGA_1) * NegInput = ACB00 *Note.1 into the ADC) * * Gain = 1 * Input = AnalogColumn_InputMUX_0 (P0. Doc. The ADC is configured for a resolution of 9 bits.c 1.c file within Workspace Explorer.1) * Reference = AGND * AnalogBus = Disable *******************************************************************************/ /****************************************************************************** * LCD Settings: * LCDPort = Port_2 * BarGraph = Disable *******************************************************************************/ /****************************************************************************** * DelSig Settings: * The ADC can read full range values from 0-5V. Open the existing main.c * * Description: * This file provides source code for the ADC to LCD example project. # 001-48651 Rev. Replace the existing main. if the Ref Mux setting is selected * as (Vdd/2)+/. click on the paper clip icon located in the lower left corner of the Adobe Reader application. this parameter is unused * NegInputGain = Disconnected * PWM Output = None * PulseWidth = 1 *Note.c file.

//Initalize the PGA.//Start gathering conversions from the ADC M8C_EnableGInt. DelSig_1_StartAD().9).//Store result from ADC LCD_1_Position(0.Column=9) LCD_1_PrHexInt(wADCResult).Sample Projects PGA_1_Start(PGA_1_HIGHPOWER). //Initalize the LCD LCD_1_Position(0.1 to the ADC DelSig_1_Start(DelSig_1_HIGHPOWER). and then displays it on the LCD while (1) { while (!(DelSig_1_fIsDataAvailable())).//Set the LCD to (Row=0.Column=0) LCD_1_PrCString("V Count: "). Doc. PGA used to buffer input from the VR on P0. //Enable Global interrupts //This loop waits for a valid ADC result. //Initalize the ADC LCD_1_Start().0). //Set LCD to (Row=0.//Wait for ADC data to be ready wADCResult=DelSig_1_wGetDataClearFlag().//Print ADC result on LCD } } 86 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. *E .

*E 87 . Follow steps 1 to 10 in section 3.1 on page 71. change the Name of the project to Example_ADC_to_LCD_with_DAC_and_UART.2. if necessary. In the User Modules window expand the ADCs folder. Doc. and select the DS232 configuration.Sample Projects 3. and then right click DelSig and choose Place. A 6-bit DAC outputs a table generated sine wave at a frequency proportional to the ADC count.1 Creating ADC to LCD with DAC and UART Project 1.2. A window opens with multiple options for the DelSig UM. Click OK. 3. 2. The firmware reads the voltage output by the DVK board potentiometer and displays the raw counts on the DVK board character LCD display similarly to those shown in the previous project. Scroll down. The sine wave period is based on the current value of the ADC. A 38400 BAUD UART outputs the current ADC count as ASCII formatted into a hexadecimal number. # 001-48651 Rev.2.3 ADC to LCD with DAC and UART This project demonstrates sine wave generation by using a 6-bit DAC. CY8CKIT-001 PSoC Development Kit Guide. The frequency is in the approximate range of 15 Hz to 350 Hz and outputs to port to observe on scope. Figure 3-73.1.3. Select Multi User Module Window 3. Click OK.

Right click PGA. # 001-48651 Rev. In the User Modules window expand Misc Digital. 9. In the User Modules window expand Counters.Sample Projects 4. right click DAC6. right click Counter8. In the User Modules window expand Digital Comm. and click place. Complete this step twice to place two Counter8s. 88 CY8CKIT-001 PSoC Development Kit Guide. select place. Doc. In the User Modules window expand the Amplifiers window. Ensure that the PGA is placed in ACB00 6. 7. 10. right click TX8. and select place. 8. Ensure that the PGA is placed in ACB00. *E .Move the UMs so that they match the configuration shown in Figure 3-75 on page 89. 5. and click place. and click place. right click LCD. Figure 3-74. Verify that the UM is placed in ASC10. In the User Modules window expand DACs.

Configure User Modules Counter8_1 Counter8_2 TX8_1 PGA_1 DelSig_1 DAC6_1 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.Sample Projects Figure 3-75. Doc. *E 89 .

Double click on DelSig_1 and configure it to match this figure.Double click LCD_1 and configure it to match this figure.Sample Projects 11. Figure 3-76. *E . Doc. # 001-48651 Rev.Double click PGA_1 and configure it to match this figure. LCD_1 Properties 90 CY8CKIT-001 PSoC Development Kit Guide. Figure 3-77. Figure 3-78. DAC6_1 Properties 14.Double click DAC6_1 and configure it to match this figure. DelSig_1 Properties 12. PGA_1 Properties 13. Figure 3-79.

TX8_1 Properties CY8CKIT-001 PSoC Development Kit Guide. Figure 3-82. Figure 3-80.Double click on Counter8_1 and configure it to match this figure. # 001-48651 Rev. *E 91 .Sample Projects 15. Doc. Figure 3-81.Double click TX8_1 and configure it to match this figure. Counter8_2 Properties 17. Counter8_1 Properties 16.Double click Counter8_2 and configure it to match this figure.

Digital Interconnect Window 92 CY8CKIT-001 PSoC Development Kit Guide. Doc. # 001-48651 Rev. enable Row_2_Output_0_Drive_1 to connect GlobalOutEven_4.Sample Projects 18.Double click RO2[0] LUT. *E . Figure 3-83.

# 001-48651 Rev.Sample Projects 19. Configure PIN for Port_0_4 20. Figure 3-84. *E 93 . Doc. A window appears.Click OK to continue.Double click GlobalOutEven_4. in this window configure PIN for Port_0_4. CY8CKIT-001 PSoC Development Kit Guide.

Verify that AnalogColumn_InputMUX_0 is connected to Port_0_1. double click the MUX and choose Port_0_1. Figure 3-85. If it is not configured for this port. Configure AnalogOutBuf_1 22. *E . Doc.Click AnalogOutBuf_1 and configure it for Port_0_5.Sample Projects 21. Figure 3-86. # 001-48651 Rev. Verify AnalogColumn_InputMUX_0 Connection 94 CY8CKIT-001 PSoC Development Kit Guide.

Doc. *E 95 . # 001-48651 Rev.Verify that AnalogColumn_Clock_0 is connected to VC2.Sample Projects 23. Figure 3-87. Verify AnalogColumn_Clock_0 Connection CY8CKIT-001 PSoC Development Kit Guide. double click the MUX and chose VC2. If it is not.

Sample Projects 24. 30.Open the existing main. 33.Save the project. select Yes. 28.c file within Workspace Explorer.To Generate the project. 32.Configure the DVK breadboard using the included jumper wires as follows: ❐ ❐ ❐ P0[1] to VR P0[4] to TX P0[5] to Scope Note An LED (P0[5] to LED1) by nature does not accurately show the changes in frequency the best way to see this is to use a Scope(P0[5] to Scope).To Build the project. Replace the existing main. *E . Copy the code found in the Counter8_1INT. click Build  Build 'Example_ADC_to_LCD_with_DAC_and_UART' Project.Configure Global Resources to match the following figure. Configure Global Resources 25.c file.Open your Counter8_1INT.Configure the DVK SW3 to 5V.Save the project. click Build  Generate/Build 'Example_ADC_to_LCD_with_DAC_and_UART' Project. which can be found within the attachments feature of this PDF document. 26. 96 CY8CKIT-001 PSoC Development Kit Guide. Note If prompted to reload an out of date file.asm file in PDF attachment.c content with the content of the embedded CY8C29_main_Ex3. 29. Doc.Disconnect power to the board. Figure 3-88. # 001-48651 Rev. 27. 31.asm file in Files  lib  Library Source Files.

Note The ADC output values may not reach full range due to potentiometer and ADC limitations. 37.Use a terminal application such as TeraTerm or HyperTerminal with these setup parameters. P0[4] to TX. *E 97 . press Reset and vary the pot to see the result on the LCD as well as in the terminal application. Doc. and if the potentiometer voltage is at the edge of an ADC count.On the DVK board. CY8CKIT-001 PSoC Development Kit Guide. 39. 35.Use PSoC Designer as described in Programming My First PSoC 1 Project on page 21 to program the device. and P0[5] to LED1 TX P0[1] P0[4] VR 34. After programming the device. verify that RS232_PWR(J10) is jumpered to ON.Reapply power to the board. ❐ ❐ ❐ ❐ ❐ Baud Rate: 38400 Data: 8-bit Parity: none Stop: 1bit Flow Control: none 38. ADC values may fluctuate several counts due to system noise. 36.Save and close the project. # 001-48651 Rev.Sample Projects Figure 3-89. Connect P0[1] to VR.Connect a serial cable to the PC and the DVK board. View the DAC output on a scope or with an LED.

/******************************************************************************* * File Name: main. # 001-48651 Rev. *E . 2.1 into the ADC) * * Gain = 1 * Input = AnalogColumn_InputMUX_0 (P0.2 main.c 1. if the Ref Mux setting is selected * as (Vdd/2)+/. Doc. The ADC is configured for a resolution of 8 bits.c * * Description: * This file provides source code for the ADC to LCD with DAC and UART example * project. * this is achieved by selecting the appropriate configuration when placing the UM. The DAC is updated during ever 98 CY8CKIT-001 PSoC Development Kit Guide.1) * Reference = AGND * AnalogBus = Disable * *******************************************************************************/ /****************************************************************************** * LCD_1 Settings: * LCDPort = Port_2 * BarGraph = Disable * *******************************************************************************/ /****************************************************************************** * DelSig_1 Settings: * The ADC can read full range values from 0-5V. The raw count also determines the clock divider value of the clock * driving the DAC update rate.c file. The raw count is also transmitted * serially. Replace the existing main.2. The firmware takes a voltage output from a potentiometer and * displays the ADC raw count on an LCD. * * DataFormat = Unsigned * DataClock = VC2 //VC2 = 24MHz/16/16 = 250kHz * ClockPhase = Normal * PosInput = ACB00 (PGA_1) * NegInput = ACB00 *Note this parameter is not used * NegInputGain = Disconnected * PWM Output = None * PulseWidth = N/A *Note this parameter is not used * *******************************************************************************/ /****************************************************************************** * Counter8_1 Settings: * The Counter8_1 controls the update rate of the DAC. Note To access the embedded attachments feature in the PDF document.3. /****************************************************************************** * PGA_1 Settings:(The PGA buffers the potentiometer voltage on P0. which can be found within the attachments feature of this PDF document. Open the existing main.c file within Workspace Explorer.(Vdd/2) and Vdd = 5V. click on the paper clip icon located in the lower left corner of the Adobe Reader application.c content with the content of the embedded CY8C29_main_Ex3.Sample Projects 3.

* * Clock = VC3 //VC3 = 24MHz/2 = 12MHz * ClockSync = Sync to SysClk * Enable = High * CompareOut = None * TerminalCountOut = Row_2_Output_1 * Period = 38 * CompareValue = 0*Note this parameter is not used * CompareType = Less Than or Equal * InterruptType = Terminal Count * InvertEnable = Normal * *******************************************************************************/ /****************************************************************************** * TX8_1 Settings: * The TX8 UM provides serial communication of the ADC data to another device or PC. *E 99 . This baud rate is derived * by dividing the UM's input clock by 8.7kHz. Doc. Thus the input clock to the TX8 needs to be around * 307. # 001-48651 Rev. The Counter8_1 UM provides this clock by dividing * VC3 (12MHz) by 39 to get 307. * For this project the desired baud rate is 38400.2kHz to achieve a baud rate of 38400. * * Clock = Row_2_Output_1 (From Counter8_1) * Output = Row_2_Output_0 * Tx Interrupt Mode = TXComplete * ClockSync = Sync to SysClk * Data Clock Out = None *******************************************************************************/ /****************************************************************************** * DAC6 Settings: CY8CKIT-001 PSoC Development Kit Guide. The frequency of the TerminalCount ISR is determined by the * Counter Input Clock divided by the (Period value +1). * The TX8 UM send data out at a baud rate of 38400. The Period Value of the counter * is changed by the ADC reading. Thus the frequency of the TerminalCount ISR can range * from 125kHz (Period Value=1) to 977Hz (Period Value = 255) * * Clock = VC2 // VC2 = 24MHz/16/16 = 250kHz * ClockSync = Sync to SysClk * Enable = High * CompareOut = None * TerminalCountOut = None * Period = 255 *Note this parameter is updated in the main loop * CompareValue = 0 *Note this parameter is not used * CompareType = Less Than or Equal * InterruptType = Terminal Count * InvertEnable = Normal * *******************************************************************************/ /****************************************************************************** * Counter8_2 Settings: * The Counter8_1 provides a clock to the TX8 UM to achieved a desired baud rate.Sample Projects * TerminalCount ISR. The TX8 UM derives the baud rate * by dividing its input clock by 8.

14. 1.//Enable to PGA to buffer signal from VR to ADC DAC6_1_Start(DAC6_1_HIGHPOWER). 26. *E . 58.asm. 3.h> #include "PSoCAPI.5. The frequency of the DAC output * equals the Counter8 Terminal Count frequency divided by 64 (the number of elements in the table). 23. 53. 47. 19. 0. 17. 0. //Start the character LCD M8C_EnableGInt. 1. 11. 39. 55. 59. 13. The update rate of the DAC6 * is determined by the Counter8 terminal count ISR. 7. 56. 29 BYTE bADCvalue. # 001-48651 Rev. 44. // Update DAC update rate counter LCD_1_Position(0. 2. 9. 42. 55. 60. 49.//Start the TX8 UM with no parity (baud rate = 38400) PGA_1_Start(PGA_1_HIGHPOWER). 51.//Start the ADC DelSig_1_StartAD(). 36.//Enable counter for TX8 clock rate divider TX8_1_Start(TX8_1_PARITY_NONE). 60. 16. 0. 41. 56. 44. 51. 33. // Enable Global Interrupts while(1) { /* Step 1: Get BYTE data from the ADC Setp 2: Write BYTE data from ADC to the counter in order to change the DAC update rate Step 3: Move the LCD cursor back to the beginning and dispaly new ADC data Setp 4: Write ADC data out the TX port.//Enable the counter used for DAC update rate Counter8_1_EnableInt(). 59. and updating counter period void main(void) { Counter8_1_Start(). 6. 3. 4. 39. 49.column=0) 100 CY8CKIT-001 PSoC Development Kit Guide. 12. and then send a return */ if (DelSig_1_fIsDataAvailable())//Is new data avaliable from the ADC? { bADCvalue = DelSig_1_bGetDataClearFlag(). 5. 36. Doc.h" // part specific constants and macros // PSoC API definitions for all User Modules const BYTE SINtable[]= { 31. 7.0). 33. The shape of the sine wave is determined * by a 64 element lookup table found in SINtable.//Start reading values on the ADC LCD_1_Start(). 22. * * AnalogBus = AnalogOutBus_1 * ClockPhase = Normal * DataFormat = OffsetBinary * *******************************************************************************/ #include <m8c. 46. 53. 0. 25. 31. // Get new data from ADC Counter8_1_WritePeriod(bADCvalue).//Start the DAC DelSig_1_Start(DelSig_1_HIGHPOWER). 10. }. 59.//Enable DAC update interrupt Counter8_2_Start(). 20.Sample Projects * The DAC6 outputs a sine wave on P0. 60. 58. // Move LCD (row=0. 28.//Variable for holding ADC result. 59. 2.

# 001-48651 Rev. // Send a return character } } //end of while(1) } //End of Main CY8CKIT-001 PSoC Development Kit Guide. *E 101 . // Print ADC result to LCD TX8_1_PutSHexByte(bADCvalue). Doc.Sample Projects LCD_1_PrHexByte(bADCvalue). // Write LCD result out TX8 to PC TX8_1_PutCRLF().

which can be found within the attachments feature of this PDF document. Variable Allocation .. Global Symbols .. Updated on 2009/3/31 at 12:2:49 . Note To access the embedded attachments feature in the PDF document.inc" include "Counter8_1.5.asm file in Files  lib  Library Source Files. click on the paper clip icon located in the lower left corner of the Adobe Reader application.. . FILENAME: Counter8_1INT. . All Rights Reserved..--------------------------------------------------export bTablePos// Stores last table position index export _bTablePos .------------------------ .0.----------------------------------------------.***************************************************************************** .inc" .0 .. Generated by PSoC Designer 5.) . Includes ..inc" include "memory.CON) . 2.-----------------------.asm 1. Insert your custom declarations below this banner ... # 001-48651 Rev. Replace the existing Counter8_1INT. ..asm .***************************************************************************** include "m8c. Copyright (c) Cypress MicroSystems 2000-2004.------------------------ ..423.3.-----------------------.2.-----------------------area bss(RAM) bTablePos:blk 1 _bTablePos: 102 CY8CKIT-001 PSoC Development Kit Guide.3 Counter8_1INT.asm content with the content of the embedded file.***************************************************************************** .-----------------------.--------------------------------------------------. Doc.Sample Projects 3.@PSoC_UserCode_INIT@ (Do not change this line.----------------------------------------------export _Counter8_1_ISR AREA InterruptRAM (RAM. *E .----------------------------------------------------------------------------.. Constant Definitions . Open your Counter8_1INT.REL. Version: 2.***************************************************************************** . DESCRIPTION: Counter8 Interrupt Service Routine .

@PSoC_UserCode_END@ (Do not change this line.) .--------------------------------------------------. NOTE: interrupt service routines must preserve .----------------------------------------------------------------------------. end of file Counter8_1INT.--------------------------------------------------.----------------------------------------------------------------------------.@PSoC_UserCode_END@ (Do not change this line. Insert your custom code above this banner . the values of the A and X CPU registers.Write value from SINtable (stored in A) to the DAC pop X pop A .--------------------------------------------------. DESCRIPTION: Unless modified.) AREA UserModules (ROM. Doc.--------------------------------------------------.) reti .--------------------------------------------------.--------------------------------------------------.@PSoC_UserCode_BODY@ (Do not change this line. # 001-48651 Rev. *E 103 . push A push X dec mov jnz mov [bTablePos] . REL) .Go to the next element in the table A. _Counter8_1_ISR: .Sample Projects . Insert your custom code below this banner . . this implements only a null handler stub.asm CY8CKIT-001 PSoC Development Kit Guide.Get the value in the SINtable pointed to by [bTablePos] lcall DAC6_1_WriteBlind. FUNCTION NAME: _Counter8_1_ISR .If we are at the end go back to the beginning [bTablePos]. Insert your custom declarations above this banner . . . 64 SINlookup: index _SINtable. [bTablePos] SINlookup .

Open PSoC Creator. This is the project's schematic entry file within PSoC Creator. This example project uses these components: ■ ■ ■ ■ ■ DigitaL Output Pin (Component Catalog  Ports and Pins  Digital Output Pin) PWM (Component Catalog  Digital Functions  PWM) Clock (Component Catalog  System  Clock) Logic Low (Component Catalog  Digital  Logic  Logic Low) Logic High (Component Catalog  Digital  Logic  Logic High) 3. New Project Window button and 5. # 001-48651 Rev.3 3. In the New Project window. select the Empty PSoC3 Design template for a PSoC 3 design.1 CY8C38 / CY8C55 Family Processor Module Example Projects My First PSoC 3 / PSoC 5 Project This project demonstrates basic hardware and software functionality with the PSoC 3 / PSoC 5 device. Create a new project by clicking Create New Project… in the Start Page of PSoC Creator.1 Creating My First PSoC 3 / PSoC 5 Project 1. The hardware LED uses a hardware enabled digital port and a PWM to generate a duty cycle and flash the LED. *E .c to flash the LED at a known rate.cysch.3. the design window opens TopDesign. By default. or Empty PSoC5 Design template for a PSoC 5 design and name the project Ex1_LED_with_PWM. or click the navigate to the appropriate directory. Figure 3-90.Sample Projects 3. Doc.3. type the path where you want to save the project. In Location. The software LED uses a software enabled digital port and a simple delay in the main. the other with software. one using hardware.1. 4. 2. 3. 104 CY8CKIT-001 PSoC Development Kit Guide. It flashes two LEDs independently.

Sample Projects Figure 3-91. Double click the PWM_1 component in the schematic to open the configuration window. 2.2 Placing and Configuring the PWM 1. Ex1_LED_with_PWM 3. # 001-48651 Rev. Configure the PWM in this manner: Configure Tab ❐ ❐ ❐ ❐ ❐ ❐ Name: PWM_1 Resolution: 8-Bit PWM Mode: One Output Period: 100 CMP Value 1: 50 CMP Value Type 1: Less or Equal Figure 3-92. *E 105 . PWM Component Configuration Advanced Tab ❐ ❐ Enable Mode: Hardware Only Interrupt On Terminal Count Event: Select CY8CKIT-001 PSoC Development Kit Guide. 3. Drag-and-drop the PWM component (Component Catalog  Digital  Functions  PWM) toworkspace. Doc.3.1.

LED1 Component Configuration General Tab ❐ ❐ Drive Mode: Strong Drive Leave remaining parameters as default 106 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Double click the Pin_1 component in the schematic to open the configuration window. click the Data Sheet button in the configuration window. Drag-and-drop the Digital Output Pin component (Component Catalog  Ports and Pins  Digital Output Pin).1. Doc.3. 2. Configure the digital output pin: Type Tab ❐ ❐ ❐ Name: LED1 Select Digital Output Check box Select HW Connection Check box Figure 3-94. 3. *E . PWM Component Advanced Tab Configuration For more information about what the parameters mean. 3.3 Placing and Configuring Digital Output Pin Hardware 1.Sample Projects Figure 3-93.

3. *E 107 . Doc. LED2 Component Configuration CY8CKIT-001 PSoC Development Kit Guide. Drag-and-drop the Digital Output Pin component (Component Catalog  Ports and Pins  Digital Output Pin). click the Data Sheet button in the configuration window.4 Placing and Configuring the Software Digital Output Pin 1. 3.3. Configure the digital output pin: Type Tab ❐ ❐ Name: LED2 Select Digital Output Check box (Note all other check boxes are not selected).1.Sample Projects Figure 3-95. Pins .LED1 Component Configuration For more information about what the parameters mean. # 001-48651 Rev. Double click the Pin_1 component in the schematic to open the configuration window. Figure 3-96. 2.

Sample Projects

General Tab
❐ ❐

Drive Mode: Strong Drive Leave remaining parameters as default

Figure 3-97. Pins - LED2 Component Configuration

For more information about what the parameters mean, click the Data Sheet button in the configuration window.

3.3.1.5

Connecting the Components Together
1. Using the Wire Tool LED1. , connect pwm (in the PWM component) to hardware connection point of

2. Connect a Logic High component (Component Catalog  Digital Logic  Logic High) to the enable on the PWM 3. Connect a Logic Low component (Component Catalog  Digital Logic  Logic Low) to the reset on the PWM 4. Connect a Clock component (Component Catalog  System  Clock) to the clock on the PWM. 5. Double click the Clock_1 component to configure. 6. Configure the clock: Configure Clock Tab
❐ ❐ ❐ ❐

Name: Clock_1 Source: ILO (1.000 kHz) Select Divider and set the value as 10 Leave remaining parameters as default

108

CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

Sample Projects

Figure 3-98. Clock Component Configuration

7. When complete the schematic looks similar to Figure 3-99. Figure 3-99. Connected Components

3.3.1.6

Configuring the Pins
1. From the Workspace Explorer, double click the Ex1_LED_with_PWM.cydwr file (see Figure 3-100 on page 109). 2. Click the Pins tab. 3. Select pin P1[6] for LED1. 4. Select pin P1[7] for LED2. Figure 3-100. Pin Assignments

CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

109

Sample Projects

3.3.1.7

Creating the main.c File
1. Open the existing main.c file within Workspace Explorer. 2. Replace the existing main.c content with the content of the embedded CY8C38_main_Ex1.c file, which can be found within the attachments feature of this PDF document. Notes

To access the embedded attachments feature in the PDF document, click on the paper clip icon located in the lower left corner of the Adobe Reader application. Use the PSoC 3 family processor module file CY8C38_main_Ex1.c to replace the main.c content for PSoC 5 CY8C55 family processor module.

#include <device.h> #define MS_DELAY 167u /* For delay, about 167ms */

/******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes the PWM and starts the PWM clock which will * blink LED1 at about once a second. Then the main loop is entered which * delays enough for LED2 to blink at a quicker rate than LED1. * * Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { uint8 ledState = 0x00; /* Initially set LED2 to off */ Clock_1_Enable(); /* Start the clock */ PWM_1_Start(); /* Enable PWM */ /* Following loop does software blinking of LED2 connected to P1.7 */ while (1) { CyDelay(MS_DELAY); /* Have software loop blink control */ ledState ^= 0x01u; /* Toggle LED2 setting between low and high */ LED2_Write(ledState); /* Set LED2 */ } }

/* [] END OF FILE */

3. From the Build menu, select Build Ex1_LED_with_PWM. 4. PSoC Creator builds the project and displays the comments in the Output dialog box. When you see the message "Build Succeeded" the build is complete.

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CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

Sample Projects

3.3.1.8

Configuring and Programming the PSoC Development Board
1. Disconnect the power to the board. 2. Configure the DVK SW3 to 3.3V. 3. Configure the following on the PSoC Development Board's prototyping area using the included jumper wires
❐ ❐

P1[6] to LED1 P1[7] to LED2

4. Apply power to the board. 5. Use PSoC Creator as described in Programming My First PSoC 3 Project on page 26 or Programming My First PSoC 5 Project on page 30 to program the device. 6. After programming the device, press the Reset button on the PSoC Development Board. The PWM causes the LED1 to blink at approximately 1 Hz due to PSoC Creator's PWM component and LED2 blinks at a faster rate using a software timing loop to toggle the LED. 7. Save and close the project.

CY8CKIT-001 PSoC Development Kit Guide, Doc. # 001-48651 Rev. *E

111

# 001-48651 Rev.3. and navigate to the 3. Double click the ADC_DelSig_1 component in the schematic to open the configuration window. or click appropriate directory.cysch. 5. type the path where you want to save the project. Open PSoC Creator. 2. This example project uses these components: ■ ■ ■ Delta Sigma ADC (Component Catalog  Analog  ADC  Delta Sigma ADC) Character LCD (Component Catalog  Display  Character LCD) Analog Pin (Component Catalog  Ports and Pins  Analog Pin) 3. The ADC is clocked by the internal clock of 3 MHz and the sampling rate is set to 10.2.2 Placing and Configuring Delta Sigma ADC 1. click the Data Sheet button in the configuration window. select the Empty PSoC3 Design template for a PSoC 3 design.1 Creating ADC to LCD Project 1. By default. or Empty PSoC5 Design template for a PSoC 5 design and Name the project Ex2_ADC_to_LCD. *E . Doc. The instructions that follow assume that you have completed My First PSoC 3 / PSoC 5 Project and therefore have a basic understanding of the PSoC Creator software environment. In Location. In the New Project window.2. 3.3. Create a new project by clicking Create New Project… in the Start Page of PSoC Creator. The program reads the ADC result and prints it to the LCD.Sample Projects 3. Configure the Delta Sigma ADC in this manner: Configure Tab ❐ ❐ ❐ ❐ ❐ ❐ ❐ ❐ ❐ Name: ADC_DelSig_1 Conversion Mode: Continuous Resolution: 8 Conversion Rate: 10000 Input Range: Vssa to Vdda (Single Ended) Input Buffer Gain: 1 Reference: Internal Vref Clock Source: Internal Start of Conversion: Software For more information about what the parameters mean. the design window opens TopDesign.000 sps.3. 4. Drag and drop the Delta Sigma ADC component (Component Catalog  Analog  ADC  Delta Sigma ADC) 2. 112 CY8CKIT-001 PSoC Development Kit Guide. Connect the voltage potentiometer (labeled "VR" on the PSoC Development Board) to the ADC input (programmed to P0[7] for this example). 3. This is the project's schematic entry file within PSoC Creator.2 ADC to LCD Project This project demonstrates the Delta Sigma ADC by measuring the voltage of the potentiometer on the board and displays the result on the Character LCD of the PSoC Development Board.

Doc. Configure the analog pin in this manner: Type Tab ❐ ❐ Name: POT Select Analog check box only For more information about what the parameters mean.2. Double click on the Pin_1 component in the schematic to open the configuration window.3 Placing and Configuring an Analog Pin 1.Sample Projects Figure 3-101. *E 113 . 3. ADC Component Configuration 3. click the Data Sheet button in the configuration window. 2. Drag-and-drop the analog pin component (Component Catalog Ports and Pins  Analog Pin). CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev.3.

2. Drag-and-drop the Character LCD component (Component Catalog  Display  Character LCD) 2. *E . Configure the Character LCD: ❐ ❐ Name: LCD_Char_1 LCD Custom Character Set: None 114 CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-102. Analog Pin Component Configuration General Tab ❐ ❐ Drive Mode: High Impedance Analog Leave remaining parameters as default Figure 3-103. Doc.4 Placing and Configuring Character LCD 1. 3. Double click the LCD_Char_1 component in the schematic to open the configuration window.3. Select High Impedance Analog Drive Mode 3. # 001-48651 Rev.

3.5 Connecting the Components Together 1. Select pins P2[6:0] for LCD_Char_1.2. the schematic looks like Figure 3-105. CY8CKIT-001 PSoC Development Kit Guide.cydwr file. connect POT to ADC_DelSig (ADC_DelSig_1). Doc. 2. double click the Ex2_ADC_to_LCD.6 Configuring the Pins 1. Figure 3-104. click the Data Sheet button in the configuration window. Select pin P0[7] for POT. 2. # 001-48651 Rev. *E 115 . From the Workspace Explorer. Figure 3-105.2.3. Using the Wire Tool . When complete. Configure LCD_Char_1 3. Click the Pins tab. 3. Connected Components 3. 4.Sample Projects ❐ Include ASCII to Number Conversion Routines: Check box For more information about what the parameters mean.

7 Creating the main. # 001-48651 Rev. Pins Assignments 3. Use the PSoC 3 family processor module file CY8C38_main_Ex2.Sample Projects Figure 3-106.c content for PSoC 5 CY8C55 family processor module.c file within Workspace Explorer.c file. which can be found within the attachments feature of this PDF document.h> /* LCD specific */ #define ROW_0 0 /* LCD row 0 #define COLUMN_0 0 /* LCD column 0 #define COLUMN_9 9 /* LCD column 9 #define COLUMN_10 10 /* LCD column 10 #define COLUMN_11 11 /* LCD column 11 /* For clearing Tens and Hundreds place #define CLEAR_TENS_HUNDREDS " " /* For clearing Hundreds place */ #define CLEAR_HUNDREDS " " */ */ */ */ */ */ void UpdateDisplay(uint16 voltageRawCount).c File 1. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes both the ADC and LCD. Replace the existing main. 2. * * Parameters: * void * * Return: 116 CY8CKIT-001 PSoC Development Kit Guide. then it displays the raw counts to the LCD.2.c content with the content of the embedded CY8C38_main_Ex2. *E .3. Doc. Notes ■ To access the embedded attachments feature in the PDF document. Open the existing main. click on the paper clip icon located in the lower left corner of the Adobe Reader application.c to replace the main. starts and waits for an * ADC conversion. ■ #include <device.

*E 117 . /* Print the result */ CY8CKIT-001 PSoC Development Kit Guide. LCD_Char_1_PrintNumber(voltageRawCount). /* Force ADC to initiate a conversion */ while(1) { /* Wait for end of conversion */ ADC_DelSig_1_IsEndConversion(ADC_DelSig_1_WAIT_FOR_RESULT). ADC_DelSig_1_Start(). /* Initialize and clear the LCD */ LCD_Char_1_Position(ROW_0. voltageRawCount = ADC_DelSig_1_GetResult16(). /* Move the cursor to Row 0 Column 0 */ /* Print Label for the pot voltage raw count */ LCD_Char_1_PrintString("V Count: ").COLUMN_0). Column 9 */ LCD_Char_1_Position(ROW_0.COLUMN_9).Sample Projects * void * *******************************************************************************/ void main() { uint16 voltageRawCount. /* Get converted result */ /* Set range limit */ if (voltageRawCount > 0x7FFF) { voltageRawCount = 0. /* Print result on LCD */ } } /******************************************************************************* * Function Name: UpdateDisplay ******************************************************************************** * * Summary: * Print voltage raw count result to the LCD. * * Parameters: * voltageRawCount: The voltage raw counts being received from the ADC * * Return: * void * *******************************************************************************/ void UpdateDisplay (uint16 voltageRawCount) { /* Move the cursor to Row 0. ADC_DelSig_1_StartConvert(). } else { /* Continue on */ } UpdateDisplay(voltageRawCount). Doc. Clears some characters if * necessary. # 001-48651 Rev. /* Configure and power up ADC */ LCD_Char_1_Start().

8. Column 10 */ LCD_Char_1_Position(ROW_0. 3. Doc. ❐ P0[7] to VR 4. ADC values may fluctuate several counts due to system noise. /* Clear last characters */ } else { /* Continue on */ } } /* [] END OF FILE */ 3. From the Build menu. # 001-48651 Rev. Use PSoC Creator as described in Programming My First PSoC 3 Project on page 26 or Programming My First PSoC 5 Project on page 30 to program the device.8 Configuring and Programming the PSoC Development Board 1. When you see the message "Build Succeeded" the build is complete.COLUMN_11). PSoC Creator builds the project and displays the comments in the Output dialog box. Column 11 */ LCD_Char_1_Position(ROW_0. LCD_Char_1_PrintString(CLEAR_HUNDREDS). Move VDD SELECT Switch to 3. *E . 5. LCD_Char_1_PrintString(CLEAR_TENS_HUNDREDS).COLUMN_10). Save and close the project. Note The ADC output values may not reach full range due to potentiometer and ADC limitations.3V 3. 7. Verify that VR_PWR (J11) is jumpered to ON. 6. and if the potentiometer voltage is at the edge of an ADC count. press the Reset button on the PSoC Development Board to see the output of the ADC displayed on the LCD. Configure the DVK SW3 to 3. /* Clear last characters */ } else if (voltageRawCount < 100) { /* Move the cursor to Row 0. After programming the device. configure the PSoC Development Board's prototyping.3. Turning the potentiometer results in the LCD value changing.3V.Sample Projects if (voltageRawCount < 10) { /* Move the cursor to Row 0. 2. 118 CY8CKIT-001 PSoC Development Kit Guide. Disconnect power to the board. Using the jumper wires included.2. Apply power to the board. select Build Ex2_ADC_to_LCD.

3. Drag-and-drop the Delta Sigma ADC component (Component Catalog  Analog  ADC  Delta Sigma ADC) 2.3. Create a new project by clicking Create New Project… in the Start Page of PSoC Creator. *E 119 .3. Configure the Delta Sigma ADC in this manner: Configure Tab ❐ ❐ ❐ ❐ ❐ Name: ADC_DelSig_1 Conversion Mode: Continuous Resolution: 8 Conversion Rate: 10000 Input Range: Vssa to Vdda (Single Ended) CY8CKIT-001 PSoC Development Kit Guide. 5. 3. and navigate to the 3.cysch.3. Open PSoC Creator.1 Creating ADC to UART with DAC Project 1. 4. select the Empty PSoC3 Design template for a PSoC 3 design. or Empty PSoC5 Design template for a PSoC 5 design and Name the project Ex3_ADC_to_UART_with_DAC. Doc. In the New Project window.Sample Projects 3. An 8-bit DAC outputs a table generated sine wave to an LED using DMA at a frequency proportional to the ADC count. type the path where you want to save the project. the design window opens TopDesign.2 Placing and Configuring Delta Sigma ADC 1. This example project uses the following components: ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Delta Sigma ADC (Component Catalog  Analog  ADC  Delta Sigma ADC) Voltage DAC (Component Catalog  Analog  DAC  Voltage DAC) Opamp (Component Catalog  Analog  Amplifiers  Opamp) DMA (Component Catalog  System  DMA) Character LCD (Component Catalog  Display  Character LCD) UART (Component Catalog  Communications  UART) Analog Pin (Component Catalog  Ports and Pins  Analog Pin) Digital Output Pin (Component Catalog  Ports and Pins  Digital Output Pin) Clock (Component Catalog  System Clock) Logic Low (Component Catalog Digital  Logic Logic Low) 3. # 001-48651 Rev.3. or click appropriate directory. The sine wave period is based on the current value of the ADC value of the potentiometer.3 ADC to UART with DAC This project demonstrates sine wave generation by using an 8-bit DAC and DMA. By default. Double click the ADC_DelSig_1 component in the schematic to open the configuration window. A 9600 BAUD 8N1 UART outputs the current ADC count as ASCII formatted into a hexadecimal number. The firmware reads the voltage output by the DVK board potentiometer and displays the raw counts on the DVK board character LCD display similarly to that shown in the previous project. 2. In Location. This is the project's schematic entry file within PSoC Creator. The instructions below assume that you have completed My First PSoC Project and ADC to LCD Project and therefore have a basic understanding of the PSoC Creator software environment.3.

Doc. click the Data Sheet button in the configuration window. Drag-and-drop the Analog Pin component (Component Catalog  Ports and Pins  Analog Pin) 2.3 Placing and Configuring an Analog Pin 1.Sample Projects ❐ ❐ ❐ ❐ Input Buffer Gain: 1 Reference: Internal Vref Clock Source: Internal Start of Conversion: Software For more information about what the parameters mean. Figure 3-107. 3. Delta Sigma ADC Component Configuration 3. Double click the Pin_1 component in the schematic to open the configuration window. # 001-48651 Rev. Configure the analog pin: Type Tab ❐ ❐ Name: POT Select Analog check box only 120 CY8CKIT-001 PSoC Development Kit Guide.3.3. *E .

Double click the LCD_Char_1 component in the schematic to open the configuration window. Drag-and-drop the Character LCD component (Component Catalog  Display  Character LCD) 2.3. click the Data Sheet button in the configuration window. Configure the Character LCD: ❐ ❐ ❐ Name: LCD_Char_1 LCD Custom Character Set: None Include ASCII to Number Conversion Routines: Check box For more information about what the parameters mean.Sample Projects Figure 3-108. POT Component Configuration General Tab ❐ ❐ Drive Mode: High Impedance Analog Leave remaining parameters as default For more information about what the parameters mean. *E 121 . click the Data Sheet button in the configuration window. # 001-48651 Rev. 3. 3.3.4 Placing and Configuring Character LCD 1. CY8CKIT-001 PSoC Development Kit Guide. Doc.

click the Data Sheet button in the configuration window.4. 3. *E . # 001-48651 Rev.3. Character LCD Component Configuration 3. 122 CY8CKIT-001 PSoC Development Kit Guide. Drag-and-drop the Voltage DAC component (Component Catalog  Analog  DAC  Voltage DAC) 2. Configure the VDAC: Basic Tab ❐ ❐ ❐ ❐ ❐ ❐ Name: VDAC8_1 Data_Source: CPU or DMA (Data Bus) Initial_Value: 100 Strobe_Mode: Register Write VDAC_Range: 0 .3. Double click the VDAC8_1 component in the schematic to open the configuration window.080V (16mV/bit) VDAC_Speed: Low Speed For more information about what the parameters mean.5 Placing and Configuring Voltage DAC 1. Doc.Sample Projects Figure 3-109.

3.Sample Projects Figure 3-110. Drag-and-drop the Opamp component (Component Catalog  Analog  Amplifiers  Opamp) 2. Voltage DAC Component Configuration 3. 3. Double click the Opamp_1 component in the schematic to open the configuration window.6 Placing and Configuring Opamp 1. # 001-48651 Rev. CY8CKIT-001 PSoC Development Kit Guide. *E 123 . Doc. click the Data Sheet button in the configuration window.3. Configure the Opamp: Basic Tab ❐ ❐ ❐ Name: Opamp_1 Mode: Follower Power: High Power For more information about what the parameters mean.

3. Opamp Component Configuration 3. Doc.Sample Projects Figure 3-111.3. Double click the Pin_1 component in the schematic to open the configuration window. # 001-48651 Rev.7 Placing and Configuring Analog Pin 1. Drag-and-drop the analog pin component (Component Catalog  Ports and Pins  Analog Pin) 2. Configure the analog pin: Type Tab ❐ ❐ Name: LED Select Analog check box only Figure 3-112.3. LED Component Configuration General Tab ❐ ❐ Drive Mode: High Impedance Analog Leave remaining parameters as default 124 CY8CKIT-001 PSoC Development Kit Guide. *E .

click the Data Sheet button in the configuration window. *E 125 . Double click the UART_1 component in the schematic to open the configuration window. Doc.3. Drag-and-drop the UART component (Component Catalog  Communications  UART) 2. 3.3. Figure 3-113.Sample Projects For more information about what the parameters mean.8 Placing and Configuring UART 1. CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. click the Data Sheet button in the configuration window. Configure the UART: Configure Tab ❐ ❐ ❐ ❐ Name: UART_1 Mode: TxOnly Bits per second: 9600 Leave the remaining parameters to default For more information about what the parameters mean. LED Component Configuration 3.

TX_OUT Component Configuration General Tab ❐ ❐ Under Drive Mode: Strong Drive Leave remaining parameters as default 126 CY8CKIT-001 PSoC Development Kit Guide.3. 3. Drag-and-drop the Digital Output Pin component (Component Catalog  Ports and Pins  Digital Output Pin) 2. Double click the Pin_1 component in the schematic to open the configuration window. UART Component Configuration 3.3.9 Placing and Configuring Digital Output Pin 1. *E . Configure the digital output pin: Type Tab ❐ ❐ ❐ Name: TX_OUT Select Digital Output Check box Select HW Connection Check box Figure 3-115.Sample Projects Figure 3-114. # 001-48651 Rev. Doc.

click the Data Sheet button in the configuration window.3. Double click the DMA_1 component in the schematic to open the configuration window. click the Data Sheet button in the configuration window.TX_OUT Component Configuration For more information about what the parameters mean. Configure the DMA: Basic Tab ❐ ❐ ❐ Name: DMA_1 Hardware Request: Rising Edge Leave the remaining parameters to default For more information about what the parameters mean.Sample Projects Figure 3-116. Pins . 3. 3. # 001-48651 Rev. Doc. CY8CKIT-001 PSoC Development Kit Guide.10 Placing and Configuring DMA 1. *E 127 .3. Drag-and-drop the DMA component (Component Catalog  System  DMA) 2.

000 MHz) Desired Frequency: 3 MHz Leave remaining parameters set to their default values Figure 3-118. 3. Double click the Clock component to configure. Connect a Clock component (Component Catalog  System  Clock) to the drq of the DMA.3. DMA Component Configuration 3.3.11 Connecting the Components Together 1. Connect a Logic Low component (Component Catalog  Digital Logic  Logic Low) to the reset of the UART 2. Doc.Sample Projects Figure 3-117. Configure the clock: Configure Clock Tab ❐ ❐ ❐ ❐ Name: Clock_1 Source: IMO (3. Clock Component Configuration 128 CY8CKIT-001 PSoC Development Kit Guide. 4. # 001-48651 Rev. *E .

Notes ■ To access the embedded attachments feature in the PDF document. Using the Wire Tool . 2.3. This allows the LED pin to line up with the Opamp output. From the Workspace Explorer. When complete the schematic looks like Figure 3-119. CY8CKIT-001 PSoC Development Kit Guide. Using the Wire Tool 7.Sample Projects 5. 6. Click the Pins tab. click on the paper clip icon located in the lower left corner of the Adobe Reader application. connect POT to ADC_DelSig (ADC_DelSig_1). Pin Assignments 3. Select pin P1[2] for TX_OUT Figure 3-120. *E 129 .3. Open the existing main. which can be found within the attachments feature of this PDF document. select the Shape menu option and then Flip Horizontal. connect VDAC8 (VDAC8_1) to Opamp (Opamp_1). Figure 3-119. 2. Doc.12 Configuring the Pins 1. . Select pin P0[7] for POT 5. double click the Ex3_ADC_to_UART_with_DAC.cydwr file. 8. Using the Wire Tool . # 001-48651 Rev. Right click the LED analog pin. Connected Components 3.c content with the content of the embedded CY8C38_main_Ex3. Select pin P1[6] for LED 6. 9. connect tx (in the UART component) to HW connection of the TX_OUT digital output pin (TX_OUT).3.c file. 3.3. Select pins P2[6:0] for LCD_Char_1 4.c File 1. Replace the existing main.c file within Workspace Explorer.13 Creating the main.

0x4B.c content for PSoC 5 CY8C55 family processor module. 0x55. 0x3D. 0x4B. # 001-48651 Rev. * It also initializes DMA by allocating/configuring a DMA channel and * Transaction Descriptor and also copies the voltage table address to the DAC * address. * and sets the DMA clock divider proportional to the raw count. 0x9C. These values range * between 0x3D and 0x9F because these are the two points where the LED * is not visible and where the LED is saturated */ const uint8 voltageWave[] = { 0x6D. 0x61. transmits the raw count serially. 0x51. 0x9C. 0x97. 0x63. 0x59. 0x5F. 0x41. 0x53. 0x6D. Analog Buffer. 0x8B. 0x87. 0x81. 0x3F. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes the ADC. 0x9E. 0x47. 0x3D. VDAC. 0x75. 0x3D. 0x3D. 0x83. #include <device. 0x77. *E . 0x7F. 0x97. 0x3F. 0x9D. Doc. 0x5B. 0x51.Sample Projects ■ Use the PSoC 3 family processor module file CY8C38_main_Ex3. LCD. 0x4F. 0x40. 0x69. 0x81. 0x5D. 0x7B. 0x85. 0x57. 0x8D. 0x61. 0x65. 0x8F. 0x9E. 0x73. 0x9B. 0x8D.h> /* LCD specific */ #define ROW_0 0 /* LCD row 0 #define COLUMN_0 0 /* LCD column 0 #define COLUMN_9 9 /* LCD column 9 #define COLUMN_10 10 /* LCD column 10 #define COLUMN_11 11 /* LCD column 11 /* For clearing Tens and Hundreds place #define CLEAR_TENS_HUNDREDS " " /* For clearing Hundreds place */ #define CLEAR_HUNDREDS " " */ */ */ */ */ */ /* DMA specific */ #define REQUEST_PER_BURST 1 /* One request per burst */ #define BURST_BYTE_COUNT 1 /* Bursts are one byte each */ /* Upper 16-bits of the source address are zero */ #define SOURCE_ADDRESS 0 /* Upper 16-bits of the destination address are zero */ #define DESTINATION_ADDRESS 0 void UpdateDisplay(uint16 * voltageRawCount). 0x83. 0x45. /* Table of voltage values for DMA to send to the DAC. 0x3D. 0x99. and UART. 0x87. 0x6B }. 0x5F. 0x47. 0x85. 0x89. 0x6B. 0x9E. 0x67. 0x71. 0x7B. 0x93. 0x67. 0x95. void TxHex (uint16 voltageRawCount). 0x4F. 0x41. 0x40. 0x7D. 0x9E. 0x3F. 0x77. 0x95. 0x99. 0x6F. 0x89. 0x43. 0x4D. In the main loop. 0x7D. 0x9F. then * it displays the ADC raw count to the LCD. 0x7F. 0x53. 0x49. 0x9F. 0x9C. * * Parameters: 130 CY8CKIT-001 PSoC Development Kit Guide. 0x57. 0x3D. 0x45. 0x6F. 0x43. 0x79. 0x8B. 0x91. 0x4D. 0x9E.c to replace the main. 0x79. 0x5B. 0x65. 0x69. 0x49. 0x8F. 0x5D. 0x55. 0x59. 0x9D. 0x71. 0x9F. 0x91. 0x73. it starts and waits for an ADC conversion. 0x63. 0x93. 0x75. 0x9B.

Set the lower 16-bits of * the source and destination addresses for this TD * PSoC 3 */ #if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_LEOPARD) CyDmaTdSetAddress(myTd. UART_1_Start(). /* Move the LCD cursor to Row 0. (uint16)(voltageWave). CyDmacConfigure(). #endif /* PSoC 5 */ CY8CKIT-001 PSoC Development Kit Guide. Column 0 */ LCD_Char_1_Position(ROW_0. CyDmaTdSetConfiguration(myTd. REQUEST_PER_BURST. (uint16)VDAC8_1_viDAC8__D). COLUMN_0). uint8 myChannel. DESTINATION_ADDRESS). LCD_Char_1_Start(). sizeof(voltageWave). Doc. #endif /* Allocate a Transaction Descriptor (TD) from the free list */ myTd = CyDmaTdAllocate(). SOURCE_ADDRESS. # 001-48651 Rev. /* /* /* /* /* /* Configure and power up ADC */ Initialize and clear the LCD */ Initializes VDAC8 with default values */ Enables Opamp and sets power level */ Enable UART */ Set DMA configuration register */ /* Allocate and initialize a DMA channel to be used by the caller * PSoC 3 */ #if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_LEOPARD) myChannel = DMA_1_DmaInitialize(BURST_BYTE_COUNT. uint8 myTd. /* Configure the TD */ /* Copy address of voltageWave to address of DAC. (uint16)(VDAC8_1_viDAC8__D >> 16)). (uint16)((uint32)voltageWave >> 16). ADC_DelSig_1_Start(). #endif /* PSoC 5 */ #if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_PANTHER) myChannel = DMA_1_DmaInitialize(BURST_BYTE_COUNT. REQUEST_PER_BURST. Opamp_1_Start(). /* Print Label for the pot voltage raw count */ LCD_Char_1_PrintString("V Count: "). TD_INC_SRC_ADR ).Sample Projects * void * * Return: * void * *******************************************************************************/ void main() { uint16 voltageRawCount. VDAC8_1_Start(). *E 131 . myTd.

the lowest divider (for raw count of 0) should be * 1000 to blink at a significantly fast pace. /* Transmit result to UART */ /* * The LED blinking frequency is dependent on the Voltage raw count. (uint16)((uint32)voltageWave). 1). #endif /* Associate TD with channel */ CyDmaChSetInitialTd(myChannel. The following equation is necessary to make the adjusted * clock frequency (with the updated divider) linear with the ADC * output.Sample Projects #if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_PANTHER) CyDmaTdSetAddress(myTd. */ Clock_1_Stop(). voltageRawCount = ADC_DelSig_1_GetResult16().(uint32)voltageRawCount)) + 1000). } } /******************************************************************************* * Function Name: UpdateDisplay ******************************************************************************** * \ 132 CY8CKIT-001 PSoC Development Kit Guide. Clock_1_SetDivider((((uint32)voltageRawCount * 1000) / (261 . /* Get converted result */ /* Set range limit */ if (voltageRawCount > 0x7FFF) { voltageRawCount = 0. Clock_1_Start(). /* Enable DMA channel */ CyDmaChEnable(myChannel. (uint16)VDAC8_1_viDAC8__D). * With a 3MHz clock. ADC_DelSig_1_StartConvert(). *E . /* Force ADC to initiate a conversion */ while(1) { /* Wait for end of conversion */ ADC_DelSig_1_IsEndConversion(ADC_DelSig_1_WAIT_FOR_RESULT). The highest value is * about 52. } else { /* Continue on */ } UpdateDisplay(&voltageRawCount). myTd). # 001-48651 Rev. /* Print the result to LCD */ TxHex(voltageRawCount). /* Clock will make burst requests to the DMAC */ Clock_1_Start(). Doc.200 (for a raw count of 256) to blink at a significantly * slow pace.

*E 133 . /* TX converted second nibble */ UART_1_PutChar(hex[(voltageRawCount>>8)&0xF]). CY8CKIT-001 PSoC Development Kit Guide. /* Clear last characters */ } else { /* Continue on */ } } /******************************************************************************* * Function Name: TxHex ******************************************************************************** * * Summary: * Convert voltage raw count to hex value and TX via UART. /* Print the result */ if (voltageRawCount[0] < 10) { /* Move the cursor to Row 0. COLUMN_9). * * Parameters: * voltageRawCount: Voltage raw count from ADC * * Return: * void * *******************************************************************************/ void UpdateDisplay (uint16 * voltageRawCount) { /* Move the cursor to Row 0. Clears some characters if * necessary. Doc. * * Parameters: * voltageRawCount: The voltage raw counts being received from the ADC * * Return: * void * *******************************************************************************/ void TxHex (uint16 voltageRawCount) { static char8 const hex[16] = "0123456789ABCDEF". Column 9 */ LCD_Char_1_Position(ROW_0. LCD_Char_1_PrintNumber(voltageRawCount[0]).COLUMN_10). # 001-48651 Rev. Column 11 */ LCD_Char_1_Position(ROW_0. /* Clear last characters */ } else if (voltageRawCount[0] < 100) { /* Move the cursor to Row 0. The voltageRawCount parameter is also updated for use in other * functions. LCD_Char_1_PrintString(CLEAR_TENS_HUNDREDS).COLUMN_11).Sample Projects * Summary: * Print voltage raw count result to the LCD. /* TX converted MSnibble */ UART_1_PutChar(hex[(voltageRawCount>>12)&0xF]). LCD_Char_1_PrintString(CLEAR_HUNDREDS). Column 10 */ LCD_Char_1_Position(ROW_0.

When you see the message "Build Succeeded" the build is complete.3. Doc. # 001-48651 Rev. From the Build menu. 7. /* h for hexadecimal and carriage return */ } /* [] END OF FILE */ 3. Configure the DVK SW3 to 5 V. Apply power to the board. configure the PSoC Development Board's prototyping area to: ❐ ❐ ❐ P0[7] to VR P1[2] to TX P1[6] to LED1 4.Sample Projects /* TX converted third nibble */ UART_1_PutChar(hex[(voltageRawCount>>4)&0xF]). UART_1_PutString("h\r"). Install a terminal application such as TeraTerm or HyperTerminal with these setup parameters: ❐ ❐ ❐ ❐ ❐ Baud Rate: 9600 Data: 8-bit Parity: none Stop: 1-bit Flow Control: none 134 CY8CKIT-001 PSoC Development Kit Guide. 8. 3. 2. PSoC Creator builds the project and displays the comments in the Output dialog box. *E . 5. select Build Ex3_ADC_to_UART_with_DAC. 3. Verify that RS232_PWR (J10) is jumpered to ON. Verify that VR_PWR (J11) is jumpered to ON.14 Configuring and Programming the PSoC Development Board 1. Disconnect power to the board. Using the jumper wires included. Connect a serial cable from the PSoC Development Board to a PC.3. /* TX converted LSnibble */ UART_1_PutChar(hex[voltageRawCount&0xF]). 6.

After programming the device.Sample Projects Figure 3-121. and if the potentiometer voltage is at the edge of an ADC count. *E 135 . Doc. Turning the potentiometer results in the LCD and observed terminal value change. # 001-48651 Rev. press the Reset button on the PSoC Development Board to see the output of the ADC displayed on the LCD and in the terminal application. Save and close the project. 10. Note ADC values may fluctuate several counts due to system noise. HyperTerminal Settings 9. 11. LED1 is a sine wave output whose period is based on the ADC. CY8CKIT-001 PSoC Development Kit Guide. Use PSoC Creator as described in Programming My First PSoC 3 Project on page 26 or Programming My First PSoC 5 Project on page 30 to program the device.

select the Empty PSoC3 Design template for a PSoC 3 design. Drag-and-drop a USBFS component from the Components Catalog  Communication  USBFS to the workspace. # 001-48651 Rev. 2. *E .2 Placing and Configuring USBFS 1. 3. LED1 also toggles. 5.3. USBFS Component Configuration 4.4. after allowing the HID device to enumerate. and navigate to the 3. In Location. the design window opens TopDesign. By default.3. and initializing USB for 3V operation. Double click the USBFS_1 component. type the path where you want to save the project.4 USB HID This project demonstrates a simple HID keyboard. 3.cysch. Open PSoC Creator. Click to import a report. 136 CY8CKIT-001 PSoC Development Kit Guide. Figure 3-122. Create a new project by clicking on Create New Project… in the Start Page of PSoC Creator. The firmware begins enabling global interrupts. Select the HID Descriptor tab. or click appropriate directory. continuously checks for a button press to see if it needs to send the keyboard key sequences for the Cypress website. Doc. In the New Project window. setting up the button (SW). 4. When you press the button.3.4. 3. The firmware. This is the project's schematic entry file within PSoC Creator.Sample Projects 3. 2. or Empty PSoC5 Design template for a PSoC 5 design and Name the project Ex4_USB_HID.1 Creating USB HID Project 1.

CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-123. *E 137 . Doc. HID Descriptor Configuration 5. USB Template Figure 3-124. Select the String Descriptor tab. # 001-48651 Rev.

Sample Projects

Figure 3-125. String Descriptor Configuration

6. Select String Descriptors in the left window. 7. Click Add String. 8. Click Add String a second time to add a total of two strings. 9. Click the String that shows up at the top in the left window. 10.Type Cypress Semiconductor in the Value field. 11. Click the String that shows up at the bottom in the left window. 12.Type PSoC Development Kit in the Value field. 13.Ensure Include Serial Number String and Include MS OS String Descriptor check boxes are unchecked. 14.Select the Device Descriptor tab. 15.Select Device Descriptor 16.Set the Product ID to F11E. 17.Set the Manufacturing String to Cypress Semiconductor. 18.Set the Product String to PSoC Development Kit.

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Figure 3-126. Alternating Setting Configuration

19.Select Configuration Descriptor. 20.Set Device Power to Self Powered. 21.Set Max Power to 100 mA. Figure 3-127. Configuration Descriptor Configuration

22.Select Alternate Setting 0. 23.Set Class to HID.

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Figure 3-128. Interface Descriptor Configuration

24.Select HID Class Descriptor. 25.Set HID Report to Keyboard w/LED Feature Report. 26.Select Endpoint Descriptor. 27.Set Direction to IN and Transfer Type to INT.

3.3.4.3

Placing and Configuring Software Digital Input Pin
1. Drag-and-drop a Digital Input Pin component (Component Catalog  Ports and Pins  Digital Input Pin) 2. Configure in this manner. Type Tab
❐ ❐

Name: Button Select Digital Input check box (Note all other check boxes are not selected)

Figure 3-129. SW Digital Input Pin Configuration

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General Tab
❐ ❐ ❐

Drive Mode: Resistive Pull up Initial State: Low (0) Leave remaining parameters as default

Figure 3-130. Pins - SW Digital Input Pin Configuration

3. Click OK.

3.3.4.4

Placing and Configuring LED
1. Drag-and-drop a Digital Output Pin component (Component Catalog  Ports and Pins  Digital Output Pin) 2. Configure in this manner: Type Tab
❐ ❐

Name: LED Select Digital Output check box (Note all other check boxes are not selected)

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Figure 3-131. LED Component Configuration

General Tab
❐ ❐

Drive Mode: Strong Drive Leave remaining parameters as default

Figure 3-132. Pins - LED Component Configuration

3. From the Workspace Explorer, open the Ex4_USB_HID.cydwr window and select the Clocks tab. 4. Click on IMO from the listed rows and set

Osc: 24.000 MHz

5. Click the PLL Clock block and select IMO (48.000 MHz) for the Input. 6. Set Desired: to 48 MHz for the PLL clock 7. Enable the USB clock. 8. Set the ILO clock to 100 kHz

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Sample Projects Figure 3-133.4.3. From the Workspace Explorer.cywrk file. Click the Pins tab. 2. Select and assign the pins in this manner ❐ ❐ ❐ ❐ Assign USBFS_dp to P15[6] Assign USBFS_dm to P15[7] Assign LED to P1[6] Assign Button to P1[5] Figure 3-134. double click the Ex4_USB_HID. Configure the System Clocks 9. 3.5 Configuring the Pins 1. *E 143 . 3. # 001-48651 Rev. Doc. Click OK. Pin Assignments CY8CKIT-001 PSoC Development Kit Guide.

c content with the content of the embedded CY8C38_main_Ex4. Notes ■ To access the embedded attachments feature in the PDF document.c to replace the main. click on the paper clip icon located in the lower left corner of the Adobe Reader application.c content for PSoC 5 CY8C55 family processor module. which can be found within the attachments feature of this PDF document.c File 1. and loads the keyboard enpoint to allow an ack to be * sent before sending the first keyboard data. Doc. * * Parameters: * void * * Return: * void 144 CY8CKIT-001 PSoC Development Kit Guide. Then it continuously checks for * USB plug-and-play and a button press to see if the keyboard data needs sent. ■ #include "device.4.c file. 2. /* Open Windows Run App */ GetAckLoadEp(uint8 * keyboardData). Then allows the HID * device to enumerate. *E .c file within Workspace Explorer. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function starts out enabling global interrupts. Replace the existing main. Use the PSoC 3 family processor module file CY8C38_main_Ex4. Open the existing main.Sample Projects 3.h" /* Keyboard scan codes */ #define WINDOWS_LEFT_MODIFIER #define LETTER_R #define CARRIAGE_RETURN #define KEY_RELEASE /* For button setup */ #define SET_BUTTON 0x80u /* This is the left windows key */ 0x15u 0x28u 0x00u 0x01u /* USB related */ #define KEYBOARD_ENDPOINT #define KEYBOARD_DEVICE #define KEYBOARD_DATA_SIZE #define KEY_DATA_INDEX #define MODIFIER_KEY_DATA_INDEX 0x01u 0x00u 0x08u 0x02u 0x00u /* MACRO for button detection */ #define IS_BUTTON_PRESSED (!Button_Read()) #define BUTTON_PRESSED #define BUTTON_RELEASED static static static static uint8 void void void 1 0 ButtonEventDetected(void). then initializing USB for 5V operation. SendKey(uint8 key). setting up the * button (SW1). # 001-48651 Rev.6 Creating the main. StartWindowsRun(void).3.

/* Set/clear (toggle) the LED port pin */ LED_Write(ledState). /* Wait for Device to enumerate */ /* Enumeration is completed load keyboard endpoint to set up ACK for first key */ USBFS_1_LoadInEP(KEYBOARD_ENDPOINT. 0 }. KEYBOARD_DATA_SIZE). 0. 0. 0x16. * * Parameters: CY8CKIT-001 PSoC Development Kit Guide. /* Data array for the keyboard device endpoint */ uint8 keyboardData[] = { 0. 0x06. /* Set initial LED state to off */ uint8 i.cypress. /* Enable global interrupts */ Button_Write(SET_BUTTON). 0x1C. 0. *E 145 . 0x12. Doc.com<cr>") */ uint8 cypressWebsiteCharSequence[] = { 0x1A. /* Toggle LED */ StartWindowsRun(). keyboardData. 0x06. 0. 0x28 }. } } else { /* Continue on */ } } } /******************************************************************************* * Function Name: ButtonEventDetected ******************************************************************************** * * Summary: * Check to see if the button is pressed. 0x08. 0x16. /* Open Windows Run App */ /* Send the cypress website key sequence */ for (i = 0. i < sizeof(cypressWebsiteCharSequence). while(!USBFS_1_bGetConfiguration()). # 001-48651 Rev. CYGlobalIntEnable. 0. 0x13.Sample Projects * *******************************************************************************/ void main() { uint8 ledState = 0. while (1) { if (ButtonEventDetected()) { ledState ^= 0x01u. i++) { SendKey(cypressWebsiteCharSequence[i]). 0x37. /* Keyboard scan codes for the cypress website ("www. 0x15. /* Set port pin for button (SW1) */ /* Start USBFS operation using keyboard device (0) and with 5V operation */ USBFS_1_Start(KEYBOARD_DEVICE. 0x37. 0x1A. 0x10. 0x1A. 0. USBFS_1_5V_OPERATION).

/* Send USB keyboard data */ 146 CY8CKIT-001 PSoC Development Kit Guide. 0. /* Send key-down data. # 001-48651 Rev. Doc. 0. *E . /* Send USB keyboard data */ keyboardData[KEY_DATA_INDEX] = KEY_RELEASE. 0. } else { /* Continue on */ } CyDelay(50). } else { /* Continue on */ } return BUTTON_RELEASED. return BUTTON_PRESSED. 0. /* Debounce mechanical switch for ~50msec */ if(IS_BUTTON_PRESSED) { /* Wait for the button to be released */ while(IS_BUTTON_PRESSED). * * Return: * void * *******************************************************************************/ static void SendKey(uint8 key) { /* Data array for the keyboard device endpoint */ uint8 keyboardData[] = { 0. 0. make */ GetAckLoadEp(keyboardData).Sample Projects * void * * Return: * TRUE: button pressed * FALSE: button not pressed * *******************************************************************************/ static uint8 ButtonEventDetected(void) { if(!IS_BUTTON_PRESSED) { return BUTTON_RELEASED. 0. } /******************************************************************************* * Function Name: SendKey ******************************************************************************** * * Summary: * Sends keyboard key. /* Send key-up data. keyboardData[KEY_DATA_INDEX] = key. 0 }. * * Parameters: * key: Keyboard scan code. break */ GetAckLoadEp(keyboardData).

/* r break */ keyboardData[MODIFIER_KEY_DATA_INDEX] = KEY_RELEASE. /* Send USB keyboard data */ /* While Windows modifier key is down send r key. /* Send USB keyboard data */ /* Send up keys for both Windows modifier key and r key */ keyboardData[KEY_DATA_INDEX] = KEY_RELEASE. /* Send Windows modifier key-down data. 0. * * Parameters: * keyboardData: Data array for the keyboard device endpoint * * Return: * void * *******************************************************************************/ static void GetAckLoadEp(uint8 * keyboardData) { /* Wait for ACK before loading data */ while(!USBFS_1_bGetEPAckState(KEYBOARD_ENDPOINT)). GetAckLoadEp(keyboardData). r make */ keyboardData[KEY_DATA_INDEX] = LETTER_R. * * Parameters: * void * * Return: * void * *******************************************************************************/ static void StartWindowsRun(void) { /* Data array for the keyboard device endpoint */ uint8 keyboardData[] = { 0. /* Delay about 0. /* ACK has occurred. 0.5 seconds to allow Run window to pop-up */ } /******************************************************************************* * Function Name: GetAckLoadEp ******************************************************************************** * * Summary: * It first confirms that an Acknowledge transaction occurred on the keyboard * endpoint. Once the ACK is confirmed. /* Windows modifier break */ GetAckLoadEp(keyboardData). *E 147 . 0.Sample Projects } /******************************************************************************* * Function Name: StartWindowsRun ******************************************************************************** * * Summary: * Sends the Windows Run command by sending Windows Modifier and 'r' (while * the Windows modifier key is in a down state) and then releasing both keys. GetAckLoadEp(keyboardData). 0 }. /* Send USB keyboard data */ CyDelay(500). 0. Doc. 0. # 001-48651 Rev. the endpoint is enabled and loaded. modifier make */ keyboardData[MODIFIER_KEY_DATA_INDEX] = WINDOWS_LEFT_MODIFIER. 0. load the endpoint */ CY8CKIT-001 PSoC Development Kit Guide.

Configure the DVK breadboard using the jumper wires.Save and close the project. 8. the Windows Run window opens and the keyboard key sequence for the Cypress website is sent to open the Cypress website. 1. 10. ❐ ❐ P1[5] to SW1 P1[6] to LED1 4. PSoC Creator builds the project and displays the comments in the Output dialog box. Reapply power to the board. 7.3. After programming the device. keyboardData. LED1 also toggles. 3. 148 CY8CKIT-001 PSoC Development Kit Guide. } /* [] END OF FILE */ 3. Disconnect the power to the board. 9. KEYBOARD_DATA_SIZE).4. Connect the USB cable to the PC and to the USB port (J9) 5. select Build Ex4_USB_HID. Doc.Sample Projects USBFS_1_LoadInEP(KEYBOARD_ENDPOINT. When button SW1 is pressed. 2. # 001-48651 Rev. *E . Configure the DVK SW3 to 5V. Use PSoC Creator as described in section Programming My First PSoC 3 Project on page 26 or Programming My First PSoC 5 Project on page 30 to program the device. ensure that the power switch (SW3) on Development kit is set to 3.7 Configuring and Programming the PSoC Development Board Note Due to the nature of the PSoC Development Board. When you see the message "Build Succeeded" the build is complete. Note The power setting of USB can be configured to either 3V or 5V mode in the firmware in the USBFS_Start API. From the Build menu. Wait until the device gets completely installed.3V operation for the device to be detected (enumerated) on the PC. When you press the button. 3. press Reset. The PSoC Development board gets detected as a HID Keyboard device. Refer to Appendix A. 6. powering the system from USB 'VBUS' could potentially reset other USB devices on the same hub. section titled Setting a 3. If the USB is configured for 3V operation in firmware.3V Supply from VBUS on page 178.

Sample Projects 3. Configure CapSense in this manner: General Tab ❐ ❐ Name: CapSense Set parameters as shown in the following figure Figure 3-135. or click appropriate directory.5. 2. In Location. the design window opens TopDesign.2 Placing and Configuring CapSense 1. By default. *E 149 . Create a new project by clicking Create New Project… in the Start Page of PSoC Creator.cysch. select the Empty PSoC3 Design template for a PSoC 3 design. 5.3. The firmware begins by initializing the LCD and CapSense components. 4.3. Add two buttons by clicking on Add Button. 5. Doc. 2.5. or Empty PSoC5 Design template for a PSoC 5 design and name the project Ex5_CapSense. 3. Drag-and-drop a CapSense component from the Component Catalog  CapSense  CapSense_CSD to the workspace. In the New Project window. # 001-48651 Rev. CY8CKIT-001 PSoC Development Kit Guide. and navigate to the 3. Open PSoC Creator. If there is a signal from either or both buttons. This is the project's schematic entry file within PSoC Creator.3.1 Creating CapSense Project 1. the corresponding LED lights up. type the path where you want to save the project.5 CapSense This project demonstrates CapSense. In the main loop it scans the two buttons for activity. Leave the button parameters as default. Double click the CapSense_1 component 3. Select the Widget Config Tab. 3. CapSense Component Configuration 4.

Buttons . *E .CapSense Component Configuration 6. # 001-48651 Rev. Slider Configuration 8. Change API resolution parameter to 80.Sample Projects Figure 3-136. 150 CY8CKIT-001 PSoC Development Kit Guide. Figure 3-137. 7. Select Linear Slider and click on Add Linear Slider. Doc. Select Tuner Helper tab and uncheck the Enable Tune Helper box.

Scan Slots Slider Terminals Configuration 3. Set the parameter LCD Custom Character Set to Horizontal Bargraph.3. Click OK Figure 3-139. *E 151 .5. Horizontal Bargraph Configuration CY8CKIT-001 PSoC Development Kit Guide.Sample Projects Figure 3-138. 4. 3. Select Include ASCII to Number Conversion Routines. # 001-48651 Rev. Drag-and-drop a Character LCD component from the Component Catalog  Display  Character LCD to the workspace. Doc. 2.3 Placing and Configuring Character LCD 1. 5. Double click the LCD_Char_1 component.

Configure the two Digital Port components for LED1 and LED2. Click OK. Configure LED2 similar to LED1. Type Tab ❐ ❐ Name: LED1 Select Digital Output check box (Note all other check boxes are not selected) Figure 3-140. 152 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Pins .3.Sample Projects 3. Doc. Drag-and-drop two Digital Output Pin components from the Component Catalog  Ports and Pins  Digital Output Pin to the workspace.LED Configuration 3. 4.5.4 Placing and Configuring Digital Output Pin 1. LED Configuration General Tab ❐ ❐ Drive Mode: Strong Drive Leave remaining parameters as default Figure 3-141. 2. *E .

From the Workspace Explorer.cywrk file. # 001-48651 Rev.Sample Projects 3.) ❐ ❐ ❐ ❐ ❐ ❐ ❐ ❐ ❐ ❐ Figure 3-142.5. *E 153 . 2. Pin Assignment for CY8C38 Family Processor Module Figure 3-143. Doc. double click the Ex5_CapSesne. Click the Pins tab 3. Pin Assignment for CY8C55 Family Processor Module CY8CKIT-001 PSoC Development Kit Guide.5 Configuring the Pins 1. Select and assign the pins in this manner ❐ Cmod to P2[7] for CY8C38 Family Processor Module and Cmod to P15[5] for CY8C55 Family Processor Module B1 to P0[5] B2 to P0[6] Position_e0 to P0[0] Position_e1 to P0[1] Position_e2 to P0[2] Position_e3 to P0[3] Position_e4 to P0[4] LED1 to P1[6] LED2 to P1[7] LCD_Char_1 to P2[0] to P2[6] (Drag it to P2[0] and PSoC Creator assigns the pin correctly.3.

which can be found within the attachments feature of this PDF document. click on the paper clip icon located in the lower left corner of the Adobe Reader application. Doc. gets the state of the * buttons and slider and updates the LCD with the current state.c to replace the main. uint8 slot_2).6 Creating the main. *E . Then it continuously * scans all CapSense slots (slider slots and buttons). Use the PSoC 3 family processor module file CY8C38_main_Ex5. * * Parameters: * void * 154 CY8CKIT-001 PSoC Development Kit Guide. ■ #include <device. /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes CapSense and the LCD. Replace the existing main.c content with the content of the embedded CY8C38_main_Ex5.c file within Workspace Explorer. Notes ■ To access the embedded attachments feature in the PDF document. Open the existing main.c File 1.5.h> /* LCD specific */ #define ROW_0 0 /* LCD row 0 */ #define ROW_1 1 /* LCD row 1 */ #define COLUMN_0 0 /* LCD column 0 */ #define NUM_CHARACTERS 16 /* Number of characters on LCD */ /* For clearing a row of the LCD*/ #define CLEAR_ROW_STR " " /* Button 1 only string for row 0 of the LCD */ #define BUTTON_1_STR "Button1 " /* Button 2 only string for row 0 of the LCD */ #define BUTTON_2_STR " Button2" /* Button 1 and 2 string for row 0 of the LCD */ #define BUTTON_1_2_STR "Button1 Button2" /* Default string for button row of the LCD */ #define DEFAULT_ROW_0_STR "Touch Buttons " /* Default string for slider row of the LCD */ #define DEFAULT_ROW_1_STR "Touch The Slider" /* LED specific */ #define LED_ON 1 /* For setting LED pin high */ #define LED_OFF 0 /* For setting LED pin low */ /* CapSense specific */ #define SLIDER_RESOLUTION 80 //extern const uint8 LCD_Char_1_customFonts[].c file.c content for PSoC 5 CY8C55 family processor module. void UpdateSliderPosition(uint8 value).Sample Projects 3.3. 2. # 001-48651 Rev. void UpdateButtonState(uint8 slot_1.

stateB_2 = CapSense_CheckIsWidgetActive(CapSense_BUTTON1__BTN). pos =(uint8)CapSense_GetCentroidPos(CapSense_LINEARSLIDER0__LS). /* For Bargraph display on LCD */ // LCD_Char_1_LoadCustomFonts(LCD_Char_1_customFonts). } } /******************************************************************************* * Function Name: UpdateButtonState ******************************************************************************** * * Summary: * Updates the LCD screen with the current button state by displaying which * button is being touched on row 0. # 001-48651 Rev. while(1) { /* If scanning is completed update the baseline count and check if sensor is active */ while(CapSense_IsBusy()). /* Slider Position */ uint8 stateB_1. CapSense_ScanEnabledWidgets(). stateB_2). Doc. UpdateSliderPosition(pos).Sample Projects * Return: * void * *******************************************************************************/ void main() { uint8 pos. /* Update baseline for all the sensors */ CapSense_UpdateEnabledBaselines(). LED's are also updated according to button * state. /* Start capsense and initialize baselines and enable scan */ CapSense_Start(). CapSense_InitializeAllBaselines(). /* Button1 State */ uint8 stateB_2. /* Update LCD and LED's with current Button and Linear Slider states */ UpdateButtonState(stateB_1. /* Test if button widget is active */ stateB_1 = CapSense_CheckIsWidgetActive(CapSense_BUTTON0__BTN). /* Enable global interrupts */ /* LCD Initialization */ LCD_Char_1_Start(). *E 155 . CapSense_ScanEnabledWidgets(). /* Button2 State */ CYGlobalIntEnable. * * Parameters: * slot_1: Button state for B1 * slot_2: Button state for B2 * * Return: CY8CKIT-001 PSoC Development Kit Guide.

uint8 slot_2) { LCD_Char_1_Position(ROW_0. * 156 CY8CKIT-001 PSoC Development Kit Guide. LED2_Write(LED_ON).COLUMN_0). * * Parameters: * value: Centroid position from CapSense slider. /* Button 2 is not active */ LED2_Write(LED_OFF). LED2_Write(LED_ON). # 001-48651 Rev.Sample Projects * void * *******************************************************************************/ void UpdateButtonState(uint8 slot_1. } } else { /* Display default string on LCD and set LED's to off */ LCD_Char_1_PrintString(DEFAULT_ROW_0_STR). LED1_Write(LED_ON). /* Set both LED's off in this state */ LED1_Write(LED_OFF). /* Button 1 is not active */ LED1_Write(LED_OFF). /* Check the state of the buttons and update the LCD and LEDs */ if (slot_1 && slot_2) { /* Display both Button strings on LCD if both button slots are active */ LCD_Char_1_PrintString(BUTTON_1_2_STR). } } /******************************************************************************* * Function Name: UpdateSliderPosition ******************************************************************************** * * Summary: * Updates the LCD screen with the current slider position by displaying the * horizontal bar graph. } else if (slot_1 || slot_2) { if (slot_1) { /* Display Button 1 state on LCD and LED1 */ LCD_Char_1_PrintString(BUTTON_1_STR). /* Both LED's are on in this state */ LED1_Write(LED_ON). LED2_Write(LED_OFF). *E . Doc. } if (slot_2) { /* Display Button 2 state on LCD and LED2 */ LCD_Char_1_PrintString(BUTTON_2_STR).

# 001-48651 Rev. 5. When you see the message "Build Succeeded" the build is complete. 6.3. Use PSoC Creator as described in Programming My First PSoC 3 Project on page 26 or Programming My First PSoC 5 Project on page 30 to program the device. Using the jumper wires. value +1). Save and close the project. 3. an LED lights up when either CapSense button is pushed. *E 157 . When running the project. } else { /* Update the bar graph with the current finger position */ LCD_Char_1_DrawHorizontalBG(ROW_1.Sample Projects * Return: * void * *******************************************************************************/ void UpdateSliderPosition(uint8 value) { /* The slider position is 0xFF if there is no finger present on the slider */ if (value > SLIDER_RESOLUTION) { /* Clear old slider position (2nd row of LCD) */ LCD_Char_1_Position(ROW_1. Likewise.5. } } /* [] END OF FILE */ 3. LCD_Char_1_PrintString(DEFAULT_ROW_1_STR). press Reset. configure the PSoC Development Board's prototyping area: ❐ ❐ P1[6] to LED1 P1[7] to LED2 4. If B2 (P0[6]) is pushed it displays “Button2” in the top row of the LCD display. NUM_CHARACTERS. The bottom row of the LCD displays the Slider position with a Horizontal Bar graph. After programming the device.3V. From the Build menu. Configure the DVK SW3 to 3. Doc. 2. Disconnect power to the board. select Build CapSense. CY8CKIT-001 PSoC Development Kit Guide.7 Configuring and Programming the PSoC Development Board 1. 7. If B1 (P0[5]) is pushed it also displays “Button1” in the top row of the LCD display. COLUMN_0. 3. PSoC Creator builds the project and displays the comments in the Output dialog box. COLUMN_0).

6. 3.1 Creating ADC to UART with DAC Project 1. In the New Project window.6. Double click the ADC_SAR_1 component in the schematic to open the configuration window.6 SAR ADC (PSoC 5 Only) This project demonstrates sine wave generation by using an 8-bit DAC and DMA. 3. or click appropriate directory. the design window opens TopDesign. The sine wave period is based on the current value of the ADC value of the potentiometer. By default.3. type the path where you want to save the project.3. 4. 5. The firmware reads the voltage output by the DVK board potentiometer and displays the raw counts on the DVK board character LCD display similarly to that shown in the previous project. select the Empty PSoC5 Design template and Name the project Ex6_SAR_to_UART_with_DAC. This example project uses the following components: ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SAR ADC (Component Catalog  Analog  ADC  SAR ADC) Voltage DAC (Component Catalog  Analog  DAC  Voltage DAC) Opamp (Component Catalog  Analog  Amplifiers  Opamp) DMA (Component Catalog  System  DMA) Character LCD (Component Catalog  Display  Character LCD) UART (Component Catalog  Communications  UART) Analog Pin (Component Catalog  Ports and Pins  Analog Pin) Digital Output Pin (Component Catalog  Ports and Pins  Digital Output Pin) Clock (Component Catalog  System Clock) Logic Low (Component Catalog Digital  Logic Logic Low) Logic High (Component Catalog Digital Logic  Logic High) 3. This is the project's schematic entry file within PSoC Creator. An 8-bit DAC outputs a table generated sine wave to an LED using DMA at a frequency proportional to the ADC count. Drag-and-drop the SAR ADC component (Component Catalog  Analog  ADC  SAR ADC) 2. 2. *E . A 9600 BAUD 8N1 UART outputs the current ADC count as ASCII formatted into a hexadecimal number. # 001-48651 Rev.2 Placing and Configuring SAR ADC 1. Create a new project by clicking Create New Project… in the Start Page of PSoC Creator. The instructions below assume that you have completed My First PSoC Project and ADC to LCD Project and therefore have a basic understanding of the PSoC Creator software environment. Doc.cysch.3. Configure the SAR ADC in this manner: Configure Tab ❐ ❐ ❐ ❐ ❐ Name: ADC_SAR_1 Power: High Power Resolution: 12 Conversion Rate: 100000 Clock Frequency: 1800 158 CY8CKIT-001 PSoC Development Kit Guide. Open PSoC Creator. In Location. and navigate to the 3.Sample Projects 3.

Sample Projects ❐ ❐ ❐ ❐ ❐ Input Range: Vssa to Vdda (Single Ended) Reference: Internal Vref Voltage Reference: 1.6. # 001-48651 Rev.0240 Sample Mode: Free Running Clock Source: Internal For more information about what the parameters mean. 3. Configure the analog pin: Type Tab ❐ ❐ Name: POT Select Analog check box only CY8CKIT-001 PSoC Development Kit Guide. Figure 3-144.3 Placing and Configuring an Analog Pin 1. SAR ADC Component Configuration 3. Doc.3. Drag-and-drop the Analog Pin component (Component Catalog  Ports and Pins  Analog Pin) 2. *E 159 . Double click the Pin_1 component in the schematic to open the configuration window. click the Data Sheet button in the configuration window.

Configure the Character LCD: ❐ ❐ ❐ Name: LCD_Char_1 LCD Custom Character Set: None Include ASCII to Number Conversion Routines: Check box For more information about what the parameters mean. Drag-and-drop the Character LCD component (Component Catalog  Display  Character LCD) 2. 160 CY8CKIT-001 PSoC Development Kit Guide. 3.4 Placing and Configuring Character LCD 1. 3. click the Data Sheet button in the configuration window. *E . Doc. POT Component Configuration General Tab ❐ ❐ Drive Mode: High Impedance Analog Leave remaining parameters as default For more information about what the parameters mean. # 001-48651 Rev.6. Double click the LCD_Char_1 component in the schematic to open the configuration window.3.Sample Projects Figure 3-145. click the Data Sheet button in the configuration window.

5 Placing and Configuring Voltage DAC 1.080V (16mV/bit) VDAC_Speed: Low Speed For more information about what the parameters mean. Double click the VDAC8_1 component in the schematic to open the configuration window. Doc.6.Sample Projects Figure 3-146.3. Drag-and-drop the Voltage DAC component (Component Catalog  Analog  DAC  Voltage DAC) 2. Configure the VDAC: Basic Tab ❐ ❐ ❐ ❐ ❐ ❐ Name: VDAC8_1 Data_Source: CPU or DMA (Data Bus) Initial_Value: 1600 Strobe_Mode: Register Write VDAC_Range: 0 . 3. *E 161 . click the Data Sheet button in the configuration window. CY8CKIT-001 PSoC Development Kit Guide.4. # 001-48651 Rev. Character LCD Component Configuration 3.

6 Placing and Configuring Opamp 1. Doc. 3.6. Double click the Opamp_1 component in the schematic to open the configuration window.Sample Projects Figure 3-147. Configure the Opamp: Basic Tab ❐ ❐ ❐ Name: Opamp_1 Mode: Follower Power: High Power For more information about what the parameters mean. Drag-and-drop the Opamp component (Component Catalog  Analog  Amplifiers  Opamp) 2. Opamp Component Configuration 162 CY8CKIT-001 PSoC Development Kit Guide.3. Voltage DAC Component Configuration 3. click the Data Sheet button in the configuration window. Figure 3-148. *E . # 001-48651 Rev.

7 Placing and Configuring Analog Pin 1. CY8CKIT-001 PSoC Development Kit Guide. 3. click the Data Sheet button in the configuration window. *E 163 .Sample Projects 3. Configure the analog pin: Type Tab ❐ ❐ Name: LED Select Analog check box only Figure 3-149. Double click the Pin_1 component in the schematic to open the configuration window. Doc.3. LED Component Configuration General Tab ❐ ❐ Drive Mode: High Impedance Analog Leave remaining parameters as default For more information about what the parameters mean. # 001-48651 Rev.6. Drag-and-drop the analog pin component (Component Catalog  Ports and Pins  Analog Pin) 2.

Doc.6.3. 3.Sample Projects Figure 3-150. # 001-48651 Rev. Configure the UART: Configure Tab ❐ ❐ ❐ ❐ Name: UART_1 Mode: TxOnly Bits per second: 9600 Leave the remaining parameters to default For more information about what the parameters mean. *E . Double click the UART_1 component in the schematic to open the configuration window. UART Component Configuration 164 CY8CKIT-001 PSoC Development Kit Guide. Drag-and-drop the UART component (Component Catalog  Communications  UART) 2. LED Component Configuration 3.8 Placing and Configuring UART 1. click the Data Sheet button in the configuration window. Figure 3-151.

6.TX_OUT Component Configuration CY8CKIT-001 PSoC Development Kit Guide. Double click the Pin_1 component in the schematic to open the configuration window. Configure the digital output pin: Type Tab ❐ ❐ ❐ Name: TX_OUT Select Digital Output Check box Select HW Connection Check box Figure 3-152. TX_OUT Component Configuration General Tab ❐ ❐ Under Drive Mode: Strong Drive Leave remaining parameters as default Figure 3-153. Pins . *E 165 .9 Placing and Configuring Digital Output Pin 1.Sample Projects 3. 3. Doc. # 001-48651 Rev.3. Drag-and-drop the Digital Output Pin component (Component Catalog  Ports and Pins  Digital Output Pin) 2.

000 MHz) Desired Frequency: 3 MHz Leave remaining parameters set to their default values 166 CY8CKIT-001 PSoC Development Kit Guide. 3.3. Doc. 3. DMA Component Configuration 3.3. Configure the clock: Configure Clock Tab ❐ ❐ ❐ ❐ Name: Clock_1 Source: IMO (3. click the Data Sheet button in the configuration window.11 Connecting the Components Together 1. Configure the DMA: Basic Tab ❐ ❐ ❐ Name: DMA_1 Hardware Request: Rising Edge Leave the remaining parameters to default For more information about what the parameters mean. 4.Sample Projects For more information about what the parameters mean. Drag-and-drop the DMA component (Component Catalog  System  DMA) 2. # 001-48651 Rev.6. Connect a Logic Low component (Component Catalog  Digital Logic  Logic Low) to the reset of the UART 2. *E . Double click the Clock component to configure.10 Placing and Configuring DMA 1. 3. Connect a Clock component (Component Catalog  System  Clock) to the clock of the DMA. Figure 3-154. click the Data Sheet button in the configuration window.6. Double click the DMA_1 component in the schematic to open the configuration window.

Connected Components CY8CKIT-001 PSoC Development Kit Guide. Doc. # 001-48651 Rev. 6. 9. Using the Wire Tool . Figure 3-156. Clock Component Configuration 5. connect VDAC8 (VDAC8_1) to Opamp (Opamp_1). 8. connect POT to ADC_SAR (ADC_SAR_1).Sample Projects Figure 3-155. This allows the LED pin to line up with the Opamp output. Using the Wire Tool . *E 167 . connect tx (in the UART component) to HW connection of the TX_OUT digital output pin (TX_OUT). Right click the LED analog pin. When complete the schematic looks like Figure 3-156. . select the Shape menu option and then Flip Horizontal. Using the Wire Tool 7.

# 001-48651 Rev. 0x7B. 0x6F. open the Ex6_SAR_to_UART_with_DAC. 0x77.6. 168 CY8CKIT-001 PSoC Development Kit Guide.c File 1.12 Configuring the Pins 1. Select pin P1[2] for TX_OUT Figure 3-157. 0x7F. *E . click on the paper clip icon located in the lower left corner of the Adobe Reader application. 0x71. Select pin P0[7] for POT 5.c file. which can be found within the attachments feature of this PDF document.3. 0x7D. 0x81.Sample Projects 3.13 Creating the main. 0x83. void TxHex (uint16 voltageRawCount). Select pin P1[6] for LED 6.h> /* LCD specific */ #define ROW_0 0 /* LCD row 0 #define COLUMN_0 0 /* LCD column 0 #define COLUMN_9 9 /* LCD column 9 #define COLUMN_10 10 /* LCD column 10 #define COLUMN_11 11 /* LCD column 11 /* For clearing Tens and Hundreds place #define CLEAR_TENS_HUNDREDS " " /* For clearing Hundreds place */ #define CLEAR_HUNDREDS " " */ */ */ */ */ */ /* DMA specific */ #define REQUEST_PER_BURST 1 /* One request per burst */ #define BURST_BYTE_COUNT 1 /* Bursts are one byte each */ /* Upper 16-bits of the source address are zero */ #define SOURCE_ADDRESS 0 /* Upper 16-bits of the destination address are zero */ #define DESTINATION_ADDRESS 0 void UpdateDisplay(uint16 * voltageRawCount). 0x79.6. Note To access the embedded attachments feature in the PDF document. 0x73.cydwr file. 2. Click the Pins tab. 0x75.c file within Workspace Explorer. 2. These values range * between 0x3D and 0x9F because these are the two points where the LED * is not visible and where the LED is saturated */ const uint8 voltageWave[] = { 0x6D. Replace the existing main. #include <device. From the Workspace Explorer.3. Open the existing main. 0x85. 3. Select pins P2[6:0] for LCD_Char_1 4. /* Table of voltage values for DMA to send to the DAC. Doc. Pin Assignments 3.c content with the content of the embedded CY8C55_main_Ex6.

0x9F. 0x67. 0x6D. /* Allocate a Transaction Descriptor (TD) from the free list */ myTd = CyDmaTdAllocate(). 0x7D. 0x8B. uint8 myChannel. In the main loop. 0x69. 0x8B. ADC_SAR_1_Start(). 0x57. 0x9E. 0x9F. 0x3D. 0x9C. 0x5F. 0x71. 0x4B. 0x55. 0x9E. 0x3F. then * it displays the ADC raw count to the LCD. CY8CKIT-001 PSoC Development Kit Guide. 0x55. 0x97. 0x95. 0x4F. 0x6B. /* Move the LCD cursor to Row 0. 0x7B. 0x83. 0x89. VDAC8_1_Start(). 0x87. 0x63. 0x7F. LCD. 0x5F. * and sets the DMA clock divider proportional to the raw count. 0x45. 0x3D. 0x59. Column 0 */ LCD_Char_1_Position(ROW_0. 0x8D. 0x5B. 0x6F. 0x75. COLUMN_0). it starts and waits for an ADC conversion. 0x40. LCD_Char_1_Start(). 0x79. 0x93. 0x59. 0x45. 0x6B /******************************************************************************* * Function Name: main ******************************************************************************** * * Summary: * The main function initializes the ADC. * * Parameters: * void * * Return: * void * *******************************************************************************/ void main() { uint16 voltageRawCount. 0x4D. 0x47. 0x53. 0x93.Sample Projects 0x87. 0x49. 0x63. 0x53. Doc. and UART. uint8 myTd. 0x77. 0x81. 0x67. 0x57. 0x61. 0x43. (uint16)((uint32)voltageWave >> 16). 0x65. /* /* /* /* /* /* Configure and power up ADC */ Initialize and clear the LCD */ Initializes VDAC8 with default values */ Enables Opamp and sets power level */ Enable UART */ Set DMA configuration register */ /* Allocate and initialize a DMA channel to be used by the caller */ myChannel = DMA_1_DmaInitialize(BURST_BYTE_COUNT. 0x91. 0x95. UART_1_Start(). * It also initializes DMA by allocating/configuring a DMA channel and * Transaction Descriptor and also copies the voltage table address to the DAC * address. (uint16)(VDAC8_1_viDAC8__D >> 16)). 0x9C. 0x40. 0x99. *E 169 . 0x9E. 0x99. 0x9E. 0x8F. 0x3F. REQUEST_PER_BURST. 0x5B. 0x3D. 0x9B. 0x41. 0x51. transmits the raw count serially. 0x91. 0x69. }. 0x9E. 0x8D. 0x43. 0x4B. 0x9F. 0x3D. 0x4F. 0x3D. # 001-48651 Rev. 0x3F. 0x5D. 0x8F. CyDmacConfigure(). 0x89. Opamp_1_Start(). 0x9B. 0x51. 0x9D. 0x9C. Analog Buffer. /* Print Label for the pot voltage raw count */ LCD_Char_1_PrintString("V Count: "). 0x61. 0x41. 0x4D. 0x65. 0x49. 0x85. 0x3D. 0x5D. 0x47. 0x73. 0x97. 0x9D. VDAC.

/* Print the result to LCD */ TxHex(voltageRawCount). Clock_1_Start(). The following equation is necessary to make the adjusted * clock frequency (with the updated divider) linear with the ADC * output. } } /******************************************************************************* * Function Name: UpdateDisplay ******************************************************************************** * * Summary: * Print voltage raw count result to the LCD. /* Force ADC to initiate a conversion */ while(1) { /* Wait for end of conversion */ ADC_SAR_1_IsEndConversion(ADC_SAR_1_WAIT_FOR_RESULT). Clears some characters if * necessary. sizeof(voltageWave). * With a 3MHz clock. The voltageRawCount parameter is also updated for use in other * functions. /* Get converted result */ /* Shifting for silicon errata workaround to get 8-bit value */ voltageRawCount = (ADC_SAR_1_GetResult16()>>4). /* Associate TD with channel */ CyDmaChSetInitialTd(myChannel. /* Configure the TD */ /* Copy address of voltageWave to address of DAC. (uint16)((uint32)voltageWave). *E . UpdateDisplay(&voltageRawCount). /* Enable DMA channel */ CyDmaChEnable(myChannel.Sample Projects CyDmaTdSetConfiguration(myTd. myTd). */ Clock_1_Stop(). ADC_SAR_1_StartConvert(). TD_INC_SRC_ADR ). Set the lower 16-bits of * the source and destination addresses for this TD */ CyDmaTdSetAddress(myTd. /* Transmit result to UART */ /* * The LED blinking frequency is dependent on the Voltage raw count.(uint32)voltageRawCount)) + 1000). The highest value is * about 52. myTd. /* Clock will make burst requests to the DMAC */ Clock_1_Start(). Doc. 1). Clock_1_SetDivider((((uint32)voltageRawCount * 1000) / (261 .200 (for a raw count of 256) to blink at a significantly * slow pace. # 001-48651 Rev. the lowest divider (for raw count of 0) should be * 1000 to blink at a significantly fast pace. 170 CY8CKIT-001 PSoC Development Kit Guide. (uint16)VDAC8_1_viDAC8__D).

COLUMN_10). CY8CKIT-001 PSoC Development Kit Guide. * * Parameters: * voltageRawCount: The voltage raw counts being received from the ADC * * Return: * void * *******************************************************************************/ void TxHex (uint16 voltageRawCount) { static char8 const hex[16] = "0123456789ABCDEF". /* TX converted MSnibble */ UART_1_PutChar(hex[(voltageRawCount>>12)&0xF]). /* TX converted second nibble */ UART_1_PutChar(hex[(voltageRawCount>>8)&0xF]). LCD_Char_1_PrintString(CLEAR_HUNDREDS). /* Print the result */ if (voltageRawCount[0] < 10) { /* Move the cursor to Row 0. /* TX converted LSnibble */ UART_1_PutChar(hex[voltageRawCount&0xF]). /* TX converted third nibble */ UART_1_PutChar(hex[(voltageRawCount>>4)&0xF]). Column 9 */ LCD_Char_1_Position(ROW_0. *E 171 . Column 10 */ LCD_Char_1_Position(ROW_0. LCD_Char_1_PrintString(CLEAR_TENS_HUNDREDS). COLUMN_9). /* Clear last characters */ } else { /* Continue on */ } } /******************************************************************************* * Function Name: TxHex ******************************************************************************** * * Summary: * Convert voltage raw count to hex value and TX via UART. LCD_Char_1_PrintNumber(voltageRawCount[0]). Column 11 */ LCD_Char_1_Position(ROW_0. Doc.Sample Projects * * Parameters: * voltageRawCount: Voltage raw count from ADC * * Return: * void * *******************************************************************************/ void UpdateDisplay (uint16 * voltageRawCount) { /* Move the cursor to Row 0. /* Clear last characters */ } else if (voltageRawCount[0] < 100) { /* Move the cursor to Row 0. # 001-48651 Rev.COLUMN_11).

6. HyperTerminal Settings 172 CY8CKIT-001 PSoC Development Kit Guide. Install a terminal application such as TeraTerm or HyperTerminal with these setup parameters: ❐ ❐ ❐ ❐ ❐ Baud Rate: 9600 Data: 8-bit Parity: none Stop: 1-bit Flow Control: none Figure 3-158. 2. Using the jumper wires included. Verify that RS232_PWR (J10) is jumpered to ON. Verify that VR_PWR (J11) is jumpered to ON. 8. configure the PSoC Development Board's prototyping area to: ❐ ❐ ❐ P0[7] to VR P1[2] to TX P1[6] to LED1 4.14 Configuring and Programming the PSoC Development Board 1. select Build Ex6_SAR_to_UART_with_DAC. 3. Connect a serial cable from the PSoC Development Board to a PC. 5. From the Build menu. } /* h for hexadecimal and carriage return */ /* [] END OF FILE */ 3. Disconnect power to the board. Apply power to the board.3. # 001-48651 Rev. When you see the message "Build Succeeded" the build is complete. 7. Configure the DVK SW3 to 5 V. *E . Doc. 6.Sample Projects UART_1_PutString("h\r"). 3. PSoC Creator builds the project and displays the comments in the Output dialog box.

LED1 is a sine wave output whose period is based on the ADC. refer to http://www. for example projects using PSoC Development Board and PSoC 5 Processor Module.cypress. Save and close the project. CY8CKIT-001 PSoC Development Kit Guide. Use PSoC Creator as described in Programming My First PSoC 5 Project on page 30 to program the device.cypress.com/?id=2232&rtID=113.com/?id=2233&rtID=113. Similarly. Doc.Sample Projects 9. Turning the potentiometer results in the LCD and observed terminal value change. press the Reset button on the PSoC Development Board to see the output of the ADC displayed on the LCD and in the terminal application.After programming the device. # 001-48651 Rev.7 More Example Projects For more code examples using PSoC Development board and PSoC 3 Processor Module. 10. refer to http://www. 3. *E 173 . 11.3.

Sample Projects 174 CY8CKIT-001 PSoC Development Kit Guide. *E . Doc. # 001-48651 Rev.

It is mainly used when the PSoC core must be powered at lower voltages. VIN (9V or 12V) . which can be powered to 5V.3V for 3.1 PSoC Development Board Factory Default Configuration Power Supply The board has several power nets. The source for VDD ANLG can be chosen as VDD or VADJ using the J6 header. It is mainly used when user wants to separate the analog power from the digital power. VDD can be chosen either to be 3. VBUS can be selected as the main 5V source by using the J8 header. Board Specifications and Layout This appendix gives detailed specifications of the PSoC Development Kit Board components A.5V to 3.3V regulator. Below are the definitions of the different power nets.3V or 5V by the simple positioning of the VDD select switch.This is power derived from either VDD or VADJ. A 9-12V power supply adapter or a 9V battery is used as the source.3V. CY8CKIT-001 PSoC Development Kit Guide.This is power derived from either VDD or VADJ. VDD ANLG . VBUS (5V) . It enables you to power the PSoC GPIOs at different voltages.3V supply and 1. or the onboard 3. Doc.Appendix A.1 A. *E 175 .1 A. VDD DIG . It is used to power digital I/O on the PSoC device. VDD (3.This is fed by VDD and is the output of the onboard adjustable regulator. VDDIO .1.5V to 5V for 5V supply) .This is the input power before it is fed to any of the regulators. It is used to power the PSoC core. # 001-48651 Rev. The source for VDD DIG can be chosen as VDD or VADJ using the J7 header.This is fed by VREG.3V or 5V) . 3. VREG can be selected as the main 5V source by using the J8 header. An adjustable resistor R11 is used for adjusting the voltage.This is power derived from the USB interface via a USB host. VBUS.This is fed by VIN and is the output of the onboard 5V regulator.1. VREG (5V) .This is power derived from either VDD or VADJ.1. VADJ (1. or VADJ using four headers. There are four sections of GPIO.

1. Doc.2 A. Setting a 3.3V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE 176 CY8CKIT-001 PSoC Development Kit Guide.2 Setting a 3. 3. 3. Move the VDD select switch to select 3. 2. Move the VDD select switch to select the 5V.Board Specifications and Layout A.2.2.3V Supply from VREG 1. Place the jumper on J7 header to select VDD as source for VDD DIG. Place the jumper on J6 header to select VDD as source for VDD ANLG. Setting a 5V Supply from VREG MOVE VDD SELECT SWITCH TO 5V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE A. Figure A-1.1 Power Supply Configuration Examples Setting a 5V Supply from VREG 1.3V.3V Supply from VREG MOVE VDD SELECT SWITCH TO 3. Place the jumper on J7 header to select VDD as source for VDD DIG. 4. Place the jumper on J8 header to select VREG as the source. 2. Figure A-2. Place the jumper on J8 header to select VREG as the source. Place the jumper on J6 header to select VDD as source for VDD ANLG.1. *E .1. 4. # 001-48651 Rev.

*E 177 . 4. Move the VDD select switch to select 3.3V MOVE VDD SELECT SWITCH TO 3.3V MOVE VDD SELECT SWITCH TO 3. Setting VDD ANLG as VADJ and VDD DIG as VDD for VDD = 3.2.3V SELECT VADJ AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE This helps to separate the analog supply from the digital supply and VDD. Doc.3V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VADJ AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE This helps to separate the digital supply from the analog supply and VDD. 3. Place the jumper on J7 header to select VADJ as source for VDD DIG. Place the jumper on J6 header to select VDD as source for VDD ANLG. Place the jumper on J8 header to select VREG as the source. Place the jumper on J8 header to select VREG as the source. 4. CY8CKIT-001 PSoC Development Kit Guide. Setting VDD DIG as VADJ and VDD ANLG as VDD for VDD = 3.4 Setting VDD DIG as VADJ and VDD ANLG as VDD for VDD = 3. Place the jumper on J6 header to select VADJ as source for VDD ANLG.3V. Place the jumper on J7 header to select VDD as source for VDD DIG. Figure A-4.1.3V 1. A.2. 2.1. # 001-48651 Rev. Figure A-3. 2. 3.3V 1. Move the VDD select switch to select 3.Board Specifications and Layout A.3 Setting VDD ANLG as VADJ and VDD DIG as VDD for VDD = 3.3V.

the PSoC Development Board is capable of drawing more than 500mA of current during normal operation. 4. Bus powered applications done outside the realm of the PSoC Development Board should comply to the USB specification for inrush current limits and recommended bulk capacitance on 'VBUS'. which exceeds USB bus power limits. In general. Move the VDD select switch to select the 5V. 3. Figure A-5. *E . 3. 2. 4. plugging the PSoC Development Board into a USB hub could potentially cause other devices on the same hub to reset due to excessive inrush currents. or a "self-powered" external hub when doing USB development.1.3V. Place the jumper on J6 header to select VDD as source for VDD ANLG. 1.1. 2. Place the jumper on J6 header to select VDD as source for VDD ANLG. See the Universal Serial Bus Specification Revision 2. Place the jumper on J8 header to select VBUS as the source.0 for more details. Additionally. Setting a 5V Supply from VBUS MOVE VDD SELECT SWITCH TO 5V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VBUS AS SOURCE A. it is good practice to plug the PSoC Development Board into a host root hub. Place the jumper on J7 header to select VDD as source for VDD DIG.Board Specifications and Layout A. By design.2.6 Setting a 3.3V Supply from VBUS Due to the nature of the PSoC Development Board.5 Setting a 5V Supply from VBUS 1. Place the jumper on J7 header to select VDD as source for VDD DIG. 178 CY8CKIT-001 PSoC Development Kit Guide. Careful consideration should be taken when powering the PSoC Development Board from 'VBUS'. Doc. Place the jumper on J8 header to select VBUS as the source. # 001-48651 Rev. powering the system from USB 'VBUS' could potentially reset other USB devices on the same hub.2. Move the VDD select switch to select 3. the development board exceeds inrush current limits due to 'VBUS' capacitance greater than 10uF. As a result.

VDD ANLG. VBUS. Battery Terminals Use a 9V alkaline battery to connect to the 9V battery terminals. # 001-48651 Rev.9 J8 .3V.2.8 9V Battery Terminals Figure A-8.1. *E 179 .1.3V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VBUS AS SOURCE You can measure current from VREG.7 J1 . VDD feeds VDD DIG. This input power is VIN. DC Power Jack Use a 12V/1A power supply adapter when powering from the barrel power jack.5V Source This header allows you to select the 5V source from either the onboard 5V regulator (VREG) or from the USB 5V rail (VBUS). VDD DIG and VDDIOs by removing the jumpers and connecting the meter across the respective header. A. A.1. A.2. VDD ANLG and VDDIO.1. CY8CKIT-001 PSoC Development Kit Guide.10 VDD Select Switch This switch allows for selecting either 5V or 3. This input power is VIN. A.DC Power Jack Figure A-7.Board Specifications and Layout Figure A-6.2. Setting a 3.3V supply from VBUS MOVE VDD SELECT SWITCH TO 3.2. Doc.

7V and 4.95V). then place the jumper on the lower two pins. Turning this variable resistor swings the VADJ voltage between 1.1.2. # 001-48651 Rev.Adjustable Regulator Variable Resistor This adjustable resistor is used to tune the VADJ voltage. When the VDD select switch is in the 5V position.13 R11 .5V to 3. turning this variable resistor swings the VADJ voltage between 1. 180 CY8CKIT-001 PSoC Development Kit Guide.1.1.VDD DIG Select This header allows you to select the PSoC core source power.3V (based on the position of the VDD select switch). Doc.3V position.6V and 3.VDD ANLG Select If you want to separate the analog power from the digital power.95V. you can position the jumper on the upper two pins to source analog power at 5V or 3. place the jumper on the upper two pins.Board Specifications and Layout A. A. If you need to power the PSoC core at lower voltages (1.7V to 4. or on the lower two pins to source analog power at lower voltages (1.3V for 3. A.2.5V to 5V for 5V supply). When the jumper is on the lower two pins. *E .11 J7 . you must adjust R11 to tune the adjustable regulator to output the desired voltage.3V (based on the position of the VDD select switch).3V supply and 1.29V when the VDD select switch is in the 3.2. If you need to power the PSoC core at either 5V or 3.12 J6 .

J10-RS232 POWER P15-DB9 SERIAL COMMUNICATION PORT J9-FULL SPEED USB PORT SW1 J14-RADIO POWER J11-VARIABLE RESISTOR POWER P17-WirelessUSB LP RADIO MODULE CONNECTOR SW2 R20-VARIABLE RESISTOR CAPSENSE SLIDER CAPSENSE BUTTONS CY8CKIT-001 PSoC Development Kit Guide. Doc. *E 181 .1. so as to avoid disrupting digital or analog signals on this I/O pin. it is recommended that C18 on these modules be removed. # 001-48651 Rev.3.Board Specifications and Layout A. These configurations provide an external modulator capacitor for CapSense designs. CY8C55 Family modules have a 2200pF capacitor connected between P15[5] and ground. or use of P15[5] on CY8C55 Family modules is required for anything other than CapSense.1.3 A.1 Prototyping Components Prototyping Area Note CY8C38 Family modules have a 2200pF capacitor connected between P2[7] and ground. If use of P2[7] on CY8C38 Family modules.

There are also two test points for the differential pair signals D. Connector Pin Assignments .and D+.Board Specifications and Layout A. The power net VBUS is brought into the board through this interface. These signals are Rx.1.3V or 5V. depending on which the position of the VDD select switch. The other two signals are radio transmit and receive signals.3. These signals are routed to the processor module socket P1. To connect these signals to the PSoC I/O pins. Tx. an IRQ (interrupt request) and RD_RESET (radio reset). and Request To Send. This power can be either 3.Full Speed USB Port The board has a mini-B full speed USB connector. Eight signals are routed from this receptacle to P12 receptacle.1.Wireless Radio Module Socket Pin Number 1 2 3 4 5 6 7 8 GND V3_3 IRQ RD_RESET MOSI nSS SCK MISO P17 182 CY8CKIT-001 PSoC Development Kit Guide.1.RS232 (DTE) Serial Communications Socket Pin Number 1 2 3 4 5 6 7 8 9 TX RX (Empty) GND (Empty) CTS RTS (Empty) P15 (Empty) A.2 P15 . use wires to jumper from P16 to P19.3 J10 . Four signals are brought from the RS232 transceiver to receptacle P16. SCK (serial clock). Table A-1. Clear To Send.Artaflex WirelessUSB LP Radio Module Receptacle Receptacle P17 is used specifically for the Artaflex AWP24S WirelessUSB module. A.3.DB9 Serial Communications Port This is a standard female DB9 serial communications connector.3. nSS (slave select). Connector Pin Assignments .1.4 J9 .5 P17 . MOSI (master-out-slave-in). A. where sockets for ports zero and one are available. Table A-2. These signals are 4 SPI (serial peripheral interface) signals MISO (master-in-slave-out). Placing a jumper on J10 provides VDD power to the RS232 transceiver. # 001-48651 Rev.3.3V.Serial Port Power Header J10 must be jumpered in order to use the serial communications port. *E . Doc. pins 6 and 8 respectively. Note These I/O signals must not be greater than 3.

3. Connector Pin Assignments .6 J14 . Doc.Wireless Radio Module Socket (continued) Pin Number 9 10 11 12 GND (Empty) TxPA RxPA P17 A.3. Table A-3.1. Connector Pin Assignments . A. If the LCD module is removed. SW1 and SW2.Multipurpose Push Button Switches The board has two multipurpose mechanical push buttons. This LCD is rated for 5V. Placing a jumper on J14 provides 3. # 001-48651 Rev. the I/Os have a level translator inline so that signaling may be as low as 1.1. A. it removes power from level translator. the receptacle pins of P18 can be used as port 2. However. This power is drawn directly from the 3.1. A. The header J12 must be jumpered for the LCD Module to be powered.4 LCD Module The board has a 2x16 alpha-numeric LCD.7 R20 .Wireless Radio Module Power Header J14 must be jumpered in order to use the Artaflex radio module.9 SW1 and SW2 .LCD Module Socket Pin Number 1 2 3 4 5 GND VCC_LCD VO RS R/nW P18 CY8CKIT-001 PSoC Development Kit Guide. Placing a jumper on J11 provides VDD ANLG power to the high side of the resistor.Multipurpose Variable Resistor The board is equipped with a 10 k thumbwheel variable resistor referenced to ground.8V and still be recognized by the LCD. The wiper is tied to a receptacle pin on P14. that are referenced to ground.1. The high side of the resistor is tied to jumper J11.8 J11 .Board Specifications and Layout Table A-2. *E 183 .1.Variable Resistor Power Header J11 must be jumpered in order to use the variable resistor. I/Os of the module are connected to port two of the PSoC device and are routed to the processor module socket P2.3V regulator. A.3V power to the P17 module socket. The other sides of the switches are tied to receptacle pins on P14.3.3. The switches follow an inverted logic as they connect ground to receptacle pins on P14 when pressed. If J12 is not jumpered.

# 001-48651 Rev.LCD Module Power Power for the LCD module is provided through header J12. For instance. Turning the wiper counterclockwise increases the contrast.4. Placing a jumper on the upper two pins shorts the VCC pin of the module to ground.Board Specifications and Layout Table A-3. J3. There are two CapSense buttons connected directly to port zero pins. each having its own source power. VDDIO_0 is configured to VDD.3V or VADJ. A.1. For example.LCD Module Socket (continued) Pin Number 6 7 8 9 10 11 12 13 14 15 16 EN D0 D1 D2 D3 D4 D5 D6 D7 BACKLT LED ANODE BACKLT LED CATHODE P18 A. Doc. The board is loaded with 0 series resistors by default.VDDIO Select These four headers allow you to power the PSoC GPIOs at different voltages.LCD Contrast Adjustment The board is equipped with an LCD contrast adjustment resistor R31. but a value of 560 should be used for achieving best performance. This 5V power is taken directly from the onboard 5V regulator.8V. 3.6.4.5 CapSense Elements The prototyping area has three capacitive sensing elements.3V and some at 1. A.1 Processor Module J2. some at 3.3V and VDDIO_2 is configured to VADJ by placing the jumpers in the respective positions as shown in Figure A-9. some of the I/O may be powered at 5V.2 J12 . while turning the wiper clockwise decreases the contrast. Series resistors are placed on these port zero I/Os and should be loaded with appropriate values. A. There are four blocks of GPIO.1. Placing the jumper on the lower two pins provides 5V to the VCC pin of the module.1.1 R31 .6 A.1. refer to the data sheet for the PSoC device used with this board. Connector Pin Assignments . The presence of CapSense elements does not affect the general purpose use of port zero pins. J4 and J5 . *E . In addition. For details on which GPIOs are powered by which VDDIO header. A value of 0 is used for general purpose CapSense applications. VDDIO_1 is configured to 3. Each VDDIO header provides power to specific GPIO's and is selectable from VDD.1. there is a five segment CapSense slider also connected directly to port zero. 184 CY8CKIT-001 PSoC Development Kit Guide.

Processor Reset Button The board has a push button switch that resets the PSoC device attached to the processor module.6. PSoC 3 and PSoC 5 devices are active low reset. A. Any "no connect" pins are brought out to surface mount test pads. VDD ANLG. Therefore.4 P1.1. Doc. Therefore. VDDIO Select VDDIO_0=VDD(5V/3.3V VDDIO_2=VADJ A. depending on which direction the processor reset is active. Connector Pin Assignments . One side of the switch is tied to the XRES pin of the processor module socket. along with VDD DIG. 5V.External MHz Oscillator The board supports the use of an external high frequency 8-pin PDIP oscillator.Board Specifications and Layout Figure A-9.1. The speed of the oscillator supported is dependent on the specifications of the PSoC device used. Doing this allows the module designer to tie the HW_RESET line either high or low.1. The output of this oscillator is routed to P15[4] on receptacle P2 and TP62 near P2 of the DVK board.Processor Module Receptacles Processor modules provide modularity to this board.3 U8 . each of the VDDIO power pins are connected to these receptacles. Note PSoC 1 devices are active high reset. P2. a light pull-up resistor may be necessary on the XRES pin of designs with these devices to avoid unintentional device resets.6.6. 3. Processor reset is connected to P1. Sockets P1-P4 are used to connect a processor module to the board. All supported GPIOs (including special I/Os).3V) VDDIO_1=3.Processor Module Sockets Pin Number 1 2 3 4 5 6 7 8 P1 (West) GND VDDD V5_0 GND VBAT DM V3_3 DP P2 (North) GND GND P6[1] P6[0] P6[3] P6[2] P15[5] P15[4] P3 (East) GND GND P12[2] P12[3] P8[0] P8[1] P4[0] P4[1] P4 (South) GND P7[7] NC7 NC8 NC5 NC6 NC3 NC4 CY8CKIT-001 PSoC Development Kit Guide. Table A-4. *E 185 . A. The other end of the switch is tied to the HW_RESET pin of the processor module socket.2 SW4 . P3 and P4 . a light pull-down resistor may be necessary on the XRES pin of designs with these devices to avoid unintentional device resets. The full speed USB D+ and D. VBUS and VBAT (only connected to a surface mount pad on the board) are connected to these receptacles.3V. # 001-48651 Rev.signals are also connected to one of the sockets. In addition.

Connector Pin Assignments . # 001-48651 Rev. *E .Board Specifications and Layout Table A-4.Processor Module Sockets (continued) Pin Number 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P1 (West) VBUS VDDIO1 P5[6] P5[7] P5[4] P5[5] P12[6] P12[7] P1[6] P1[7] P1[4] P1[5] HW_RESET P1[3] P1[1] P1[2] P1[0] P5[3] P5[2] P5[1] P5[0] XRES GND GND P2 (North) P9[2] P9[0] P2[1] P2[0] P2[3] P2[2] VDDIO2 P9[3] P2[5] P2[4] P2[7] P2[6] P9[4] P9[5] P12[5] P12[4] P9[6] P9[7] P6[5] P6[4] P6[7] P6[6] GND GND P3 (East) P8[2] P8[3] P0[0] P0[1] P0[2] P0[3] VDDIO0 VDDA P0[4] P0[5] P0[6] P0[7] P8[4] P8[5] P8[6] P8[7] P4[2] P4[3] P4[4] P4[5] P4[6] P4[7] GND P9[1] P4 (South) P7[6] P7[5] P12[0] P12[1] P3[6] P3[7] P7[4] VDDIO3 P3[4] P3[5] P3[2] P3[3] P3[0] P3[1] P7[2] P7[3] (Empty) (Empty) P7[0] P7[1] NC1 NC2 GND GND 186 CY8CKIT-001 PSoC Development Kit Guide. Doc.

*E 187 . Mechanical Layout Details for Processor Module Connector CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Doc.Board Specifications and Layout Figure A-10.

each having at least three full 8-bit ports (one has four full ports). lower and right sides of the board are 0. Table A-5.Expansion Port Sockets Pin Number 1 2 3 4 5 6 7 8 9 P5 (PORT B) P1[7] P1[6] P1[5] P1[4] P1[3] P1[2] P1[1] P1[0] GND P6 (PORT A') P6[7] P6[6] P6[5] P6[4] P6[3] P6[2] P6[1] P6[0] GND P7 (PORT A) P3[7] P3[6] P3[5] P3[4] P3[3] P3[2] P3[1] P3[0] GND P8 (PORT C) P9[7] P9[6] P9[5] P9[4] P9[3] P9[2] P9[1] P9[0] GND 188 CY8CKIT-001 PSoC Development Kit Guide. Around the upper.7 Expansion Ports Port C Port A Port A‘ Port B The board accommodates I/O expandability.Board Specifications and Layout A. Each also has four special I/O pins available. dual row right angle receptacles. Doc.100" pitch.1. Connector Pin Assignments . # 001-48651 Rev. *E . These sockets can be used to join the processor module I/Os with external I/Os through the use of daughter boards. The fourth is simply I/O and ground exclusively. Three of the ports have power and ground pins as well.

Board Specifications and Layout Table A-5. *E 189 . Doc. Connector Pin Assignments . # 001-48651 Rev.Expansion Port Sockets (continued) Pin Number 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 P5 (PORT B) RESRV3 P2[7] P2[6] P2[5] P2[4] P2[3] P2[2] P2[1] P2[0] GND RESRV2 P0[7] P0[6] P0[5] P0[4] P0[3] P0[2] P0[1] P0[0] GND RESRV1 P12[3] P12[2] P12[1] P12[0] V3_3 VADJ GND V5_0 VIN GND x x x x x x P6 (PORT A') RESRV8 P2[7] P2[6] P2[5] P2[4] P2[3] P2[2] P2[1] P2[0] GND RESRV7 P0[7] P0[6] P0[5] P0[4] P0[3] P0[2] P0[1] P0[0] GND RESRV6 P7[7] P7[6] P7[5] P7[4] P7[3] P7[2] P7[1] P7[0] GND RESRV5 P12[5] P12[4] P12[7] P12[6] GND RESRV4 P7 (PORT A) RESRV11 P5[7] P5[6] P5[5] P5[4] P5[3] P5[2] P5[1] P5[0] GND RESRV10 P4[7] P4[6] P4[5] P4[4] P4[3] P4[2] P4[1] P4[0] GND RESRV9 P12[3] P12[2] P12[1] P12[0] V3_3 VADJ GND V5_0 VIN GND x x x x x x P8 (PORT C) RESRV14 P8[7] P8[6] P8[5] P8[4] P8[3] P8[2] P8[1] P8[0] GND RESRV13 P7[7] P7[6] P7[5] P7[4] P7[3] P7[2] P7[1] P7[0] GND RESRV12 P12[3] P12[2] P12[1] P12[0] V3_3 VADJ GND V5_0 VIN GND x x x x x x CY8CKIT-001 PSoC Development Kit Guide.

port5. port8 and port9.2 Expansion Port B Expansion port B can be used as I/O ports with three full 8-bit ports port0. It can be used to join processor module I/Os port0.1.7.1.1. port4 and port5. Doc. port2.3 Expansion Port C Expansion port C can be used as I/O ports with three full 8-bit ports port7. port8. port3. It can be used to join processor module I/Os port0. and port9 with external I/Os through the use of daughter boards. A. It has four special I/Os as well as ground and voltage pins. port2. It has four special I/Os as well as ground pins. It is used for devices with a high I/O count. It can be used to join processor module I/Os port3.7. port1.1 Expansion Ports A and A' Expansion port A can be used as I/O ports with three full 8-bit ports port3. and port2 with external I/Os through the use of daughter boards. # 001-48651 Rev. It has no voltage pins. 190 CY8CKIT-001 PSoC Development Kit Guide.Board Specifications and Layout A.7. port2. port4. port4. A. port1 and port2. It is mainly used in devices with fewer I/Os. port6 and port7 with external I/Os through the use of daughter boards. *E . It can be used to join processor module I/Os port7. and port5 with external I/Os through the use of daughter boards. It has four special I/Os as well as ground and voltage pins. port6 and port7 with external I/Os through the use of daughter boards. It has four special I/Os as well as ground and voltage pins. Expansion port A' can be used as I/O ports with four full 8-bit ports port0. The main use of port A' is that it can be used together with port A to join processor module I/Os port0. port6 and port7.

Doc. # 001-48651 Rev.2.Board Specifications and Layout A.1 Schematics CY8CKIT-001 PSoC Development Board CY8CKIT-001 PSoC Development Kit Guide. *E 191 .2 A.

1 uFd U1 R18 OCD_CCLK 56 Ohms R8 1K 0603 1 3 5 7 9 11 13 15 17 19 20 Pin Hirose Recp C 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J2 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C CY8C28 Family Processor Module 16x2 HEADER 16x2 HEADER XRES R14 Rb P3_0 ZERO P5_0 P5_2 P1_0 P1_1 HW_RESET P1_4 P1_6 XRES P5_1 P5_3 P1_2 P1_3 P1_5 P1_7 P4_6 P4_4 P4_2 P0_6 P0_4 P0_2 P0_0 V3_3 V5_0 P4_0 P4_7 P4_5 P4_3 P0_7 P0_5 VDD P0_3 P0_1 P4_1 P3_7 P3_5 P3_3 P3_1 P5_3 P5_1 P1_7 P1_5 P1_3 P1_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NC1 P0_7 P0_5 P0_3 P0_1 P2_7 P2_5 P2_3 P2_1 P4_7 P4_5 P4_3 P4_1 OCDE OCDO SMP P3_7 P3_5 P3_3 P3_1 P5_3 P5_1 P1_7 P1_5 NC2 P1_3 P1_1 VSS P0_6 P0_4 P0_2 P0_0 P2_6 P2_4 P2_2 P2_0 P4_6 P4_4 P4_2 P4_0 OCD_CCLK OCD_HCLK XRES P3_6 P3_4 P3_2 P3_0 P5_2 P5_0 P1_6 P1_4 P1_2 P1_0 VDD P0_6 P0_4 P0_2 P0_0 P2_6 P2_4 P2_2 P2_0 P4_6 P4_4 P4_2 P4_0 CCLK HCLK XRES P3_6 P3_4 P3_2 P3_0 P5_2 P5_0 P1_6 P1_4 P1_2 P1_0 NC4 NC3 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J3 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 16x2 HEADER EXTERNAL BATTERY CLIP RED TP1 C12 P3_0 P3_2 P3_4 P3_6 P3_1 P3_3 P3_5 P3_7 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J4 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 B A PDC-09547 REV ** 120-09547-0 REV ** CYPRESS SEMICONDUCTOR © 2009 Title CY8CKIT-020 28XXX Processor Module (Emerald) Size C Date: 4 3 2 Document Number REF-15052 Monday. Doc.1 uFd P1 ICE_DO R5 ICE_RST ICE_HCLK 56 Ohms TP6 C2 P3_1 NO LOAD R7 0603 0603 0603 0603 0603 0603 ZERO C15 NO LOAD CY8C28000-24PVXI C10 100 pFd Cmod 0603 0402 0603 NO LOAD R11 1K P0_7 P0_5 P0_3 P0_1 P2_7 P2_5 P2_3 P2_1 P4_7 P4_5 P4_3 P4_1 OCD_DE OCD_DO VDD R9 0402 VDD D1 L1 SOT23 2.C6 ICE_DO 56 Ohms R4 1K TP5 VDD TP3 OCD_HCLK C1 10 uFd 16V 0805 R3 OCD_DO 16x2 HEADER RED 0603 0. *E ICE_CCLK ZERO C16 2200pF 50V Cmod TP7 ICE_RST R10 0603 5 0603 192 5 4 3 2 1 A.2. October 26.2uH B ZHCS NO LOAD No Load 0805 NO LOAD VDD J5 VDD 1 2 3 4 5 SCL SDA 0603 0603 0603 1 2 3 4 5 XRES R16 R17 ZERO ZERO C13 0805 P1_1 P1_0 HDR 1x5 C14 0805 No Load R12 Y1 32.2 CY8CKIT-020 28xxx PROCESSOR MODULE (EMERALD) D D Board Specifications and Layout R1 ICE_DE 56 Ohms R2 1K OCD_DE VDD VDD RED P2_7 P2_5 P2_3 P2_1 ICE_DE ICE_HCLK P2_6 P2_4 P2_2 P2_0 ICE_CCLK R15 0603 2 4 6 8 10 12 14 16 18 20 R6 1K Rb 0. 2009 1 Rev ** Sheet 1 of 1 . # 001-48651 Rev.768 kHz XTAL 1 2 R13 P1_1 NO LOAD 0603 No Load TP2 BLACK P1_0 NO LOAD 0603 TP4 BLACK NO LOAD A 3 CY8CKIT-001 PSoC Development Kit Guide.

1 uFd OCD_DO OCD_HCLK OCD_CCLK XRES ICE_DO ICE_RST ICE_HCLK ICE_HCLK ICE_CCLK 0603 0603 P1 ICE_DE R5 OCD_HCLK 56 ohm R6 1K 0603 P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7 P4_0 P4_1 P4_2 P4_3 P4_4 P4_5 P4_6 P4_7 P0_7 P0_5 VDD P0_3 P0_1 P4_1 C 2 4 6 8 10 12 14 16 18 20 P5_0 P5_1 P5_2 P5_3 P5_4 P5_5 P5_6 P5_7 P5_0 P5_1 P5_2 P5_3 P5_4 P5_5 P5_6 P5_7 R7 ICE_CCLK 56 ohm R8 1K 0603 0603 1 3 5 7 9 11 13 15 17 19 P0_0 P0_1 P0_2 P0_3 P0_4 P0_5 P0_6 P0_7 P0_0/AI P0_1/AI P0_2/AIO P0_3/AIO P0_4/AIO P0_5/AIO P0_6/AI P0_7/AI 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J3 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C CY8C29 Family Processor Module 20 Pin Hirose Recp OCD_CCLK P1_0 P1_1 P1_2 P1_3 P1_4 P1_5 P1_6 P1_7 P1_0/XTALOUT P1_1/XTALIN P1_2 P1_3 P1_4/EXTCLK P1_5/SDA P1_6 P1_7/SCL P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7 P6_0 P6_1 P6_2 P6_3 P6_4 P6_5 P6_6 P6_7 R10 ICE_RST ZERO C10 100 pFd R11 1K 0603 0402 XRES 0603 ZERO P5_4 P5_6 V3_3 V5_0 P5_5 P5_7 GND1 GND2 GND3 GND4 GND5 16x2 HEADER P1_0 P7_0 P7_1 P7_3 P3_1 P3_3 P3_5 TP2 BLACK VDD P3_7 P7_6 TP3 RED P7_5 P7_2 P3_0 P3_2 P3_4 P7_4 P3_6 ZERO 32. 2009 1 Sheet Board Specifications and Layout 193 5 0603 0603 0402 CY8CKIT-001 PSoC Development Kit Guide.2uH BAT54 C12 0805 SOT23 16x2 HEADER VDD VDD D1 kHz Crystal Canister NO LOAD No Load R9 NO LOAD VDD B B P5_0 P5_2 PX1_0 PX1_1 HW_RESET P1_4 P1_6 XRES P5_1 P5_3 P1_2 P1_3 P1_5 P1_7 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 Switch Mode Pump Components C13 CY8C29000 TQFP100 R12 PX1_0 0805 C14 No Load Y1 0805 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 No Load R13 PX1_1 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J1 A Rev *B 1 of 1 . August 06. *E P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 P2_7 P2_0/AI P2_1/AI P2_2/AI P2_3/AI P2_4/AGND P2_5 P2_6/VREF P2_7 P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7 SMP P7_0 P7_1 P7_2 P7_3 P7_4 P7_5 P7_6 P7_7 P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 P3_6 P3_7 P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 P3_6 P3_7 EXTERNAL BATTERY CLIP TP1 RED L1 2.1 uFd 0.1 uFd 0.2.3 5 4 3 2 1 CY8C29 FAMILY PROCESSOR MODULE ISSP Programming Interface VDD VDD J5 C2 P2_6 P2_4 P2_2 P2_0 P6_2 P6_0 VDD 0603 Bulk and Bypass Capacitors VDD 16x2 HEADER P6_7 P6_5 C3 0603 P6_6 P6_4 C4 0805 0603 D 1 2 3 4 5 XRES P1_1 P1_0 P2_7 P2_5 P2_3 P2_1 P6_3 P6_1 0.A. # 001-48651 Rev.768 kHz XTAL ZERO P1_1 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J4 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 P7_7 A PDCR-9464 REV *A 121R-46400 REV *B Title CY8C29 Family Processor Module Size C Date: 4 3 2 Document Number REF-14742 Thursday.1 uFd HDR 1x5 1 2 3 4 5 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 J2 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C1 10 uFd 16V D R1 ICE_DE 56 ohm 16x2 HEADER U1 R2 1K 0603 0603 On-Chip Debugger Interface OCD_DE VDD C6 R3 ICE_DO 56 ohm R4 1K XRES 0603 OCD_DE OCD_DO VDD1 VDD2 VDD3 OCDE OCDO HCLK CCLK P0_6 P0_4 P0_2 P0_0 P4_0 P4_6 P4_4 P4_2 P4_7 P4_5 P4_3 0603 0. Doc.

March 11.1 uF P4_7 P4_6 P4_5 P4_4 P4_3 P4_2 P0_7 P0_6 P0_5 P0_4 U1 ZERO VDDIO0 VDDio2 P2_4 P2_3 P2_2 P2_1 P2_0 P15_5 P15_4 P6_3 P6_2 P6_1 P6_0 VDDd VSSd VCCd P4_7 P4_6 P4_5 P4_4 P4_3 P4_2 P0_7 P0_6 P0_5 P0_4 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 B 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 VDDio1 P1_6 P1_7 P12_6 P12_7 P5_4 P5_5 P5_6 P5_7 P15_6 DP P15_7 DM VDDd VSSd VCCd NC1 NC2 P15_0 MXo P15_1 MXi P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 VDDio3 P1_6 P1_7 P12_6 P12_7 P5_4 P5_5 P5_6 P5_7 C21 0.2 uF kHz Crystal Canister Solder XTAL Case To Ground Plane Directly VDDD J1 XRES P5_0 P5_1 P5_2 P5_3 TMS TCK P1_2 TDO TDI P1_5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P2_5 P2_6 P2_7 P12_4 I2C0_SCL P12_5 I2C0_SDA P6_4 P6_5 P6_6 P6_7 VSSb Ind Vboost Vbat VSSd XRES P5_0 P5_1 P5_2 P5_3 P1_0 TMS P1_1 TCK P1_2 P1_3 TDO P1_4 TDI P1_5 nTRST VCCA NC8 NC7 NC6 NC5 NC4 NC3 P15_3 P15_2 P12_1 P12_0 P3_7 P3_6 VDDio0 P0_3 P0_2 P0_1 P0_0 P4_1 P4_0 P12_3 P12_2 VSSd VDDa VSSa VCCa NC8 NC7 NC6 NC5 NC4 NC3 KXi P15_3 KXo P15_2 I2C1_SDA P12_1 I2C1_SCL P12_0 P3_7 P3_6 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 P5_0 P5_2 TMS TCK HW_RESET TDI P1_6 P12_6 P5_4 P5_6 V3_3 VBAT V5_0 C19 22 pF VDDIO3 Y1 P15_3 1 2 32kHz XTAL C20 22 pF B P15_2 C26 12PF Y2 P15_0 24 MHz Crystal A VBAT R38 ZERO P15_1 EXTERNAL BATTERY CLIP A 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Header 2x16 Vboost R37 NO LOAD C25 0.0 uF C28 1.1 uF D Header Keyed 50mil SMD TP6 RED VDDA CY8C38 Family Processor Module C Shunt Resistor C23 0.1 uF R8 22 Ohms VCCD NC1 NC2 P15_0 P15_1 P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 XRES P5_1 P5_3 P1_2 TDO P1_5 P1_7 P12_7 P5_5 P5_7 VDDIO1 R40 DP DM VDDD ZERO R31 ZERO R9 22 Ohms TP5 RED VDDIO1 Header 2x16 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C22 0. 2011 1 Rev *D Sheet 1 of 1 CY8CKIT-001 PSoC Development Kit Guide.1 uF VDDD NC1 DP DM MHz Crystal Canister J4 NC2 Internal Boost Converter VDDD Ind VDDA VDDIO0 VDDIO1 VDDIO2 VDDIO3 P3_0 P3_2 P3_4 P3_6 P12_0 NC3 NC5 NC7 P3_1 P3_3 P3_5 P3_7 P12_1 NC4 NC6 NC8 R41 VDDIO3 ZERO C27 12PF 3 R6 R7 R14 R15 R16 R17 NO LOAD NO LOAD NO LOAD NO LOAD NO LOAD NO LOAD TP1 RED L1 D1 2 22 uH ZHCS1000TA TP2 BLACK C12 22 uF C9 0.2 uF TP3 RED VDDIO2 P4_6 P4_4 P4_2 P0_6 P0_4 VDDIO0 R42 P0_2 P0_0 P4_0 P12_2 J3 P4_7 P4_5 P4_3 P0_7 P0_5 R32 P0_3 P0_1 P4_1 P12_3 ZERO P15_4 P6_2 P6_0 P2_3 P2_1 VDDD P2_2 P2_0 R39 P2_6 P2_4 P12_4 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 P6_6 P6_4 Header 2x16 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 2 4 6 8 10 C1 10 uF C14 10 uF C5 1. Doc.0 uF J5 Board Specifications and Layout 1 3 5 7 9 C3 1.P2_4 P2_3 P2_2 P2_1 P2_0 P15_5 P15_4 P6_3 P6_2 P6_1 P6_0 VCCD C24 0.1 uF R43 NO LOAD PDCR-9494 REV ** 121R-49400 REV *D Title CY8C38 Family Processor Module Size C Date: 5 4 3 2 Document Number REF-14889 Friday. *E .0 uF C6 1.0 uF C4 1.4 10-pin Programming and Debugger Header CY8C38 FAMILY PROCESSOR MODULE Storage Capacitors Bypass Capacitors VDDIO1 VDDD R34 NO LOAD R35 NO LOAD VDDA VDDIO0 VDDIO1 VDDIO2 VDDIO3 VDDA VDDA VDDD VDDD VDDD VDDIO1 VDDIO1 VDDD R36 ZERO D TP7 RED TMS TCK TDO TDI XRES J2 P6_7 P6_5 P12_5 P2_7 P2_5 VDDIO2 ZERO P15_5 P6_3 P6_1 C11 1.0 uF C17 0.2.1 uF C16 0.1 uF C2 1. # 001-48651 Rev.1 uF R10 NO LOAD CY8C3866AXI-040 C18 2200 pF 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Header 2x16 C P2_5 P2_6 P2_7 P12_4 P12_5 P6_4 P6_5 P6_6 P6_7 P0_3 P0_2 P0_1 P0_0 P4_1 P4_0 P12_3 P12_2 Ind Vboost VBAT VDDA CAPSENSE TUNING CIRCUITRY Default Loaded For CSD TP4 RED C8 1.1 uF C10 22 uF 1 NO LOAD 194 5 4 3 2 1 A.0 uF C7 1.0 uF C15 0.

1 uF R44 0 VDDio2 P2_4 P2_3 P2_2 P2_1 P2_0 P15_5 P15_4 P6_3 P6_2 P6_1 P6_0 VDDd VSSd VCCd P4_7 P4_6 P4_5 P4_4 P4_3 P4_2 P0_7 P0_6 P0_5 P0_4 10-pin Trace Header CAPSENSE TUNING CIRCUITRY Default Loaded For CSD 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Header 2x16 J6 C 1 3 5 7 9 CY8C5588AXI-060 Ind Vboost VBAT 2 4 6 8 10 TR_CLK TR_D0 TR_D1 TR_D2 TR_D3 R45 R46 R47 R48 R49 ZERO ZERO ZERO ZERO ZERO P2_3 P2_4 P2_5 P2_6 P2_7 P2_5 P2_6 P2_7 P12_4 P12_5 P6_4 P6_5 P6_6 P6_7 P0_3 P0_2 P0_1 P0_0 P4_1 P4_0 P12_3 P12_2 C VDDA CY8C55 Family Processor Module Header Keyed 50mil SMD TP4 RED C8 1.0 uF P2_6 P2_4 P2_2 P2_0 VDDD P15_4 P6_2 P6_0 C11 1.1 uF D TP7 RED R36 ZERO J5 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 Header 2x16 1 3 5 7 9 TP10 2 4 6 8 10 TMS TCK TDO TDI XRES 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Header Keyed 50mil SMD Shunt Resistor P15_5 C18 2200 pF P0_6 P0_4 VDDIO0 R42 ZERO VDDIO0 P4_0 P12_2 P0_2 P0_0 C24 0. 2010 4 3 2 1 1.0 uF C7 1.A. 4. *E VDDio1 P1_6 P1_7 P12_6 P12_7 P5_4 P5_5 P5_6 P5_7 P15_6 DP P15_7 DM VDDd VSSd VCCd NC1 NC2 P15_0 MXo P15_1 MXi P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 VDDio3 XRES P5_0 P5_1 P5_2 P5_3 TMS TCK P1_2 TDO TDI P1_5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P2_5 P2_6 P2_7 P12_4 I2C0_SCL P12_5 I2C0_SDA P6_4 P6_5 P6_6 P6_7 VSSb Ind Vboost Vbat VSSd XRES P5_0 P5_1 P5_2 P5_3 P1_0 TMS P1_1 TCK P1_2 P1_3 TDO P1_4 TDI P1_5 nTRST VCCA NC8 NC7 NC6 NC5 NC4 NC3 P15_3 P15_2 P12_1 P12_0 P3_7 P3_6 VDDio0 P0_3 P0_2 P0_1 P0_0 P4_1 P4_0 P12_3 P12_2 VSSd VDDa VSSa VCCa NC8 NC7 NC6 NC5 NC4 NC3 KXi P15_3 KXo P15_2 I2C1_SDA P12_1 I2C1_SCL P12_0 P3_7 P3_6 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 P5_0 P5_2 TMS TCK HW_RESET TDI P1_6 P12_6 P5_4 P5_6 VDDIO1 R40 VDDD ZERO R31 TP5 RED DP DM VDDIO1 V3_3 VBAT V5_0 XRES P5_1 P5_3 P1_2 TDO P1_5 P1_7 P12_7 P5_5 P5_7 kHz Crystal Canister Solder XTAL Case To Ground Plane Directly VDDIO3 VDDD 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 C22 0.0 uF C4 1.0 uF C3 1.0 uF C6 1. Board Layers: 2 Board Thickness: 0. # 001-48651 Rev. April 20. Doc. 2.1 uF VCCD NC1 NC2 P15_0 P15_1 P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 VDDD NC1 J4 NC2 P3_0 P3_2 P3_4 P3_6 P12_0 NC3 NC5 NC7 P3_1 P3_3 P3_5 R41 VDDIO3 P3_7 P12_1 NC4 NC6 NC8 ZERO 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Header 2x16 MHz Crystal Canister Internal Boost Converter VDDD Ind VDDA VDDIO0 VDDIO1 VDDIO2 VDDIO3 C27 NO LOAD 3 R6 R7 R14 R15 R16 R16 R17 NO LOAD NO LOAD NO LOAD NO LOAD NO LOAD TP1 RED L1 D1 2 22 uH ZHCS1000TA TP2 BLACK TP9 BLACK 1 NO LOAD NO LOAD CY8CKIT-001 PSoC Development Kit Guide.1 uF P4_6 P4_4 P4_2 R10 NO LOAD P4_7 P4_5 P4_3 P0_7 P0_5 Keyed Sides Toward Center of Board U1 TP6 RED VDDA 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VDDIO2 R32 P0_3 P0_1 P4_1 P12_3 ZERO TP8 RED C23 0.5 5 4 3 2 1 CY8C55 FAMILY PROCESSOR MODULE Storage Capacitors Bypass Capacitors J2 VDDA P6_6 P6_4 P12_4 C14 10 uF C1 10 uF C5 1.1 uF C16 0.1 uF R43 NO LOAD Layout Considerations/Requirements: PDCR-9546 REV2 121R-54600 REV5 CYPRESS SEMICONDUCTOR © 2010 Title CY8C55 Family Processor Module Size C Date: Document Number REF-15051 Tuesday.0 uF C28 1.5" Impedance matching for USB signals Rev 5 Sheet 1 of 1 Board Specifications and Layout 195 5 .1 uF Y1 P15_3 C20 22 pF B 1 2 32kHz XTAL P15_2 C26 NO LOAD Y2 P15_0 R38 ZERO MHz Crystal NO LOAD A VBAT P15_1 EXTERNAL BATTERY CLIP A Vboost R37 NO LOAD C25 0.2.1 uF VDDD VDDIO0 VDDIO1 VDDIO2 VDDIO3 VDDA VDDA VDDD P6_7 P6_5 P12_5 VDDIO1 VDDIO1 P2_7 P2_5 VDDIO2 R34 NO LOAD ZERO P15_5 P6_3 P6_1 R35 NO LOAD P2_3 P2_1 R39 VDDD VDDD VDDD 10-pin Programming and Debugger Header D VDDIO1 C2 1.0 uF J1 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 P1_6 P1_7 P12_6 P12_7 P5_4 P5_5 P5_6 P5_7 Header 2x16 R8 27 Ohms R9 27 Ohms DP DM ZERO C21 0.1 uF C10 22 uF C12 22 uF C9 0. 3.1 uF B C19 22 pF C29 0.062" Board Size: 2.0 uF TP3 RED VDDIO2 P2_4 P2_3 P2_2 P2_1 P2_0 P15_5 P15_4 P6_3 P6_2 P6_1 P6_0 VCCD P4_7 P4_6 P4_5 P4_4 P4_3 P4_2 P0_7 P0_6 P0_5 P0_4 J3 C17 0.0 uF C15 0.0" x 2.

100 R/A GOLD Sullins Electronics Corp. *E . you can make a boost convertor based design by making the appropriate configurations in the project.Board Specifications and Layout A.8x1.050 SMT Samtec GOLD CONN FMALE 40POS DL .6 Enabling the Boost Component in PSoC 3 and PSoC 5 Processor Modules To enable the boost convertor functionality.J4.10UF 16V CERAMIC X7R 0603 CAP 10UF 16V CERAMIC X5R 1210 CAP . R16.6V 500MW SOD123 ON Semiconductor FUSE RESETTABLE . C28 C12.5A SMA Vishay IR Chicago Miniature LED HI EFF RED CLEAR 1206 SMD Lamp.C30 C2 C4.C26.J8.J14 P1. After making these changes.D6 D7 F1 J1 J2.ECG Panasonic .C23 C24 D1 D2 D3.J11.J7.C21.100 VERT 3M SOLDERLESS BREADBOARD 1.C9. make the following hardware changes on the board.ECG Panasonic . C15. Ensure that R37 and R43 are removed.1mm PCB RA CUI CONN HEADER 6POS . Inc DIODE ZENER 3.ECG EEE-FK1E331P Taiyo Yuden Yageo America Kemet TMK107BJ105KA-T 04022R103K7B20D C0603C104J4RACTU ECJ-4YB1C106K ECJ-2YB1C334K ECJ-2YB1H104K C1608X8R1H333K CMD15-21VGC/TR8 10MQ040NTRPBF CMD15-21VRC/TR8 MMSZ4685T1G MF-USMF010-2 PJ-102A 67996-206HLF 9-146280-0-03 1734035-2 9-146280-0-02 RSM-116-02-S-D-LC PPPC202LJBN-RC PPPC232LJBN-RC 929850-01-06-RA 923273-I Panasonic . Inc DIODE SCHOTTKY 40V 1.33UF 16V CERAMIC X7R 0805 CAP .P8 P6 P9 P11 Description PRINTED CIRCUIT BOARD BATTERY HOLDER 9V Male PC MT BATTERY HOLDER 9V Female PC MT CAP ELECT 10UF 25V VS SMD size B CAP ELECT 330UF 25V FK SMD CAP CERAMIC 1.ECG EEE-1EA100WR Panasonic . A.100 02POS Tyco Electronics STR CONN FMALE 32POS DL .100 R/A GOLD Sullins Electronics Corp. ■ ■ Populate resistors R6.C27.P4 P5.C25 C10 C11.3. and R38 with 0 ohm resistors. R15. # 001-48651 Rev.100 03POS Tyco Electronics/Amp STR CONN USB MINI B SMT RIGHT ANGLE Tyco CONN HEADR BRKWAY . CONN RECT 6POS .P2.C14.D5.ECG TDK Corporation Chicago Miniature LED GREEN CLEAR 1206 SMD Lamp.C16. Doc.C3. The input power supply to the boost convertor must be provided through the Vbat. R14.J12 J9 J10. C22.2.10A 30V HLD SMD Bourns CONN JACK POWER 2. R7.P3. R17.C29 C17 C20.35 3M 196 CY8CKIT-001 PSoC Development Kit Guide.100 STR 15AU FCI CONN HEADR BRKWAY .0UF 25V X5R 0603 10% CAP 10000PF 16V CERAMIC X7R 0402 CAP .J3.1 Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Qty 1 1 1 4 1 2 1 10 2 1 2 1 1 1 4 1 1 1 4 4 1 3 4 3 1 1 1 Bill of Materials CY8CKIT-001 PSoC Development Board Reference PCB BH1 BH2 C1.J5 J6.P7.D4.3 A.C13.1UF 50V CERAMIC X7R 0805 CAP 33nF 50V CERAMIC X8R 0603 Manufacturer Mfr Part Number Cypress Semiconductor PDCR-9461 REV ** Keystone Electronics 593 Keystone Electronics 594 Panasonic . CONN FMALE 46POS DL .

ECG Panasonic .R41.500X.0A 5.R46. TP4.TP19.ECG Panasonic-ECG Yageo Omron APEM Components Keystone Electronics Keystone Electronics Mfr Part Number 929850-01-08-RA 929850-01-12-RA 5747844-4 929850-01-04-RA DF11Z-12DS-2V(20) 929850-01-14-RA 929850-01-17-RA ERJ-3GEYJ102V ERJ-3GEYJ121V 3361P-1-501GLF ERJ-2GEJ104X ERJ-3GEYJ201V ERJ-3GEY0R00V ERJ-3GEYJ101V 91AR10KLF EVN-D8AA03B14 ERJ-3EKF6041V ERJ-3GEYJ204V RC0603FR-07100KL B3F-1022 GH36P010001 5000 5002 51 52 53 54 55 56 57 58 59 60 61 9 1 1 1 1 1 1 1 1 1 5 Keystone Electronics Semtech Diodes Inc 5001 SD05.R47 R17. R42.R44. # 001-48651 Rev.ECG Panasonic .ECG BI Technologies Panasonic .SW 4 SW3 TP1.R25.TP2. R30 R10 R11 R14 R15 R16. LCM-S01602DSR/A RBS-3R CY8CKIT-001 PSoC Development Kit Guide.ECG Panasonic .R36.100 14POS for LCMS01602DSR/A CONN RECT 17POS .TP58 TP30.R34.R37.R24. LTD. R26.TP14 TP18.R19 R20 R31 R32.TP3.TP34.R33. R23.3A ADJ 8MSOP IC SINGLE USB PORT TVS SOT-23-6 IC LINE DRVR/RCVR RS232 16-SOIC IC XLATR 8BIT LV 20-TSSOP IC SOCKET 8PIN MS TIN/TIN . R35.300 IC REG LDO 300mA 3.23 SQUARE Manufacturer 3M 3M AMP Division of TYCO 3M Hirose Electric Co.TP 38.0 VOLT 350 WATT SOD-323 IC REG LDO 1.100 VERT CONN D-SUB RCPT R/A 9POS 30GOLD CONN RECEPT 4POS .SW2.R29. Panasonic .TP 56.ECG Panasonic-ECG Bourns Inc.TP37.100 VERT GOLD CONN RECEPT 12POS 2mm SMD TIN CONN REC .ECG Panasonic . 3M 3M Panasonic .3V SOT89R 5V LCD Module 16POS w/14 pin header installed BUMPER WHITE .TP39 TVS1 U2 U4 U5 U6 U7 U8 U11 NA NA Description CONN RECT 8POS .TP 33.04K OHM 1/10W 1% 0603 SMD RES 200K OHM 1/10W 5% 0603 SMD RES 100K OHM 1/10W 1% 0603 SMD SWITCH TACT 6mm MOM 150GF SWITCH SLIDE MINI SPDT PCMNT SLV TEST POINT 43 HOLE 65 PLATED RED TEST POINT 43 HOLE 65 PLATED WHITE TEST POINT 43 HOLE 65 PLATED BLACK TVS 5.R18.R21. R45.TP35.R43. R38 R39 R48 SW1.R22. TP36. Doc.0V TO-252 IC REG LDO 0.TCT AP1117D50L-13 LP3982IMMNational Semiconductor ADJ/NOPB Texas Instruments SN65220DBV Texas Insturments SN65C3232ED NXP Semiconductors GTL2003PW Mill-Max Manufacturing 110-44-308-41-001000 Diodes Inc AP130-33YRL-13 Lumex Richco Plastics Co.TP32.100 VERT RES 1.0K OHM 1/16W 5% 0603 SMD RES 120 OHM 1/10W 5% 0603 SMD TRIMPOT 500 OHM 6mm SQ SMD RES 100K OHM 1/16W 5% 0402 SMD RES 200 OHM 1/16W 5% 0603 SMD RES ZERO OHM 1/16W 5% 0603 SMD RES 100 OHM 1/16W 5% 0603 SMD 10K OHM THUMBWH CERM ST POT POT 10K CARBON LAYDOWN (103) RES 6.R28.Board Specifications and Layout Item 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Qty 1 1 1 1 1 1 1 10 1 1 1 1 9 2 1 1 7 1 1 3 1 5 4 Reference P12 P14 P15 P16 P17 P18 P19 R1.100 VERT CONN RECT 12POS . *E 197 .

ECG Panasonic .768KDZF-UB 5002 198 CY8CKIT-001 PSoC Development Kit Guide.ECG Keystone Electronics Keystone Electronics PEM Cypress Semiconductor Mfr Part Number PDC-09547 REV ** GRM21BR61C106KE15L C0603C104J4RACTU ECJ-0EC1H101J GRM1885C1H222JA01D HHLHS32GB1 22-23-2051 DF12-5.5PF TEST POINT 43 HOLE 65 PLATED WHITE NA NA NA Zetex Panasonic-ECG Citizen America Corporation Keystone Electronics NA NA NA ZHCS1000TA ELJ-FC2R2KF CFS206 32. 10 5 RES 1.ECG Panasonic .5V-81 ERJ-3GEYJ560V ERJ-3GEYJ102V ERJ-2GE0R00X ERJ-3GEY0R00V 5000 5001 SMTSO-440-8ET CY8C28000-24PVXI 120-09547-0 REV ** Item Qty Reference Description 1 1 PCB PRINTED CIRCUIT BOARD 2 3 4 5 1 2 1 1 C1 C2. 9 4 RES 56 OHM 1/10W 5% 0603 SMD R7 R2.ECG Murata Centronic Precision Electronic Co.J4 GOLD CONN HEADER 5POS 0.TP4 BLACK 15 2 NA SMT Spacer/nut 16 1 U1 IC.J2. 56 PIN SSOP OCD 17 1 LABEL1 PCA # Label No Load Components C12. Doc. Molex Hirose Panasonic .R16.R18 TP1.R49 64 1 R40 Description SHUNT GOLD W/HANDLE.R5. 13 3 TEST POINT 43 HOLE 65 PLATED RED TP5 TEST POINT 43 HOLE 65 PLATED 14 2 TP2.C6 C10 C16 CAP CER 10UF 16V X5R 0805 CAP .TP3.768 kHz CYL 12.R13.0-20DP-0.0K OHM 1/16W 5% 0603 SMD R8.10UF 16V CERAMIC X7R 0603 CAP 100PF 50V CERAMIC 0402 SMD CAP CER 2200PF 50V 5% C0G 0603 CONN MALE 32POS DL .C13.R3.Board Specifications and Layout Item Qty Reference 62 11 NA No Load Components 63 2 R27.050 TH SHRD 6 4 J1.R11 11 1 R9 RES ZERO OHM 1/16W 0402 SMD R10. BLACK RES NO LOAD 0603 SMD RES NO LOAD 0805 SMD Manufacturer Kobiconn NA NA Mfr Part Number 151-8030-E NA NA A.1 VERT 7 1 J5 KEYED 8 1 P1 HDR VERT 20POS HIROSE R1.3.R6.2 CY8C28 Family Processor Module Manufacturer Cypress Semiconductor Murata Electronics North America Kemet Panasonic . CAP NO LOAD 0805 18 3 C14 19 1 C15 CAP 0603 NO LOAD R12. 12 4 RES ZERO OHM 1/16W 5% 0603 SMD R17. 20 4 RES NO LOAD 0603 SMD R14. *E .R15 21 1 D1 DIODE SCHOTTKY 40V 1.ECG Panasonic .2uH 10% 23 24 1 2 Y1 TP6.J3.R4. # 001-48651 Rev.0A SOT23-3 22 1 L1 INDUCTOR FIXED SMD 2.TP7 CRYSTAL 32.

C7.R5. *E 199 . C14 D1 L1 Y1 Centronic Precision Elec.050 TH SHRD GOLD CONN HEADER 5POS 0.1 VERT KEYED RECP VERT 20POS HIROSE RES 56 OHM 1/10W 5% 0603 SMD RES 1.C6. Doc.ECG Panasonic .R4.3 CY8C29 Family Processor Module Description CAP CER 10UF 16V X5R 0805 CAP .C3.ECG 22-23-2051 DF12-5.3.R11 R9 R10.768KDZF-UB tion A. # 001-48651 Rev.ECG Mfr Part Number GRM21BR61C106KE15L C0603C104J4RACTU ECJ-0EC1H101J Item Qty Reference 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 4 1 4 1 1 4 5 1 3 2 1 1 2 1 1 3 1 1 1 C1 C2.J2.0K OHM 1/16W 5% 0603 SMD RES ZERO OHM 1/16W 0402 SMD RES ZERO OHM 1/16W 5% 0603 SMD Manufacturer Murata Electronics North America Kemet Panasonic .3.HHLHS32GB1 tronic Co.C14 Item Qty Reference Murata Electronics North GRM21BR61C106KE15L America Kemet C0603C105K8PACTU C2.5V-81 ERJ-3GEYJ560V ERJ-3GEYJ102V ERJ-2GE0R00X ERJ-3GEY0R00V 5000 5001 CY8C29000-24AXI SMTSO-440-8ET PDCR-9464 REV*A 121R-46400 REV*B NA NA BAT54-7-F ELJ-FC2R2KF TEST POINT 43 HOLE 65 PLATED RED Keystone Electronics TEST POINT 43 HOLE 65 PLATED BLACK PSoC Mixed-Signal Array SMT Spacer/nut PRINTED CIRCUIT BOARD PCA # Label CAP NO LOAD 0805 Keystone Electronics Cypress Semiconductor PEM Cypress Semiconductor No Load Components DIODE SCHOTTKY 30V 200mW SOT23 Diodes Inc INDUCTOR FIXED SMD 2.4 1 2 3 4 5 6 7 1 1 1 1 1 2 7 CY8C38 Family Processor Module Description Schematic Assembly Drawing Fab Drawing Assembly Adhesive Label PCB CAP CER 10UF 16V X5R 0805 Manufacturer N/A N/A N/A N/A Cypress Semiconductor Mfr Part Number REF-14889 REV *D 121R-49400 REV *D N/A 121R-49400 REV *D PDCR-9494 REV ** N/A N/A N/A N/A N/A C1.R12. J4 J5 P1 R1.C3. R13 TP1. Molex Hirose Panasonic .10UF 16V CERAMIC X7R 0603 CAP 100PF 50V CERAMIC 0402 SMD CONN MALE 32POS DL .0UF 10V X5R 0603 C5. CAP CERAMIC 1.0-20DP-0.ECG Panasonic .C13.C4.R3. R7 R2.2uH 10% CRYSTAL 32.ECG Panasonic .5PF Panasonic-ECG Citizen America Corpora.Board Specifications and Layout A. R8.R6.C4.J3.TP3 TP2 U1 NA PCB LABEL1 C12. C6 C10 J1. C28 CY8CKIT-001 PSoC Development Kit Guide.768 kHz CYL 12.CFS206 32.

12 pF.C CAP . Samtec TDK Corporation Panasonic .768KDZF-UB tion Murata Electronics North GRM1885C1H120JA01D America ECS-240-12-5PX-TR NA CRYSTAL.R38.10UF 10V CERAMIC X5R 0402 17.R9 CAP CER 2200PF 50V 5% C0G 0603 CAP CERAMIC 22PF 50V 0603 SMD DIODE SCHOTTKY 40V 1A SOT23 CONN MALE 32POS DL .Board Specifications and Layout 8 9 10 11 2 2 2 7 C8.R4 3 27 5 NA NA 200 CY8CKIT-001 PSoC Development Kit Guide.R RES ZERO OHM 1/16W 5% 0603 SMD 36.C27 Y2 TEST POINT 43 HOLE 65 PLATED BLACK PSoC3 Mixed-Signal Array CRYSTAL 32.10UF 16V CERAMIC X7R 0603 CAP CER 22UF 10V 10% X5R 1210 Kemet Kemet Kemet Kemet C0805C125K8PACTU C0603C104J4RACTU C1210C226K8PACTU C0402C104K8PACTU C15. 50V.C16.C24 C18 C19.CFS206 32.C12 CAP CERAMIC 1.TP3.050 TH SHRD GOLD CONN HEADER 10 PIN 50MIL KEYED SMD INDUCTOR SHIELD PWR 22UH 7032 RES 22 OHM 1/16W 1% 0603 SMD 12 13 14 15 16 17 18 19 1 2 1 4 1 1 2 8 Murata Panasonic .5PF CAP.ECG Zetex GRM1885C1H222JA01D ECJ-1VC1H220J ZHCS1000TA Centronic Precision Elec.C25 C10. 30 ppm.J3. COG.TP7 TP2 U1 Y1 C26.J 4 J5 L1 R8.R41 . SMD ECS Inc. R17 R10. SMD 20 6 Keystone Electronics 5000 21 22 23 24 25 26 1 1 1 2 1 6 Keystone Electronics Cypress Semiconductor 5001 CY8C3866AXI-040 Citizen America Corpora.TP5.R14 RES NO LOAD 0805 SMD .R34.ECG Panasonic .2UF 10V X5R 0805 CAP .R3 9. # 001-48651 Rev.C2 2. CER.J2. 5%.ECG FTSH-105-01-L-DV-K SLF7032T-220MR96-2-PF ERJ-3EKF22R0V ERJ-3GEY0R00V R31.R7. *E .R40.C21.TP 6. NA Do Not Install R6.C23.R15.R16.768 kHz CYL 12.R37.HHLHS32GB1 tronic Co.C20 D1 J1.R42 TP1.T TEST POINT 43 HOLE 65 PLATED RED P4.R RES NO LOAD 0603 SMD 35. 24 MHz.C11 C9. Doc.R32. HC49. 0603.

2200 pF. HDR. 10 V. 5%. RED. 2x5.5PF 20 1 Y1 CFS308 No Load Components 21 2 C26.R48. KEYED. . 2 2 C1. 50V. 10%. CER.TP7. X5R. X5R. CY8C5588AXI-060. C17. 5%. 0603. 0402.C23. 0603.C25 SMD CAP. TEST POINT. 5%.C11 SMD CAP. TP8 18 2 TP2. 10%. 0603.C20 SMD DIODE. COG. 19 1 U1 TQFP-100. 1/8 W. 7032. 1. 1/10 W. 16 V. 12 2 J5. 4 2 C8. 27 Ohms. 20%.C29 CAP. FIXED.R38.5 CY8C55 Family Processor Module Manufacturer Mfr Part Number N/A PDCR-9546 REV ** Murata Electronics North GRM21BR61C106KE15L America Kemet Murata Kemet Kemet C0603C105K8PACTU GRM219R61A105KC01D C0603C104J4RACTU C1210C226K8PACTU Item Qty Reference Description 1 1 N/A PCB CAP. CER. TP4. 10 1 D1 ZHCS1000TA. 17 7 CONN. 10 V. R47. X7R. R49 16 1 R44 RES. 10 V. 64K. 5%.C3. PSoC5.J6 SMD IND. 0. 3 7 C5. 6 2 C10. CER.1 uF.R40. CER. 22 uF. Doc.C14 SMD C2. SCHOTTKY. R39. 16 V. 1. CAP. SMD J1. 10%.0 uF. CER. Digilent TDK Corporation Panasonic . 16 V. 0. HDR.C27 CAP NO LOAD 0603 SMD Kemet C0402C104K4RACTU Murata Panasonic . 0. SMD CAP. R36.ECG 161-026 SLF7032T-220MR96-2-PF ERJ-3GEYJ270V Panasonic .Board Specifications and Layout A. BLACK. 0. 5%. 5%.ECG Keystone Electronics Keystone Electronics Cypress Semiconductor ERJ-6GEY0R00V 5000 5001 CY8C5588AXI-060 ES1 Citizen America CorporaCFS206 32.C6. X5R.C7. 40 V. 7 8 C22. 10%.R46. GOLD. TEST POINT. 0. 0603. CER.C16. 10 uF. 2x16.TP3. X7R.ECG Zetex GRM1885C1H222JA01D ECJ-1VC1H220J ZHCS1000TA Centronic Precision ElecHHLHS32GB1 tronic Co. X5R. TH J4 CONN.R42. SMD R31. # 001-48651 Rev. RES ZERO OHM 1/10W 5% 0603 SMD R45.C4.3. 22 pF. CER. *E 201 . 50V. SMD C24.0 uF. 5 2 C9. COG. 11 4 CONN.C21. SOT-23.05".ECG ERJ-3GEY0R00V Panasonic . 1 A. 1210. SMD C28 CAP.050". CAP. TH IC.R9 RES. Gold. SMD CRYSTAL 32.J2. 13 1 L1 SMD 14 2 R8. 0805.R32.TP9 CONN.J3. 0805.768KDZF-UB tion NA NA CY8CKIT-001 PSoC Development Kit Guide.0 Ohms.960 A.768 KHZ CYL 12. TH TP6.1 uF. 15 13 R41.TP5. CER.C12 SMD C15. 9 2 C19. 8 1 C18 0603. SMD TP1. 0805. 22 uH.

R37.R34. 23 5 R35. HC49. RES NO LOAD 0805 SMD R17 R10. RES NO LOAD 0603 SMD R43 TEST POINT 43 HOLE 65 PLATED 24 1 TP10 WHITE 25 1 Y2 CRYSTAL.Board Specifications and Layout Item Qty Reference Description R6.R7. 24 MHz. 30 ppm. SMD Manufacturer NA NA Mfr Part Number NA NA ECS Inc.R15.R14 22 6 . *E . NA NA ECS-240-12-5PX-TR 202 CY8CKIT-001 PSoC Development Kit Guide. # 001-48651 Rev. Doc.R16.

VTARG would need to be wired to VDDD.9 10 4 2 6 8 JTAG ** Vtarg GND TRST TCK TMS TDO TDI SCK SDIO SWD Vtarg GND SWV Vtarg GND SWO ISSP Vtarg GND XRES SCLK SDAT I2C Vtarg GND INT SCLK SDAT Notes: * The 5. Upper Right . # 001-48651 Rev. a configuration error has occurred and MiniProg3 must be disconnected from the USB port and reconnected.5. This is due to the way the CY8C38 family module is designed. Doc.Busy: A red LED that lights when an operation (such as programming or debug) is in progress.7. ■ ■ ■ ■ B. B. Note that it does not light when target power is detected but not being supplied by MiniProg3.Target Power: A red LED that lights to indicate that the MiniProg3 is supplying power to the target connectors.2 Programming in Power Cycle Mode You should not perform power cycle mode programming with PSoC Programmer on the CY8CKIT-001.Appendix B.Aux: A yellow LED reserved for future use. VTARG of the MiniProg3 is wired exclusively to VDDIO1 of the chip on the module.Status: A green LED that lights when the device is enumerated on the USB bus and flashes when the MiniProg3 receives USB traffic. In order for power cycle programming to work. Lower Right . If this LED lights solid. Middle .3 Interface Pin Assignment Table 5-Pin # * 1 2 3 4 5 10-Pin # * 1 3. It flashes briefly during the initial configuration of the device.1 MiniProg3 LEDs MiniProg3 provides five indicator LEDs: ■ Upper Left .and 10-pin connectors are NOT connected together on the I/O pins ** JTAG is supported only on the 10-pin connector *** Future upgrades may be possible to support these modes CY8CKIT-001 PSoC Development Kit Guide. MiniProg3 B. Lower Left .No Label: A yellow LED that indicates the configuration state of the device. *E 203 .

4 Protection Circuitry The Vtarg and I/O pins of the two interface connectors are protected from ESD events and momentary short circuits by a group of TVS (Transient Voltage Suppressor) diodes.5 Level Translation The design provides level translators that interfaces with any I/O voltage in the range of 1. Each I/O pin is similarly protected by a 5V. There are actually two different level translators used in the design. B. 204 CY8CKIT-001 PSoC Development Kit Guide. These diodes provide a 15 KV ESD event protection for each pin. # 001-48651 Rev.2V to 5.MiniProg3 B. Doc. The Vtarg pins are protected by a shared. and will clamp the pin levels to a safe voltage in the event of a short circuit. *E .5V without damage and function properly. 30W device. 5V clamp device capable of shunting 350W of transient power.

Table C-1 lists the protocols that are supported by each connector. The device side communication protocol can be one of several standards.MiniProg3 Technical Description The MiniProg3 is a protocol translation device. # 001-48651 Rev.Appendix C. In addition. CY8CKIT-001 PSoC Development Kit Guide. Connectors / Communication Protocol Support Connector 5-pin 10-pin ISSP Supported N/A N/A Supported JTAG SWD and SWVa SWD SWD and SWV N/A I2C Supported a. Doc. This is shown in Figure C-1. SWV trace is only available with SWD debugging. System Block Diagram PC USB Cable MiniProg3 10-pin Ribbon Cable or 5pin Direct Connection Target Board Table C-1. at one of four voltage levels. Figure C-1. It enables PC host software to communicate through high speed USB to the target device to be programmed or debugged. and can occur over either of two connectors.5V to 5. *E 205 . MiniProg3 can provide power to a simple target board. MiniProg3 enables communication with target devices using IO voltage levels from 1.5V.

which offers the same programming and debug functions as JTAG. Doc. through the 10-pin connector and in conjunction with SWD only. MiniProg3 supports programming and debugging PSoC 3/ PSoC 5 devices using JTAG. refer to the PSoC 3/ PSoC 5 Technical Reference Manual. C. SWD. SWD uses fewer pins of the device than the JTAG standard uses.4 I2C™ A common serial interface standard is the Inter-IC Communication (I2C) standard by Philips. For example.2 JTAG The Joint Test Action Group (JTAG) standard interface is supported by many high end microcontrollers. through the 10-pin connector only. and I2C interfaces. 206 CY8CKIT-001 PSoC Development Kit Guide. this feature may be used to tune CapSense designs. The Single Wire Viewer (SWV) interface. The PSoC 3/ PSoC 5 family implements this standard. including the PSoC 3/ PSoC 5 families. except the boundary scan and daisy chain. C. refer to the PSoC 1 Technical Reference Manual. MiniProg3 supports programming and debugging PSoC 3/ PSoC 5 devices. using SWD.MiniProg3 Technical Description C. C.1. also introduced by ARM. using a single pin. refer to the PSoC1 Technical Reference Manual.1. # 001-48651 Rev. SWV.1 Interfaces ISSP In-System Serial Programming (ISSP) is a Cypress legacy interface used to program the PSoC1 family of microcontrollers. but can also be used for intersystem communications. MiniProg3 supports programming PSoC1 devices through the 5-pin connector only. This interface allows a daisy chain bus of multiple JTAG devices.1 C. For more information about the ISSP interface.3 SWD/SWV Recent ARM based devices have introduced a new serial debugging standard called Serial Wire Debug (SWD). through the 5-pin or 10-pin connector. MiniProg3 supports monitoring of PSoC 3/ PSoC 5 firmware. is used for program and data monitoring. where the firmware may output data in a method similar to 'printf' debugging on PCs.1. For more information on PSoC 1 interfaces.1. *E . It is mainly used for communication between microcontrollers and other ICs on the same board. MiniProg3 implements an I2C multimaster host controller that allows the tool to exchange data with I2C enabled devices on the target board. For more information on the PSoC 3/ PSoC 5 JTAG. using SWV.

Doc. The signal assignment is shown in this figure.2 Connectors Warning: It is recommended that a keyed 10-pin or 5-pin connector be used on target board applications as programmer/debugger headers for the MiniProg3.1 5-Pin Connector The 5-pin connector is configured as a single row with 100 mil pitch. The signal assignment is shown in this figure. Figure C-2. plugging the MiniProg3 into a programming/ debugger header backwards could potentially damage the MiniProg3.MiniProg3 Technical Description C.2 10-Pin Connector The 10-pin connector is configured as a dual row with 50 mil pitch. # 001-48651 Rev.2. CY8CKIT-001 PSoC Development Kit Guide. *E 207 . C. Therefore. The I/O's of the MiniProg3 have very limited series protection against over current.2. It is designed to mate with a Molex model 22-23-2051 (straight) or 22-05-3051 (right angle) male header. The recommended mating connectors are the Samtec FTSH-105-01-L-DV-K (surface mount) and the FTSH-105-01-L-D-K (through hole) or similar available from other vendors. 5-Pin Connector with Pin Assignments SDAT SCLK XRES GND VTARG MiniProg3 (End View) Mating Connector C. It is used with a ribbon cable (provided) to mate to a similar connector on the target board. with key tab.

10-Pin Connector with Pin Assignments nTRST GND TDI GND TDO GND TCK GND TMS VTARG Note: The ribbon cable connector extends beyond the body of the connector. *E . # 001-48651 Rev. Be sure to allow room. Pin 1 208 CY8CKIT-001 PSoC Development Kit Guide.MiniProg3 Technical Description Figure C-3. Doc.

For PSoC 3/ PSoC 5. This supply is limited to approximately 200 mA.3V.5V.8V. or connecting it to the wrong supply results in MiniProg3 being unable to communicate with the target device. 3. # 001-48651 Rev. This is required regardless of the communication protocol and the port selected. or 5V. The power supply voltage can be selected from one of 1. On boards where there is a single power supply for the entire board. *E 209 . Failing to connect VTARG.3 Power MiniProg3 requires a connection to the Vddio supply of the target device to set the voltage level used for communication. and is protected against excess current draw. because this is the supply used to drive the debug pins.MiniProg3 Technical Description Here is a summary of the protocols and related pin assignments. in some cases. Table Appendix C-2. this is the Vddio1 supply. The 5V supply may be as low as 4. as it is supplied directly from the USB port. 2. supply power to the board.5V. C. Doc. Communication Protocol Pin Assignments Protocol ISSP Signal SCLK SDAT XRES TMS TCK JTAG TDO TDI XRES SDIO SCK SWD / SWV SWV SCK SDA a 5-Pin 4 5 3 10-Pin 2 4 6 8 10 5 4 2 4 6 3 4 5 10 XRES I2C a. CY8CKIT-001 PSoC Development Kit Guide. SWV trace is only available in conjunction with SWD debugging.25V or as high as 5. the MiniProg3 can. One of the connectors' VTARG pins must be connected to the Vddio supply of the target device.

MiniProg3 Technical Description 210 CY8CKIT-001 PSoC Development Kit Guide. Doc. # 001-48651 Rev. *E .

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