VLSILEC Chapter 1

1oI1
Overview of IC Design

Why VLSI?
• Lower Parasitics ÷ higher speed
• Lower Power ÷ portability
• Smaller Size÷ lower cost

Moore Law:



VLSILEC Chapter 1
2oI2

IC Design Challenges
• Multiple Level oI Abstraction
• Multiple and ConIlicting Costs
• Design Time

Basic Considerations in IC Design
• Chip Size (Cost)
• Operating Speed (Value)
• Power Consumption (Energy EIIiciency)
• Process Technology
• ManuIacturability (material science issue)
• Testability
• Reliability
• Time to Market. Time to proIit
• Constraints in Design

IC Design Approach
• Full Custom (more identiIiable with Back End. see IC
design steps below )
• Semi Custom (Library Based Implementation: Standard
Cell Based or Gate Array Based)

Levels of Abstraction:
-SpeciIication : Function. cost. etc
- Architecture: large blocks
- Logic Design : gates. registers
-Circuit Design : Transistor sizes etc
-Layout: parasitics

IC Design Steps
Phvsical Implementation: Back End Design
-Layouting
-Floorplanning
-Placement
-Routing
-Post-Layout Simulation
- Static Timing Analysis
-ECO (changing oI specs due to limitation)
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3oI3
-Layout VeriIication
-DRC (Design Rule Check)
-ERC (Electrical Rule Check)
-LVS (layout vs schematic)
-Antenna. Metal Density (Antenna eIIect. metal current
density)

While Iull custom design oIIers a serious challenge. it is
however very time consuming

Dealing with Complexity

Divide and Conquer-limit the number oI components you
deal with at any one time


Group several components into larger components:
-transistors Iorm gates;
-gates Iorm Iunctional units
-Iunctional units Iorm processing elements




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Top Down vs Bottom-up Design

Top Down design adds Iunctional details- creates lower levels oI
abstraction Irom upper levels

Bottom-up design creates abstraction Irom low level behavior



Modern VLSI Design

A Iaster method oI designing IC makes use oI the semi-custom
approach







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Good design needs both top down and bottom up eIIort.

Design Tools:

Schematic vs HDL(Hardware Description Language)


Design Process/Design Abstractions






Logic Design
Physical Design
Chip or Board
Fabrication
Flow Graph.
pseudocode
Bus and Register
Structure
Gate Wirelist.
Netlist
Transistor List.
Layout
Design Idea
Behavioral Design
RTL Design

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