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# Solution of Homework problems in Chapter 11.

Chapter 11, Solution 3. Known quantities: The threshold voltage, VT = 2 V, of an enhancement-type NMOS that has its source grounded and a 3 V DC source connected to the gate. Find: The operating state if: a) v D = 0.5 V . b) v D = 1 V . c) v D = 5 V Analysis:
v DS = v D = 0.5 V v DS < vGS − VT

a) vGS − VT = 3 − 2 = 1 V The transistor is in the triode region.
v DS = v D = 1 V

b) vGS − VT = 3 − 2 = 1 V
v DS = vGS − VT

The transistor is either in the triode or in the saturation region.
v DS = v D = 5 V

c) vGS − VT = 3 − 2 = 1 V
v DS > vGS − VT

The transistor is in the saturation region.

Chapter 11, Solution 9. Known quantities: The threshold voltage, VT = 1.5 V, of the NMOS A transistor shown in Figure P11.9. k =0.4 m /V 2 . Find: The voltage levels of the pulse signal at the drain output, if vG is a pulse with 0 V to 5 V. Analysis: 1) Since VT = 1.5 V, with vG = 0 V, vGS < VT, the transistor is cut off. Therefore, vD = 5 V.

5 A 3 ] 19 m Chapter 11. 1 3 ( 1 .8 VDS – 0.11. Find: a) RD b) The largest allowable value of RD for the MOSFET to remain in the saturation region. the transistor is working in the triode region.VT)2 = 0. Therefore.4. VDS is 1.5)2 = 4. Solution 11.58 V when VG = 5V. iD[mA] = k[2(VGS – VT)VDS – VDS2]=0.1.58V .25. Analysis: VGS − + VGD iD VSD .(2) 1 2 From Eq. Thus. 0. Known quantities: In the circuit shown in Figure P11.) 0 -0 ) . the MOSFET operates in the active region. We can compute the drain current to be: i = 2 G − Tv − D v )S 2 D K (S V D v S =0 × .1 V < VGS – VT = 5 − 1.2) When vG = 5 V. D 0< S S T 4 therefore the transistor is in the ohmic region.5) VDS – VDS2]=2. the transistor turns on since VG > VT.5 V for triode region. so VDS = 7. vD = 5 . v =1v − = V . Solution 10. Since VD = 0.8VDS + 5 = 0 . Analysis: In the circuit of Figure P11. 2 5 0 1 ×1 1 [ ] [ =. Known quantities: Circuit shown in Figure 11.4 (5 . Chapter 11. Assume that the transistor is in the saturation region: iD = k (vGS .10.92 V or 1.9× 1 = 0.9 mA.1 V.4 VDS − 3. (. Since VDS < VGS – VT = 3.4[2(5-1.5 = 3. Find: Find the current iD . GV1 .4VDS2 : Eq (1) 5 − VDS = iD (mA )  iD = 5-VDS : Eq. it is contradictory to the assumption.10. (1) & (2).5.

and the region of operation of the MOSFET. so VGS = 0 V or -2V. Solution 13. and by noticing that VGS = VGG = 7 V .13(a). Saturation region operation would be maintained when VD exceeds VG by |VT| (or VGD = VGS – VDS ≥ VT). RD. D5 G 7V=V = G V D 0 R Ω Find: The current iDQ the voltage vDSQ. − 2V=VG – VS).5 = 0. VG = VGD +iDRD. Thus. and the circuit in Figure P11. VG – iDRD ≥ VT  RD ≤ (VG – VT)/ iD RD can be found to be V − VT 8 − (−1) RD ≤ G ≤ = 18kΩ iD 0. Since the source is at 10 V. . the gate voltage must be 8 V (VGS = VG – VS.5 simply from (a). Da x Alternatively.max = 18 kΩ Chapter 11. VGS ≤ VT and VGD = VGS – VDS ≥ VT. RD = VD/ID= 3V/5mV= 600 Ω (b) Since the transistor is in the saturation region and iD = 0.13(b): V = .8 A.2 D −0 v S R D R D By superimposing the load line on Figure P11.13(a). VGD = VG – iDRD where VGD ≥ VT. For p-channel MOSFET in the saturation region.5mA 0 . we obtain i DQ = 0.(a) Since VD = 3V & ID = 5mA. R m = D a = 8k . Analysis: The operating point can be determined using the load line method. VD max = 8 + 1 = 9 V Vm x 1 Ω Therefore. Known quantities: The i-v characteristic of Figure P11. vGS = −2 V only :  vGS < VT = −1 . we have iD = K ( vGS − VT ) 2 0. Q point VD v S iD= D − D =2 .5( vGS + 1) 2 .5 mA . v DSQ = 6 V The MOSFET is in the saturation region. D 1 .

T 3 R 5 K m2 0V G 7 V = V= .13(b): V = . 5− . We can write the equations VGG = vGSQ + RS iDQ =18 : VDD = ( RD + RS )iDQ + vDSQ = RDiDQ +18 − vGSQ + vDSQ = 36 ⇒RDiDQ + vDSQ =18 + vGSQ : Eq ( 2) Assuming saturation conditions. the current iD can be written as . 1 Q 0 ⋅ 86 v =S−S=V T hypothesis was correct V D v v 9> ⇒ G D G Chapter 11. Solution 15. Solution 14. and the region of operation of the MOSFET. VGG = R2 VDD = 18 V R1 + R2 eq (1). D 2 .9 in the text: V= V= . = A Find: The current iDQ the voltage vDSQ. 1 2 M= m == . D Ω 5/ G V D 0 V V = .Chapter 11.T 4 R 1Ω D 6 V V= Find: The current iDQ. Known quantities: The circuit in Figure 11. Analysis: Assuming that the MOSFET is in the saturation region. D kRR 2Ω 0A2 0 . Analysis: Using Thevenin equivalent. the resistance RS. the voltage vDSQ. K. and the operating region of the MOSFET. / 1 V D 3 . Known quantities: The circuit in Figure P11. the quiescent drain current is 2 i =(S − ) =073 =8 v 0 ( ) 0A . D KQ V Q G T 2 The drain-to-source voltage is Since v = − i = −0= V D V R S Q D D D D 2 5.

36+10) × 2.2 VDSQ = 1. RS ≤ ~ 6.2+VDSQ + 5× 2. & VDSQ with which the transistor is in the saturation region. so iDQ ≤ 2. So. iDQ = 2.2× 10-3 A. RDiDQ – 18 ≤ 4  10× 103× iDQ ≤ 22. iDQ ≤ 2. 18 – RSiDQ ≥ 4  RSiDQ ≤ 14.5 V. Remark: The other solution of the algebraic equation is not acceptable because < VT. VGSQ = 5 V. iDQ.5 – 4 = 2. From eq.5V. . 18 – RSiDQ ≥ 4  RSiDQ ≤ 14.3= 6.5V.36 kΩ . RDiDQ – 18 ≥ 4  10× 103× iDQ ≥ 22.1 ⋅ 10 −3 ( 5 − 4 ) and the drain current iDQ = K (vGSQ −VT ) 2 = 0. and VDSQ > 0.1 mA Suppose that it is in the triode region. KVL in SD circuit : 36V = 10× 2.3 mA. The resistance RS is given by 18 − vGSQ 18 − 5 RS = = = 130 kΩ 2 2 K ( vGSQ − VT ) 0. VGSQ ≥ VT & VGDQ = VGSQ – VDSQ ≥ VT From eq.(1).iDQ = K (vGSQ −VT ) 2 ⇒vGSQ + RS K (vGSQ −VT ) 2 =18 and RD K (vGSQ −VT ) 2 + vDSQ =18 + vGSQ Notice that the problem has more unknown than equations. RS ≥ ~ 6. VGSQ ≥ VT & VGDQ = VGSQ-VDSQ ≤ VT From eq. Then. VDSQ = VDD – (RS+RD)iDQ ≥ 36 – (6. Suppose that the transistor is in the saturation region. VDSQ > 0 for the saturation region. From eq. so iDQ ≥ 2.(2). Then. Thus.2V Since VGSQ > 4 V.36 kΩ .2× 10-3 A. iDQ ≤ 2.2 = ~ − 32.(2). VGSQ = 18 – 5× 2.2× 10-3 A Thus. since VDD = (RS+RD)iDQ+VDSQ.36 kΩ & VDSQ ≥ 0 but VDSQ ≤ VGSQ – VT One solution is as follows: RS = 5 kΩ .(1).2× 10-3 A Thus.4 V. RS ≥ ~ 6. meaning that there are many solution of RS. Then. VDSQ ≤ VGSQ – VT = 6. One solution: we can impose the vDSQ to ensure saturation conditions as v DSQ = VDD / 2 =18 V ⇒ 2 5(vGSQ −VT ) 2 = vGSQ ⇒5vGSQ − 41vGSQ + 80 = 0 ⇒ vGSQ = 5 V or 3.

Analysis: Using Thevenin. It follows i DQ = 6 − vGSQ RS = 0.17. and the voltage vGSQ. RS = R D =10 kΩ R1 = R2 = 2 MΩ K =1 m /V 2 . A Find: The current iDQ. Known quantities: The power MOSFET circuit shown in Figure P11. b) If RL =1 Ω . v DSQ =12 − 2 RD i DQ = 3.VT =1 V. so v <⇒ >G 3 G 3 V V D D . . Known quantities: The circuit in Figure 11. Solution 17. V DD = ( R D + RS )i DQ + v DSQ = 2 R D i DQ + v DSQ = 12 Assuming saturation conditions. Analysis: − The MOSFET should be working in the saturation region.32 V Chapter 11. the voltage vDSQ.9: VDD =12 V.434 mA .66 V The other solution is not acceptable because less then VT. find the range of RL for which the VCCS will operate. Find: a) If VG = 5 V . VGG = R2 VDD = 6 V R1 + R2 We can write the equations VGG = vGSQ + RS i DQ = 6. the current iD can be written as 2 i DQ = K (vGSQ −VT ) 2 ⇒ vGSQ + RS K (vGSQ −VT ) 2 = 6 ⇒10 vGSQ −19 vGSQ + 4 = 0 ⇒ vGSQ = 1. Solution 16.Chapter 11. determine the range of VG for which the VCCS will operate.

485 A Since VD = 12 − RL I D > VG − 3 > 0 .002 ( 49 + 0.5( 5 − 3) 2 = 6 A so 1 0 V = RI > G 3 2 R < Ω 2− LD V − = ⇒ D 1 L 6 VD = 12 − RL I D > VG − 3 b) I D = K ( vGS − VT ) = K (VG − VT ) = K (VG − 3) 2 2 2 L 2 Solve the above two equations.515 V (12 − R I D ) > (VG − 3 ) > 0 ⇒ (12 − RL I D ) > (VG − 3 ) = 2 Chapter 11. Known quantities: The Class A amplifier shown in Figure P11. e) Determine the voltage gain of the cos (500 t ) signal.002 49 + 1. Solution 19.19 Find: c) Determine the output current for the given biased audio tone input.576 W PMOSFET = iD _ DC × vDS = iD _ DC × VDD − iD _ DC × R = 0.4 cos ( 500 t ) + 0. we can have 1 ID K 2 I D − 24. Let K =2 m /V 2 and VT = 3 V .005 ) V out c) gain = V G iD = K ( vGS − VT ) 2 = 0. iD _ DC = 0. I D > 15 . Analysis: a) The MOSFET should be working at the saturation region So = 0.1 cos ( 500 t ) V .667 I D + 144 > 0 .68 0.1 cos ( 500 t ) − 3) 2 = 0.098 A PR = iD _ DC 2 × R = 0.002 ( 49 + 1.002 (10 + 0.a) VG = 5 V . VG = 10 + 0. the second one is reasonable. so 3 < VG < 15 − I D = 5. f) Determine the DC power consumption of the resistor and the MOSFET. I D = K ( vGS − VT ) 2 = 1.18 A or I D < 9. A d) Determine the output voltage.4 cos ( 500 t ) + 0.4 = −1.098 × (15 − 0.894 W ( ) .4 cos ( 500 t ) + 0.005 cos (1000 t ) + 0.1 d) We can ignore the cosine part signal when calculating the DC power consumption.005 ) = 0.002 ( 49 + 1.005 cos (1000 t ) + 0.01 cos 2 ( 500 t ) ( ) V = ω=500 − 60 ×0. Thus.098 × 60) = 0.005 ) A b) Vout = VDD − iD R = 15 − 60 × 0.002 ×1.

75 W ( ) Chapter 11.25 + 0. 1 d) We can ignore the cosine part signal when calculating the DC power consumption. d) Determine the DC power consumption of the resistor and the MOSFET. Analysis: The MOSFET should be working at the saturation region. b) Determine the output voltage.Chapter 11. VG = 9 + 0. .24. Known quantities: The source-follower amplifier shown in Figure P11.25 × (12 − 5) = 8. K =30 m /V 2 and A VT = 4 V Find: a) Determine the load current I L . iD _ DC = 1. Solution 20.1 cos ( 500 t ) V . So the Vout = VS = vGS −VT = 5 + 0.1cos ( 500 t ) V 5 + 0. Known quantities: A “push-pull amplifier” can be constructed from matched n-and-p-channel MOSFETs. Find: Determine VL and I L . c) Determine the voltage gain of the cos (500 t ) signal.25 A PR = iD _ DC 2 × R = 6. shown in Figure P11. Solution 24.025 cos ( 500 t ) a) I L = out = R 4 out c) gain = V G V = ω =500 0.20. 1 =1 0.25 W PMOSFET = iD _ DC × v DS = iD _ DC × VDD − iD _ DC × R = 1.1 cos ( 500 t ) = 1.

36 − 2.25 A and VL = R × I L = 0.1 cos ( 750 t ) V I L for Analysis: Assume the drain current in the MOSFET in the left hand side is iD1 and in the right hand side i D 2 .2 cos ( 750 t ) A I L = iD 2 = 2. If we ignore the harmonics larger than 1st order. the first solution is reasonable.36 V b) iD1 = K ( vGS 1 − VT ) 2 = K (VG1 − VT ) 2 = 4 A VG 2 = VD1 = VDD − R × iD1 = 12 − 2 × 4 = 4 V iD 2 = K ( vGS 2 − VT ) 2 = K (VG 2 − R × iD 2 − VT ) 2 Solve it and we can have i D 2 = 0. until it reaches VL =Vin .31 cos ( 750 t ) A VG 2 = 10 + 0.68 − 1. we can approximately have the following solution iD1 = 1 − 0.62 cos ( 750 t ) V . I L = RL Chapter 11.68 or 4. Correspondingly. a) iD1 = K ( vGS 1 − VT ) 2 = K (VG1 − VT ) 2 = 1 A VG 2 = VD1 = VDD − R × iD1 = 12 − 2 ×1 = 10 V iD 2 = K ( vGS 2 − VT ) 2 = K (VG 2 − R × iD 2 − VT ) 2 Solve it and we can have iD 2 = 2.4 cos ( 750 t ) V VL = 5. the output of the operational amplifier is negative infinity. so both MOSFETs will work in the triode region and the VL will increase. until it reaches VL =Vin . If VL >Vin . so both two MOSFET will work in cutoff region. the first solution is reasonable. and the VL will increase. so I L = iD 2 = 0. Obviously.5 V a) Basically. Solution 26. so VL =Vin . both MOSFET are working in saturation region. Find: a) Determine the VL and I L for VG = 4 V b) Determine the VL and I L for VG = 5 V VL c) Determine the and VG = 4 + 0. the signal in c) part is a comparably small cosine signal superposed by the signal the in a) part.Analysis: If VL <Vin . So VL =Vin is VL = 2VL the only equilibrium in the system.57 A Obviously. the output of the operational amplifier is positive infinity. so I L = iD 2 = 2.26. Known quantities: The two-stage amplifier shown in the circuit of Figure P11.25 or 1 A Obviously.68 A and VL = R × I L = 5.