IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 18, NO.

1, FEBRUARY 2003

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Power Conditioner Control and Protection for Distributed Generators and Storage
C. J. Hatziadoniu, Member, IEEE, E. N. Nikolov, Student Member, IEEE, and F. Pourboghrat, Member, IEEE
Abstract—This paper describes an integrated control and protection scheme for the power conditioner used by the medium rating grid-connected distributed generators and storage devices. The proposed control scheme consists of two loops: a steady-state loop that achieves optimum harmonic output by selective elimination of low-order harmonics and a transient loop based on space vector methods that enhances the transient response of the generator and provides overcurrent protection and fault rejection. The paper presents simulation studies of a grid-connected storage device equipped with a controller based on the proposed scheme. The results of these studies demonstrate the robustness of the controller to varying line conditions and disturbances. Index Terms—Distributed generation and storage, forced-commutated inverters, space vector control.

I. INTRODUCTION ORCED-COMMUTATED inverters based on the GTO have benefited the transmission system in several applications including HVDC and FACTS [1]. In recent years, this technology is increasingly being used to provide the grid interface and the power conditioning for certain distributed generators and energy storage systems (DSG) [1]–[5]. The inverter is responsible for a significant part of the cost of grid-connected fuel cell and photovoltaic generators as well as battery storage systems and, thus, determines their economic viability [2]. The generator must meet the criteria of power quality and reliability without excessive size and cost for its inverter-based interface [2]. Operation in varying line conditions subjects the inverter and the respective generator to a number of disturbances including faults, system resonance, transient, and temporary overvoltage, and interactions with adjacent apparatus. Some of these problems can become pronounced in transient system operations such as startup and fault recovery. In order to mitigate these and other adverse conditions and maintain small size, an inverter-based interface or power conditioner must be designed to operate at high switching frequency [1], [3]. Currently, this is possible with advanced semiconductors, such as the IGBT, which have ratings suitable for the distribution network and considerably lower switching losses than the GTO [3]. As a result, high-frequency inverters can provide precise and instantaneous output control [3]–[5], [7]. If this capability is properly used, a flexible hierarchical controller can be designed for a number of applications which achieves the desired operating objectives and simultaneously is capable of
Manuscript received August 5, 2002. The authors are with the Department of Electrical and Computer Engineering, Southern Illinois University, Carbondale, IL 62901-6603 USA (e-mail: hatz@siu.edu). Digital Object Identifier 10.1109/TPWRS.2002.807054

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mitigating disturbances, minimizing the size of the magnetic interface, increasing harmonic performance as well as bolstering equipment protection [3], [4], [8]. This paper presents an integrated control and protection scheme for the grid-connected forced-commutated inverter. The proposed method uses the switching capability of modern power semiconductors to enhance the inverter performance in applications of distributed generation and storage. The proposed design is based on the space vector technique [5]–[7]. This provides a flexible framework for obtaining optimum harmonic output at steady state as well as overcurrent protection and fault rejection. The proposed design is suitable for two-level inverters of medium rating. The major advantage versus other developments is that the proposed method can apply to single-pole configurations. Therefore, it does not increase the size and complexity of the inverter in order to increase its effective switching frequency [1], [9]. Simulation studies of a distributed storage generator based on the proposed design are presented in the paper for the purpose of demonstrating the effectiveness of the method in improving system performance. II. PROPOSED INVERTER CONTROL A. System Representation Fig. 1 shows an appropriately reduced representation of an IGBT-forced commutated inverter. The inverter is supplied by a dc source and is interconnected to the ac system through the line and transformer impedance. The inverter can operate at all four quadrants of the – plane by directly controlling the real and reactive components of its line current. This can be optimally achieved employing a constant current control scheme (CCC) [1], [5], [7]. According to CCC, the instantaneous value of the , is forced by inverter line current, proper switching of its valves to follow a desired reference . Operation in CCC can benefit the medium waveform, size inverters in these aspects [5], [7]: Better approximation to the sinusoidal waveform; no startup transients; no dc or zero sequence current; flexible real- and reactive-power control; immunity to unbalances and to dc or ac harmonics; and inherent overcurrent protection. Application of CCC to distribution grade inverters requires high switching frequency, typically above 5 kHz [5], [7] in order to obtain sufficient reduction of low-order harmonics at steady state. IGBT devices can yield high power ratings at switching frequencies of approximately 1 to 2 kHz [3]. Therefore, it may be necessary to use multiple inverter poles coupled by a magnetic interface [1], which increases the inverter size. In order

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Fig. 1. Representation of a grid-connected IGBT inverter.

to mitigate this problem, the following design approach is proposed. With reference to Fig. 1, the system state equations are (1) that will force the inThe instantaneous inverter voltage to exactly track the reference stantaneous line current is found by direct substitution into (1) (2) A difficulty is associated with the calculation of the tracking from (2) due to model parameter uncertainty. Thus, voltage resulting from the actual the current error is inverter voltage (3) Two advanced methods exist for driving the current error in (3) to zero [6], [7]. B. Optimum Current Regulation [6] This is an indirect approach based on Lyapunov methods. Transforming (3) to a local synchronously rotating frame of reference, and eliminating the zero sequence component, we obtain (4), where is the electrical angular frequency

Fig. 2. Space vector representation of the inverter voltage [7].

with this method to use the maximum switching capability of the inverter and eliminate low-order harmonics at steady state. Model accuracy and the discrete nature of the inverter limit the transient performance of this controller. Typically, the performance improves with higher controller gains in (6). This, however, increases the control activity requiring higher switching frequency [6]. C. Hysterisis Controller This method is developed in [7] and it is based on space vector modulation. With reference to Fig. 2, the ac voltage of the inverter is represented by one of seven vectors in the complex plane determined by the conduction state of the valves [1]. is defined by valve state (100), that is phase a is conVector nected to the positive terminal of the dc source and the other corresponds to (000) phases to the negative. The zero vector or (111). Let vector , in Fig. 2, represent the desired tracking voltage obtained from (2). As this vector rotates counterclockwise, it enters successively regions I to VI defined by the valve conduction state. If the tracking voltage is in region I, vectors – , – , and – represent the smallest derivative of the current error given by (3). Thus, by switching the inverter between vectors , , and , the instantaneous value of the current can be made to follow the reference within a predefined error [1], [7]. Fig. 3 shows a half period of the phase current as it is following the reference. As long as the tracking voltage is in region I, the current can be maintained within the inner error band by the vector set ( , , ) [1], [7]. When the tracking voltage enters the next region, as shown in Fig. 2 by vector , the previous vector set is not adequate to keep the current error within the inner band. Thus, the current will continue to deviate from the reference until the appropriate vector set ( , , ) corresponding to region II is used. Therefore, with reference to Fig. 3, an additional outer error band is employed to detect the region of the tracking voltage and determine the correct switching sequence of the inverter [7]. Fig. 4 shows the implementation of this controller. Six hysterisis comparators are used to define the inner and outer bands for the three-phase current error [7]. The band outputs are 1, if the respective band has been violated from above and 0, if the respective band has been violated from below. The outer

(4) is an unknown quantity, we inSince the tracking voltage troduce these integral errors as additional state variables (5) Applying linear feedback design to the system of (4) and (5), we obtain the optimum inverter voltage in the – frame as function of the measurable state variables and their integrals (6) The optimum instantaneous voltage of the inverter in the abc is obtained by applying the inverse transformation frame equals the tracking voltage at steady state. on (6). A switching pattern generator can be employed in conjunction

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Fig. 3.

Inverter current under CCC. Fig. 5. Integrated control and protection of the inverter.

Fig. 4.

Implementation of the hysterisis controller [7].

band outputs, A, B, and C, are used to detect the region of the tracking voltage. The inner band outputs, a, b, and c, are used to determine the inverter output voltage. The same figure shows the switching logic [7]. This is a robust method because it only uses local measurements of the current and is independent of system parameters. Since this method controls directly the instantaneous value of the line current, it has inherent current limiting properties and fast dynamic response. The implementation of this method is very simple and the computation time minimal. For good harmonic performance at steady state; however, a small error band should be used resulting in high switching frequency, which may not be feasible for distribution grade inverters [5]. D. Proposed Current Regulator From the presentation shown before, it is evident that the two methods are complementary when applied to distribution inverters of medium switching frequency. The optimum current regulation results in optimum harmonic performance at steady state, but has sluggish transient response. The hysterisis controller, on the other hand, has good transient response but nonoptimal steady-state performance. Fig. 5 shows the proposed integrated control and protection approach combining the two techniques for optimum results. Two loops are used to control the inverter line current. The optimum loop based on the current regulator is given by (6) and the emergency loop is based on the hysterisis controller.

Fig. 6.

Timing diagram of the proposed controller.

With reference to Fig. 6, the emergency loop is equipped with an additional emergency band. During normal operation of the inverter, the optimum loop controls the valves and drives the current error optimally to zero average steady state. During this period, the emergency loop is inactive. With reference to Fig. 6, , an event occurs, such as a fault or a control adjustat ment. For large variations of the output, the response time of the optimum loop is not adequate to maintain precise control of the instantaneous line current. Thus, as shown in the figure, the current error will violate the emergency band and activate the emergency loop. When the emergency loop is activated, it takes control of the inverter valves and the hysterisis controller instantaneously locks onto the current reference driving the current error within the inner band. At this point, the switching frequency of the inverter increases as it can be seen on the inverter voltage waveform in Fig. 6. To prevent overstressing the valves, the error band is designed to increase gradually, decreasing the switching frequency. When the emergency loop is in control, the inverter performance is suboptimal, since a large error band will result in significant low-order harmonics. Therefore, the operation of the emergency loop after activation is designed to last for 10 ms. , the emergency loop returns With reference to Fig. 6, at

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Fig. 8.

Steady-state representation of the system.

Fig. 7. Grid-connected distributed storage and generation.

control to the optimum loop. In order to obtain a seamless transition between the two loops, the and components of the inverter output voltage are extracted during the emergency loop operation as seen in Figs. 5 and 6. These values are used to initialize the output of the optimum loop upon resuming control. III. APPLICATION TO DISTRIBUTED GENERATION Fig. 7 shows a grid-connected distributed storage generator (DSG) system. The generator uses an IGBT-based power conditioner. The primary energy element of the generator is represented by a dc source. The system is connected to a distribution feeder through a stepup transformer. The feeder load is represented with suitable aggregate models for each load type. The distribution substation including the subtransmission system is represented by a Thevenin source. The system data considered in the simulation studies are as follows. • The feeder voltage is 13.8 kV. The short-circuit capacity (SCC) of the ac source is 20 MVA. • The feeder load is 3 MW, 70% of which is industrial of 0.8 lagging power factor and 30% is residential and commercial. • A power factor correction (PFC) capacitor bank rated at 710 kVAr is connected to the feeder. • The DSG rating is 2 MVA (including storage). The stepup transformer is rated at 2 MVA, 900 kV–13.8 kV with 10% reactance. The inverter dc voltage is 2300 V. The switching frequency of the valves is 1200 Hz. This choice of ratings corresponds to available IGBT. The inverter switching pattern generator is designed to eliminate up to the 23rd harmonic from the current waveform. The hierarchical control of the DSG is shown in Fig. 7 and consists of the steady-state controller and the current regulator described previously. The steady-state controller provides the current regulator with the reference waveform of the line current
Fig. 9. Steady-state operating regions of the generator.

in order to obtain the desired real and reactive power for the generator. The steady-state controller is analyzed in the following. A. Power Generation and Voltage Regulation The fast response capabilities of the inverter can be used to control the generator real power and the feeder voltage. Fig. 8(a) shows a simplified representation at steady state of the system in Fig. 7, with the inverter represented as a controllable source. Fig. 8(b) shows the system steady state, where real power is directly proportional to the -component of the inverter current and reactive power to the -component. Thus, independent control of real power and bus voltage can be achieved by continuously adjusting the real and reactive component of the inverter current. Fig. 9 demonstrates the inverter operating modes at steady state. The circle depicted in Fig. 9 is the locus of the inverter-rated current, , in the – plane. This, therefore, is the boundary for continuous inverter operation. Curve A–B in the same figure is the locus of the inverter current corresponding to rated bus voltage. This curve can be obtained by manipulation of the system in Fig. 8 and is given by (7). Finally, the locus of the inverter current corresponding to the minimum allowable bus voltage is shown in Fig. 9 by curve C–D (7)

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Fig. 10.

Inverter power and feeder voltage.

Fig. 11.

Inverter current during operation of the emergency loop.

At normal steady state, the inverter operates in the constant power/constant voltage mode and its operating point lies on curve A–B. There, the inverter can maintain rated bus voltage and simultaneously inject an adjustable amount of real power. As the power absorption or generation increases, the inverter operating point moves toward A or B, respectively, until the inverter reaches its rated current. Further increase of the power requires that the inverter participation in the reactive compensation of the bus decrease. Thus, the inverter follows segments B–C or A–D to increase its power, while without additional external compensation, the bus voltage decreases. When the voltage limit is reached at points C or D, the inverter power is decreased to prevent operation below the minimum allowable voltage. The implementation of the discussed steady-state modes is shown in Fig. 7. There, in order to maintain operation within the rated current, the power control-loop output, providing the -component of the current reference, limits the voltage control-loop output, providing the -component of the current reference. Therefore, the power control loop has priority over the voltage-control loop. B. Transient Simulation Studies The system of Fig. 7 was modeled and simulated using PSCAD/EMTDC [10]. The following simulation studies were conducted. 1) Inverter Startup: Initially, the inverter valves are blocked and the distributed generator is idle. The full load of the feeder ms, the inverter is supplied by the system source. At valves are unblocked and its power reference is increased to 1.5 MW. Figs. 10–13 show the results. With reference to Fig. 10, the steady-state controller responds quickly to the real- and reactive-power demand by adjusting, respectively, the real and reactive component of the line current. The response time of the power loop is approximately 70 ms. Before unblocking of the inverter, the feeder voltage is low, due to insufficient reactive supply. The response of the inverter voltage loop is equally fast. At the steady state, the inverter current reaches its rated value and the inverter operates on segment B–C of Fig. 9. Fig. 11 shows, for the same study, a detail of the inverter instantaneous current and the corresponding reference for one phase. Initially, the inverter is blocked and its current is zero.

Fig. 12.

Inverter line voltage in startup.

Fig. 13.

Steady-state line current of the inverter. TABLE I LINE CURRENT HARMONICS

When the valves are unblocked, the emergency loop is activated and rapidly drives the line current to the reference in approximately 10 ms. Following this, the emergency loop is deactivated and returns control to the optimum loop. As it can be seen from the figure, this transition is seamless. Therefore, the emergency loop can assist in the dynamic response of the inverter. Fig. 12 shows the line voltage at the inverter bus for the same period. The steady-state inverter current under the action of the optimum loop is shown in Fig. 13 and its harmonic content is given in Table I. With reference to this table, the harmonic orders below the 23rd are eliminated and the total harmonic distortion (THD) of the current waveform is 4.9%. The current harmonics are of only high order and can be easily filtered by the system impedance. Under the proposed optimum loop design,

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Fig. 14.

Line current, inverter side.

Fig. 16.

Inverter power and voltage.

Fig. 15.

Line current and reference.

therefore, no additional harmonic filters are necessary. On the other hand, the action of the emergency loop alone produces all harmonic orders including the high orders around the switching frequency of the valves. The magnitude of the harmonics dependents on the size of the inner error band. Therefore, in order to reduce the THD under the emergency loop action, a small error band is necessary, which increases the switching frequency and losses of the inverter. This, however, is not a major drawback of the method since that loop is activated only under transient system conditions and its duration is only a few periods. Under transient conditions, maintaining system stability is a priority justifying a higher THD. 2) Three-Phase Feeder Fault: The system operates at the steady state of the previous study, when a bolted three-phase fault occurs on the feeder near the inverter transformer terminals. The inverter current is shown in Fig. 14. The current of phase a and its reference are shown in Fig. 15. Prior to the fault, the optimum loop controls the inverter valves. During the fault, the following sequence of actions provides fault rejection by enabling the generator to detect and safely limit any overcurrent. At the fault onset, the current rises quickly and the response speed of the optimum loop is not adequate to limit its peak value. Consequently, the rising current triggers the emergency loop which takes over driving the instantaneous current to its reference waveform. This can be clearly seen in the detail of Fig. 15. As soon as the steady-state loop detects the fault condition, it drives the current reference to zero. The line current follows precisely the reference through the action of the emergency loop and is driven to zero at ms. At that point, the inverter valves are approximately blocked and the inverter is deactivated until fault clearing. This study represents a worst-case scenario, since the fault occurs near the inverter. The results of Figs. 14 and 15 demonstrate

Fig. 17.

Inverter current response.

the effectiveness of the emergency loop to limit overcurrent and to provide fault rejection. This ability could assist in reducing the overall size of the inverter, since no additional derating of the valves and transformer is required to provide a safety margin for equipment protection. 3) Power Control: The system operates at steady state, delivering 1.5 MW of power. A power reversal is simulated bems and ms, during which the inverter tween switches to the storage mode, absorbing 1 MW. The results are shown in Figs. 16 and 17. The fast response capability of the inverter enables the DSG to quickly cycle between generator and load modes. Thus, the DSG has power modulation capability. During the power cycling, the voltage-control loop of the inverter provides the reactive power necessary to maintain the feeder voltage within limits. Fig. 17 shows a detail of the inverter response. It can be seen that the current controller forces the line current to track the reference at all times. Before the power reversal, the line current lags the feeder voltage and the inverter operates in the fourth quadrant of the – plane. At the commencement of the reversal, the current reference changes quickly and, as it can be seen in Fig. 17, the inverter almost momentarily enters the third quadrant of operation. The quick instantaneous response of the inverter current to the reference change is owed to the action of the emergency loop, which is activated for a brief time following the control adjustment. The system response in Fig. 17 can be contrasted with

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Fig. 20. Fig. 18. Power reversal with deactivated emergency loop: Inverter current.

Line voltage under unbalanced operation.

IV. CONCLUSION The paper presented the control of the power conditioner for certain types of distributed generators. The proposed design combined two advanced current control methods, which use the maximum switching capability of the inverter valves without increasing the complexity of its topology. The slowly acting optimum current regulator enables the generator to operate in any of the four quadrants of the – plane, providing simultaneously optimum harmonic output. The fast acting emergency loop provides overcurrent limiting and fault rejection. Moreover, results in the paper showed that the precise control of the instantaneous current by this loop enhances the generator transient response. The implementation of the proposed design can contribute in increasing the reliability of the generator and the utilization of equipment. The present state of the art of semiconductor technology can be combined with advanced computing and intelligent systems to increase the capability of the distribution grid. The paper discusses such a possibility. More research in this area is; however, necessary to obtain optimum and cost-effective designs.

Fig. 19.

Inverter currents under unbalanced operation.

that in Fig. 18. The power reversal is repeated with the emergency loop deactivated. At the onset of the reversal, the current reference changes quickly as in the previous case. However, the slowly acting optimum loop alone is unable to track the new reference instantly, resulting in a slower response. Therefore, the emergency loop, in addition to providing protection, can significantly improve the dynamic performance of the generator by accelerating its transient response. 4) Unbalanced Operation: In general, unbalanced line conditions may interact adversely with the inverter switching activity and control. Negative sequence in the line voltage could cause a corresponding negative sequence in the inverter current, which, in turn, is injected back into the line. Thus, a feedback loop may be created between the line and the inverter, which having sufficiently large gain, may amplify the initial cause. The proposed control method provides an effective way to mitigate unbalanced line conditions by breaking the inherent feedback between the inverter current and the line voltage. The inverter current is forced to follow a sinusoidal reference waveform of positive sequence, which is essentially independent of the line voltage waveform. This is demonstrated in the simulation results of Figs. 19 and 20. A 0.1-p.u. negative sequence voltage is added to the system Thevenin source. Despite the unbalance, the fundamental of the inverter current, shown in Fig. 19, is symmetric and of positive sequence. Suppression of the negative sequence from the inverter current assists in balance restoration. Fig. 20 shows the waveform of the line voltage at the inverter bus. The negative sequence component measured in the fundamental of this voltage is 0.04 compared to 0.1 p.u. of the source.

REFERENCES
[1] T. Nakajima et al., “Multiple space vector control for self-commutated power converters,” IEEE Trans. Power Delivery, vol. 13, pp. 1418–1424, Oct. 1998. [2] J. O’Sullivan, “Fuel cells in distributed generation,” in IEEE Power Eng. Soc. Summer Meeting, Edmonton, AB, Canada, 1999, Paper 99 SM083, pp. 568–572. [3] “Summary of static power converters of 500 kW or less serving as the relay interface package of nonconventional generators,” in IEEE Trans. Power Delivery: Consumer Interface Subcommittee of the Power Systems Relaying Committee, July 1994, pp. 1325–1331. [4] I. Papic, A. Krajnc, D. Povh, and T. Schulthesis, “300kW battery energy storage system using an IGBT converter,” in Proc. IEEE Power Eng. Soc. Summer Meeting, Edmonton, AB, Canada, 1999, Paper 99 SM083, pp. 1214–1218. [5] L. J. Borle, M. S. Dymond, and C. V. Nayar, “Development and testing of a 20-kW grid interactive photovoltaic power conditioning system in Western Australia,” IEEE Trans. Ind. Applicat., vol. 33, pp. 502–508, Mar. 1997. [6] H. Koemuercuegil and O. Kuekrer, “Lyapunov-based control for threephase PWM AC/DC voltage source converters,” IEEE Trans. Power Electron., vol. 13, pp. 801–813, Sept. 1998. [7] B.-H. Kwon, T.-W. Kim, and J.-H. Youm, “A novel SVM-based hysterisis current controller,” IEEE Trans. Power Electron., vol. 13, pp. 297–307, Mar. 1998. [8] W. R. Lachs, D. Sutanto, and D. Logothetis, “Power system control in the next century,” IEEE Trans. Power Syst., vol. 11, pp. 11–18, Feb. 1996.

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[9] B. Ooi, G. Joos, and X. Huang, “Operating principles of shunt STATCOM based on the 3-level diode-clamped converters,” IEEE Trans. Power Delivery, vol. 14, pp. 1504–1510, Oct. 1999. [10] “PSCAD/EMTDC power system simulation software, user’s manual,” Manitoba HVDC Research Center, 1994.

E. N. Nikolov (S’99) received the M.Sc. degree in electrical and computer engineering from Southern Illinois University, Carbondale, in 2000. He is currently pursuing the Ph.D. degree at Southern Illinois University. His interests include power electronics and digital control of power inverters.

C. J. Hatziadoniu (M’87) received the Ph.D. degree in electrical engineering from West Virginia University, Morgantown, in 1987. Currently, he is an Associate Professor with the Department of Electrical and Computer Engineering at Southern Illinois University, Carbondale. His interests include power electronics, HVDC, FACTS, and modeling and simulation of power systems.

F. Pourboghrat (M’84) received the Ph.D. degree in electrical engineering from the University of Iowa, Iowa City, in 1984. Currently, he is an Associate Professor with the Department of Electrical and Computer Engineering at Southern Illinois University, Carbondale. His interests include adaptive and nonlinear control, embedded systems, and MEMS.

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