1 Microprocessors & microcontrollers

Intel 8051 microcontroller
David Wilson 8051 Architecture & basic programming model

This course is really about microcontrollers (8051), not about microprocessors such as the PC 8086. microprocessors IBM PC, general purpose, multi-chips required for all the functions. microcontrollers true computer on a chip, logic functions, bit addressing, small cheap & fast. True “computer on a single chip”.
Block diagram of a microprocessor & controller

S TUDENT V ERSION Department of Electrical Engineering University of Karlstad March 1998

ALU microprocessor

Accumulator Working registers prog counter clock stack ptr interrupt circuits

timer ALU ACC W.Reg. I/O port

internal ROM

I/O port interrupt

micro-controller

internal RAM stack ptr PC

clock

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Intel 8051 microcontroller

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Microcomputers & microcontrollers Essential elements of any computer are: CPU or central processing unit memory for both data and program I/O or input/output system Measuring house heating Motivation I have just moved into a villa, and my electricity bill is much higher than it was in Australia! So I would like to monitor the temperature inside and outside of my house in different rooms over at least 48 hours. Requirement Use one 8051 as a data logger and local storage device. It should measure around 5 temperatures say every minute, and store them so I can load them up from the 8051 via a serial cable to my PC every couple of days. Heat distribution in my oven & fridge Motivation I have an old oven without a fan, and I discover that when baking, you must be very careful as to where you place the food (near the top, or near the bottom etc.) I would like a time varying 3D temperature map of my oven.

2 An micro-controller application
DIW

Various different architectures exist depending on the application. Mini-computer all 3 systems mounted on a board Micro-computer 2 systems on a single chip. Micro-controller All systems on a single chip. The Intel 8051 is an example of a micro-controller.

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Intel 8051 microcontroller 2 An micro-controller application

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3 Intel 8051 microcontroller
The 8051 is a Single Chip Computer or microcontroller made by Intel. It is one of the most widely used microcontroller chips in the world. A stand alone, high performance, single chip computer for controller applications Small, cheap & 40 pins. (# of pins increases size & cost.) 64k program memory 64k data memory Our 8031 version is very similar to the generic 8051, but it has some features attractive for proto-typing:

4 8051 pin layout
The 40 pin package has a pin DIP (dual in-line package) layout as follows:

But a 44 pin square layout exists and the more advanced members of the 8051 family have slightly different layouts. For what is inside this ‘black-box’, see following overheads.

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Intel 8051 microcontroller 4 8051 pin layout

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5 8051 Controller
A minimal 8051-based controller needs only the following components: 1. 2. 3.

6 8051 CPU architecture

Basic SBC51
8051 CPU A[0..15] D[0..7] Address bus Memory A[0..15]

- D[0..7] - Read# - WR#

- P3.[0..7] - P1.[0..7]
input/output Buses (groups of 8) are wide lines, single lines are bits Address (2 buses) give 16 bits (0x0000 – 0xFFFF) Data is bidirectional, address unidirectional from CPU to memory Read & write strobes one way.
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Compare what crosses the dashed line with the pin-out diagram given previously.

Ref Ayala, p56–57

8051 architecture given previously contains the following: Registers 8bit CPU registers (called the ‘A’ register or accumulator & B register) 16bit program counter & data pointer 8bit program status word Control registers Internal ROM of zero (8031) to 4K (8051) Internal RAM of 128 bytes 4 register banks 16 bytes (bit addressable) 80 bytes of general purpose scratch pad. Timers & counters (16 bits)
Single step reset EPROM Display 80C32

7 The Single-Board-Computer SBC51
We have a laboratory proto-type single board computer based on the Intel 8051 called a SBC51. However we will use a PC for editing, storage of source programs and assembling. We will “dump” the compiled code from the PC to SBC51 using a serial cable.
SBC51 board components
Serial to PC

Port #1

switch

8255

Analogue in/out

switches

Digital out

See the component layout on p58, and the circuit diagram following. Also read chapter 9 of Ayala.

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Intel 8051 microcontroller 7 The Single-Board-Computer SBC51

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Getting started with the SBC51 Read this before the first laboratory. A picture of an equivalent single board computer proto-type kit. (Not exactly the same as what we have in the lab) 1. Connect the PC port COM1 to the SBC port P1 with the serial cable, 9600, no parity & 1 stop bit. Use MSD.EXE to check & mode to check your settings. 2. Turn on the SBC51 & reboot the PC under DOS. (It will give strange results under Windows or NT, possibly not communicating) 3. Choose the SBC51 or andra program in the boot menu, and then start the program: c:> cd sbc51\work c:> sbc51\work\sbc.exe 4. Load your program using the LOAD FILE menu. This configuration has 80C32 (square package) with B ASIC & external ROM liquid crystal display (LCD) screen, 2 by 16 Serial connection (to dump programs & data) hexadecimal keypad (4  5) buttons 5. Edit your file if necessary, use ALT-h for help. 6. Assemble your program to a relocatable object file, a R03, then link to an Intel hexadecimal HEX file. 7. Choose TERMINAL and (a) press ALT-C to set up the serial communication to the SBC51. (b) Press the RESET button on the SBC51 (c) Press ALT-L to download the hexcode. 8. Start with the laboratories, p3 1.1

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Data memory internal 256 bytes is divided into two parts: general scratch and the special function registers SFRs. (See description following).

8 8051 Memory types
Data memory

The 8051 has two separate memory blocks, for data and program. Since both blocks have the same address, this is called a Harvard architecture. Separating the program memory from the data memory improves reliablility since we cannot inadventently overwrite the program code, and allows us to use program ROM, or read only memory.

FFFF

8
direct addressing only

FF

: 8 :

direct & indirect addressing

128 bytes internal SFR 80 7F 128 bytes internal 00

and

64K external

00

The 128 bytes in lower internal RAM have the following structure: Program memory normally we will have 4K on the chip (but not in the case of the 8031)
7F scratch pad Program memory ................................. .................................    20 9 bit addressable area 1F ................................. = ................................. register banks ................................. ; 07 00 7 6 5 4 3 2 1 0 8031 (our proto-type version)

60K external

or

64K external

bank #3 bank #2 bank #1 bank #0

4K internal 8051

Data memory all 64K is off the chip except for (a miniscule 128 bytes).

Only one of the 4 register banks can be active at any particular time Which one is active is given by flags in the PSW

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9 Special Function Registers
The Special Function Registers (SFRs) contain memory locations that are used for special tasks. (They should not be used for general purpose tasks.) Each SFR occupies internal RAM from 0x80 to 0xFF, (but some areas are empty!) They are 8 bits wide. Some examples are: A register or accumulator is used for most ALU operations & external moves B used for mltiplication & division and can also be used for general purpose storage PSW Program Status Word is a bit addressable register. Refer to the manual for the description of the bit fields.
See p48

Program Status word (PSW)
Ayala, p62

The PSW is the most important of the SFRs. It is a byte register which holds 8 bits that can addressed indivdually. Each bit is referred to as a flag.

Flags can be either set (1) or cleared (0). This is more efficient than using an entire byte memory location for a binary variable.
The PSW is divided up as follows: 7 6 5 4 3 2 1 0 CY AC F0 RS1 RS0 OV – P Note: We start numbering from zero and go right to left (MSB, or most significant bit first) Flags are zero and one (not 1 & 2) One flag should not be used, but is reversed for future use.
at your own peril Use

Two special 16-bit registers (double registers): PC or program counter. This is not directly addressable, nor does it have a memory location DPTR or data pointer. Is accessible two 8-bit registers: DPTRLow and DPThigh.

Address as PSW.3 for RS0 for example. Each of the flags has a special function, consult the manual. Question What flags are set when the PSW holds 0x7C ?

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Bit addressable SFRs Some special function registers are bit addressable. (This makes it easier to program.) The byte addresses are always multiples of 8, or they all lie in column 0 of the SFR register block. The bit addresses are just appended onto the byte address. So the fouth bit of the accumulator is Acc.3. byte address of the accumulator is 0E0h so, the bit address is: Acc.3 = 0E0h
+ 5 = 0E5h

10 8051 flags
Flags are stored in the PSW, so will be affected if you change it (except the parity flag). Arithmetic flags: C, AC & OV, (Carry, auxiliary carry & overflow) Increment/decrement do not effect the math flags. I.e. no OV if we INC A from FFh to 00h. inc DPTR, note no DEC version. Addition C if carry out of bit #7 AC is set if carry from bit 3 to bit 4. (Used in BCD addition)

Question: How does this explains the (incorrect) command CLR B?

OV is set if carry out of bit 7 but not bit 6 or is set if carry out of bit 6 but not bit 7. In other words: OV = C7 XORC6 Signed addition & subtraction is complicated, and you will need to study the flags carefully. Use pre-tested subroutines for your arithmetic routines if possible. (See text books, or libraries on the internet.)

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11 Accessing external memory
Storage problems? What happens if our program is larger than 4096 bytes of code? We have the ‘ROMless’ 8031 version, so we must In assembler we use the movx (move external) to access the data block, and movc to fetch from code memory. We have two separate read signals, RD, (read) and P SEN , (program send enable). The bar means that it is active low, (when zero, will do something).

12 Prototyping 8051 design
Ayala, Chapter 9

For many small applications where we might want to change the ROM code, we would like to use external EPROM, which means: We have lost the use of ports 0 and ports 2 since they must be used to interface with external ROM and not available for I/O. We may need external RAM (since the 128 bytes may not be enough for our application), which means that we have lost port 3.6, WR, and 3.7, RD. Any serial communication requires 3.0 (RXD) and 3.1 (TXD) Loss of ports leaves us with: 1. All of port #1, and 2. Port P3.2 – P3.5 for general purpose I/O and external interrupts and timing inputs. Question How do we recover the use of the lost ports?

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Programmable Logic Devices The PROM chip is an example of a Programmable Logic Device PLD. Once programmed, it will retain the program even when the power is turned off. One-time programmable devices uses tiny fuses which are burnt or blown (or we can use antifuses which have the same end function. Circuit size is 10 that for EPROMS. Eraseable Programmable read Only memory (EPROMS) can be re-programmed. This uses a modified MOS transistor with a floating gate that when uncharged does not effect the normal operation. However if it is subjected to (high) +12V, then a charge will move into the 2nd transistor which is stable (will last a decade). Reprogram by subjecting the cells to UV light (via an expensive ceramic window on top of the package). Wiping time takes about 20 minutes. EEPROM or Electrically erasable proms are about 2.5 times larger than eproms, and are quicker to clear. FLASH proms are much quicker to erase (hence the name), and can be reprogrammed while still on the circuit board. Suitable for easy upgrading by the public of ROM chips in Modems and PCs. On the SBC51 board we have a 32k EPROM that is reprogrammed by UV light. This holds the monitor program. (We don’t have the source to this, but we could reverse assemble it.)

13 Reading to Ports
1. Store the address of the memory mapped port into the DPTR register, and 2. indirectly address this through Acc. ; Reading & writing from a PORT MOV DPTR, #0F012h; address to read digital input MOVX A, @DPTR ; read the values into Acc

MOV DPTR, #0F011h; address of LED outputs MOVX @DPTR, A ; write this value back out agai The actual values of the address are decided by the designed of the particular circuit board, (SBC in our case).

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Ayala, p64, p129–130

14 Subroutines
Question Subroutine overheads slow a program down so why use them?

Stack & the stack pointer makes housekeeping easier for certain tasks like storing & retrieving numbers quickly. The name comes from a ‘stack’ of dishes in a cafeteria or a stack of cigarettes at the supermarket checkout. To store data on the stack you PUSH it on. To retreive data, you POP it off The Stack is a small amount of internal ram. The start of the stack is held in the stack pointer, SP. As you push data, the stack grows upwards (to higher locations) in ram memory. The following occurs when you store some data on the stack & then pop it off again.

Subroutines do exist in assembler programming using the CALL opcode, but you must take care of the “housekeeping” yourself. All variables are global, so they may get altered or destroyed. This includes the PSW, register banks etc. You will need to save all variables before calling, and restore them after returning from the subroutine. The stack is a special memory location (stack of registers) that you can use. (see OHs following) The processor uses the stack to remember the address where to return to after the subroutine has finished. The stack is pointed to by the stack pointer, SP. Near, Long (or far) and absolute calls are possible.

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Ayala, p130

15 The stack & subroutine calls
Ayala, p177

Stack Note the cautions regarding usage! The stack is reset to 07h, but since this will overwrite the register banks, and bit area, we normally move it ‘out of harms way’, to say 3Fh. (Done by the monitor program) If you push too many times, you will run off the end of internal RAM adress 07h which will result in errors. SP “rolls over” from FFh to 00. Use direct address, not register names R1, R2 etc since the stack has no way of knowing which register bank is in use at the time. Use PUSH Acc not PUSH A.

What happens when a subroutine is called (including a hardware interrupt) ? 1. The PC is incremented and this becomes the return address, i.e. the spot the CPU will return to after it has completed the subroutine. 2. The 16bit return address is pushed onto the stack, low byte first, 3. during which the stack pointer SP is incremented twice. 4. The subrouine address is placed in the PC and the subroutine is executed, until . . . 5. a RET return instruction is encounted, then 6. The CPU POPs the stack twice to recover the return address, and places it in the PC. (Sp is decremented twice) 7. CPU starts from the return address . . .

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Question What is the maximum number of nested subroutine calls we can make? Question What are the advantages/disadvantages of long calls as opposed to short calls?

16 Interrupts
Interrupts are just special subroutines that may (or may not) be called explicity. Why have them? 1. 2. 3. If conditions are “right”, when an interrupt occurs, then the processor will stop what it is doing, and jump to a specific place in memory (decided by the Intel 8051 designers) hooked that that particular interrupt. (See following OH.) It is up to the programmer to make sure that you supply a sensible further course of action. This is called the interrupt handler routine or interrupt service routine, ISR. Types of interrupts On the 8051 we have 2 timers or counters and 2 external interrupts.

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Interrupt programming Signals or conditions generated external to the main program – External events such as a change in a logic value – Overflow of a counter – Arrival of data at the serial port. Interrupts can be enabled or disabled by the programmer. (Although some interrupts are non-maskable.) Interrupts on the 8051 IE0 - external interrupt #0. Provided by an input pin on the chip. IE1 - external interrupt #1. Provided by an input pin on the chip. TF0, TF1 - Timer/Counter Interrupts. Generated by internal timer/counters RI,TI Communication port interrupts. Indicates that a character has been received or the buffer is empty and a character cna be transmitted. Each interrupt forces the processor to jump to a different place in memory. Note that the computer does not explicitly call the ISR, this is determined by outside events, & we cannot predict exactly where & when it will call. This splits out program into 2 parts, foreground & background tasks. Foreground tasks are under program control & are called explicitly Background tasks are called via interrupts. This makes the writing of complex real-time controller applications much easier. Relocating the ISRs Normally ROM (or EPROM) occupies low memory, so the ISR is relocated to a higher address. (Otherwise we would need to re-program the ROM everytime we wanted to change the ISR in our prototype.) The Interrupt vector table The interrupt table has been moved (by the monitor program). Name 8051 relocated on the SBC51 INT 0 0003 single-step function TIMER 0 000B 200B INT 1 0013 2013 TIMER 1 001B 201B serial port 0023 2023 Usage is by the LCALL op-code. However you must supply a RETI, a return from interrupt op-code at the end of your interrupt handler subroutine. In our case we do a Long jump to +2000h.

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17 Timers & counters
Timers (clocks) and counters are a good example for the advantages of interrupts. Many applications require the counting of external events; Calculate the frequency of an external pulse train, or generate a precise delay between other computer actions (say for digital control) Could use software techniques, but this keeps the processor occupied. Better to use interrupts & the two 16-bit count-up timers. Can either be programmed to: 1. count internal : : : 2. count external : : : All counter action is controlled by the TMOD (timer mode register) and the TCON (timer/counter control register).

TCON Timer control SFR contains timer 1&2 overflow flags, external interrupt flags, timer control bits, falling edge/Low level selector bit etc. (refer documentation) TMOD timer mode SFR is two four-bit registers (timer #1, timer #0). Select timer/counter & various modes.) Applications Say we want to count a specified number of events (clock pulses or external events), then 1. Store the start number in the counter. (Value = max count- desired count+1) 2. Counter automatically increments (in the background) 3. When it rolls over to zero, it will ste the timer flag. 4. Test the flag in the program, or generate an interrupt. Timing configures the counter to count the internal clock frequency/12. (E.g. if fc = 6:0Mhz, then the timer clock will have a frequency of 500kHz.) Configure as a timer: 
1. Clear C=T bit in TMOD (Count internal frequency)

2. Set TRx in the TCON (timer run) and the gate bit in the TMOD  must be 0, or the external pin INT x must be 1. 3. Select one of 4 modes.

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Ref: Ayala, p210

Ref: Ayala, pp205–212
Timing subroutines In microcontroller applications we need to wait a specified time, and so we need to have programmable time delays. In all cases your application will be written for a specific clock frequency, say 12MHz, 16MHz, 11.0592 MHz etc.) If you subsequently change the clock frequency, you will need to update your code, & possibly do some timing tests. The timing options are: 1. Pure software time delays (wastefull) 2. Software polled timer (still wastefull, but OK in non-critical apps) 3. Pure hardware using interrupts (accurate & preferred method) Question We are mostly interested in the hardware timing version, why?

Using a timer interrupt allows a timer to run and generate a timer interrupt while the main program is running. 1. Setup the timer for a delay of 1000 s. Enable the interrupts, and place the interrupt vector at 001Bh. 2. 3.

You should read carefully the Pure Hardware Delay code example on pp210–212 in Ayala.

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18 Computer communications
Phil Melore, http://www.plcs.net/comhistory29.htm Computer communication systems have their roots in the old telegraph. Early attempts to communicate electronically over long distances began as early as the late 1700’s. In 1810 a German man (von Soemmering) was using a device with 26 wires (1 for each letter of the alphabet) attached to the bottom of an aquarium. When current passed through the wires, electrolytic action produced small bubbles. By choosing the appropriate wires to energize, he was able to send encoded messages “via bubbles”. This then caught the attention of the military and the race to find a system was on.
In 1839, 2 Englishmen, Cooke and Wheatstone, had a 13 mile telegraph in use by a British railroad. Their device had 5 wires powering small electromagnets which deflected low-mass needles. By applying current to different combinations of 2 wires at a time the needles were deflected so that they pointed to letters of the alphabet arranged in a matrix. This “2 of 5” code only allowed 20 combinations so the letters “z,v,u,q,j and c” were omitted (forget about a, a, ˚ ¨ and o). This telegraph was a big step for ¨ the time, but the code was not binary (on/off) but rather it was trinary (the needle moved left,right,or not at all).

19 Interfacing
Usually means connecting your PC to periperals such as printers, plotters, modems, data acquisition hardware etc.
My portable PC
COM1: My PC

?? ??

serial

1 bit + control

? ?z? ? ???? |
8-bit

LP1: parallel

For interfacing we have two options Parallel all 8 (or more) bits used together to send an entire byte at a time. (Requires about 20 pins practically) Speed is about 150kbits/second for a maximum distance of 2–3 meters. (No standard, although C ENTRONIX PARALLEL, or ECP, or EPP (extended parallel port) are common. Writes one byte at a time, reads one nybble at a time. Serial Send just one bit at a time. (Requires 5–8 pins practically.) Follows RS-232 standard and extensions. Typical speed is 9600 bits/second (although faster versions are more common now with compression etc.) Easy to program: Use the IN and OUT op-codes on the 8086 PC. or use the Port[] command in Pascal.

The biggest problems with these devices was the fact that they were parallel (required multiple wires) so it was S.F.B. Morse who created the fully serial binary system; Morse code.

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Serial port hardware comes in 2 flavors– a 25-pin type and a 9-pin type (shown below).

20 Serial communications: RS232
The serial RS232 standard is a serial asynchronous communications protocol. (RS is for ‘recommended standard’) Serial The infomation travels down a single line Asynchronous means that it is not necessary to exactly synchronise the clocks between the transmitter and receiver. Data is transmitted from 1 computer to another, not necessarily running at exactly at the same clock speed. Standard An Electronics Industry Standard (EIS) #232. Defines how the connectors should physically look, specifies voltage levels, and defines what signals should do. There are 2 types of RS-232 devices. DTE Data Terminal Equipment and a common example is a computer. (Originally PCs used to be thought of as terminals to real computers such as IBM mainframes) DCE Data Communications Equipment and a common example is a mainframe or modem. The 8051 may be either a DTE or DCE device. and there are now two types of connectors: 1. The older 25 pin D-shell (DB–25) 2. The newer 9pin (DB–9), since most of the connections on the 25 pin version were never used.
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9-PIN 1 2 3 4 5 6 7 8 9 25-PIN 1 3 2 20 7 6 4 5 22 PURPOSE frame ground (internally connected to the chassis) receive data (RD) (pin where the data from the external device enters) transmit data (TD) (pin where the data leaves) data terminal ready (DTR) signal ground data set ready (DSR) request to send (RTS) clear to send (CTS) ring indicator (RI) *only for modems*

Details of the pins follows: DTS data terminal ready– This pin is a master control for the external device. When this pin is 1 the external device will not transmit or receive data. DSR data set ready– Usually external devices have this pin as a permanent 0 and the plc basically uses it to determine that the external device is powered up and ready. RTS request to send– This is part of hardware handshaking. When the 8051 wants to send data to the external device it sets this pin to a 0. In other words, it sets the pin to a 0 and basically says “I want to send you data. Is it ok?” The external device says it’s OK to send data by setting its clear to send pin to 0. The 8051 then sends the data. CTS clear to send- This is the other half of hardware handshaking. As noted above, the external device sets this pin to 0 when it is ready to receive data from the 8051.

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Ref: Sargent & Shoemaker, p655

The DB 9pin male conector as seen looking at the computer’s serial port. This is smaller & has less pins than the 25pin version, but still carries all the necessary infomation. DB-9 male connector & pin assignments Data carrier detect (DCD) 1 6 Receive data (RxD) 2 Transmit Data (TxD) 3 Data terminal ready (DTR) 4 Signal ground 5 7 8 9 Data set ready request to send (RTS) clear to send (CTS) Ring indicator (RI)

Connecting two DCE devices (such as say two computers) will not work very well, (since they are both DCEs, rather than one DCE and one DTE) so we must reverse two of the pins.

computer #1

DTE device

DTE device

computer #2

2 receive data 3 transmit data Will not work !

2 receive data 3 transmit data

DTE device 2 receive data 3 transmit data

DTE device 2 receive data 3 transmit data Null modem cable

DB–25 pin connections for RS232 lines. RS232 signal Direction DTE DCE Signal ground 1 1 Transmit Data (TxD) Out 2 3 Receive Data (RxD) In 3 2 Request to Send (RTS) Out 4 5 Clear to Send (CTS) In 5 4 Data Terminal Ready (DTR) Out 20 6 Data Set Ready (DSR) In 6 20 Ring Indicator (RI) 22 22

It is easy to swap over 2 of the lines of the cable to make a Null Modem Cable.

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Serial RS232 protocol So to transmit the letter ‘A’, ASCII code (41h), we must send ‘A’ 01000001 where: 1 = high voltage, ( 0 = low voltage, (
+5V), but less than +15V ,5V ), but greater than ,15V

But this brings in a ambiguity regarding the start of the transmission. (We could tune in half-way through.) What happens if the transmission starts with a 1? Start bit Add a zero to the front of each character transmitted. (This is obviously not part of the information content of the signal.) So now ‘A’ is sent as: 0 01000001. | z A Noise in telephone lines is very common. Data can get corrupted by random signals Need a redundancy check. (Will not be fool proof, but reduces the probability of a mistaken signal) This will further lengthen the code, and reduce the ‘information concentration’

So the serial transmission of ‘A’ is

Serial

z

‘A’ |

10000010 direction of time Without any transmission is kept at a high voltage.

Odd Parity. A cheap redundancy check. Count how many 1s we have in our character, and if the number of ones is: Even, then add a one to the code Odd, then add a zero to the code This ensures that each transmission segement (character) has an odd number of ones. Even parity is possible, and in this case all characters have an even # of ones.

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Using Odd parity, to transmit the character B
01000010 | z 2ones

21 Interfacing with the outside world
For the computer to measure ‘real-world’ signals such as temperature, pressure, humidity, and for it to write out voltages to control the speed on motors, brightness of lights etc, it must have both a D/A (Digital to analogue converter) A/D (Analogue to digital converter)

which has an even number of ones, we must append after the last bit a single 1 to get: parity z| 1 01000010 | z B Now to transmit C =

8-bit Digital to Analogue conversion

8
8 bit binary value

:

- D/A -

- voltage out

8-bit Analogue to Digital conversion

voltage in

- A/D

-9 -= -; -

8 bit (1 byte) to computer

More expensive 12 & 16 bit converters are also possible.

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Ref: Ogata, DCE, p32

D/A converters are easier to fabricate and cheaper than A/Ds. The D/A takes a binary stream, and converts this to a single continuous voltage.
D/A converter

An alternative scheme for a D/A converter that uses resistors of only size R and 2R is a ladder scheme.
Ladder D/A converter

3R
R0

2R
Vout

R

R

R

2R 2R
b3

, +

Vout

, + 8R
b0

2R
b0

2R
b1

2R
b2

4R
b1

2R
b2

R b3

,Vref

,Vref
In this scheme, all the resistors (except for the feedback resistor) are either R or 2R which means a high level of accuracy can be achieved. A/D converters are more complicated and use internally a D/A converter coupled with a successive approximation register (SAR). Details given in electronic handbooks.

The D/A converter outputs a voltage, Vout given a binary number b3b2b1b0, where each of the bs can be either 1 or 0,  b b b! R Vout = 0 b3 + 2 + 1 + 0 Vref R 2 4 8 As we increase the # of bits, the range of matched resistors becomes large, and the accuracy becomes poor.

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22 8052: Extending the 8051 family
The 8051 is just the first member of a series of micro-controllers. The most common “big brother” is the 8052. adds another 128 bytes of internal RAM (indirectly addressable) increases the onboard ROM from 4K to 8K. Adds another timer, T2, (to make three; T0,T1 and T2), and associated new SFRs. T2 is a capture timer. No new op-codes, but does have new SFRs Since the I NTEL designers of the original 8051 left ample room in the SFR space for future functions, Philips Semiconductor designers can add another timer with special functions, without adding new opcodes. SFR Address T2H 0xCD T2L 0xCC RCAP2H 0xCB RCAP2L 0xCA T2CON 0xC8 You should consult the relevant manufacturer’s documentation for these extra functions, (such as Phillips Semiconductor).

23 8051 conclusions

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