You are on page 1of 4

FULL ADDER USING HALF ADDER

ABSTRACT: Adders are the basic building blocks of all arithmetic circuits. Adders add two binary numbers and give out sum and carry as output. Basically there are two types of adders ,Full adder and Half adder. Full adder takes a three-bits input. A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit full adder adds three one-bit numbers. The full adder produces a sum and carry value, which are both binary numbers. It can be coupled with other full adders.

DESCRIPTION
Adders can be constructed for many numerical representations, such as Binary-coded decimal or excess-3, the most common adders operate on binary numbers. In cases where two's complement or one's complement is being used to represent negative numbers, it is trivial to modify an adder into an addersubtractor. Other signed number representations require a more complex adder.

INTRODUCTION TO ADDERS
An adder is a digital circuit that performs addition of numbers. In many computers and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in other parts of the processor, where they are used to calculate addresses, table indices, and similar. Arithmetic circuits are the ones which perform arithmetic operations like addition, subtraction, multiplication, division, parity calculation. Most of the time, designing these circuits is the same as designing multiplexers, encoders and decoders. In Electronics we call Adders as Summers. These Summers basically operate on binary numbers 0 and 1.It is a digital circuit that performs addition of Numbers. Adders resides in the ALU-Arithmetic Logic Unit of Computers. Adders can be implemented in various ways. Some of the important ways are listed below:    Full Adder using Multiplexers Full Adder using only NAND gates Full Adder using Half Adder

HALF ADDER
A half adder adds two one-bit binary numbers A and B. It has two outputs, S and C (the value theoretically carried on to the next addition); the final sum is 2C + S. The simplest half-adder design, pictured below, incorporates an XOR gate for S and an AND gate for C. Half adders cannot be used compositely, given their incapacity for a carry-in bit.

Here, S= A ⊕ B, C=AB FULL ADDER
A full adder adds binary numbers and accounts for values carried in as well as out. A one-bit full adder adds three one-bit numbers, often written as A, B, and Cin; A and B are the operands, and Cin is a bit carried in (in theory from a past addition). The circuit produces a two-bit output sum typically represented by the signals Cout and S, where sum= 2xCout + S. A full adder can be implemented in many different ways such as with a custom transistor-level

In this report we will be seeing Full adder using two Half Adders.

The output of first half adder is given to one of the inputs of the other half adder. Cout. SYMBOL in. In this light. S could be made the three-bit XOR of A. the addition of any one column of the two numbers must anticipate a carry being generated from addition of the column immediately to the left. and Cin.that is. The output of the second half adder gives the sum. Cout can be implemented as Cout= (A. It uses two XOR gates. connecting Cin to the other input and OR the two carry outputs.circuit or composed of other gates. S. One example implementation is with and S=A⊕B⊕C. addition of the two least-significant bits (LSBs) of two numbers can be made using halfadders. Equivalently. the final OR gate before the carry-out output may be replaced by an XOR gate without altering the resulting logic. In that case. If we wish to make a full “column adder” . B. Thus. The carry generated by both these adders are then given to the OR gate to produce the resultant carry. the so-called “full adder” must be used. connecting the sum from that to an input to the second adder. then we must make provision for that carry- .B)+(Cin(A⊕B)). since whenever multi-digit numbers are added . The above diagram shows a Full Adder using two Half adders. but full adders must be used to add the other columns of the two numbers. The half-adder can add two single bits. but does not make a provision for carry-in. The full adder contains circuitry to accommodate the carry-in from addition of the next-less significant column of the number. an adder that will add one column of two multi-digit binary numbers. CIRCUIT DIAGRAM OF FULL ADDER USING HALF ADDER The above diagram shows a Full adder using two Half adders. A full adder can be constructed from two half adders by connecting A and B to the input of one half adder. two AND gates and one OR gate. and Cin and Cout could be made the three-bit majority function of A. TRUTH TABLE In this implementation. B. The other input is given the carry in bit. Using only two types of gates is convenient if the circuit is being implemented using simple IC chips which contain only one gate type per chip.B) + (Cin (A⊕B)). Cout= (A.

6. 2. 3. This layout is made using the software PCB WIZARD. The components mounted on the PCB are then soldered. based on if a carry is propagated through from a less significant bit position (at least one input is a '1'). since each carry bit "ripples" to the next full adder. The finalized layout circuit of the circuit is first drawn on the PCB. Ripple Carry Adder or 4-bit adder It is possible to create a logical circuit using multiple full adders to add N-bit numbers. the whitener marks are then removed. APPLICATIONS: Some of the applications are listed below: 1. . The PCB is then drilled at respective places with the proper drill bit. The first step in making a PCB is making the layout. engineers devised faster ways to add two binary numbers by using carry look ahead adders. The PCB is now ready for component mounting. Each full adder inputs a Cin.e. The layout of a ripple carry adder is simple. since each full adder must wait for the carry bit to be calculated from the previous full adder. They work by creating two signals (P and G) for each bit position. a carry is generated in that bit position (both inputs are '1'). 5. the ripple carry adder is relatively slow. The PCB is then tested and troubleshooted for any faults. The etched PCB is then cleaned i. or if a carry is killed in that bit position (both inputs are '0'). The components are mounted on the holes provided. however.PCB FABRICATION AND LAYOUT: The following figure shows the layout of the project. which allows for fast design time. The extra leads are cut after soldering the components. This kind of adder is a ripple carry adder. which is the Cout of the previous adder. The PCB is then etched using ferric chloride solution. The copper tracks are now visible. The layout made on the PCB is marked with a whitener. Carry look-ahead adders To reduce the computation time. FABRICATION PROCESS:1. 4. 2.

3. Electronics for you: www.com 2.electronics4you. Electronics-Tutorials: www. REFERENCES: 1. The results of the project are matching with the desired results . by Boylsted 3. Russell L Meade Cengage 2.com BIBLOGRAPHY: 1. “Electronics devices and circuits”.“Microelectronic circuit analysis and design” Rashid. 4.com 3.electronicstutorial. Some other adder designs are Conditional sum adder. “Fundamentals of electronic circuits and devices”. PWS publishing CONCLUSION: We can conclude that the project has been successfully worked out. This can be used at multiple levels to make even larger adders. Carry skip adder and complete adder. Look-ahead carry unit By combining multiple carry look-ahead adders even larger adders can be created.howstuffworks. . How Stuff Works? www.

½  ¾ O  ¾°–°--–f ¾ O  ¾°–f€  ° ¾  ½     ¾ °–  f  ¾°–  f€ ¾  f€f f ¾°  °f°¯ ¾ f°    f¾  ½¾   f°  .¯½ ¾   ¾nf° ¯½ ¯ ° °f¾f¾ ¯ €  ¯½f°f¾f ¾    O  ¾°–.

 %  f    nfnf ° ° f °%  €°f ¾¯¾.

+ @ ¾¯½ ¾f€ f  ¾–° ½n    °n½f ¾ f° O –f  €  f°  f° - –f  € .

 f€ f ¾ nf°°  ¾  n¯½¾   – ° °nf½fn€fnf °   070 $   D €f f ¾ °f°¯ ¾f° fnn°¾ € f ¾ nf  ° f¾   f¾    °  € f f ¾ ° °¯ ¾ € ° °f¾  f°  .

° f°  f   ½ f° ¾ f°  .

°¾f  nf °%° €¯f½f¾f °% @ nn ½ n ¾f  ½ ¾¯½nf ½ ¾ °   ¾–°f¾.

f°    ¾¯ .

+   € f  nf°  ¯½ ¯ °  ° ¯f° €€  °f¾¾nf¾ f n¾¯f°¾¾    .

°  ¾°n   °   ¯ – °¯ ¾ f  f   nn  n¯½¾  €   –f ¾  °  f¯½    f ° ¯½ ¯ °f° ¾    f°      € f° °  n¯° €    °¯ ¾ ¯¾f°n½f fnf °–– ° f €¯f ° [a` {{ {Z{ {{ €   n¯° ¯¯ f      €  ° f nf¾   .

  ¾ nf #€f #¯¾ ¾ @ €f  n°f°¾ nn  fnn¯¯ f    nf ° €¯  f ° €   °   ¾¾ ¾–°€nf° n¯° €   °¯   @¾  f ° €     f¾ ¾–°€nf°  ¾ % ¾% €  °¯ ¾ nf°  ¯f  ¾°– f€ f ¾  €f ¾¯¾ ¾ f    n¯°¾€ °¯ ¾     @D@@  ° ¾ ¯½ ¯ °f°    €°f  –f  €    nf  ½ ¯f   ½fn   f° O –f   f °–    ¾°– –n  D¾°– °  ½ ¾ € –f ¾ ¾ n° ° ° €   nn ¾ °– ¯½ ¯ ° ¾°–¾¯½ .

n½¾nn°f°° °  –f  ½  ½  n½  ° ¾ –  .

 nf°  ¯½ ¯ ° f¾[a` {{ {Z{ {{ €f nf° n°¾n €¯f€ f ¾ n°° n°–f°   °½€° f€ f   n°° n°–   ¾¯ €¯ f  f° °½    ¾ n°  f   n°° n°– .

°      °½ f°      nf ½¾  f °   n  ¯f   O €  f° .

°f°  .

 n  ¯f   ¯f©€°n°€   f° .

°           .

.

D  D-  @ f   f–f¯¾¾ff ¾°–f€ f ¾ ¾ ¾O–f ¾ -–f ¾f° °  –f @ ½€€¾f€f ¾– °°  € °½¾€  f€f  @  °½ ¾– ° nf°  @ nf– ° f     ¾  f ¾ f   ° – °     –f   ½ n     ¾f° nf  .D@ .

  @  ½ €   ¾ n° f€f – ¾ ¾¯   @ f   f–f¯¾¾f ¾°–f€ f ¾  @  f€ f  nf° f   ¾°–  ¾    ¾ °¯f f½¾°€nf ° € ¾ ¯f f€#n¯°f # f¾ f°f f  f  °  n¯° €  ¯ – °f °¯ ¾  ° ¯¾¯f ½¾°€fnf .

9.

 .

@--D@   @ €°–€– ¾¾ f€ ½© n  @¾f¾¯f ¾°– ¾€f 9.

J  99.

@-   ¯ € f½½nf°¾f ¾      ½½ .

f  f   ¾ ½¾¾    n f  f –nf nn ¾°– ¯½  € f ¾  f  .  °¯ ¾  fn € f  °½¾ f .

°  n ¾   .

 €   ½ ¾ f  @¾° €f ¾f½½ nff  ¾°n  fn nf  ½½ ¾     °  € f   @  f€f½½ nff ¾¾¯½ nf¾ €€f¾ ¾–°¯     ½½ nff ¾  f ¾ ¾°n  fn€f ¯¾f€  nf  nfnf €¯ ½ ¾€f    .

@-9.

    @  €¾ ¾ ½ ° ¯f°– f 9.

 ¾ ¯f°–   f  @  €°f  f nn €   nn ¾ €¾ f° °   9.

 @  f ¯f °  9.

¾ ¯f f °   @  9.

 ¾  ° n  ¾°– € n n  ¾°  @  n  9.

 ¾  ° n f°       °  ¯f¾ f   °  ¯  @  n½½ fn¾f °¾      @  9.

 ¾  °   f  ¾½ n  ½fn ¾  ½½        @  9.

 ¾ °  f  € n¯½° ° ¯°°–  @  n¯½° °¾ f  ¯°  °   ¾½     @  n¯½° °¾ ¯°  °   9.

 f   °¾      @  f  f ¾ f  n f€  ¾ °–   n¯½° °¾     @  9.

 ¾  °  ¾  f°    ¾  €f°€f¾       .

f f f f ¾ @  n    n¯½f° ¯  °–° ¾ ¾  €f¾ f¾f  °f°¯ ¾ ¾°–nf f f f ¾ @  n f°–¾–°f¾ %9f°  %€ fn ½¾°  f¾ °€f nf¾ ½½f–f –€¯f ¾¾¾–°€nf° ½¾° %f f¾° °½¾f  % fnf¾– ° f °f ½¾°% °½¾f   % €fnf¾  °f ½¾°% °½¾f   %                .

  f f nf°  n¯ °°– ¯½  nf  f f  f ¾  ° f–  f ¾ nf°  n f  @¾ nf°  ¾  f ¯½   ¾¯f   °f– f ¾    ¯    f  ¾–°¾ f  .

° °f ¾¯ f  .

f¾½f f° n¯½  f    .

-.

D. J  nf° n°n  f   ½© n f¾ ° ¾nn ¾¾€  @  ¾¾€ ½© nf  ¯fn°–  ¾  ¾¾  -.

    n°n¾ @f¾   n°n¾f n¯   n°n¾€   n°n¾ n¯  €€J¾" ¾€€¾ n¯  9    #° f¯ °f¾ €  n°n nn¾ f°  n ¾#  ¾¾ . f .

°–f–   # n°n¾ n ¾f° nn¾#   ¾   #.n  n°nnnf°f¾¾f°  ¾–°#f¾  9J½ ¾°–                             .