FAULT ANALYSIS
5.1 AIM
To become familiar with modelling and analysis of power systems under faulted
condition and to compute the fault level, postfault voltages and currents for different
types of faults, both symmetric and unsymmetric.
5.2. OBJECTIVES
i. To carryout fault analysis for symmetrical and unsymmetrical faults in small
systems using the Thevenin’s equivalent circuit in the sequence and phase domains at
the faulted bus but without the use of software.
ii. To conduct fault analysis on a given system using software available and obtain fault
analysis report with fault level and current at the faulted point and postfault voltages
and currents in the network for the following faults
(a) Threephaseto ground
(b) Linetoground
(c) LinetoLine
(d) Doublelinetoground
iii. To study the variation in fault levels and currents in the system when it is
interconnected to neighbouring systems
51
5.4.2 Modelling Details
Approximations
The following approximations are usually made in fault analysis:
1. Prefault load currents are neglected.
2. Transformer taps are assumed to be nominal.
3. A symmetric three phase power system is considered.
4. Transmission line shunt capacitance and transformer magnetising impedances are
ignored.
5. Series resistances of transmission lines are neglected.
6. The negative sequence impedance of alternators are assumed to be the same as their
positive sequence impedance.
In the case of symmetrical faults, it is sufficient to determine the currents and voltages in
one phase. Hence the analysis is carried out on per phase basis (using + ve sequence
impedance network). In the case of unsymmetrical faults, the method of symmetrical
components is used.
52
Table 5.1 Multipliers for Short Circuit Current Calculations
A short circuit represents a structural change in the network which is equivalent to the
addition of an impedance (in the case of a symmetric short, three equal impedances) at
the location of fault. The changes in voltages and currents that result from this structural
change can be analysed using Thevenin’s theorem which states:
The changes that occur in the network voltages and currents due to the addition of an
impedance between two network nodes are identical with those voltages and currents that
would be caused by an emf placed in series with the impedance and having a magnitude
and polarity equal to the prefault voltage that existed between the nodes in question and
all other sources being zeroed.
The postfault voltages and currents in the network are obtained by superposing these
changes on the prefault voltages and currents.
Short circuit calculations in a small power system can be demonstrated using the
following twobus example.
Example 5.1
For the twobus system shown in Fig 5.1,determine the fault current at the fault point and
in other elements for a fault at bus 2 with a fault impedance zf . Load current can be
assumed to be neglible. The prefault voltages at all the buses can be assumed to be 1.0
p.u. The sub transient reactance of the generators and positive sequence reactance of
other elements are given. Assume that the resistances of all the elements are neglible.
53
1 2 3 4
G1 G2
.. S
zf
First the “Thevenin’s equivalent network” is formed (Fig 5.2a). The prefault voltage at
bus 2, V02 equals 1.0 p.u. In Fig 5.2a the “Thevenins emf” E Th = V02 = 1.0 is inserted in
series with the shortcircuit branch. The reduced Thevenin’s equivalent circuit is given in
Fig 5.2(c) in which the “Thevenins equivalent impedance”Z Th is found to be j0.144p.u. It
should be noted that ZTh is nothing but the driving point impedance at bus 2 which is the
same as the diagonal element Z22 of bus impedance matrix of the network. With reference
to Fig 5.2(c) the fault current is given by
1 2 3 4
j 0.1 j 0.12 j 0.2 j 0.12 j 0.1

~ ETh
.+
.
zf
Fig 5.2(a)
54
2
j 0.22 j 0.42

~ ETh
.+
.
zf
Fig 5.2(b)
2
ETh

~ +
.
j 0.144 . t=0
ZTh
zf If
This current is the total fault current fed by both the generators. The contribution from
each generator can be computed by noting that the total current divides in inverse
impedance ratio. For example the contribution of generator 1 is
55
Post fault currents and voltages can be obtained by superposing the current and voltage
changes caused by ETh upon the prefault state.
Since prefault currents are assumed to be zero, the post fault currents are the same as that
given above.
Equation (5.2) is also applicable to a general nbus system where ETh,q is given by the
prefault voltage at the qth bus (either taken from prefault loadflow results or assumed to
be 1.0 per unit) and XTh is given by Zqq, the diagonal element of the bus impedance
matrix.
Short circuit capacity (SCC) or fault level of a bus is defined as the product of the
prefault voltage and the post fault current and is given by
56
Thevenins source ETh,B may be assumed as 1.0 p.u
ETh,B
XTh,B
T12 + 
~
1 2 1
2
B
A A
Equivalent
Let us consider a symmetric fault at bus r of an nbus system. Let us assume that the
prefault currents are negligible.
Step 1
Draw the prefault per phase network of the system (positive sequence network) (Fig 5.4).
Obtain the positive sequence bus impedance matrix Z using Building Algorithm. All the
machine reactances should be included in the Z bus.
1
Transmission
System
: : r
o
Vor
f
z
57
The prefault bus voltage vector is given by
V1o
Vo = V2o (5.6)
Vno
Step 2
Obtain the fault current using the Thevenin’s equivalent of the system feeding the fault as
explained below.
Assume fault impedance as zf. The Thevenin’s equivalent of the system feeding the fault
impedance is given in Figure 5.5. The fault current is given by
where Zrr is the rrth diagonal element of the Bus Impedance matrix
Zrr r
ZTn
+
Vro If zf

Step 3
Obtain the Thevenin’s equivalent network (Fig 5.6) by inserting th e Thevenin’s voltage
source V0r in series with the fault impedance and compute the bus voltages using network
equation as explained below.
58
1
Transmission .
.
System .
. +
Vro
zf
f
I
If = If r
Step 4
The post fault bus voltages are given by super position of equations (5.6) and (5.8)
Vf = Vo + VT
Vf = Vo + Z If
Expanding, the above equation and substituting If from equation (5.7) we get the
postfault voltages as
59
Unsymmetrical Faults
The method of fault analysis explained for symmetrical fault can be extended to
unsymmetrical faults. The symbols used in this section represents the following.
2. Positive, negative and zero sequence voltages and currents are indicated by subscripts
+,  and 0 respectively.
3. Phase values of voltages and currents are indicated collectively by subscript p and
individually by the subscripts a, b and c.
Step 2:
Compute the sequence bus impedance matrices Z+ bus, Z  bus and Z0 bus using the
Building Algorithm.
Step 3:
Select the type, location and mathematical description of the fault. Determine the
sequence fault currents at the faulted bus using the prefault Thevenin equivalents of the
sequence networks as explained below.
LineToGround Fault
Assume that phase ‘a’ of a three phase system is connected to ground through an
impedance zf at bus q. Let the fault current be Ifaq.
q
a a’
q
b b’
q Ifbq = Ifcq = 0
c c’
Ifaq zf
510
The symmetrical component transformation converting sequence components to phase
components is given by
Ip = T Is
Where Ip and Is are phase component and sequence component current vectors
respectively.
T ¨
a2 a 1
a a2 1
Is = T1 Ip
I+q 1 a a2 Ifaq
I q =1/3 1 a2 a 0 (5.11)
I0q 1 1 1 0
Equations (5.11) and (5.12) imply that the Thevenin’s equivalent of the sequence
networks of the system are to be connected in series as in Fig 5.8
511
+ Z+,qq
Vo+q ~ I+q = Iq = Ioq = 1/3Iaf

Z,qq 3zf
Z0,qq
Similarly the sequence fault currents can be computed for linetoline and Doublelineto
ground faults [1]
Step 4: Compute the prefault and postfault sequence bus voltages and line currents
using the formulas derived below.
Vo+1 Vo+1
Vo1 0
V01 0
. .
. .
Vos = Vo+i = Voi+
Voi 0 (5.15)
Vooi 0
Vo+n .
Von .
Vo0n .
512
Postfault Voltages
As per the Thevenin theorem the postfault positive sequence bus voltages are given by
Since the prefault negative and zero sequence bus voltages are zero, the postfault
negative sequence voltages are
Vf1 = Z1q If –q
……………….
Vfq = Zqq If –q (5.19)
……………….
Vfn = Znq If –q
Vf01 = Z01qIf0q
………………
Vf0q = Z0qqIf0q (5.20)
…………… …
Vf0n = Z0nqIf0q
513
Negative sequence line current
Ifij = yij(Vfi – Vfj)
Step 5: The phase voltages and currents are computed from the sequence voltages
and currents using symmetrical component transformation.
Vp = TVs
Ip = TIs
where T is the transformation matrix
5.5. EXERCISES
5.5.1. It is proposed to conduct fault analysis on two alternative configurations of the
4  bus system given in Fig. 5.9.
2 3
L1
1 4
G1 T1 T2 G2
xn
L2
xn
Case (a)
Case (a)
Case (b)
Case (b)
The first configuration, case (a), comprises starstar transformers and the second
configuration, case (b), comprises stardelta transformers.
514
(i) For a three phase to ground (solid) fault at bus 4, determine the fault current
and MVA at faulted bus, post fault bus voltages, fault current distribution in
different elements of the network using Thevenin equivalent circuit. Draw a
singleline diagram showing the above results.
(ii) Check the results obtained in (i) using available fault analysis software.
5.5.2. (i) For the system given in 5.5.1. apply a linetoground (solid) fault at bus 4 and
determine the fault current and fault MVA at faulted bus, postfault
bus voltages and fault current contribution by each generator, both in
sequence and phase domain using the available software.
(ii) Check the fault current at bus 4 computed in (i) above using Thevenin
equivalent and the respective sequence network connection.
5.5.3. Repeat 5.5.2. (i) and (ii) for a linetoline fault at bus 4.
5.5.4. Repeat 5.5.2. (i) and (ii) for a double linetoground fault at bus 4.
5.5.5. Conduct fault analysis on the 14 bus system given in Annexure 5.1 using the
available software and obtain the fault MVA at each one of the buses, the post
fault bus voltages and currents (phase components and sequence components) for
the following faults:
5.6 REFERENCE
[1] O.I. Elgerd, “Electric Energy Systems Theory An Introduction”, Tata McGraw Hill
Publishing Co Ltd, New Delhi, 2003.
515
Annexure 5.1 Single Line Diagram – 14 Bus System
BUS 12 BUS 4
LINE 7
TRAN 2
BUS 10
LINE 10
LINE 5
LINE 13
TRAN 3
LINE 4
LINE 6
BUS 11
BUS 6 BUS 5
BUS 9
LINE 3
LINE 9
LINE 2
LINE 8
LINE 12
BUS 2
BUS 1
BUS 14
LINE 1
TRAN 1
LINE 14
TRAN 4
BUS 7 BUS 8
LINE 11
BUS 13
516