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Inductive Coupling Aware Explicit Cross-Talk and Delay formula for On-Chip VLSI RLCG Interconnects Using Difference Model Approach

1

Rajib Kar, 2 V. Maheshwari, Aman Choudhary, Abhishek Singh, 3Ashis K. Mal, A.K.Bhattacharjee

Department of Electronics and Communication Engg. National Institute of Technology, Durgapur-9, West Bengal, INDIA 1 rajibkarece@gmail.com , 2maheshwari_vikas1982@yahoo.com, 3 toakmal@gmail.com

Abstract In this paper we have proposed a closed form delay and cross-talk noise formula for on-chip VLSI interconnect in the presence of inductive coupling. Inductive coupling effect has become an important issue in high frequency multi-layered VLSI interconnection systems. We first analytically derived the amount of crosstalk noise that would be induced on the quite victim line due to the transiting aggressor line. From that we have proposed an efficient model to estimate the on-chip interconnect delay in the presence of inductive coupling. We also have analytically shown the effect of inductive coupling onto the victim line. Onchip inductive effects are becoming predominant in deep submicron (DSM) interconnects due to increasing clock speeds, circuit complexity and decreasing interconnect lengths. Inductance causes noise in the signal waveforms, which can adversely affect the performance of the circuit and signal integrity. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. This paper proposes a difference model approach to derive crosstalk in the transform domain. A closed form solution for crosstalk is obtained by incorporating initial conditions using difference modal approach for distributed RLCG Interconnects. An inefficient evaluation of the crosstalk could be at the origin of a malfunction of the circuit. Cross talk can be analyzed by computing the signal linkage between aggressor or attacker nets and victim nets. The attacker net carries a signal that couples to the victim net through the parasitic capacitance. To determine the effects that this cross talk will have on circuit operation, the resulting delays and logic levels for the victim nets must be computed. The comparison made between the results obtained by using our formula and that of SPICE, justifies the effectiveness of our approach. 978-1-4244-6589-7/10/$26.00 2010 IEEE Keywords- Distributed RLCG, On-Chip Interconnect, Crosstalk, Delay Calculation,Inductive Coupling, Difference Model.

greatly sub-micron, the order of coupling between lines reaches to some severe values so that we cant be indifferent to the ampleness of the noise due to coupling [2]. As integrated

I. INTRODUCTION Cross-talk is of considerable importance in high speed digital circuits. In very high frequency domain designs, the mutual inductance between interconnects makes considerable effect on the interconnect performance parameters. The design techniques in sub-micron technologies increase effects of coupling in interconnections [1]. Indeed, in technologies

circuit feature sizes continue to scale well below 0.18 microns, active device counts are reaching hundreds of millions [3]. The amount of interconnects among the devices tends to grow super linearly with the transistor counts, and the chip area is often limited by the physical interconnect area. Several factors bound to the technology contribute to the increase of crosstalk problems: the increase of the number of metal layers [4], the increase of the line thickness, the density of integration and the reduction of the spacing between lines. Among all these problems, capacitive and inductive coupling induced cross talk is the issue that has been seen by an increasing number of backend vendors. Cross talk typically happens between two adjacent wires when their cross coupling capacitance and mutual inductance is sufficiently large to influence each others electrical characteristics. Especially for an on-chip bus crosstalk noise is a serious problem for VLSI designs. In bus structure, crosstalk immunity is more important because long interconnect wires often run together and in parallel. Interconnect lines may be coupled to study the effects of mutual inductive and capacitive coupling, such as crosstalk. It is possible to use both a distributed and a lumped model for these macro models. Models are already for proposed using RLC domain but for very high frequency models conductance (G) should be taken into consideration. There are few proposals made on delay and crosstalk modeling taking G into account and cross coupling capacitance. But to the best of our knowledge there is no such closed form approach available in the literature which considers the inductive coupling into account. In this paper, we have considered the effect of mutual inductance of highly coupled RLCG interconnects using difference model approach [8]. The rest of the paper is organized as follows: Section 2 discusses the basic theory, transmission line model, crosstalk, mutual inductance. Section 3 describes the difference model approach and the proposed delay and crosstalk noise model.

Section 4 shows the experimental and simulation results. Finally section 5 concludes the paper. II. BASIC THEORY

A. Transmission Line Models Defining the point at which an interconnect should be treated as a transmission line and hence reflection analysis applied has no consensus of opinion. A rule of thumb is when the delay from one end to other is greater than risetime/2, the line is considered electrically long. If the delay is less than risetime/2, the line is electrically short. A transmission line [5] can be described at the circuit level using series inductance and resistance combined with shunt capacitance and conductance. An infinitesimal unit length of the transmission line looks like the circuit in Figure 1. In Figure 1, R = Series Resistance per unit length L = Series Inductance per unit length G = Shunt Conductance per unit length C = Shunt Capacitance per unit length.

magnitude is dependent on rise time, signal line geometry and net configuration (type of terminations, etc.). A common method of shielding is placing ground or power lines at the sides of a victim signal line to reduce noise and delay uncertainty [11]. The crosstalk between two coupled interconnects is often neglected when a shield is inserted, significantly underestimating the coupling noise. The crosstalk noise between two shielded interconnects can produce a peak noise of 15% of VDD in a 0.18 um CMOS technology [12]. An accurate estimate of the peak noise for shielded interconnects is therefore necessary. In the complicated multilayered interconnect system, signal coupling and delay strongly affect circuit performances. Thus, accurate interconnect characterization and modeling are essential for todays VLSI circuit design. Two major impacts of cross talk are: (1) cross talk induced delays, which change the signal propagation time, and thus may lead to setup or hold time failures; (2) cross talk glitches, which may cause voltage spikes on wire, resulting in false logic behavior. Crosstalk affects mutual inductance as well as inter-wire capacitance. When the connectors in high speed digital designs are considered, the mutual inductance plays a predominant role compared to the inter-wire capacitance. The effect of mutual inductance is significant in deep submicron technology (DSM) technology since the spacing between two adjacent bus lines is very small. The mutual inductance induces a current from an aggressor line onto a victim line which causes crosstalk between connector lines. Which in turn alters the performance parameters of onchip VLSI interconnect system. In multi-conductor systems, crosstalk can cause two detrimental effects: first, crosstalk will change the performance of the transmission lines in a bus by modifying the effective characteristic impedance and propagation velocity. Secondly, crosstalk will induce noise onto other lines, which may further degrade the signal integrity and reduce noise margins C. Mutual Inductance The mutual inductance M of two coupled inductances L1 and L2 is equal to the mutually induced voltage in one inductance divided by the rate of change of current in the other inductance:

di M = E2 m / 1 dt di M = E1m / 2 dt

It is critical to model the transmission path when designing a high-performance, high-speed serial interconnection system. The transmission path may include long transmission lines, connectors, vias and crosstalk from adjacent interconnects. Values for R, L, C, and G are extracted automatically. The extracted values for the parameters R, L, C, and G for 180 nm technology given are in Table 1.

TABLE I. RLCG P ARAMETERS FOR A MINIMUM- SIZED WIRES IN A 0.18M T ECHNOLOGY. WHERE THE CONDUCTANCE IS A FUNCTION OF FREQUENCY, F Parameter(s) Resistance(R) Inductance(L) Capacitance(G) Capacitance(C) Mutual Inductance(M) Value/m 120 k/m 270 nH/m 15f pS/m 240 pF/m 54 nH/m

(1) (2)

If the self induced voltages of the inductances L1 and L2 are E1s and E2s , respectively, for the same rates of change of the current that produced the mutually induced voltages E1m and E2m, then:

E M = 2 m L1 E 1s

(3) (4)

B. Cross-Talk Crosstalk is defined as the energy imparted to a transmission line due to signals in adjacent lines. Crosstalk

E M = 1m L2 E 2s

M = E1m E2 m 1/ 2 L1 L2 = k M (L1 L2 ) E1s E2 s

(5)

Where kM is the mutual coupling coefficient of the two inductances L1 and L2. If the coupling between the two then the mutual inductances L1 and L2 isperfect, inductance M is: M = (L1L2) D. Odd Mode When two coupled transmission lines are driven with voltages of equal magnitude and 1800 out of phase with each other, odd mode propagation occurs. The effective capacitance of the transmission line will increase by twice the mutual capacitance, and the equivalent inductance will decrease by the mutual inductance. In Figure 2, a typical transmission line model is considered where the mutual inductance between aggressor and victim connector is represented as M12. L1 and L2 represent the self inductances of aggressor and victim nodes while Cc, C, denote the coupling capacitance between aggressor and victim, self capacitance respectively.

E. Even Mode When two coupled transmission lines are driven with voltages of equal magnitude and in phase with each other, even mode propagation occurs. In this case, the effective capacitance of the transmission line will be decreased by the mutual capacitance and the equivalent inductance will increase by the mutual inductance. Thus, in even-mode propagation, the currents will be of equal magnitude and flow in the same direction [7]. The effective inductance, due to even mode of propagation is then given by equation (7).

Leven = L1 + L2

(7)

III.

Assuming that L1 = L2 = L0, the currents will be of equal magnitude but flow in opposite direction [7]. Thus, the effective inductance due to odd mode of propagation is given by Equation (6).

Lodd = L1 L2

(6)

A. Difference Model The frequency-domain difference approximation [10] procedure is more general, because it can directly handle lines with arbitrary frequency dependent parameters or lines characterized by data measured in frequency-domain. The time domain difference approximation procedure should be employed only if transient characteristics are available [10]. For a single RLCG line, the analytical expressions are obtained for the transient characteristics and limiting values for all the modules of the system and device models. The difference approximation procedure is applied to both the characteristic admittances and propagation functions and the resulting timedomain device models have the same form as the frequency domain models. The difference approximation procedure involves an approximation of the dynamic part of the system transfer function, given by equations (14) and (15), with the complex rational series or distorted part of the transient characteristic with the real exponential series. This criterion results in simple and efficient approximation algorithms, and requires a minimal number of the original-function samples to be available, which is important if the line is characterized for delay and crosstalk. B. Analysis of Cross Talk using Difference Model We first consider the interconnect system consisting of single uniform line and ground as shown in Figure 5, and assume the length of the line is d.

The magnetic field pattern of the two conductors in oddmode is shown in figure 3.

I1 = I2 =

(16) (17)

Here, the Ai's are constants whose values are obtained from the boundary conditions. The constants o and e are defined as even and odd mode propagation constants [9]. These constants are given by

e =

o =

Figure 5. Equivalent circuit of each uniform section

{R + s( L + M ) }{G + sC}

{R + s ( L M ) }{G + sC }

(18) (19)

Similarly, Z0e and Z0o are defined as even and odd mode characteristic impedances and can be expressed as

Z oe =

Z oo =

The electrical parameters of each section are Rdx, Ldx, Cdx and Gdx, respectively, where R, L, C and G are per-unit length resistance, inductance, capacitance and conductance of the line. Using Kirchoffs Voltage Law we can write,

dI1 ( x, t ) dI ( x, t ) + M (i, j )dx 2 + V1 ( x + dx , t ) (8) dt dt dI ( x, t ) dI ( x, t ) V2 ( x, t ) = I 2 ( x, t ) Rdx + Ldx 2 + M (i, j )dx 1 + V2 ( x + dx , t ) dt dt V1 ( x, t ) = I1 ( x, t ) Rdx + Ldx

R + s( L + M ) G + sC

R + s( L M ) G + sC

(20) (21)

dV1 ( x + dx, t ) + I1 ( x + dx, t ) dt dV ( x + dx, t ) I 2 ( x, t ) = GdxV2 ( x + dx, t ) + Cdx 2 + I 2 ( x + dx, t ) dt I1 ( x, t ) = GdxV1 ( x + dx, t ) + Cdx

(9)

Consider two distributed coupled RLCG lines. Let R, L, C and G be the line resistance, self-inductance, and ground capacitance and the conductance matrix per unit length of the line, respectively. The lines are inductively coupled. M be the per unit length mutual inductance between the lines. At any point z along the line, the voltage and current waveforms on line 1 and line 2 satisfy following set of differential equations.

V1 = ( R + sL ) I1 + sMI 2 x

V2 = ( R + sL) I 2 + sMI1 x

I 1 G = s (C + )V s x

I 2 G = s (C + )V2 x s

Here, V1(x, t), I1(x, t) and V2(x, t), I2(x, t) are voltage and current waveforms on lines 1 and 2 respectively. The generic solution of the above set of equations is given by

(14) (15)

We consider two coupled interconnects where one line is switching and the other is quiet. The driver for the active line is replaced with a voltage ramp Vin in series with a Thevenin resistance RS. For the quiet line, the driver is modeled as a linear resistance RV connected to ground. Receivers at the farend of the lines are modeled as lumped capacitive loads. For global interconnect in typical CMOS designs, the receiver has a small input capacitance. From a transmission line point of view, a small capacitive load at the far-end of the line represents large termination impedance. For example, a far-end capacitive load of 20fF at 1 GHz frequency corresponds to an impedance of around 8K. This impedance is significantly higher compared to the characteristic line impedance (which normally around 50-60). As a result, the far-end reflection coefficient in practical interconnects is around +1 [9]. This implies that any forward traveling wave is completely reflected at the far-end and the voltage at the far-end of the line is doubled due to the superposition of the incident voltage wave and the reflected reverse wave. In the generic solution given in (10)-(13), the amplitude of the reflected wave can be set equal to the incident wave and the solution of (14)-(17) can be simplified to

V1 = A1 (e e x + e e x ) + A3 (e o x + e o x )

(22)

V2 = A1 (e e x + e e x ) A3 (e o x + e o x )

I1 =

I2 =

(23) (24)

For high frequency, where R<<(L+M) , from equation (36) & (37) , the output crosstalk voltage

V2 ( x = d ) = Vin ( s) RGLMd 2 4C ( L2 M 2 ) 2 s 2

A1 e x e x A (e e ) + 3 (e o x e o x ) Z oe Z oo

A1 ex e x A (e e ) 3 (e o x e o x ) Z oe Z oo

(38)

(25)

V2 ( s ) = V0 RGLMd 2 4C ( L2 M 2 ) 2 s 3

(39)

At the near-end (z = 0), the active line (line 1) is driven by a voltage source Vin through a resistance Rs and the victim line (line 2) is connected to ground through resistance RV. Applying these boundary conditions to Equations (22)-(25) gives,

V2 (t ) = Vo RGLMd 2 8C ( L2 M 2 ) 2 t2

(40)

Vin V1 ( x = 0) Vin ( A1 + A3 ) = = Rs A1 A I1 ( x = 0) + 2 Z oe Z oo

(26)

V2 ( x = 0) ( A1 A3 ) = = Rv A1 A I 2 ( x = 0) 2 Z oe Z oo

A1 ( x = d ) = Vin Z oe ( Z oo + Rv ) ( Z oe + Rs )( Z oo + Rv ) + ( Z oe + Rv )( Z oo + Rs )

C. Analysis of Cross-Talk Delay using Difference Model For calculation of the delay expression we consider the 50% rise time when v2 (t) =0.5vin. From equation (39), we can get the delay expression for the case of high frequency as,

0.5V0 = V0 RLGMd 2 8C L2 M 2

(27)

2 2 d

(41)

td = C 2( L2 M 2 ) d RGLM

(42)

A2 ( x = d ) = Vin

Z oo ( Z oe + Rv ) ( Z oe + Rs )( Z oo + Rv ) + ( Z oe + Rv )( Z oo + Rs )

The above equations (40) and (42) are our proposed closed form expression for crosstalk noise and delay when mutual inductance between two interconnect is considered. IV. SIMULATION RESULTS The configuration of circuit for simulation is shown in Figure 2. The left end of the first line is excited by 1-V trapezoidal form voltage with rise/fall times 0.5 ns and a pulse width of 1 ns. Other parameters of lumped elements are RS=RV=50 ohms and CL=1pF. The high-speed interconnect system consist of two coupled interconnect lines and ground and the length of the lines is d =10 mm. Other distributed parameters are given in the table1. The aggressor line undergoes a rising transition. Then the crosstalk noises of the near end and the far end of the adjacent interconnect line between two models are shown in Figure 7.

V1 ( x = d ) = A1 (e e d + e ed ) + A3 (e o d + e o d )

(30)

V2 ( x = d ) = A1 (e e d + e e d ) A3 (e o d + e o d ) (31)

Since from figure 2

V2 ( x = 0) = 0

So

A1 = A3

(32)

V1 ( x = 0) = Vin = 4 A1

(33) (34)

in

V V 2 ( x = d ) = in (e e d + e e d ) (e o d + e o d ) 4

(35)

V2 ( x = d ) = Vin 2 (e o2 )d 2 4

(36)

By using binomial expansion in equation (18) & (19), we have RGLM (37) ( 2 2 ) =

e o

C ( L2 M 2 ) 2 s 2

Figure 7. Near end and Far end crosstalk noises between two models

In the Table 2, the 50% delay of interconnect line are calculated under the different source impedance and load admittance and compared with SPICE results. The results obtained by using our model are at good accuracy with that of SPICE results. This justifies the effectiveness of our approach.

TABLE II. 50% DELAY OF DIFFERENT SOURCE AND LOAD

REFERENCES

L. Gal, On-chip crosstalk-the new signal integrity challenge, IEEE Custom Integrated Circuits Conference, pp.251-254, 1995. [2] Semiconductor Industry Association, National Technology Roadmap for semiconductors, 1997. [3] Shien-Yang Wu, Boon-Khim Liew, K.L. Young, C.H.Yu, and S.CAnalysis of Interconnect Delay for 0.18m Technology and Beyond IEEE International Conference Interconnect Technology, May 1999, pp. 68 70. [4] S. Delmas-Bendhia, F. Caignet, E. Sicard, On Chip Crosstalk Characterization on Deep Submicron Buses, IEEE Iternational Caracas Conference on Devices, Circuits and Systems, 2000. [5] Saihua Lin, Huazhong Yang, A novel d/n RLCG transmission line model considering complex RC(L) loads, submitted to IEEE Trans. Computer-Aided Design of Integr.Circuits Syst.,2006. [6] L. He, N. Chang, S. Lin and O. S. Nakgawa, An Efficient Inductance Modeling for On-Chip Interconnects, Proc Custom Integrated Circuits Conference, pp. 457-460, 1999. [7] Clayton R.Paul, Keith W.Whites, Syed A. Nasar Reading Introduction to Electromagnetic Fields" McGraw Hill 1998. [8] J.V.R. Ravindra, M.B. Srinivas Modeling and Analysis of Crosstalk for Distributed RLC Interconnects using Difference Model Approach Proceedings of the 20th annual conference on Integrated circuits and systems design, Pages: 207 211, 2007. [9] B. Young, Digital Signal Integrity, Prentice Hall, 2001 [10] D.B. Kuznetsov and J. E. Schutt-Aine, Optimum transient simulation of transmission lines," IEEE Transactions on Circuits and Systems I vol. 43, pp. 110-121, Feb. 1996. [11] J. Zhang and E. G. Friedman, Effect of Shield Insertion on Reducing Crosstalk Noise between Coupled Interconnects, Proceeding of the IEEE International Symposium on Circuit and Systems, Vol. 2, pp. 529532, May 2004. [12] Y. Massoud, J. Kawa, D. MacMillen, J. White, Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk, IEEE/ACM DAC 2001, June 18-22, 2001, Las Vegas, Nevada, USA. [1]

Source

RS ()

Load

CL (pF)

New model

Td (ps)

SPICE

TS (ps)

% Error

25 50 75 100 125

V. CONCLUSIONS In this paper, we have proposed efficient closed form expressions for crosstalk noise and delay calculation for highspeed coupled interconnects systems with effect of the mutual inductance. We considered a distributed RLCG transmission line model of interconnects using difference model approach. We find that the inductive coupling effect has a great effect on both the near end and far end response of the victim lines. For the far end response, if the peak of the crosstalk noise voltage is sufficient large, it may lead to a large amount of error for the estimation of different performance parameters. Simulation results demonstrate the validity and correctness of our method.

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