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ECE-342 Lab 5: BJT Amplifier Sample Lab Report

Don Hummels, Someone Else September 2, 2008
Abstract The design and test of a common-emitter BJT amplifier is described. The amplifier uses two NPN transistors to form a current-source bias network, and a single 2N2222A NPN transistor as the common-emitter amplifier. The amplifier requires +10 V and −5 V supplies, and achieved a measured 46.5 dB gain with 7.8 kΩ input impedance at 1 kHz, and 1.2 MHz 3-dB Bandwidth. Component selection and test procedures are described.

This sample report from the 2007 ECE-342 Lab 5 assignment is meant to serve as a guide for lab reports for ECE-342 and ECE-343

Required Section: Very short description of what is in this report. Enough information so that a reader can assess whether this report is one that they should check out.

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. 2. . . . . 9 4. . . .Contents 1 2 Introduction Circuit Development and Analysis 2. . . . 10 Discussion Conclusion 12 13 14 15 16 5 6 A Lab 5 Assignment B Time Management and Documentation C General Notes for ECE-343 Lab Reports 2 . . . .2 Design of the Current Source: Selection of R1 . . . . . . . . . . . . . .1 CE Amplifier: Selection of RL and IC3 . . . . . . .3 Low-Frequency Performance: Selection of C . . . . . . . . . . . 8 4. . . . . . . . . Simulated Performance 3 3 4 5 6 7 3 4 Experimental Implementation 8 4. . . . 2.3 Measurement results . . . . . . . . . . . . . . . . . . . . .2 Measurement of the output signal . . . . . .1 Generation of the input signal . . . . . . . . . . . . . . . . . . . . .

and lab measurements verify that the amplifier achieved a peak gain of 46. The amplifier was constructed using a solderless breadboard. implementation and test of a common-emitter amplifier using 2N2222A NPN BJT transistors. the current source components are determined to provide the required bias current IC3 . Do not assume that the reader has assignment sheet.5 dB at 5 kHz. Generally avoid equations. included as Appendix A. (Leave the details to later sections. Section 2 describes the development of the amplifier. resistor R1 and transistors Q1 and Q2 form a current source used to determine the bias current IC3 . the required bias current IC3 and resistor value RL are determined by assuming that the capacitor acts as a short at signal frequencies. and addresses specific questions associated with the lab assignment. and a short outline of the report that will follow. and experimental measurements and procedures are presented in Section 4.1.2. Specific Lab 5 requirements are summarized in the Lab 5 Assignment sheet. so a section similar to this should be included in the report. Second. and is designed to achieve a nominal “mid-band” gain of 46 dB.2 MHz. Circuit simulation results are presented in Section 3. 1 3 . The amplifier requires +10 V and −5 V supplies. These design steps are presented in Sections 2. Your report should stand on its own.1 A two-transistor current source is used to provide the required bias current for the single-transistor common-emitter amplifier. A schematic of the amplifier is shown in Figure 1. including the selection of components and the prediction of the lower cutoff frequency.1 Introduction Required Section: Give an overview of the lab. The Lab 5 assignment actually specified 2N3904 NPN transistors. the effect of the capacitor C is examined by including its finite impedance in the small-signal analysis. Section 5 gives a summary and comparison of the simulated and measured results.) Do give a preview of the results. 2 Circuit Development and Analysis Most of your labs will include some design choices. The 2N2222A device was substituted for this lab because the 2N3904 devices were out of stock.3 respectively. and 2. and the capacitor C is used to essentially ground the emitter of Q3 as the signal frequency increases. with 3-dB band ranging from 73 Hz to 1. In the schematic. The circuit design proceeds as follows: First. Q3 and RL form the common-emitter amplifier. Finally. 2. This report describes the design.

The model is based on an assumptions that the capacitor impedance is small at the input signal frequencies (and may be considered a short).8 mV is the thermal voltage.516 mA (5) . in which the value of RL is made to be as large as possible. 2. (2) where VT ≈ 25. (3) Avo = vin To achieve the desired gain of 46 dB. and the transistor output resistance ro is large compared to RL . Substituting (1) into this gives the required relationship between RL and the bias current IC3 : 200VT 5. and β is the current gain of Q3 . The corresponding small-signal model of the circuit is also shown. The small signal parameters are IC3 gm = (1) VT rπ = β/gm .1 µF ≤ C ≤ 100 µF Q1 C Figure 1: Circuit schematic for the common-emitter BJT amplifier. RL = 10 kΩ 4 IC3 = 0.+10 v IC3 vin R1 IR i in IC2 Q2 −5 v RL vout Q3 Design Requirements: Amplifier Gain: 46 dB 1 kΩ ≤ RL ≤ 10 kΩ 47. and may be neglected. set gm RL = 200.16 IC3 = ≈ (4) RL RL There are many valid choices for RL and IC3 . Circuit analysis of the small signal model yields the amplifier gain vout = −gm RL .1 CE Amplifier: Selection of RL and IC3 Figure 2 shows the common-emitter amplifier with an ideal current source replacing the bias network of the original schematic. This report describes the minimum power choice.

and the corresponding small-signal model. 5 .516 mA. The input resistance of the amplifier is Rin = rπ = β/gm = β(RL /200). (6) Selecting a large value of RL has increased the input resistance.+10 v IC3 vin RL vout Q3 vin B v be rπ E IC2 C C g m be v vout RL Figure 2: The common-emitter amplifier with bias network replaced by an ideal current source.5 kΩ (7) 2. setting IC3 = 5.16/RL implies that the DC drop across RL will be 5. In this case. If the transistors are matched to each other. the currents IC2 and IR must also agree.84 V. The resistor R1 determines IR .16 = 4. The actual value is difficult to predict. the value of R1 is determined to provide the desired value of IC3 = 0.16 V. and the transistor Q2 reproduces this current as IC2 = IR . Regardless of the selection of RL . the design goal is IC2 = IC3 = 0. since the 2N2222A transistor only specifies β > 50 (at Ic = 1 mA). the design here is based on a large-β approximation. (8) The base-emitter voltages of Q1 and Q2 are tied together. Since the actual value of β cannot be anticipated. So the DC component of vOU T will be Vout = 10 − 5.2 Design of the Current Source: Selection of R1 Referring back to Figure 1.516 mA. Using RL = 10 kΩ gives Rin ≥ 2. All base currents are assumed to be negligible. The selection of RL does not change the output dynamic range.

vin and vbe are related by adding the voltages across rπ and across the capacitor. The resulting small-signal model is shown in Figure 3. If Q1 and Q2 are both forward active. The transfer function of the amplifier is determined by observing that the input current is given by vbe /rπ . so R1 is determined by IR = 0.33 kΩ.516 mA = 4.3 Low-Frequency Performance: Selection of C The low-frequency behavior of the amplifier is predicted by including the impedance of the capacitor in the small-signal analysis. (13) 1 (vbe /rπ + gm vbe ) Cs (12) .3 V R1 (10) (11) (9) R1 = 8.7 V.3 V. The voltage drop across R1 is approximately 4.vin B v be v be rπ E 1 Cs C g m be v vout RL rπ Figure 3: The small-signal model of the amplifier including the capacitor impedance. 2. vBEQ1 = vBEQ2 ≈ 0. vin = vbe + Solving for vbe gives vbe = vin 1 1 + gm /Cs + 1/(rπ Cs) 6 ≈ vin 1 1 + gm /Cs .

and a value of C = 47. By decreasing R1 . the approximate 0. In any case. R1 = 8.1 µF) showed an amplifier gain of 45. This 3% error in vout /vin is in part a result of neglecting the transistor output impedance ro in Section 2. the bias currents are increased. (15) The capacitor C determines the lower 3-dB cutoff frequency ω3 = gm /C.02 Ω−1 25.516 mA = 0. C = 47. so the third term of the denominator is a factor of β smaller than the second term. Also. and C = 47.0 kΩ results in a gain of 46 dB. hardware components were selected with values close to the desired values of R1 = 8 kΩ. Simulations using the component values derived in Section 2 (RL = 10 kΩ. The 7 . The gain of the circuit can be increased by increasing RL (not allowed in this lab beyond 10 kΩ).8 mV 0.516 mA.33 kΩ. RL = 10 kΩ. (16) (17) (18) 3 Simulated Performance Clearly distinguish between simulated an measured results. and the transconductance gm of Q3 increases. or a lab measurement.The approximation is justified by rπ = β/gm .6 Hz. as in this report. (14) The system transfer function is a high pass characteristic vout = (−gm RL ) vin s s + gm /C . For this lab. Based on the simulation results. the ro of transistor Q3 is approximately 200 kΩ (based upon VA = 100 V taken from the SPICE model for the 2N2222). One way to accomplish this is to separate the results into two sections.1 µF was selected based upon available components. The output voltage is then vout = −gm RL vbe = vin −gm RL 1 + gm /Cs .3 dB lower than the desired gain of 46 dB. 0.7 dB. causing the gain to be underestimated by approximately 2%. For the collector current of 0. Using IC3 from (5) gives gm = 0. or by decreasing R1 .02 Ω−1 = 424 rad/s ω3 = 47. Trial and error indicated that using R1 = 8.7 V base emitter voltage of Q1 was slightly high relative to the simulation.1 µF f3 = ω3 /(2π) = 67. the grader should never wonder whether a result comes from a simulation. Circuit simulations were performed using the Micro-Cap circuit simulator.1 µF. the lower band edge was not specified. Including this value in the small-signal analysis gives a 5% reduction in the calculated gain.

The capacitor “C” was actually implemented as two capacitors in parallel: a 47 µF electrolytic capacitor.28 kHz) = 46. The ceramic capacitor was included to improve the performance of the system at high frequencies. The corresponding simulated gain and 3-dB corner frequencies are also indicated in the table. 4 Experimental Implementation Required Section: Show your final schematic with all component values.915 kΩ RL = 9. and a 0. Present the results of the measurements Figure 4 shows the final schematic of the amplifier indicating the measured values of all components. A resistor voltage divider was used to produce a low-level signal at at a much lower output impedance. Additional circuitry used to create the input signal vin and to measure the output signal vout are discussed in Sections 4. and input impedance. where the simulated curves (using these measured component values) are presented with the hardware measurements.1 Generation of the input signal An Agilent 33120A function generator was used to provide the amplifier input signal for test. and can produce a sinusoidal output at amplitudes down to 50 mV peak-to-peak to a matched load (50 mV peak to a high impedance load).1 µF ceramic capacitor. The generator has a 50 Ω output impedance.1 Hz Upper 3-dB corner frequency = 719.996 kΩ C = 47.6 kΩ at 1 kHz Table 1: Measured component values used in the hardware implementation.1 µF peak gain (at 8.7 kHz Input Impedance |vin /iin | = 4. 4. To test this amplifier with 46 dB of gain. actual component values for the implementation are listed in Table 1. much smaller input signals are required.06 dB Lower 3-dB corner frequency = 70. and the corresponding (simulated) amplifier gain. Resistors with nominal val8 .R1 = 7. where the electrolytic capacitor fails.1 and 4. 3-dB corner frequencies. More detailed plots of the simulated performance are given in Section 4.2 respectively. and tell about how you made the measurements.

This ensures that the amplifier would not be effected by the capacitive loading of the scope probe.1u −5 v Figure 4: Final schematic diagram of the amplifier showing measured component values. the simulated upper 3-dB frequency of the amplifier was 720 kHz. 4. Figure 5 gives the schematic showing the actual resistor values used. For test. Simulations predict that the amplifier input impedance will remain above 80 Ω over the entire range of test frequencies.) 9 . With the probe connected directly to the output.993k Scope Probe (13 pF) Q2 C 47.996k vout Output Buffer +10 v vin R1 7. and the scope was disconnected from the input at high frequencies. Including this load in the simulation significantly changed the bandwidth of the amplifier. ues of 150 Ω and 1 Ω were used to give an output amplitude which was ≈ 1/200th of the function generator setting with an output impedance of approximately 1 Ω.2 Measurement of the output signal An HP 54603B oscilloscope was used to measure output signal levels. the scope input presents a capacitive load to the circuit of approximately 13 pF. the function generator amplitude was set to provide a 5 mV peak-to-peak sinusoidal input (vin ) to the amplifier.915k Q1 −5 v i in Q3 vout vout2 9. Since the source impedance for this input configuration is low (≈ 1 Ω). (Without the scope probes. However. the upper 3-dB bandwidth dropped to 468 kHz. For all tests. the amplifier input amplitude should remain at a nearly constant level as the input frequency is adjusted.All Transistors: 2N2222 Amplifier +10 v RL 9. the amplifier input level was verified at 1 kHz using an oscilloscope.

038 V 203. Hardware measurements are indicated by the plot symbols. the peak-to-peak amplitude of vout2 was measured using the oscilloscope. Figure 4 shows the schematic of the output signal buffer. and compared to the value obtained without the 10 kΩ resistor (V0 ).838 vin To Amplifier (Rin ) Figure 5: Generation of small input signals using a resistor voltage divider. The peak-to-peak amplitude of vout2 was then measured (V10k ).Input Signal Source Function Generator 50 152. and that signal gains calculated based on vout2 were virtually indistinguishable from those calculated from vout . The actual schematic with measured component values is shown on the left. while the plotted curve shows the results of the Micro-Cap simulation. 4.038 Thevenin Equivalent 1. To measure the input impedance of the amplifier. a 10 kΩ resistor was inserted between the signal source and the amplifier input.3 Measurement results Figure 6 shows a plot of the amplifier gain for frequencies ranging from 10 Hz to 10 MHz. and the Thevenin equivalent of the network is on the right. To avoid problems associated with loading the amplifier with the scope probe. the measurements are indicated by plot symbols.033 1. The attenuation 10 . Simulations were used to verify that probing the buffer output vout2 did not significantly change the amplifier performance. Measured results are all for a 5 mV peak-to-peak input signal (vin ). Figure 7 shows a plot of the amplifier input impedance over the same band of frequencies. an emitter-follower was used to buffer the output signal to the oscilloscope. while the plotted curve represents the results of the simulation. and used to calculate the gain. Again. At each frequency.8 vin V 1.

11 .50 45 40 Gain (dB) 35 30 25 20 1 10 10 2 10 3 10 Frequency (Hz) 4 10 5 10 6 10 7 Figure 6: Amplifier gain. while the plot symbols indicate measured data. The solid curve shows the results of the Micro-Cap simulation.

The error could be caused by mis-matches between transistors Q1 and Q2 (changing the bias current). 12 . indicates the signal loss at the amplifier input. the expected results.5 dB deviation corresponds to a 6% error in the value of vout /vin . V0 Rin + 10 kΩ V10k /V0 Rin = 1 − V10k /V0 (19) (10 kΩ). or by an imperfect SPICE model for transistor Q3 . This 0.5 dB higher than the predicted value of 46 dB.measured results agree (or not) with dictions. the experimental results agree reasonably well with the simulation pre. If Rin is the amplifier input.10 5 Input Impedance Magnitude(Ω) 10 4 10 3 10 2 10 1 10 1 10 2 10 3 10 Frequency (Hz) 4 10 5 10 6 10 7 Figure 7: Amplifier input impedance. Table 2 summarizes specific amplifier specifications. The solid curve shows the results of the Micro-Cap simulation. while the plot symbols indicate measured data. The gain of the hardware implementation was 0. then V10k Rin = . (20) 5 Discussion Required Section: Discuss how your In general.

g. Since the amplifier input impedance Rin depends upon the β of Q3 .2 MHz was significantly larger than the value predicted by the simulation. 1. At high frequencies in particular. some care is needed in interfacing to the amplifier. Apparently the values incorporated in SPICE model were larger that those of the device that was used in the implementation. including design goals. the impedance magnitude is much smaller than that predicted by (7). Simulation results show that the impedance is resistive only for frequencies in the range 300 Hz ≤ f ≤ 3 kHz. and are reasonable for the transistors used.7 kHz 4.2 MHz 7. the amplifier input impedance is primarily capacitive. While the amplifier performed largely as predicted.06 dB 70. While the lower 3-dB frequency of the implementation agreed closely with the simulation result. Also. and measured performance.82 kΩ Table 2: Amplifier performance summary. 6 Conclusion Required Section: Wrap everything The design and implementation of a 46 dB.2 MHz bandwidth amplifier has been up. What was accomplished? presented. Hardware tests verified the performance of the amplifier.6 kΩ Measured 46. Both results (at 1 kHz) satisfy the prediction of (7). 13 . The error is larger than would be expected from measurement error for the test equipment used. the upper cutoff frequency of 1.1 Hz 719. The amplifier bandwidth is seen to be sensitive to small capacitive loads at the output (e. it is not surprising that the simulated and measured results differ from each other. At frequencies below or above this band. The measured 1. Some care should be taken in interpreting Figure 7 at other frequencies. The upper cutoff frequency is determined by the parasitic capacitance of transistor Q3 . the amplifier input impedance varies over several orders of magnitude.2 MHz bandwidth was achieved only after buffering the output signal and creating a low-impedance input source. simulated performance.5 dB 73 Hz 1. 13 pF scope probe).Design Peak Gain: 46.0 dB Lower 3-dB Corner: Upper 3-dB Corner: Input Resistance (@ 1 kHz): Simulation 46.

Lab 5: BJT amplifier Due Wed. Use a small-signal equivalent circuit to predict the lower cutoff frequency of the amplifier. Provide the maximum possible output dynamic range. Discuss how your choice of biasing influences the input resistance. If there are specific questions in the lab assignment that are not easily addressed in the normal write-up. The amplifier voltage gain is assumed to be measured at these “mid-band” frequencies (frequencies above those where the impedance of the capacitor is significant. 3. Construct and verify the performance of the amplifier. 5:00 PM 1 Overview The amplifier shown below utilizes a current source from lab 4 to appropriately bias the transistor Q3. In designing the circuit. the impedance of the capacitor is small. You should specify all component values. 12/6. assume that the signal vs does not contain any DC offset. Complete the design of the amplifier to give a voltage gain of 46 dB. 1. noting the actual (mid-band) gain and dynamic range. and Q3 . but below those where the parasitic capacitors of the BJTs become significant). Verify by simulation and experimentally. then this is a good place to address them. 2. +10 v RL vs Q3 R1 vout Q1 −5 v 2 Tasks Q2 C Use 2N3904 transistors for Q1 .A Lab 5 Assignment Use appendices for anything that does not fit into the normal writeup format. and the emitter of Q3 is essentially grounded. It is selected so that at “typical” signal frequencies. ECE-342 Fall 2006. The capacitor C will ultimately determine the low-frequency behavior of the amplifier. but your selections must meet the constraints: 1 kΩ ≤ RL ≤ 10 kΩ 10 µF ≤ C ≤ 100 µF Simulate your design. 14 . Determine the input resistance of your final design. Q2 .

. Time Management and Lab Notebook Documentation ECE341. Lab 1 Please use this form to collect signatures from your assigned TA for each lab as you complete the tasks indicated below. and lab notebooks have been reviewed. Date: 15 . Signatures must be collected on or before the indicated date. Attach this completed form to your final lab report. DEADLINES — All deadlines are at 4:00pm on the indicated dates Mon/Tues. Sep 16 Attend the lab briefing and review the deadlines given below. Text should be fairly complete. Sep 22 Date: Rough draft of report completed. 4:00pm. have the instructor/TA change and initial the dates listed below. Signature: Wed. with signatures indicating that tasks were completed on time. You may request a change of one or more of the deadlines listed below..B Time Management and Documentation Every ECE343 Lab will include a form similar to the one shown here. Be prepared to discuss any changes that you expect to make for the final report. 12345 12345 12345 12345 12345 Signature: Mon. Experimental Procedures Clearly Described: Lab Notebook Procedures: Preliminary Analysis of Results: Clarity of Results Presentation: Successful Design Demonstrated: Experimental measurements completed and entered into lab notebooks. Rate from 1 (worst) to 5 (best).9 Tues. Any modifications must be approved by Tuesday. The information documented on this form will constitute 30% of your lab grade. and sign in this block. Fall 2008. Circuit design and simulation results completed and entered into lab notebooks. 4:00pm. Sep 24 Final Report Due in Room 292.. Sep 19 Date: Rate from 1 (worst) to 5 (best). requiring primarily editing for grammar or consistency. At least one lab partner (and both lab notebooks!) must be present for each review. Sep 8. This request must be approved either Monday or Tuesday of the week in which the lab is assigned. If a change in schedule is approved.. Clarity of Design Process: Lab Notebook Procedures: Simulations Completed: Clarity of Simulation Results: Successful Design Complete: 12345 12345 12345 12345 12345 Signature: Fri.

ask. Consider the effect of the instrumentation (scope capabilities. • Use good grammar. function generator output impedance. • Make your graphs clear. Checklist 16 .5-inch right margin for grader comments. and 2. Is it easy for the grader to find each task? • Be technically accurate. If you have questions. or between the text and graphs/tables.5-inch text height (Page numbers can fall outside of the text region. etc. For example. • Use good lab technique. Axes should be labeled. • Clearly distinguish between simulated and experimental results. then follow up if possible. • Include units on any numerical values.) • Complete all of the tasks associated with the lab. Be especially careful about graphs/tables for which axis labels are automatically generated. if you expect that the scope probe changes the performance. – 7. and units should be indicated. • If your results are not as expected.5-inch line length: 0.) on your measurements. Don’t change notation from section to section.5-inch left margin. • Make sure that your notation is consistent.C General Notes for ECE-343 Lab Reports • Typesetting Requirements: – 12 point font – Single spaced – 5. then (at least!) include the probe in a simulation and see if it reproduces your observations.

) Only option 3 really gets the subject (“Data analysis”) correct. In general. or obscure the person performing the action..”. but unless it’s your diary (or a lab notebook).. the passive voice is often selected as a means of avoiding a first-person presentation.” (Avoid. It seems that the subject in option 2 (“We”) is not central to the ideas being presented...) 3. “Data analysis shows that. “The data were analyzed to show that. (In this case.” (Not bad. Active. In technical documents.. Both are common in technical writing. and does not really belong. is the subject “We”. Think about what the subject of the sentence should be. Instead of “We considered five options:.” (Best. but passive) 2. and tend to make written material more engaging (less boring). 17 . Third person. there will rarely be a reason to use the first-person presentation in a lab report. Writers often choose the passive voice deliberately when they want to focus on the object.. stick to the third-person presentation (unless there really is some reason that you personally should be the subject of an idea)... use the active voice. Given a choice. “We analyzed the data to show that. or should it be the “options”?) Active/Passive Voice In the active voice. Active.”. In general. the subject of the sentence is performing the action of the verb.. third person.First Person/Third Person There will always be exceptions. but first person. Consider these three variations: 1.. active sentences are shorter and more powerful than passive sentences. use “Five options are considered:. They use stronger verbs. for the passive voice the subject receives the action of the verb. In contrast.