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Jameco Part Number 45364FSC

MM74HC14 Hex Inverting Schmitt Trigger

September 1983 Revised February 1999

MM74HC14 Hex Inverting Schmitt Trigger


General Description
The MM74HC14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Features
s Typical propagation delay: 13 ns s Wide power supply range: 26V s Low quiescent current: 20 A maximum (74HC Series) s Low input current: 1 A maximum s Fanout of 10 LS-TTL loads s Typical hysteresis voltage: 0.9V at VCC = 4.5V

Ordering Code:
Order Number MM74HC14M MM74HC14SJ MM74HC14MTC MM74HC14N Package Number M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.

Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP

Logic Diagram

Top View

1999 Fairchild Semiconductor Corporation

DS005105.prf

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MM74HC14

Absolute Maximum Ratings(Note 1)


(Note 2) Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) (Soldering 10 seconds) 260C (Note 4)
VCC 2.0V 4.5V 6.0V Maximum 2.0V 4.5V 6.0V VT Negative Going Threshold Voltage Maximum Minimum 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V VH Hysteresis Voltage Minimum 2.0V 4.5V 6.0V Maximum 2.0V 4.5V 6.0V VOH Minimum HIGH Level Output Voltage VIN = VIL |IOUT | = 20 A VIN = VIL |IOUT | = 4.0 mA |IOUT | = 5.2 mA VOL Maximum LOW Level Output Voltage VIN = VIH |IOUT | = 20 A VIN = VIH |IOUT | = 4.0 mA |IOUT | = 5.2 mA IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN = VCC or GND VIN = VCC or GND IOUT = 0 A 4.5V 6.0V 6.0V 6.0V 4.5V 6.0V 2.0V 4.5V 6.0V 2.0V 4.5V 6.0V

Recommended Operating Conditions


Min Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) 40 +85 C 2 0 Max Units 6 VCC V V

0.5 to +7.0V 1.5 to VCC +1.5V 0.5 to VCC +0.5V 20 mA 25 mA 50 mA 65C to +150C 600 mW 500 mW

Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating plastic N package: 12 mW/C from 65C to 85C.

DC Electrical Characteristics
Symbol VT+ Parameter Positive Going Threshold Voltage Conditions Minimum

TA = 25C Typ 1.2 2.7 3.2 1.2 2.7 3.2 0.7 1.8 2.2 0.7 1.8 2.2 0.5 0.9 1.0 0.5 0.9 1.0 2.0 4.5 6.0 4.2 5.7 0 0 0 0.2 0.2 1.0 2.0 3.0 1.5 3.15 4.2 0.3 0.9 1.2 1.0 2.2 3.0 0.2 0.4 0.5 1.0 1.4 1.5 1.9 4.4 5.9 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.1 2.0

TA = 40 to 85C TA = 55 to 125C Guaranteed Limits 1.0 2.0 3.0 1.5 3.15 4.2 0.3 0.9 1.2 1.0 2.2 3.0 0.2 0.4 0.5 1.0 1.4 1.5 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 1.0 20 1.0 2.0 3.0 1.5 3.15 4.2 0.3 0.9 1.2 1.0 2.2 3.0 0.2 0.4 0.5 1.0 1.4 1.5 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 1.0 40

Units V V V V V V V V V V V V V V V V V V V V V V V V V V V V A A

Note 4: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

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MM74HC14

AC Electrical Characteristics
VCC = 5V, TA = 25C, CL = 15 pF, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Maximum Propagation Delay Conditions Typ 12 Guaranteed Limit 22 Units ns

AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol Parameter Conditions VCC 2.0V 4.5V 6.0V tTLH, tTHL Maximum Output Rise and Fall Time CPD CIN Power Dissipation Capacitance (Note 5) Maximum Input Capacitance 5 10 10 10 pF
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC.

TA = 25C Typ 60 13 11 30 8 7 27 125 25 21 75 15 13

TA = 40 to 85C TA = 55 to 125C Guaranteed Limits 156 31 26 95 19 16 188 38 32 110 22 19

Units ns ns ns ns ns ns pF

tPHL, tPLH Maximum Propagation Delay

2.0V 4.5V 6.0V (per gate)

Typical Performance Characteristics


Input Threshold, VT+, VT, vs Power Supply Voltage Propagation Delay vs Power Supply

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MM74HC14

Typical Applications
Low Power Oscillator

Note: The equations assume t1+ t2 >> tpd0 + tpd1

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MM74HC14

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D

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MM74HC14

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14

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MM74HC14 Hex Inverting Schmitt Trigger

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A

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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.